| *** Pre-CBMEM romstage console overflowed, log truncated! *** |
| |
| Selected tRRD : 4T |
| Selected tRTP : 5T |
| Selected tWTR : 5T |
| Selected tRFC : 174T |
| Done dimm mapping |
| Update PCI-E configuration space: |
| PCI(0, 0, 0)[a0] = 0 |
| PCI(0, 0, 0)[a4] = 8 |
| PCI(0, 0, 0)[bc] = 82a00000 |
| PCI(0, 0, 0)[a8] = 7d600000 |
| PCI(0, 0, 0)[ac] = 8 |
| PCI(0, 0, 0)[b8] = 80000000 |
| PCI(0, 0, 0)[b0] = 80a00000 |
| PCI(0, 0, 0)[b4] = 80800000 |
| Done memory map |
| Done io registers |
| Done jedec reset |
| Done MRS commands |
| t123: 1912, 6000, 7620 |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Initializing |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Debug or Disabled by AltDisableBit |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : Check to see if straps say ME DISABLED |
| ME: Wrong mode : 2 |
| ME: FWS2: 0x160a0140 |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x0 |
| ME: Invoke MEBx : 0x0 |
| ME: CPU replaced : 0x0 |
| ME: MBP ready : 0x0 |
| ME: MFS failure : 0x1 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0xa |
| ME: Current PM event: 0x6 |
| ME: Progress code : 0x1 |
| PASSED! Tell ME that DRAM is ready |
| ME: ME is reporting as disabled, so not waiting for a response. |
| ME: FWS2: 0x160a0140 |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x0 |
| ME: Invoke MEBx : 0x0 |
| ME: CPU replaced : 0x0 |
| ME: MBP ready : 0x0 |
| ME: MFS failure : 0x1 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0xa |
| ME: Current PM event: 0x6 |
| ME: Progress code : 0x1 |
| ME: Requested BIOS Action: No DID Ack received |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Initializing |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Debug or Disabled by AltDisableBit |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : Check to see if straps say ME DISABLED |
| memcfg DDR3 ref clock 133 MHz |
| memcfg DDR3 clock 1330 MHz |
| memcfg channel assignment: A: 0, B 1, C 2 |
| memcfg channel[0] config (00662020): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 8192 MB width x8 dual rank, selected |
| DIMMB 8192 MB width x8 dual rank |
| memcfg channel[1] config (00662020): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 8192 MB width x8 dual rank, selected |
| DIMMB 8192 MB width x8 dual rank |
| CBMEM: |
| IMD: root @ 7ffff000 254 entries. |
| IMD: root @ 7fffec00 62 entries. |
| External stage cache: |
| IMD: root @ 803ff000 254 entries. |
| IMD: root @ 803fec00 62 entries. |
| CBMEM entry for DIMM info: 0x7fffe9e0 |
| MTRR Range: Start=ff800000 End=0 (Size 800000) |
| MTRR Range: Start=0 End=1000000 (Size 1000000) |
| MTRR Range: Start=7f800000 End=80000000 (Size 800000) |
| MTRR Range: Start=80000000 End=80800000 (Size 800000) |
| CBFS @ 610200 size 1efe00 |
| CBFS: 'Master Header Locator' located CBFS at [610200:800000) |
| CBFS: Locating 'fallback/postcar' |
| CBFS: Found @ offset 39740 size 4974 |
| Decompressing stage fallback/postcar @ 0x7ffcdfc0 (35608 bytes) |
| Loading module at 7ffce000 with entry 7ffce000. filesize: 0x46d0 memsize: 0x8ad8 |
| Processing 146 relocs. Offset value of 0x7dfce000 |
| |
| |
| coreboot-4.9-1860-g2761847f90 Sun Jun 2 04:11:29 UTC 2019 postcar starting (log level: 7)... |
| usbdebug: Failed hardware init |
| CBFS: 'Master Header Locator' located CBFS at [610200:800000) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Found @ offset 1b740 size 1c96c |
| Decompressing stage fallback/ramstage @ 0x7ff79fc0 (339448 bytes) |
| Loading module at 7ff7a000 with entry 7ff7a000. filesize: 0x3d050 memsize: 0x52db8 |
| Processing 4024 relocs. Offset value of 0x7f17a000 |
| |
| |
| coreboot-4.9-1860-g2761847f90 Sun Jun 2 04:11:29 UTC 2019 ramstage starting (log level: 7)... |
| usbdebug: Failed hardware init |
| Normal boot. |
| BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0 |
| Enumerating buses... |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/0154] enabled |
| PCI: 00:01.0 [8086/0151] enabled |
| PCI: 00:02.0 [8086/0166] enabled |
| PCI: 00:04.0 [8086/0153] enabled |
| PCI: 00:14.0 [8086/1e31] enabled |
| PCI: 00:16.0 [8086/1e3a] enabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.2: Disabling device |
| PCI: Static device PCI: 00:16.3 not found, disabling it. |
| PCI: 00:19.0 [8086/1502] enabled |
| PCI: 00:1a.0 [8086/1e2d] enabled |
| PCI: 00:1b.0 [8086/1e20] enabled |
| PCH: PCIe Root Port coalescing is enabled |
| PCI: 00:1c.0 [8086/1e10] enabled |
| PCI: 00:1c.1 [8086/1e12] enabled |
| PCI: 00:1c.2 [8086/1e14] enabled |
| PCI: 00:1c.3: Disabling device |
| PCI: 00:1c.3 [8086/1e16] disabled |
| PCI: 00:1c.4: Disabling device |
| PCI: 00:1c.4: check set enabled |
| PCI: 00:1c.5: Disabling device |
| PCI: 00:1c.6: Disabling device |
| PCI: 00:1c.7: Disabling device |
| PCI: 00:1d.0 [8086/1e26] enabled |
| PCI: 00:1e.0: Disabling device |
| PCI: 00:1e.0 [8086/2448] disabled |
| PCI: 00:1f.0 [8086/1e55] enabled |
| FMAP: area COREBOOT found @ 610200 (2031104 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| PCI: 00:1f.2 [8086/1e01] enabled |
| PCI: 00:1f.3 [8086/1e22] enabled |
| PCI: 00:1f.5: Disabling device |
| PCI: 00:1f.5 [8086/1e09] disabled No operations |
| PCI: 00:1f.6: Disabling device |
| PCI: 00:1f.6 [8086/1e24] disabled No operations |
| PCI: Leftover static devices: |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: Check your devicetree.cb. |
| PCI: pci_scan_bus for bus 01 |
| PCI: 01:00.0 [10de/0ffc] enabled |
| PCI: 01:00.1 [10de/0e1b] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| Failed to enable LTR for dev = PCI: 01:00.0 |
| Failed to enable LTR for dev = PCI: 01:00.1 |
| scan_bus: scanning of bus PCI: 00:01.0 took 264 usecs |
| PCI: pci_scan_bus for bus 02 |
| PCI: 02:00.0 [1180/e822] enabled |
| PCI: 02:00.1 [1180/e232] enabled |
| PCI: 02:00.3 [1180/e832] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| Failed to enable LTR for dev = PCI: 02:00.0 |
| Failed to enable LTR for dev = PCI: 02:00.1 |
| Failed to enable LTR for dev = PCI: 02:00.3 |
| scan_bus: scanning of bus PCI: 00:1c.0 took 637 usecs |
| PCI: pci_scan_bus for bus 03 |
| PCI: 03:00.0 [8086/0085] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L1 |
| Failed to enable LTR for dev = PCI: 03:00.0 |
| scan_bus: scanning of bus PCI: 00:1c.1 took 243 usecs |
| PCI: pci_scan_bus for bus 04 |
| scan_bus: scanning of bus PCI: 00:1c.2 took 45 usecs |
| FMAP: area COREBOOT found @ 610200 (2031104 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| FMAP: area COREBOOT found @ 610200 (2031104 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| PMH7: ID 05 Revision 12 |
| PNP: 00ff.1 enabled |
| PNP: 0c31.0 enabled |
| EC Firmware ID G4HT39WW-3.22, Version 3.01B |
| FMAP: area COREBOOT found @ 610200 (2031104 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| FMAP: area COREBOOT found @ 610200 (2031104 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| FMAP: area COREBOOT found @ 610200 (2031104 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| FMAP: area COREBOOT found @ 610200 (2031104 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| H8: BDC installed |
| FMAP: area COREBOOT found @ 610200 (2031104 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| H8: WWAN detection not implemented. Assuming WWAN installed |
| FMAP: area COREBOOT found @ 610200 (2031104 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| FMAP: area COREBOOT found @ 610200 (2031104 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| FMAP: area COREBOOT found @ 610200 (2031104 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| FMAP: area COREBOOT found @ 610200 (2031104 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| PNP: 00ff.2 enabled |
| FMAP: area COREBOOT found @ 610200 (2031104 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| Hybrid graphics: Switching panel to integrated GPU. |
| PNP: 00ff.f disabled |
| scan_bus: scanning of bus PCI: 00:1f.0 took 4777 usecs |
| bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled |
| scan_bus: scanning of bus PCI: 00:1f.3 took 28 usecs |
| scan_bus: scanning of bus DOMAIN: 0000 took 6438 usecs |
| scan_bus: scanning of bus Root Device took 6446 usecs |
| done |
| FMAP: area RW_MRC_CACHE found @ 600000 (65536 bytes) |
| MRC: Checking cached data update for 'RW_MRC_CACHE'. |
| flash size 0xc00000 bytes |
| SF: Detected Opaque HW-sequencing with sector size 0x100, total 0xc00000 |
| SF size 0xc00000 does not correspond to CONFIG_ROM_SIZE 0x800000!! |
| MRC: no data in 'RW_MRC_CACHE' |
| MRC: cache data 'RW_MRC_CACHE' needs update. |
| SF: Successfully written 2 bytes @ 0x600000 |
| SF: Successfully written 2 bytes @ 0x600002 |
| SF: Successfully written 1492 bytes @ 0x600060 |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 6475 exit 17223 |
| found VGA at PCI: 00:02.0 |
| found VGA at PCI: 01:00.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. |
| PCI: 00:1a.0 EHCI BAR hook registered |
| More than one caller of pci_ehci_read_resources from PCI: 00:1d.0 |
| PNP: 00ff.1 missing read_resources |
| PNP: 00ff.2 missing read_resources |
| Done reading resources. |
| skipping PNP: 00ff.2@60 fixed resource, size=0! |
| skipping PNP: 00ff.2@62 fixed resource, size=0! |
| skipping PNP: 00ff.2@64 fixed resource, size=0! |
| skipping PNP: 00ff.2@66 fixed resource, size=0! |
| Setting resources... |
| TOUUD 0x87d600000 TOLUD 0x82a00000 TOM 0x800000000 |
| MEBASE 0x7ffff00000 |
| IGD decoded, subtracting 32M UMA and 2M GTT |
| TSEG base 0x80000000 size 8M |
| Available memory below 4GB: 2048M |
| Available memory above 4GB: 30678M |
| PCI: 00:01.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 01 io |
| PCI: 00:01.0 24 <- [0x00b0000000 - 0x00c1ffffff] size 0x12000000 gran 0x14 bus 01 prefmem |
| PCI: 00:01.0 20 <- [0x00e0000000 - 0x00e10fffff] size 0x01100000 gran 0x14 bus 01 mem |
| PCI: 01:00.0 10 <- [0x00e0000000 - 0x00e0ffffff] size 0x01000000 gran 0x18 mem |
| PCI: 01:00.0 14 <- [0x00b0000000 - 0x00bfffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 01:00.0 1c <- [0x00c0000000 - 0x00c1ffffff] size 0x02000000 gran 0x19 prefmem64 |
| PCI: 01:00.0 24 <- [0x0000002000 - 0x000000207f] size 0x00000080 gran 0x07 io |
| PCI: 01:00.0 30 <- [0x00e1000000 - 0x00e107ffff] size 0x00080000 gran 0x13 romem |
| PCI: 01:00.1 10 <- [0x00e1080000 - 0x00e1083fff] size 0x00004000 gran 0x0e mem |
| PCI: 00:02.0 10 <- [0x00e2400000 - 0x00e27fffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000004000 - 0x000000403f] size 0x00000040 gran 0x06 io |
| PCI: 00:04.0 10 <- [0x00e2a30000 - 0x00e2a37fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:14.0 10 <- [0x00e2a20000 - 0x00e2a2ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:16.0 10 <- [0x00e2a41000 - 0x00e2a4100f] size 0x00000010 gran 0x04 mem64 |
| PCI: 00:19.0 10 <- [0x00e2a00000 - 0x00e2a1ffff] size 0x00020000 gran 0x11 mem |
| PCI: 00:19.0 14 <- [0x00e2a3c000 - 0x00e2a3cfff] size 0x00001000 gran 0x0c mem |
| PCI: 00:19.0 18 <- [0x0000004040 - 0x000000405f] size 0x00000020 gran 0x05 io |
| PCI: 00:1a.0 EHCI Debug Port hook triggered |
| PCI: 00:1a.0 10 <- [0x00e2a3e000 - 0x00e2a3e3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1a.0 10 <- [0x00e2a3e000 - 0x00e2a3e3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1a.0 EHCI Debug Port relocated |
| PCI: 00:1b.0 10 <- [0x00e2a38000 - 0x00e2a3bfff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.0 20 <- [0x00e2800000 - 0x00e28fffff] size 0x00100000 gran 0x14 bus 02 mem |
| PCI: 02:00.0 10 <- [0x00e2801000 - 0x00e28010ff] size 0x00000100 gran 0x08 mem |
| PCI: 02:00.1 10 <- [0x00e2802000 - 0x00e28020ff] size 0x00000100 gran 0x08 mem |
| PCI: 02:00.3 10 <- [0x00e2800000 - 0x00e28007ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io |
| PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.1 20 <- [0x00e2900000 - 0x00e29fffff] size 0x00100000 gran 0x14 bus 03 mem |
| PCI: 03:00.0 10 <- [0x00e2900000 - 0x00e2901fff] size 0x00002000 gran 0x0d mem64 |
| PCI: 00:1c.2 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 04 io |
| PCI: 00:1c.2 24 <- [0x00e1400000 - 0x00e1bfffff] size 0x00800000 gran 0x14 bus 04 prefmem |
| PCI: 00:1c.2 20 <- [0x00e1c00000 - 0x00e23fffff] size 0x00800000 gran 0x14 bus 04 mem |
| NONE missing set_resources |
| PCI: 00:1d.0 10 <- [0x00e2a3f000 - 0x00e2a3f3ff] size 0x00000400 gran 0x0a mem |
| PNP: 00ff.1 missing set_resources |
| PNP: 00ff.2 missing set_resources |
| PCI: 00:1f.2 10 <- [0x0000004080 - 0x0000004087] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x0000004090 - 0x0000004093] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000004088 - 0x000000408f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x0000004094 - 0x0000004097] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000004060 - 0x000000407f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x00e2a3d000 - 0x00e2a3d7ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1f.3 10 <- [0x00e2a40000 - 0x00e2a400ff] size 0x00000100 gran 0x08 mem64 |
| Done setting resources. |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 2250 exit 0 |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 17aa/21f6 |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:01.0 bridge ctrl <- 0003 |
| PCI: 00:01.0 subsystem <- 17aa/21f6 |
| PCI: 00:01.0 cmd <- 07 |
| PCI: 00:02.0 subsystem <- 17aa/21f5 |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 17aa/21f6 |
| PCI: 00:14.0 cmd <- 102 |
| PCI: 00:16.0 subsystem <- 17aa/21f6 |
| PCI: 00:16.0 cmd <- 02 |
| PCI: 00:19.0 subsystem <- 17aa/21f3 |
| PCI: 00:19.0 cmd <- 103 |
| PCI: 00:1a.0 subsystem <- 17aa/21f6 |
| PCI: 00:1a.0 cmd <- 106 |
| PCI: 00:1b.0 subsystem <- 17aa/21f6 |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0003 |
| PCI: 00:1c.0 subsystem <- 17aa/21f6 |
| PCI: 00:1c.0 cmd <- 106 |
| PCI: 00:1c.1 bridge ctrl <- 0003 |
| PCI: 00:1c.1 subsystem <- 17aa/21f6 |
| PCI: 00:1c.1 cmd <- 106 |
| PCI: 00:1c.2 bridge ctrl <- 0003 |
| PCI: 00:1c.2 subsystem <- 17aa/21f6 |
| PCI: 00:1c.2 cmd <- 107 |
| PCI: 00:1d.0 subsystem <- 17aa/21f6 |
| PCI: 00:1d.0 cmd <- 102 |
| pch_decode_init |
| PCI: 00:1f.0 subsystem <- 17aa/21f6 |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 17aa/21f6 |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 00:1f.3 subsystem <- 17aa/21f6 |
| PCI: 00:1f.3 cmd <- 103 |
| PCI: 01:00.0 cmd <- 03 |
| PCI: 01:00.1 cmd <- 02 |
| PCI: 02:00.0 subsystem <- 17aa/21f6 |
| PCI: 02:00.0 cmd <- 06 |
| PCI: 02:00.1 cmd <- 06 |
| PCI: 02:00.3 cmd <- 02 |
| PCI: 03:00.0 cmd <- 02 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 252 exit 0 |
| Found TPM ST33ZP24 by ST Microelectronics |
| TPM: Startup |
| TPM: command 0x99 returned 0x0 |
| TPM: Asserting physical presence |
| TPM: command 0x4000000a returned 0x0 |
| TPM: command 0x65 returned 0x0 |
| TPM: flags disable=0, deactivated=1, nvlocked=1 |
| TPM: setup succeeded |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 1 usecs |
| CPU_CLUSTER: 0 init ... |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6 |
| 0x0000000080000000 - 0x00000000b0000000 size 0x30000000 type 0 |
| 0x00000000b0000000 - 0x00000000c2000000 size 0x12000000 type 1 |
| 0x00000000c2000000 - 0x00000000d0000000 size 0x0e000000 type 0 |
| 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 |
| 0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 |
| 0x0000000100000000 - 0x000000087d600000 size 0x77d600000 type 6 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 9/8. |
| MTRR: UC selected as default type. |
| MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6 |
| MTRR: 1 base 0x00000000b0000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 2 base 0x00000000c0000000 mask 0x0000000ffe000000 type 1 |
| MTRR: 3 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 4 base 0x0000000100000000 mask 0x0000000f00000000 type 6 |
| MTRR: 5 base 0x0000000200000000 mask 0x0000000e00000000 type 6 |
| MTRR: 6 base 0x0000000400000000 mask 0x0000000c00000000 type 6 |
| MTRR: 7 base 0x0000000800000000 mask 0x0000000f80000000 type 6 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| CPU has 4 cores, 8 threads enabled. |
| Setting up SMI for CPU |
| Will perform SMM setup. |
| CBFS: 'Master Header Locator' located CBFS at [610200:800000) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 152c0 size 6400 |
| microcode: sig=0x306a9 pf=0x10 revision=0x20 |
| CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz. |
| Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170 |
| Processing 16 relocs. Offset value of 0x00030000 |
| Attempting to start 7 APs |
| Waiting for 10ms after sending INIT. |
| Waiting for 1st SIPI to complete...done. |
| Waiting for 2nd SIPI to complete...AP: slot 1 apic_id 1. |
| done. |
| AP: slot 2 apic_id 5. |
| AP: slot 7 apic_id 6. |
| AP: slot 3 apic_id 3. |
| AP: slot 5 apic_id 2. |
| AP: slot 4 apic_id 4. |
| AP: slot 6 apic_id 7. |
| Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8 |
| Processing 13 relocs. Offset value of 0x00038000 |
| SMM Module: stub loaded at 00038000. Will call 7ff9a5e3(00000000) |
| Installing SMM handler to 0x80000000 |
| Loading module at 80010000 with entry 8001129e. filesize: 0x4218 memsize: 0x8240 |
| Processing 256 relocs. Offset value of 0x80010000 |
| Loading module at 80008000 with entry 80008000. filesize: 0x1a8 memsize: 0x1a8 |
| Processing 13 relocs. Offset value of 0x80008000 |
| SMM Module: placing jmp sequence at 80007c00 rel16 0x03fd |
| SMM Module: placing jmp sequence at 80007800 rel16 0x07fd |
| SMM Module: placing jmp sequence at 80007400 rel16 0x0bfd |
| SMM Module: placing jmp sequence at 80007000 rel16 0x0ffd |
| SMM Module: placing jmp sequence at 80006c00 rel16 0x13fd |
| SMM Module: placing jmp sequence at 80006800 rel16 0x17fd |
| SMM Module: placing jmp sequence at 80006400 rel16 0x1bfd |
| SMM Module: stub loaded at 80008000. Will call 8001129e(00000000) |
| Initializing Southbridge SMI... |
| |
| New SMBASE 0x80000000 |
| In relocation handler: cpu 0 |
| New SMBASE=0x80000000 IEDBASE=0x80400000 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| New SMBASE 0x7ffffc00 |
| In relocation handler: cpu 1 |
| New SMBASE=0x7ffffc00 IEDBASE=0x80400000 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| New SMBASE 0x7fffec00 |
| In relocation handler: cpu 5 |
| New SMBASE=0x7fffec00 IEDBASE=0x80400000 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| New SMBASE 0x7ffff400 |
| In relocation handler: cpu 3 |
| New SMBASE=0x7ffff400 IEDBASE=0x80400000 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| New SMBASE 0x7ffff000 |
| In relocation handler: cpu 4 |
| New SMBASE=0x7ffff000 IEDBASE=0x80400000 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| New SMBASE 0x7ffff800 |
| In relocation handler: cpu 2 |
| New SMBASE=0x7ffff800 IEDBASE=0x80400000 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| New SMBASE 0x7fffe800 |
| In relocation handler: cpu 6 |
| New SMBASE=0x7fffe800 IEDBASE=0x80400000 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| New SMBASE 0x7fffe400 |
| In relocation handler: cpu 7 |
| New SMBASE=0x7fffe400 IEDBASE=0x80400000 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| Initializing CPU #0 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz. |
| CPU: platform id 4 |
| CPU: cpuid(1) 0x306a9 |
| CPU: AES supported |
| CPU: TXT supported |
| CPU: VT supported |
| Setting up local APIC... |
| apic_id: 0x00 done. |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 3000 |
| Turbo is available but hidden |
| Turbo has been enabled |
| CPU #0 initialized |
| Initializing CPU #1 |
| Initializing CPU #2 |
| Initializing CPU #4 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| Enabling cache |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Initializing CPU #7 |
| Initializing CPU #6 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| Enabling cache |
| Initializing CPU #5 |
| Initializing CPU #3 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| Enabling cache |
| CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz. |
| CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz. |
| CPU: platform id 4 |
| CPU: platform id 4 |
| CPU: cpuid(1) 0x306a9 |
| CPU: cpuid(1) 0x306a9 |
| CPU: AES supported |
| CPU: TXT supported |
| CPU: VT supported |
| CPU: AES supported |
| CPU: TXT supported |
| CPU: VT supported |
| Setting up local APIC... |
| Setting up local APIC... |
| CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz. |
| apic_id: 0x05 done. |
| apic_id: 0x04 done. |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked |
| IA32_FEATURE_CONTROL already locked |
| CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz. |
| CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz. |
| CPU: platform id 4 |
| CPU: platform id 4 |
| CPU: cpuid(1) 0x306a9 |
| CPU: cpuid(1) 0x306a9 |
| CPU: AES supported |
| CPU: TXT supported |
| CPU: VT supported |
| CPU: AES supported |
| CPU: TXT supported |
| CPU: VT supported |
| Setting up local APIC... |
| Setting up local APIC... |
| CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz. |
| CPU: platform id 4 |
| CPU: platform id 4 |
| CPU: cpuid(1) 0x306a9 |
| CPU: cpuid(1) 0x306a9 |
| CPU: AES supported |
| CPU: TXT supported |
| CPU: VT supported |
| CPU: AES supported |
| CPU: TXT supported |
| CPU: VT supported |
| Setting up local APIC... |
| Setting up local APIC... |
| Enabling cache |
| model_x06ax: energy policy set to 6 |
| model_x06ax: energy policy set to 6 |
| apic_id: 0x03 done. |
| apic_id: 0x02 done. |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked |
| IA32_FEATURE_CONTROL already locked |
| CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz. |
| model_x06ax: frequency set to 3000 |
| model_x06ax: frequency set to 3000 |
| CPU #4 initialized |
| CPU #2 initialized |
| CPU: platform id 4 |
| apic_id: 0x06 done. |
| apic_id: 0x07 done. |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked |
| IA32_FEATURE_CONTROL already locked |
| CPU: cpuid(1) 0x306a9 |
| model_x06ax: energy policy set to 6 |
| model_x06ax: energy policy set to 6 |
| CPU: AES supported |
| CPU: TXT supported |
| CPU: VT supported |
| model_x06ax: frequency set to 3000 |
| model_x06ax: frequency set to 3000 |
| CPU #5 initialized |
| CPU #3 initialized |
| Setting up local APIC... |
| model_x06ax: energy policy set to 6 |
| model_x06ax: energy policy set to 6 |
| apic_id: 0x01 done. |
| model_x06ax: frequency set to 3000 |
| model_x06ax: frequency set to 3000 |
| CPU #7 initialized |
| CPU #6 initialized |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 3000 |
| CPU #1 initialized |
| bsp_do_flight_plan done after 93 msecs. |
| Initializing southbridge SMI... |
| SMI_STS: |
| GPE0_STS: GPIO14 GPIO11 GPIO9 GPIO7 GPIO5 GPIO4 GPIO3 GPIO0 |
| ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI5 GPI4 GPI3 GPI1 GPI0 |
| TCO_STS: |
| Locking SMM. |
| CPU_CLUSTER: 0 init finished in 107823 usecs |
| PCI: 00:00.0 init ... |
| Disabling PEG12. |
| Disabling PEG11. |
| Disabling PEG60. |
| Disabling Device 7. |
| Set BIOS_RESET_CPL |
| CPU TDP: 55 Watts |
| PCI: 00:00.0 init finished in 1015 usecs |
| PCI: 00:01.0 init ... |
| PCI: 00:01.0 init finished in 1 usecs |
| PCI: 00:02.0 init ... |
| GT Power Management Init |
| IVB GT2 35W Power Meter Weights |
| GT Power Management Init (post VBIOS) |
| |
| [0.266066] CONFIG => |
| [0.266067] (Primary => |
| [0.266068] (Port => Internal, |
| [0.266068] Framebuffer => |
| [0.266069] (Width => 640, |
| [0.266070] Height => 400, |
| [0.266071] Start_X => 0, |
| [0.266071] Start_Y => 0, |
| [0.266073] Stride => 1, |
| [0.266074] V_Stride => 1, |
| [0.266075] Tiling => Linear , |
| [0.266076] Rotation => No_Rotation, |
| [0.266077] Offset => 0xffffffff, |
| [0.266078] BPC => 8), |
| [0.266078] Mode => |
| [0.266079] (Dotclock => 139000000, |
| [0.266080] H_Visible => 1920, |
| [0.266081] H_Sync_Begin => 1980, |
| [0.266082] H_Sync_End => 2028, |
| [0.266083] H_Total => 2050, |
| [0.266084] V_Visible => 1080, |
| [0.266085] V_Sync_Begin => 1090, |
| [0.266086] V_Sync_End => 1100, |
| [0.266087] V_Total => 1130, |
| [0.266088] H_Sync_Active_High => False, |
| [0.266089] V_Sync_Active_High => False, |
| [0.266090] BPC => 5)), |
| [0.266091] Secondary => |
| [0.266091] (Port => Disabled, |
| [0.266092] Framebuffer => |
| [0.266092] (Width => 1, |
| [0.266093] Height => 1, |
| [0.266093] Start_X => 0, |
| [0.266094] Start_Y => 0, |
| [0.266094] Stride => 1, |
| [0.266095] V_Stride => 1, |
| [0.266095] Tiling => Linear , |
| [0.266097] Rotation => No_Rotation, |
| [0.266098] Offset => 0x00000000, |
| [0.266099] BPC => 8), |
| [0.266099] Mode => |
| [0.266100] (Dotclock => 19200000, |
| [0.266101] H_Visible => 1, |
| [0.266102] H_Sync_Begin => 1, |
| [0.266103] H_Sync_End => 1, |
| [0.266104] H_Total => 1, |
| [0.266105] V_Visible => 1, |
| [0.266106] V_Sync_Begin => 1, |
| [0.266107] V_Sync_End => 1, |
| [0.266108] V_Total => 1, |
| [0.266109] H_Sync_Active_High => False, |
| [0.266110] V_Sync_Active_High => False, |
| [0.266111] BPC => 5)), |
| [0.266112] Tertiary => |
| [0.266112] (Port => Disabled, |
| [0.266113] Framebuffer => |
| [0.266113] (Width => 1, |
| [0.266114] Height => 1, |
| [0.266114] Start_X => 0, |
| [0.266115] Start_Y => 0, |
| [0.266115] Stride => 1, |
| [0.266116] V_Stride => 1, |
| [0.266116] Tiling => Linear , |
| [0.266118] Rotation => No_Rotation, |
| [0.266119] Offset => 0x00000000, |
| [0.266120] BPC => 8), |
| [0.266120] Mode => |
| [0.266121] (Dotclock => 19200000, |
| [0.266122] H_Visible => 1, |
| [0.266123] H_Sync_Begin => 1, |
| [0.266124] H_Sync_End => 1, |
| [0.266125] H_Total => 1, |
| [0.266126] V_Visible => 1, |
| [0.266127] V_Sync_Begin => 1, |
| [0.266128] V_Sync_End => 1, |
| [0.266129] V_Total => 1, |
| [0.266130] H_Sync_Active_High => False, |
| [0.266131] V_Sync_Active_High => False, |
| [0.266132] BPC => 5))); |
| PCI: 00:02.0 init finished in 67457 usecs |
| PCI: 00:04.0 init ... |
| PCI: 00:04.0 init finished in 0 usecs |
| PCI: 00:14.0 init ... |
| XHCI: Setting up controller.. done. |
| PCI: 00:14.0 init finished in 7 usecs |
| PCI: 00:16.0 init ... |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Initializing |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Debug or Disabled by AltDisableBit |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : Check to see if straps say ME DISABLED |
| intel_me_path: mbp is not ready! |
| ME: BIOS path: Error |
| PCI: 00:16.0 init finished in 23 usecs |
| PCI: 00:19.0 init ... |
| PCI: 00:19.0 init finished in 0 usecs |
| PCI: 00:1a.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1a.0 init finished in 13 usecs |
| PCI: 00:1b.0 init ... |
| Azalia: base = e2a38000 |
| Azalia: codec_mask = 09 |
| Azalia: Initializing codec #3 |
| Azalia: codec viddid: 80862806 |
| Azalia: verb_size: 16 |
| Azalia: verb loaded. |
| Azalia: Initializing codec #0 |
| Azalia: codec viddid: 10ec0269 |
| Azalia: verb_size: 72 |
| Azalia: verb loaded. |
| PCI: 00:1b.0 init finished in 5805 usecs |
| PCI: 00:1c.0 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 10 usecs |
| PCI: 00:1c.1 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.1 init finished in 9 usecs |
| PCI: 00:1c.2 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.2 init finished in 11 usecs |
| PCI: 00:1d.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 13 usecs |
| PCI: 00:1f.0 init ... |
| pch: lpc_init |
| PCH: detected QM77, device id: 0x1e55, rev id 0x4 |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| FMAP: area COREBOOT found @ 610200 (2031104 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| Set power off after power failure. |
| FMAP: area COREBOOT found @ 610200 (2031104 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| NMI sources enabled. |
| PantherPoint PM init |
| RTC: failed = 0x0 |
| RTC Init |
| Disabling ACPI via APMC: |
| done. |
| pch_spi_init |
| PCI: 00:1f.0 init finished in 1287 usecs |
| PCI: 00:1f.2 init ... |
| SATA: Initializing... |
| FMAP: area COREBOOT found @ 610200 (2031104 bytes) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| SATA: Controller in AHCI mode. |
| ABAR: e2a3d000 |
| PCI: 00:1f.2 init finished in 346 usecs |
| PCI: 00:1f.3 init ... |
| PCI: 00:1f.3 init finished in 7 usecs |
| PCI: 01:00.0 init ... |
| PCI: 01:00.0 init finished in 0 usecs |
| PCI: 01:00.1 init ... |
| PCI: 01:00.1 init finished in 0 usecs |
| PCI: 02:00.0 init ... |
| PCI: 02:00.0 init finished in 0 usecs |
| PCI: 02:00.1 init ... |
| PCI: 02:00.1 init finished in 0 usecs |
| PCI: 02:00.3 init ... |
| PCI: 02:00.3 init finished in 0 usecs |
| PCI: 03:00.0 init ... |
| PCI: 03:00.0 init finished in 0 usecs |
| PNP: 00ff.2 init ... |
| PNP: 00ff.2 init finished in 0 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ... |
| I2C: 01:54 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ... |
| I2C: 01:55 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ... |
| I2C: 01:56 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ... |
| I2C: 01:57 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ... |
| Locking EEPROM RFID |
| init EEPROM done |
| I2C: 01:5c init finished in 26689 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ... |
| I2C: 01:5d init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ... |
| I2C: 01:5e init finished in 2 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ... |
| I2C: 01:5f init finished in 2 usecs |
| Devices initialized |
| BS: BS_DEV_INIT times (us): entry 64156 run 210563 exit 0 |
| Finalize devices... |
| PCI: 00:1f.0 final |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 0 run 259 exit 0 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 0 exit 0 |
| CBFS: 'Master Header Locator' located CBFS at [610200:800000) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 3e100 size 388f |
| CBFS: 'Master Header Locator' located CBFS at [610200:800000) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 7ff3d000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Generating ACPI PIRQ entries |
| Found 1 CPU(s) with 8 core(s) each. |
| PSS: 3001MHz power 55000 control 0x2700 status 0x2700 |
| PSS: 3000MHz power 55000 control 0x1e00 status 0x1e00 |
| PSS: 2400MHz power 41008 control 0x1800 status 0x1800 |
| PSS: 2000MHz power 32564 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 24829 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 17710 control 0xc00 status 0xc00 |
| PSS: 3001MHz power 55000 control 0x2700 status 0x2700 |
| PSS: 3000MHz power 55000 control 0x1e00 status 0x1e00 |
| PSS: 2400MHz power 41008 control 0x1800 status 0x1800 |
| PSS: 2000MHz power 32564 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 24829 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 17710 control 0xc00 status 0xc00 |
| PSS: 3001MHz power 55000 control 0x2700 status 0x2700 |
| PSS: 3000MHz power 55000 control 0x1e00 status 0x1e00 |
| PSS: 2400MHz power 41008 control 0x1800 status 0x1800 |
| PSS: 2000MHz power 32564 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 24829 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 17710 control 0xc00 status 0xc00 |
| PSS: 3001MHz power 55000 control 0x2700 status 0x2700 |
| PSS: 3000MHz power 55000 control 0x1e00 status 0x1e00 |
| PSS: 2400MHz power 41008 control 0x1800 status 0x1800 |
| PSS: 2000MHz power 32564 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 24829 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 17710 control 0xc00 status 0xc00 |
| PSS: 3001MHz power 55000 control 0x2700 status 0x2700 |
| PSS: 3000MHz power 55000 control 0x1e00 status 0x1e00 |
| PSS: 2400MHz power 41008 control 0x1800 status 0x1800 |
| PSS: 2000MHz power 32564 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 24829 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 17710 control 0xc00 status 0xc00 |
| PSS: 3001MHz power 55000 control 0x2700 status 0x2700 |
| PSS: 3000MHz power 55000 control 0x1e00 status 0x1e00 |
| PSS: 2400MHz power 41008 control 0x1800 status 0x1800 |
| PSS: 2000MHz power 32564 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 24829 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 17710 control 0xc00 status 0xc00 |
| PSS: 3001MHz power 55000 control 0x2700 status 0x2700 |
| PSS: 3000MHz power 55000 control 0x1e00 status 0x1e00 |
| PSS: 2400MHz power 41008 control 0x1800 status 0x1800 |
| PSS: 2000MHz power 32564 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 24829 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 17710 control 0xc00 status 0xc00 |
| PSS: 3001MHz power 55000 control 0x2700 status 0x2700 |
| PSS: 3000MHz power 55000 control 0x1e00 status 0x1e00 |
| PSS: 2400MHz power 41008 control 0x1800 status 0x1800 |
| PSS: 2000MHz power 32564 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 24829 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 17710 control 0xc00 status 0xc00 |
| \_SB.PCI0.LPCB.TPM: LPC TPM PNP: 0c31.0 |
| ACPI: * H8 |
| H8: BDC installed |
| H8: WWAN detection not implemented. Assuming WWAN installed |
| CBFS: 'Master Header Locator' located CBFS at [610200:800000) |
| CBFS: Locating 'pci10de,0ffc.rom' |
| CBFS: Found @ offset c2280 size 26000 |
| In CBFS, ROM address for PCI: 01:00.0 = ffed24c8 |
| \_SB.PCI0.RP02.WIFI: PCI: 03:00.0 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at 7ff15000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = 7ff43c00 |
| ACPI: * DMAR |
| ACPI: added table 6/32, length now 60 |
| current = 7ff43cd0 |
| ACPI: * HPET |
| ACPI: added table 7/32, length now 64 |
| CBFS: 'Master Header Locator' located CBFS at [610200:800000) |
| CBFS: Locating 'vbt.bin' |
| CBFS: Found @ offset 38940 size 58a |
| Found a VBT of 4459 bytes after decompression |
| GMA: Found VBT in CBFS |
| GMA: Found valid VBT in CBFS |
| CBFS: 'Master Header Locator' located CBFS at [610200:800000) |
| CBFS: Locating 'pci10de,0ffc.rom' |
| CBFS: Found @ offset c2280 size 26000 |
| In CBFS, ROM address for PCI: 01:00.0 = ffed24c8 |
| ACPI: done. |
| ACPI tables: 36112 bytes. |
| smbios_write_tables: 7ff14000 |
| Create SMBIOS type 17 |
| PCI: 03:00.0 (unknown) |
| SMBIOS tables: 1106 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum 6fe8 |
| Writing coreboot table at 0x7ff61000 |
| CBFS: 'Master Header Locator' located CBFS at [610200:800000) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 38f40 size 79c |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-000000007ff13fff: RAM |
| 4. 000000007ff14000-000000007ff79fff: CONFIGURATION TABLES |
| 5. 000000007ff7a000-000000007ffccfff: RAMSTAGE |
| 6. 000000007ffcd000-000000007fffffff: CONFIGURATION TABLES |
| 7. 0000000080000000-00000000829fffff: RESERVED |
| 8. 00000000f0000000-00000000f3ffffff: RESERVED |
| 9. 00000000fed40000-00000000fed44fff: RESERVED |
| 10. 00000000fed90000-00000000fed91fff: RESERVED |
| 11. 0000000100000000-000000087d5fffff: RAM |
| CBFS: 'Master Header Locator' located CBFS at [610200:800000) |
| Wrote coreboot table at: 7ff61000, 0xb44 bytes, checksum 40d8 |
| coreboot table: 2908 bytes. |
| IMD ROOT 0. 7ffff000 00001000 |
| IMD SMALL 1. 7fffe000 00001000 |
| CONSOLE 2. 7ffde000 00020000 |
| TIME STAMP 3. 7ffdd000 00000910 |
| MRC DATA 4. 7ffdc000 000005d4 |
| ROMSTG STCK 5. 7ffd7000 00005000 |
| AFTER CAR 6. 7ffcd000 0000a000 |
| RAMSTAGE 7. 7ff79000 00054000 |
| SMM BACKUP 8. 7ff69000 00010000 |
| COREBOOT 9. 7ff61000 00008000 |
| ACPI 10. 7ff3d000 00024000 |
| ACPI GNVS 11. 7ff3c000 00001000 |
| VGA ROM #0 12. 7ff25000 00016200 |
| TCPA TCGLOG13. 7ff15000 00010000 |
| SMBIOS 14. 7ff14000 00000800 |
| IMD small region: |
| IMD ROOT 0. 7fffec00 00000400 |
| USBDEBUG 1. 7fffeba0 00000050 |
| MEM INFO 2. 7fffe9e0 000001a9 |
| ROMSTAGE 3. 7fffe9c0 00000004 |
| COREBOOTFWD 4. 7fffe980 00000028 |
| BS: BS_WRITE_TABLES times (us): entry 0 run 47730 exit 0 |
| CBFS: 'Master Header Locator' located CBFS at [610200:800000) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset 5e880 size 6399c |
| Checking segment from ROM address 0xffe6eab8 |
| Checking segment from ROM address 0xffe6ead4 |
| Checking segment from ROM address 0xffe6eaf0 |
| Loading segment from ROM address 0xffe6eab8 |
| code (compression=1) |
| New segment dstaddr 0x00008200 memsize 0x1b988 srcaddr 0xffe6eb0c filesize 0x99fd |
| Loading Segment: addr: 0x00008200 memsz: 0x000000000001b988 filesz: 0x00000000000099fd |
| using LZMA |
| Clearing Segment: addr: 0x000000000001c143 memsz: 0x0000000000007a45 |
| Loading segment from ROM address 0xffe6ead4 |
| code (compression=1) |
| New segment dstaddr 0x00100000 memsize 0x125694 srcaddr 0xffe78509 filesize 0x59f4b |
| Loading Segment: addr: 0x00100000 memsz: 0x0000000000125694 filesz: 0x0000000000059f4b |
| using LZMA |
| Loading segment from ROM address 0xffe6eaf0 |
| Entry Point 0x00008200 |
| BS: BS_PAYLOAD_LOAD times (us): entry 0 run 129368 exit 0 |
| ICH-NM10-PCH: watchdog disabled |
| Jumping to boot code at 00008200(7ff61000) |
| tialized |
| bsp_do_flight_plan done after 93 msecs. |
| Initializing southbridge SMI... |
| SMI_STS: |
| GPE0_STS: GPIO14 GPIO11 GPIO9 GPIO7 GPIO5 GPIO4 GPIO3 GPIO0 |
| ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI5 GPI4 GPI3 GPI1 GPI0 |
| TCO_STS: |
| Locking SMM. |
| CPU_CLUSTER: 0 init finished in 107933 usecs |
| PCI: 00:00.0 init ... |
| Disabling PEG12. |
| Disabling PEG11. |
| Disabling PEG60. |
| Disabling Device 7. |
| Set BIOS_RESET_CPL |
| CPU TDP: 55 Watts |
| PCI: 00:00.0 init finished in 1015 usecs |
| PCI: 00:01.0 init ... |
| PCI: 00:01.0 init finished in 0 usecs |
| PCI: 00:02.0 init ... |
| GT Power Management Init |
| IVB GT2 35W Power Meter Weights |
| GT Power Management Init (post VBIOS) |
| |
| [0.249728] CONFIG => |
| [0.249729] (Primary => |
| [0.249729] (Port => Internal, |
| [0.249730] Framebuffer => |
| [0.249730] (Width => 640, |
| [0.249732] Height => 400, |
| [0.249733] Start_X => 0, |
| [0.249734] Start_Y => 0, |
| [0.249735] Stride => 1, |
| [0.249736] V_Stride => 1, |
| [0.249737] Tiling => Linear , |
| [0.249738] Rotation => No_Rotation, |
| [0.249739] Offset => 0xffffffff, |
| [0.249740] BPC => 8), |
| [0.249741] Mode => |
| [0.249741] (Dotclock => 139000000, |
| [0.249743] H_Visible => 1920, |
| [0.249744] H_Sync_Begin => 1980, |
| [0.249745] H_Sync_End => 2028, |
| [0.249746] H_Total => 2050, |
| [0.249747] V_Visible => 1080, |
| [0.249748] V_Sync_Begin => 1090, |
| [0.249749] V_Sync_End => 1100, |
| [0.249750] V_Total => 1130, |
| [0.249751] H_Sync_Active_High => False, |
| [0.249752] V_Sync_Active_High => False, |
| [0.249753] BPC => 5)), |
| [0.249754] Secondary => |
| [0.249754] (Port => Disabled, |
| [0.249755] Framebuffer => |
| [0.249755] (Width => 1, |
| [0.249756] Height => 1, |
| [0.249757] Start_X => 0, |
| [0.249757] Start_Y => 0, |
| [0.249758] Stride => 1, |
| [0.249759] V_Stride => 1, |
| [0.249759] Tiling => Linear , |
| [0.249761] Rotation => No_Rotation, |
| [0.249762] Offset => 0x00000000, |
| [0.249763] BPC => 8), |
| [0.249763] Mode => |
| [0.249764] (Dotclock => 19200000, |
| [0.249765] H_Visible => 1, |
| [0.249766] H_Sync_Begin => 1, |
| [0.249767] H_Sync_End => 1, |
| [0.249768] H_Total => 1, |
| [0.249769] V_Visible => 1, |
| [0.249770] V_Sync_Begin => 1, |
| [0.249771] V_Sync_End => 1, |
| [0.249772] V_Total => 1, |
| [0.249773] H_Sync_Active_High => False, |
| [0.249774] V_Sync_Active_High => False, |
| [0.249775] BPC => 5)), |
| [0.249776] Tertiary => |
| [0.249776] (Port => Disabled, |
| [0.249777] Framebuffer => |
| [0.249777] (Width => 1, |
| [0.249778] Height => 1, |
| [0.249779] Start_X => 0, |
| [0.249780] Start_Y => 0, |
| [0.249780] Stride => 1, |
| [0.249782] V_Stride => 1, |
| [0.249782] Tiling => Linear , |
| [0.249784] Rotation => No_Rotation, |
| [0.249785] Offset => 0x00000000, |
| [0.249786] BPC => 8), |
| [0.249786] Mode => |
| [0.249787] (Dotclock => 19200000, |
| [0.249788] H_Visible => 1, |
| [0.249789] H_Sync_Begin => 1, |
| [0.249790] H_Sync_End => 1, |
| [0.249791] H_Total => 1, |
| [0.249792] V_Visible => 1, |
| [0.249793] V_Sync_Begin => 1, |
| [0.249794] V_Sync_End => 1, |
| [0.249795] V_Total => 1, |
| [0.249796] H_Sync_Active_High => False, |
| [0.249797] V_Sync_Active_High => False, |
| [0.249798] BPC => 5))); |
| PCI: 00:02.0 init finished in 67460 usecs |
| PCI: 00:04.0 init ... |
| PCI: 00:04.0 init finished in 0 usecs |
| PCI: 00:14.0 init ... |
| XHCI: Setting up controller.. done. |
| PCI: 00:14.0 init finished in 7 usecs |
| PCI: 00:16.0 init ... |
| ME: FW Partition T |