blob: 0694871c405bc1c2f839668c05f8fcf18cd523e3 [file] [log] [blame]
*** Pre-CBMEM romstage console overflowed, log truncated! ***
rting (log level: 7)...
SMBus controller enabled
Setting up static northbridge registers... done
Initializing Graphics...
Back from systemagent_early_init()
Hybrid graphics: No discrete GPU present.
Intel ME early init
Intel ME firmware is ready
ME: Requested 0MB UMA
Starting native Platform init
DMI: Running at X4 @ 5000MT/s
FMAP: area RW_MRC_CACHE found @ 600000 (65536 bytes)
Trying stored timings.
Starting Ivy Bridge RAM training (fast boot).
100MHz reference clock support: yes
PLL_REF100_CFG value: 0x7
Trying CAS 11, tCK 320.
Found compatible clock, CAS pair.
Selected DRAM frequency: 800 MHz
Selected CAS latency : 11T
PLL busy... done in 30 us
MCU frequency is set at : 800 MHz
Done dimm mapping
Update PCI-E configuration space:
PCI(0, 0, 0)[a0] = 0
PCI(0, 0, 0)[a4] = 2
PCI(0, 0, 0)[bc] = 82a00000
PCI(0, 0, 0)[a8] = 7d600000
PCI(0, 0, 0)[ac] = 2
PCI(0, 0, 0)[b8] = 80000000
PCI(0, 0, 0)[b0] = 80a00000
PCI(0, 0, 0)[b4] = 80800000
Done memory map
Done io registers
t123: 1767, 6000, 7620
ME: Wrong mode : 2
ME: FWS2: 0x160a0140
ME: Bist in progress: 0x0
ME: ICC Status : 0x0
ME: Invoke MEBx : 0x0
ME: CPU replaced : 0x0
ME: MBP ready : 0x0
ME: MFS failure : 0x1
ME: Warm reset req : 0x0
ME: CPU repl valid : 0x1
ME: (Reserved) : 0x0
ME: FW update req : 0x0
ME: (Reserved) : 0x0
ME: Current state : 0xa
ME: Current PM event: 0x6
ME: Progress code : 0x1
PASSED! Tell ME that DRAM is ready
ME: ME is reporting as disabled, so not waiting for a response.
ME: FWS2: 0x160a0140
ME: Bist in progress: 0x0
ME: ICC Status : 0x0
ME: Invoke MEBx : 0x0
ME: CPU replaced : 0x0
ME: MBP ready : 0x0
ME: MFS failure : 0x1
ME: Warm reset req : 0x0
ME: CPU repl valid : 0x1
ME: (Reserved) : 0x0
ME: FW update req : 0x0
ME: (Reserved) : 0x0
ME: Current state : 0xa
ME: Current PM event: 0x6
ME: Progress code : 0x1
ME: Requested BIOS Action: No DID Ack received
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : NO
ME: Manufacturing Mode : YES
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Initializing
ME: Current Operation State : Bring up
ME: Current Operation Mode : Debug or Disabled by AltDisableBit
ME: Error Code : No Error
ME: Progress Phase : BUP Phase
ME: Power Management Event : Pseudo-global reset
ME: Progress Phase State : Check to see if straps say ME DISABLED
memcfg DDR3 ref clock 133 MHz
memcfg DDR3 clock 1596 MHz
memcfg channel assignment: A: 0, B 1, C 2
memcfg channel[0] config (00620010):
ECC inactive
enhanced interleave mode on
rank interleave on
DIMMA 4096 MB width x8 dual rank, selected
DIMMB 0 MB width x8 single rank
memcfg channel[1] config (00620010):
ECC inactive
enhanced interleave mode on
rank interleave on
DIMMA 4096 MB width x8 dual rank, selected
DIMMB 0 MB width x8 single rank
CBMEM:
IMD: root @ 0x7ffff000 254 entries.
IMD: root @ 0x7fffec00 62 entries.
External stage cache:
IMD: root @ 0x803ff000 254 entries.
IMD: root @ 0x803fec00 62 entries.
CBMEM entry for DIMM info: 0x7fffe900
SMM Memory Map
SMRAM : 0x80000000 0x800000
Subregion 0: 0x80000000 0x300000
Subregion 1: 0x80300000 0x100000
Subregion 2: 0x80400000 0x400000
MTRR Range: Start=7f800000 End=80000000 (Size 800000)
MTRR Range: Start=80000000 End=80800000 (Size 800000)
MTRR Range: Start=ff000000 End=0 (Size 1000000)
FMAP: area COREBOOT found @ 650200 (5963264 bytes)
CBFS: Found 'fallback/postcar' @0x3d000 size 0x4ea8
Decompressing stage fallback/postcar @ 0x7ffd2fc0 (36784 bytes)
Loading module at 0x7ffd3000 with entry 0x7ffd3000. filesize: 0x4b50 memsize: 0x8f70
Processing 191 relocs. Offset value of 0x7dfd3000
BS: romstage times (exec / console): total (unknown) / 1 ms
coreboot-4.12-3954-gd00af4fbac-dirty Wed Nov 11 09:20:03 UTC 2020 postcar starting (log level: 7)...
FMAP: area COREBOOT found @ 650200 (5963264 bytes)
CBFS: Found 'fallback/ramstage' @0x1b040 size 0x1d185
Decompressing stage fallback/ramstage @ 0x7ff7efc0 (339568 bytes)
Loading module at 0x7ff7f000 with entry 0x7ff7f000. filesize: 0x3d078 memsize: 0x52e30
Processing 3991 relocs. Offset value of 0x7f17f000
BS: postcar times (exec / console): total (unknown) / 0 ms
coreboot-4.12-3954-gd00af4fbac-dirty Wed Nov 11 09:20:03 UTC 2020 ramstage starting (log level: 7)...
Normal boot
Enumerating buses...
Root Device scanning...
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0154] enabled
PCI: Static device PCI: 00:01.0 not found, disabling it.
PCI: 00:02.0 [8086/0166] enabled
PCI: 00:04.0 [8086/0153] disabled
PCI: 00:14.0 [8086/1e31] enabled
PCI: 00:16.0 [8086/1e3a] enabled
PCI: 00:16.1: Disabling device
PCI: 00:16.2: Disabling device
PCI: 00:16.3: Disabling device
PCI: 00:19.0 [8086/1502] enabled
PCI: 00:1a.0 [8086/1e2d] enabled
PCI: 00:1b.0 [8086/1e20] enabled
PCH: PCIe Root Port coalescing is enabled
PCI: 00:1c.0 [8086/1e10] enabled
PCI: 00:1c.1 [8086/1e12] enabled
PCI: 00:1c.2 [8086/1e14] enabled
PCI: 00:1c.3: Disabling device
PCI: 00:1c.3 [8086/1e16] disabled
PCI: 00:1c.4: Disabling device
PCI: 00:1c.4: check set enabled
PCI: 00:1c.5: Disabling device
PCI: 00:1c.6: Disabling device
PCI: 00:1c.7: Disabling device
PCI: 00:1d.0 [8086/1e26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1e.0 [8086/2448] disabled
PCI: 00:1f.0 [8086/1e55] enabled
PCI: 00:1f.2 [8086/1e01] enabled
PCI: 00:1f.3 [8086/1e22] enabled
PCI: 00:1f.5: Disabling device
PCI: 00:1f.5 [8086/1e09] disabled No operations
PCI: 00:1f.6: Disabling device
PCI: 00:1f.6 [8086/1e24] disabled No operations
PCI: Leftover static devices:
PCI: 00:01.0
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:1c.4
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.7
PCI: Check your devicetree.cb.
PCI: 00:1c.0 scanning...
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [1180/e823] enabled
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
Failed to enable LTR for dev = PCI: 01:00.0
scan_bus: bus PCI: 00:1c.0 finished in 0 msecs
PCI: 00:1c.1 scanning...
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 [8086/08b2] enabled
Enabling Common Clock Configuration
ASPM: Enabled L1
PCIe: Max_Payload_Size adjusted to 128
scan_bus: bus PCI: 00:1c.1 finished in 0 msecs
PCI: 00:1c.2 scanning...
PCI: pci_scan_bus for bus 03
scan_bus: bus PCI: 00:1c.2 finished in 0 msecs
PCI: 00:1f.0 scanning...
PMH7: ID 05 Revision 12
PNP: 00ff.1 enabled
H8: EC Firmware ID G1HT32WW-3.22, Version 0.01B
No CMOS option 'power_management_beeps'.
No CMOS option 'low_battery_beep'.
H8: WWAN not installed
PNP: 00ff.2 enabled
Hybrid graphics: Not installed
PNP: 00ff.f disabled
PNP: 0c31.0 enabled
scan_bus: bus PCI: 00:1f.0 finished in 4 msecs
PCI: 00:1f.3 scanning...
I2C: 01:54 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled
bus: PCI: 00:1f.3[0]->scan_bus: bus PCI: 00:1f.3 finished in 0 msecs
scan_bus: bus DOMAIN: 0000 finished in 5 msecs
scan_bus: bus Root Device finished in 5 msecs
done
BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 0 ms
FMAP: area RW_MRC_CACHE found @ 600000 (65536 bytes)
MRC: No data in cbmem for 'RW_MRC_CACHE'.
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
TOUUD 0x27d600000 TOLUD 0x82a00000 TOM 0x200000000
MEBASE 0x7ffff00000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0x80000000 size 8M
Available memory below 4GB: 2048M
Available memory above 4GB: 6102M
PNP: 00ff.1 missing read_resources
PNP: 00ff.2 missing read_resources
Done reading resources.
==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 * [0x0 - 0xff] mem
PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 10 * [0x0 - 0x1fff] mem
PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff
NONE 18 * [0x0 - 0xfff] io
PCI: 00:1c.2 io: size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
NONE 10 * [0x0 - 0x7fffff] mem
PCI: 00:1c.2 mem: size: 800000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
NONE 14 * [0x0 - 0x7fffff] prefmem
PCI: 00:1c.2 prefmem: size: 800000 align: 22 gran: 20 limit: ffffffff done
=== Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
update_constraints: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
update_constraints: PCI: 00:1f.0 10000200 base 000015e0 limit 000015eb io (fixed)
update_constraints: PCI: 00:1f.0 10000300 base 00001600 limit 0000167b io (fixed)
update_constraints: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed)
update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed)
DOMAIN: 0000: Resource ranges:
* Base: 1000, Size: 5e0, Tag: 100
* Base: 15f0, Size: 10, Tag: 100
* Base: 167c, Size: e984, Tag: 100
PCI: 00:1c.2 1c * [0x2000 - 0x2fff] limit: 2fff io
PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
PCI: 00:19.0 18 * [0x1040 - 0x105f] limit: 105f io
PCI: 00:1f.2 20 * [0x1060 - 0x107f] limit: 107f io
PCI: 00:1f.2 10 * [0x1080 - 0x1087] limit: 1087 io
PCI: 00:1f.2 18 * [0x1088 - 0x108f] limit: 108f io
PCI: 00:1f.2 14 * [0x1090 - 0x1093] limit: 1093 io
PCI: 00:1f.2 1c * [0x1094 - 0x1097] limit: 1097 io
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff
update_constraints: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
update_constraints: PCI: 00:00.0 03 base 00000000 limit 0009ffff mem (fixed)
update_constraints: PCI: 00:00.0 04 base 00100000 limit 7fffffff mem (fixed)
update_constraints: PCI: 00:00.0 05 base 100000000 limit 27d5fffff mem (fixed)
update_constraints: PCI: 00:00.0 06 base 80000000 limit 829fffff mem (fixed)
update_constraints: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
update_constraints: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
update_constraints: PCI: 00:00.0 09 base fed90000 limit fed90fff mem (fixed)
update_constraints: PCI: 00:00.0 0a base fed91000 limit fed91fff mem (fixed)
update_constraints: PCI: 00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed)
update_constraints: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
update_constraints: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
DOMAIN: 0000: Resource ranges:
* Base: 82a00000, Size: 6d600000, Tag: 200
* Base: f4000000, Size: ac00000, Tag: 200
* Base: fec01000, Size: 13f000, Tag: 200
* Base: fed45000, Size: 4b000, Tag: 200
* Base: fed92000, Size: 26e000, Tag: 200
* Base: 27d600000, Size: d82a00000, Tag: 100200
PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
PCI: 00:1c.2 24 * [0x82c00000 - 0x833fffff] limit: 833fffff prefmem
PCI: 00:1c.2 20 * [0x83400000 - 0x83bfffff] limit: 83bfffff mem
PCI: 00:02.0 10 * [0x83c00000 - 0x83ffffff] limit: 83ffffff mem
PCI: 00:1c.0 20 * [0x82a00000 - 0x82afffff] limit: 82afffff mem
PCI: 00:1c.1 20 * [0x82b00000 - 0x82bfffff] limit: 82bfffff mem
PCI: 00:19.0 10 * [0x84000000 - 0x8401ffff] limit: 8401ffff mem
PCI: 00:14.0 10 * [0x84020000 - 0x8402ffff] limit: 8402ffff mem
PCI: 00:1b.0 10 * [0x84030000 - 0x84033fff] limit: 84033fff mem
PCI: 00:19.0 14 * [0x84034000 - 0x84034fff] limit: 84034fff mem
PCI: 00:1f.2 24 * [0x84035000 - 0x840357ff] limit: 840357ff mem
PCI: 00:1a.0 10 * [0x84036000 - 0x840363ff] limit: 840363ff mem
PCI: 00:1d.0 10 * [0x84037000 - 0x840373ff] limit: 840373ff mem
PCI: 00:1f.3 10 * [0x84038000 - 0x840380ff] limit: 840380ff mem
PCI: 00:16.0 10 * [0x84039000 - 0x8403900f] limit: 8403900f mem
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff done
PCI: 00:1c.0 mem: base: 82a00000 size: 100000 align: 20 gran: 20 limit: 82afffff
PCI: 00:1c.0: Resource ranges:
* Base: 82a00000, Size: 100000, Tag: 200
PCI: 01:00.0 10 * [0x82a00000 - 0x82a000ff] limit: 82a000ff mem
PCI: 00:1c.0 mem: base: 82a00000 size: 100000 align: 20 gran: 20 limit: 82afffff done
PCI: 00:1c.1 mem: base: 82b00000 size: 100000 align: 20 gran: 20 limit: 82bfffff
PCI: 00:1c.1: Resource ranges:
* Base: 82b00000, Size: 100000, Tag: 200
PCI: 02:00.0 10 * [0x82b00000 - 0x82b01fff] limit: 82b01fff mem
PCI: 00:1c.1 mem: base: 82b00000 size: 100000 align: 20 gran: 20 limit: 82bfffff done
PCI: 00:1c.2 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff
PCI: 00:1c.2: Resource ranges:
* Base: 2000, Size: 1000, Tag: 100
NONE 18 * [0x2000 - 0x2fff] limit: 2fff io
PCI: 00:1c.2 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done
PCI: 00:1c.2 prefmem: base: 82c00000 size: 800000 align: 22 gran: 20 limit: 833fffff
PCI: 00:1c.2: Resource ranges:
* Base: 82c00000, Size: 800000, Tag: 1200
NONE 14 * [0x82c00000 - 0x833fffff] limit: 833fffff prefmem
PCI: 00:1c.2 prefmem: base: 82c00000 size: 800000 align: 22 gran: 20 limit: 833fffff done
PCI: 00:1c.2 mem: base: 83400000 size: 800000 align: 22 gran: 20 limit: 83bfffff
PCI: 00:1c.2: Resource ranges:
* Base: 83400000, Size: 800000, Tag: 200
NONE 10 * [0x83400000 - 0x83bfffff] limit: 83bfffff mem
PCI: 00:1c.2 mem: base: 83400000 size: 800000 align: 22 gran: 20 limit: 83bfffff done
=== Resource allocator: DOMAIN: 0000 - resource allocation complete ===
PCI: 00:02.0 10 <- [0x0083c00000 - 0x0083ffffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
PCI: 00:14.0 10 <- [0x0084020000 - 0x008402ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:16.0 10 <- [0x0084039000 - 0x008403900f] size 0x00000010 gran 0x04 mem64
PCI: 00:19.0 10 <- [0x0084000000 - 0x008401ffff] size 0x00020000 gran 0x11 mem
PCI: 00:19.0 14 <- [0x0084034000 - 0x0084034fff] size 0x00001000 gran 0x0c mem
PCI: 00:19.0 18 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io
PCI: 00:1a.0 10 <- [0x0084036000 - 0x00840363ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x0084030000 - 0x0084033fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x0082a00000 - 0x0082afffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 01:00.0 10 <- [0x0082a00000 - 0x0082a000ff] size 0x00000100 gran 0x08 mem
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.1 20 <- [0x0082b00000 - 0x0082bfffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 02:00.0 10 <- [0x0082b00000 - 0x0082b01fff] size 0x00002000 gran 0x0d mem64
PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io
PCI: 00:1c.2 24 <- [0x0082c00000 - 0x00833fffff] size 0x00800000 gran 0x14 bus 03 prefmem
PCI: 00:1c.2 20 <- [0x0083400000 - 0x0083bfffff] size 0x00800000 gran 0x14 bus 03 mem
NONE missing set_resources
PCI: 00:1d.0 10 <- [0x0084037000 - 0x00840373ff] size 0x00000400 gran 0x0a mem
PNP: 00ff.1 missing set_resources
PNP: 00ff.2 missing set_resources
PCI: 00:1f.2 10 <- [0x0000001080 - 0x0000001087] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000001090 - 0x0000001093] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000001088 - 0x000000108f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000001094 - 0x0000001097] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000001060 - 0x000000107f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x0084035000 - 0x00840357ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x0084038000 - 0x00840380ff] size 0x00000100 gran 0x08 mem64
Done setting resources.
Done allocating resources.
BS: BS_DEV_RESOURCES run times (exec / console): 2 / 0 ms
Enabling resources...
PCI: 00:00.0 subsystem <- 17aa/21f3
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 17aa/21f3
PCI: 00:02.0 cmd <- 03
PCI: 00:14.0 subsystem <- 17aa/21f3
PCI: 00:14.0 cmd <- 102
PCI: 00:16.0 subsystem <- 17aa/21f3
PCI: 00:16.0 cmd <- 02
PCI: 00:19.0 subsystem <- 17aa/21f3
PCI: 00:19.0 cmd <- 103
PCI: 00:1a.0 subsystem <- 17aa/21f3
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 17aa/21f3
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0013
PCI: 00:1c.0 subsystem <- 17aa/21f3
PCI: 00:1c.0 cmd <- 106
PCI: 00:1c.1 bridge ctrl <- 0013
PCI: 00:1c.1 subsystem <- 17aa/21f3
PCI: 00:1c.1 cmd <- 106
PCI: 00:1c.2 bridge ctrl <- 0013
PCI: 00:1c.2 subsystem <- 17aa/21f3
PCI: 00:1c.2 cmd <- 107
PCI: 00:1d.0 subsystem <- 17aa/21f3
PCI: 00:1d.0 cmd <- 102
PCI: 00:1f.0 subsystem <- 17aa/21f3
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 17aa/21f3
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 17aa/21f3
PCI: 00:1f.3 cmd <- 103
PCI: 01:00.0 subsystem <- 17aa/21f3
PCI: 01:00.0 cmd <- 06
PCI: 02:00.0 cmd <- 02
done.
Found TPM ST33ZP24 by ST Microelectronics
TPM: Startup
TPM: command 0x99 returned 0x0
TPM: Asserting physical presence
TPM: command 0x4000000a returned 0x0
TPM: command 0x65 returned 0x0
TPM: flags disable=0, deactivated=0, nvlocked=1
TPM: setup succeeded
BS: BS_DEV_INIT entry times (exec / console): 65 / 0 ms
Initializing devices...
CPU_CLUSTER: 0 init
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6
0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 0
0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
0x0000000100000000 - 0x000000027d600000 size 0x17d600000 type 6
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 4/4.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
MTRR: 1 base 0x0000000090000000 mask 0x0000000ff0000000 type 1
MTRR: 2 base 0x0000000100000000 mask 0x0000000f00000000 type 6
MTRR: 3 base 0x0000000200000000 mask 0x0000000f80000000 type 6
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
CPU has 4 cores, 8 threads enabled.
Setting up SMI for CPU
Will perform SMM setup.
FMAP: area COREBOOT found @ 650200 (5963264 bytes)
CBFS: Found 'cpu_microcode_blob.bin' @0x147c0 size 0x6800
microcode: sig=0x306a9 pf=0x10 revision=0x21
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
Processing 16 relocs. Offset value of 0x00030000
Attempting to start 7 APs
Waiting for 10ms after sending INIT.
Waiting for 1st SIPI to complete...done.
Waiting for 2nd SIPI to complete...AP: slot 1 apic_id 1.
done.
AP: slot 2 apic_id 7.
AP: slot 5 apic_id 2.
AP: slot 7 apic_id 5.
AP: slot 3 apic_id 6.
AP: slot 6 apic_id 4.
AP: slot 4 apic_id 3.
Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
Processing 13 relocs. Offset value of 0x00038000
Unable to locate Global NVS
SMM Module: stub loaded at 0x00038000. Will call 0x7ff9efb2(0x00000000)
Installing permanent SMM handler to 0x80000000
Loading module at 0x80010000 with entry 0x80010cf5. filesize: 0x47d0 memsize: 0x8a08
Processing 258 relocs. Offset value of 0x80010000
Loading module at 0x80008000 with entry 0x80008000. filesize: 0x1b8 memsize: 0x1b8
Processing 13 relocs. Offset value of 0x80008000
SMM Module: placing jmp sequence at 0x80007c00 rel16 0x03fd
SMM Module: placing jmp sequence at 0x80007800 rel16 0x07fd
SMM Module: placing jmp sequence at 0x80007400 rel16 0x0bfd
SMM Module: placing jmp sequence at 0x80007000 rel16 0x0ffd
SMM Module: placing jmp sequence at 0x80006c00 rel16 0x13fd
SMM Module: placing jmp sequence at 0x80006800 rel16 0x17fd
SMM Module: placing jmp sequence at 0x80006400 rel16 0x1bfd
Unable to locate Global NVS
SMM Module: stub loaded at 0x80008000. Will call 0x80010cf5(0x00000000)
Initializing southbridge SMI...
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x80000000, cpu = 0
In relocation handler: cpu 0
New SMBASE=0x80000000 IEDBASE=0x80400000
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7ffffc00, cpu = 1
In relocation handler: cpu 1
New SMBASE=0x7ffffc00 IEDBASE=0x80400000
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7fffe400, cpu = 7
In relocation handler: cpu 7
New SMBASE=0x7fffe400 IEDBASE=0x80400000
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7fffe800, cpu = 6
In relocation handler: cpu 6
New SMBASE=0x7fffe800 IEDBASE=0x80400000
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7ffff000, cpu = 4
In relocation handler: cpu 4
New SMBASE=0x7ffff000 IEDBASE=0x80400000
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7fffec00, cpu = 5
In relocation handler: cpu 5
New SMBASE=0x7fffec00 IEDBASE=0x80400000
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7ffff800, cpu = 2
In relocation handler: cpu 2
New SMBASE=0x7ffff800 IEDBASE=0x80400000
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7ffff400, cpu = 3
In relocation handler: cpu 3
New SMBASE=0x7ffff400 IEDBASE=0x80400000
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
Initializing CPU #0
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Enabling cache
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: AES supported
CPU: TXT supported
CPU: VT supported
Setting up local APIC...
apic_id: 0x00 done.
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked
cpu: energy policy set to 6
model_x06ax: frequency set to 2700
Turbo is available but hidden
Turbo is available and visible
CPU #0 initialized
Initializing CPU #1
Initializing CPU #5
Initializing CPU #4
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Initializing CPU #6
Initializing CPU #7
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Enabling cache
Enabling cache
Enabling cache
Enabling cache
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Initializing CPU #2
Initializing CPU #3
CPU: vendor Intel device 306a9
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
CPU: family 06, model 3a, stepping 09
Enabling cache
Enabling cache
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: platform id 4
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: cpuid(1) 0x306a9
CPU: AES supported
CPU: TXT supported
CPU: VT supported
CPU: AES supported
CPU: TXT supported
CPU: VT supported
Setting up local APIC...
Setting up local APIC...
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: platform id 4
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: cpuid(1) 0x306a9
CPU: AES supported
CPU: TXT supported
CPU: VT supported
CPU: AES supported
CPU: TXT supported
CPU: VT supported
Setting up local APIC...
Setting up local APIC...
apic_id: 0x05 done.
apic_id: 0x04 done.
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked
IA32_FEATURE_CONTROL already locked
Enabling cache
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: platform id 4
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: cpuid(1) 0x306a9
CPU: AES supported
CPU: TXT supported
CPU: VT supported
CPU: AES supported
CPU: TXT supported
CPU: VT supported
Setting up local APIC...
Setting up local APIC...
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
apic_id: 0x06 done.
cpu: energy policy set to 6
cpu: energy policy set to 6
apic_id: 0x03 done.
apic_id: 0x02 done.
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked
IA32_FEATURE_CONTROL already locked
CPU: platform id 4
apic_id: 0x07 done.
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked
IA32_FEATURE_CONTROL already locked
CPU: cpuid(1) 0x306a9
model_x06ax: frequency set to 2700
model_x06ax: frequency set to 2700
CPU #7 initialized
CPU #6 initialized
CPU: AES supported
CPU: TXT supported
CPU: VT supported
cpu: energy policy set to 6
cpu: energy policy set to 6
Setting up local APIC...
model_x06ax: frequency set to 2700
model_x06ax: frequency set to 2700
CPU #4 initialized
CPU #5 initialized
apic_id: 0x01 done.
cpu: energy policy set to 6
cpu: energy policy set to 6
IA32_FEATURE_CONTROL already locked; VMX status: enabled
model_x06ax: frequency set to 2700
CPU #2 initialized
model_x06ax: frequency set to 2700
CPU #3 initialized
IA32_FEATURE_CONTROL already locked
cpu: energy policy set to 6
model_x06ax: frequency set to 2700
CPU #1 initialized
bsp_do_flight_plan done after 26 msecs.
Initializing southbridge SMI...
SMI_STS:
GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO9 GPIO7 GPIO5 GPIO4 GPIO3 GPIO0
ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0
TCO_STS:
Locking SMM.
CPU_CLUSTER: 0 init finished in 40 msecs
PCI: 00:00.0 init
Disabling PEG12.
Disabling PEG11.
Disabling PEG10.
Disabling Device 4.
Disabling PEG60.
Disabling Device 7.
Disabling PEG IO clock.
Set BIOS_RESET_CPL
CPU TDP: 45 Watts
PCI: 00:00.0 init finished in 1 msecs
PCI: 00:02.0 init
FMAP: area COREBOOT found @ 650200 (5963264 bytes)
CBFS: Found 'vbt.bin' @0x3c100 size 0x581
Found a VBT of 4459 bytes after decompression
GMA: Found VBT in CBFS
GMA: Found valid VBT in CBFS
GT Power Management Init
IVB GT2 35W Power Meter Weights
GT Power Management Init (post VBIOS)
[0.629657] CONFIG =>
[0.629657] (Primary =>
[0.629658] (Port => DP2 ,
[0.629658] Framebuffer =>
[0.629659] (Width => 1600,
[0.629659] Height => 900,
[0.629660] Start_X => 0,
[0.629660] Start_Y => 0,
[0.629661] Stride => 1600,
[0.629661] V_Stride => 900,
[0.629662] Tiling => Linear ,
[0.629662] Rotation => No_Rotation,
[0.629663] Offset => 0x00000000,
[0.629663] BPC => 8),
[0.629664] Mode =>
[0.629664] (Dotclock => 148500000,
[0.629665] H_Visible => 1920,
[0.629665] H_Sync_Begin => 2008,
[0.629666] H_Sync_End => 2052,
[0.629666] H_Total => 2200,
[0.629667] V_Visible => 1080,
[0.629667] V_Sync_Begin => 1084,
[0.629668] V_Sync_End => 1089,
[0.629668] V_Total => 1125,
[0.629669] H_Sync_Active_High => True,
[0.629669] V_Sync_Active_High => True,
[0.629670] BPC => 8)),
[0.629670] Secondary =>
[0.629671] (Port => DP3 ,
[0.629671] Framebuffer =>
[0.629671] (Width => 1600,
[0.629672] Height => 900,
[0.629672] Start_X => 0,
[0.629673] Start_Y => 0,
[0.629673] Stride => 1600,
[0.629674] V_Stride => 900,
[0.629674] Tiling => Linear ,
[0.629675] Rotation => No_Rotation,
[0.629675] Offset => 0x00000000,
[0.629676] BPC => 8),
[0.629676] Mode =>
[0.629676] (Dotclock => 148500000,
[0.629677] H_Visible => 1920,
[0.629677] H_Sync_Begin => 2008,
[0.629678] H_Sync_End => 2052,
[0.629678] H_Total => 2200,
[0.629679] V_Visible => 1080,
[0.629679] V_Sync_Begin => 1084,
[0.629680] V_Sync_End => 1089,
[0.629680] V_Total => 1125,
[0.629681] H_Sync_Active_High => True,
[0.629681] V_Sync_Active_High => True,
[0.629682] BPC => 8)),
[0.629682] Tertiary =>
[0.629683] (Port => LVDS ,
[0.629683] Framebuffer =>
[0.629683] (Width => 1600,
[0.629684] Height => 900,
[0.629684] Start_X => 0,
[0.629685] Start_Y => 0,
[0.629685] Stride => 1600,
[0.629686] V_Stride => 900,
[0.629686] Tiling => Linear ,
[0.629687] Rotation => No_Rotation,
[0.629687] Offset => 0x00000000,
[0.629688] BPC => 8),
[0.629688] Mode =>
[0.629688] (Dotclock => 110000000,
[0.629689] H_Visible => 1600,
[0.629689] H_Sync_Begin => 1664,
[0.629690] H_Sync_End => 1706,
[0.629690] H_Total => 2010,
[0.629691] V_Visible => 900,
[0.629691] V_Sync_Begin => 903,
[0.629692] V_Sync_End => 906,
[0.629692] V_Total => 912,
[0.629693] H_Sync_Active_High => False,
[0.629693] V_Sync_Active_High => False,
[0.629694] BPC => 6)));
PCI: 00:02.0 init finished in 530 msecs
PCI: 00:14.0 init
XHCI: Setting up controller.. done.
PCI: 00:14.0 init finished in 0 msecs
PCI: 00:16.0 init
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : NO
ME: Manufacturing Mode : YES
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Initializing
ME: Current Operation State : Bring up
ME: Current Operation Mode : Debug or Disabled by AltDisableBit
ME: Error Code : No Error
ME: Progress Phase : BUP Phase
ME: Power Management Event : Pseudo-global reset
ME: Progress Phase State : Check to see if straps say ME DISABLED
intel_me_path: mbp is not ready!
ME: BIOS path: Error
PCI: 00:16.0 init finished in 0 msecs
PCI: 00:19.0 init
PCI: 00:19.0 init finished in 0 msecs
PCI: 00:1a.0 init
EHCI: Setting up controller.. done.
PCI: 00:1a.0 init finished in 0 msecs
PCI: 00:1b.0 init
Azalia: base = 84030000
Azalia: codec_mask = 09
Azalia: Initializing codec #3
Azalia: codec viddid: 80862806
Azalia: verb_size: 16
Azalia: verb loaded.
Azalia: Initializing codec #0
Azalia: codec viddid: 10ec0269
Azalia: verb_size: 44
Azalia: verb loaded.
PCI: 00:1b.0 init finished in 4 msecs
PCI: 00:1c.0 init
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 0 msecs
PCI: 00:1c.1 init
Initializing PCH PCIe bridge.
PCI: 00:1c.1 init finished in 0 msecs
PCI: 00:1c.2 init
Initializing PCH PCIe bridge.
PCI: 00:1c.2 init finished in 0 msecs
PCI: 00:1d.0 init
EHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 0 msecs
PCI: 00:1f.0 init
pch: lpc_init
PCH: detected QM77, device id: 0x1e55, rev id 0x4
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
Set power off after power failure.
NMI sources enabled.
PantherPoint PM init
RTC: failed = 0x0
RTC Init
Disabling ACPI via APMC.
APMC done.
pch_spi_init
PCI: 00:1f.0 init finished in 0 msecs
PCI: 00:1f.2 init
SATA: Initializing...
SATA: Controller in AHCI mode.
ABAR: 0x84035000
PCI: 00:1f.2 init finished in 0 msecs
PCI: 00:1f.3 init
PCI: 00:1f.3 init finished in 0 msecs
PCI: 01:00.0 init
PCI: 01:00.0 init finished in 0 msecs
PCI: 02:00.0 init
PCI: 02:00.0 init finished in 0 msecs
PNP: 00ff.2 init
PNP: 00ff.2 init finished in 0 msecs
smbus: PCI: 00:1f.3[0]->I2C: 01:54 init
I2C: 01:54 init finished in 0 msecs
smbus: PCI: 00:1f.3[0]->I2C: 01:55 init
I2C: 01:55 init finished in 0 msecs
smbus: PCI: 00:1f.3[0]->I2C: 01:56 init
I2C: 01:56 init finished in 0 msecs
smbus: PCI: 00:1f.3[0]->I2C: 01:57 init
I2C: 01:57 init finished in 0 msecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5c init
Locking EEPROM RFID
init EEPROM done
I2C: 01:5c init finished in 25 msecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5d init
I2C: 01:5d init finished in 0 msecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5e init
I2C: 01:5e init finished in 0 msecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5f init
I2C: 01:5f init finished in 0 msecs
Devices initialized
BS: BS_DEV_INIT run times (exec / console): 604 / 0 ms
Finalize devices...
PCI: 00:1f.0 final
flash size 0xc00000 bytes
SF: Detected 00 0000 with sector size 0x1000, total 0xc00000
Finalizing SMM.
APMC done.
Devices finalized
FMAP: area COREBOOT found @ 650200 (5963264 bytes)
CBFS: Found 'fallback/dsdt.aml' @0x38780 size 0x3911
FMAP: area COREBOOT found @ 650200 (5963264 bytes)
ACPI: Writing ACPI tables at 7ff40000.
ACPI: * FACS
ACPI: * DSDT
ACPI: * FADT
ACPI: added table 1/32, length now 40
ACPI: * SSDT
Generating ACPI PIRQ entries
Found 1 CPU(s) with 8 core(s) each.
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
ACPI: * H8
H8: BDC not installed
H8: WWAN not installed
\_SB.PCI0.LPCB.TPM.TPM: LPC TPM PNP: 0c31.0
\_SB.PCI0.RP02.WF00: PCI: 02:00.0
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: added table 3/32, length now 48
ACPI: * TCPA
TCPA log created at 0x7ff2f000
ACPI: added table 4/32, length now 52
ACPI: * MADT
ACPI: added table 5/32, length now 56
current = 7ff46da0
ACPI: * DMAR
ACPI: added table 6/32, length now 60
current = 7ff46e60
ACPI: * HPET
ACPI: added table 7/32, length now 64
ACPI: done.
ACPI tables: 28320 bytes.
smbios_write_tables: 7ff2e000
Create SMBIOS type 16
Create SMBIOS type 17
PCI: 02:00.0 (unknown)
SMBIOS tables: 1026 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 3fe8
Writing coreboot table at 0x7ff64000
FMAP: area COREBOOT found @ 650200 (5963264 bytes)
CBFS: Found 'cmos_layout.bin' @0x3c800 size 0x7bc
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000a0000-00000000000fffff: RESERVED
3. 0000000000100000-000000007ff2dfff: RAM
4. 000000007ff2e000-000000007ff7efff: CONFIGURATION TABLES
5. 000000007ff7f000-000000007ffd1fff: RAMSTAGE
6. 000000007ffd2000-000000007fffffff: CONFIGURATION TABLES
7. 0000000080000000-00000000829fffff: RESERVED
8. 00000000f0000000-00000000f3ffffff: RESERVED
9. 00000000fed40000-00000000fed44fff: RESERVED
10. 00000000fed90000-00000000fed91fff: RESERVED
11. 0000000100000000-000000027d5fffff: RAM
FMAP: area COREBOOT found @ 650200 (5963264 bytes)
Wrote coreboot table at: 0x7ff64000, 0xb84 bytes, checksum db7e
coreboot table: 2972 bytes.
IMD ROOT 0. 0x7ffff000 0x00001000
IMD SMALL 1. 0x7fffe000 0x00001000
CONSOLE 2. 0x7ffde000 0x00020000
TIME STAMP 3. 0x7ffdd000 0x00000910
ROMSTG STCK 4. 0x7ffdc000 0x00001000
AFTER CAR 5. 0x7ffd2000 0x0000a000
RAMSTAGE 6. 0x7ff7e000 0x00054000
SMM BACKUP 7. 0x7ff6e000 0x00010000
4f444749 8. 0x7ff6c000 0x00002000
COREBOOT 9. 0x7ff64000 0x00008000
ACPI 10. 0x7ff40000 0x00024000
ACPI GNVS 11. 0x7ff3f000 0x00001000
TCPA TCGLOG12. 0x7ff2f000 0x00010000
SMBIOS 13. 0x7ff2e000 0x00000800
IMD small region:
IMD ROOT 0. 0x7fffec00 0x00000400
FMAP 1. 0x7fffeae0 0x0000010a
MEM INFO 2. 0x7fffe900 0x000001e0
ROMSTAGE 3. 0x7fffe8e0 0x00000004
BS: BS_WRITE_TABLES run times (exec / console): 25 / 0 ms
FMAP: area COREBOOT found @ 650200 (5963264 bytes)
CBFS: Found 'fallback/payload' @0x41f00 size 0xb1a5b
Checking segment from ROM address 0xffa92138
Checking segment from ROM address 0xffa92154
Loading segment from ROM address 0xffa92138
code (compression=1)
New segment dstaddr 0x00800000 memsize 0x410000 srcaddr 0xffa92170 filesize 0xb1a23
Loading Segment: addr: 0x00800000 memsz: 0x0000000000410000 filesz: 0x00000000000b1a23
using LZMA
Loading segment from ROM address 0xffa92154
Entry Point 0x008008f0
BS: BS_PAYLOAD_LOAD run times (exec / console): 255 / 0 ms
ICH-NM10-PCH: watchdog disabled
Jumping to boot code at 0x008008f0(0x7ff64000)