blob: 371079c5d97dd81069a8161764ffae7c2c2cd0d7 [file] [log] [blame]
coreboot-4.10-967-g6e66d7b8eb Thu Oct 10 14:06:09 UTC 2019 romstage starting (log level: 6)...
Setting up static northbridge registers... done
Initializing Graphics...
FMAP: Found "FLASH" version 1.1 at 610000.
FMAP: base = ff400000 size = c00000 #areas = 4
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
Back from systemagent_early_init()
POST: 0x38
Hybrid graphics: No discrete GPU present.
SMBus controller enabled.
POST: 0x39
POST: 0x3a
Intel ME early init
Intel ME firmware is ready
ME: Requested 32MB UMA
Starting native Platform init
DMI: Running at X4 @ 5000MT/s
FMAP: area RW_MRC_CACHE found @ 600000 (65536 bytes)
Trying stored timings.
Starting Ivybridge RAM training (1).
100MHz reference clock support: yes
Trying CAS 11, tCK 320.
Found compatible clock, CAS pair.
Selected DRAM frequency: 800 MHz
Selected CAS latency : 11T
PLL busy... done in 10 us
MCU frequency is set at : 800 MHz
Done dimm mapping
Update PCI-E configuration space:
PCI(0, 0, 0)[a0] = 0
PCI(0, 0, 0)[a4] = 2
PCI(0, 0, 0)[bc] = 82a00000
PCI(0, 0, 0)[a8] = 7b600000
PCI(0, 0, 0)[ac] = 2
PCI(0, 0, 0)[b8] = 80000000
PCI(0, 0, 0)[b0] = 80a00000
PCI(0, 0, 0)[b4] = 80800000
PCI(0, 0, 0)[7c] = 7f
PCI(0, 0, 0)[70] = fe000000
PCI(0, 0, 0)[74] = 1
PCI(0, 0, 0)[78] = fe000c00
Done memory map
Done io registers
t123: 1767, 6000, 7620
ME: FWS2: 0x101f012e
ME: Bist in progress: 0x0
ME: ICC Status : 0x3
ME: Invoke MEBx : 0x1
ME: CPU replaced : 0x0
ME: MBP ready : 0x1
ME: MFS failure : 0x0
ME: Warm reset req : 0x0
ME: CPU repl valid : 0x1
ME: (Reserved) : 0x0
ME: FW update req : 0x0
ME: (Reserved) : 0x0
ME: Current state : 0x1f
ME: Current PM event: 0x0
ME: Progress code : 0x1
PASSED! Tell ME that DRAM is ready
ME: FWS2: 0x102c012e
ME: Bist in progress: 0x0
ME: ICC Status : 0x3
ME: Invoke MEBx : 0x1
ME: CPU replaced : 0x0
ME: MBP ready : 0x1
ME: MFS failure : 0x0
ME: Warm reset req : 0x0
ME: CPU repl valid : 0x1
ME: (Reserved) : 0x0
ME: FW update req : 0x0
ME: (Reserved) : 0x0
ME: Current state : 0x2c
ME: Current PM event: 0x0
ME: Progress code : 0x1
ME: Requested BIOS Action: Continue to boot
memcfg DDR3 ref clock 133 MHz
memcfg DDR3 clock 1596 MHz
memcfg channel assignment: A: 0, B 1, C 2
memcfg channel[0] config (00620010):
ECC inactive
enhanced interleave mode on
rank interleave on
DIMMA 4096 MB width x8 dual rank, selected
DIMMB 0 MB width x8 single rank
memcfg channel[1] config (00620010):
ECC inactive
enhanced interleave mode on
rank interleave on
DIMMA 4096 MB width x8 dual rank, selected
DIMMB 0 MB width x8 single rank
CBMEM:
IMD: root @ 7ffff000 254 entries.
IMD: root @ 7fffec00 62 entries.
External stage cache:
IMD: root @ 803ff000 254 entries.
IMD: root @ 803fec00 62 entries.
CBMEM entry for DIMM info: 0x7fffe960
POST: 0x3b
POST: 0x3c
POST: 0x3d
POST: 0x3f
SMM Memory Map
SMRAM : 0x80000000 0x800000
Subregion 0: 0x80000000 0x300000
Subregion 1: 0x80300000 0x100000
Subregion 2: 0x80400000 0x400000
MTRR Range: Start=7f800000 End=80000000 (Size 800000)
MTRR Range: Start=80000000 End=80800000 (Size 800000)
MTRR Range: Start=ff000000 End=0 (Size 1000000)
CBFS: 'Master Header Locator' located CBFS at [610200:c00000)
CBFS: Locating 'fallback/postcar'
CBFS: Found @ offset 423c0 size 45e8
Decompressing stage fallback/postcar @ 0x7ffd2fc0 (34384 bytes)
Loading module at 7ffd3000 with entry 7ffd3000. filesize: 0x4350 memsize: 0x8610
Processing 143 relocs. Offset value of 0x7dfd3000
coreboot-4.10-967-g6e66d7b8eb Thu Oct 10 14:06:09 UTC 2019 postcar starting (log level: 7)...
CBFS: 'Master Header Locator' located CBFS at [610200:c00000)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 19900 size 17479
Decompressing stage fallback/ramstage @ 0x7ff8bfc0 (286552 bytes)
Loading module at 7ff8c000 with entry 7ff8c000. filesize: 0x30fd8 memsize: 0x45f18
Processing 3560 relocs. Offset value of 0x7f18c000
coreboot-4.10-967-g6e66d7b8eb Thu Oct 10 14:06:09 UTC 2019 ramstage starting (log level: 7)...
POST: 0x39
POST: 0x80
Normal boot.
POST: 0x70
BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0
POST: 0x71
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0
POST: 0x72
Enumerating buses...
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [8086/0154] enabled
PCI: Static device PCI: 00:01.0 not found, disabling it.
PCI: 00:02.0 [8086/0166] enabled
PCI: 00:04.0 [8086/0153] disabled
PCI: 00:14.0 [8086/1e31] enabled
PCI: 00:16.0 [8086/1e3a] enabled
PCI: 00:16.1: Disabling device
PCI: 00:16.1 [8086/1e3b] disabled No operations
PCI: 00:16.2: Disabling device
PCI: 00:16.2 [8086/1e3c] disabled No operations
PCI: 00:16.3: Disabling device
PCI: 00:16.3 [8086/1e3d] disabled No operations
PCI: 00:19.0 [8086/1502] enabled
PCI: 00:1a.0 [8086/1e2d] enabled
PCI: 00:1b.0 [8086/1e20] enabled
PCH: PCIe Root Port coalescing is enabled
PCI: 00:1c.0 [8086/1e10] enabled
PCI: 00:1c.1 [8086/1e12] enabled
PCI: 00:1c.2 [8086/1e14] enabled
PCI: 00:1c.3: Disabling device
PCI: 00:1c.3 [8086/1e16] disabled
PCI: 00:1c.4: Disabling device
PCI: 00:1c.4: check set enabled
PCI: 00:1c.4 [8086/1e18] disabled
PCI: 00:1c.5: Disabling device
PCI: 00:1c.5 [8086/1e1a] disabled
PCI: 00:1c.6: Disabling device
PCI: 00:1c.6 [8086/1e1c] disabled
PCI: 00:1c.7: Disabling device
PCI: 00:1d.0 [8086/1e26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1e.0 [8086/2448] disabled
PCI: 00:1f.0 [8086/1e55] enabled
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
PCI: 00:1f.2 [8086/1e01] enabled
PCI: 00:1f.3 [8086/1e22] enabled
PCI: 00:1f.5: Disabling device
PCI: 00:1f.5 [8086/1e09] disabled No operations
PCI: 00:1f.6: Disabling device
PCI: 00:1f.6 [8086/1e24] disabled No operations
POST: 0x25
PCI: Leftover static devices:
PCI: 00:01.0
PCI: 00:1c.7
PCI: Check your devicetree.cb.
PCI: pci_scan_bus for bus 01
POST: 0x24
PCI: 01:00.0 [1180/e823] enabled
POST: 0x25
POST: 0x55
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
Failed to enable LTR for dev = PCI: 01:00.0
scan_bus: scanning of bus PCI: 00:1c.0 took 249 usecs
PCI: pci_scan_bus for bus 02
POST: 0x24
PCI: 02:00.0 [8086/08b2] enabled
POST: 0x25
POST: 0x55
Enabling Common Clock Configuration
ASPM: Enabled L1
scan_bus: scanning of bus PCI: 00:1c.1 took 257 usecs
PCI: pci_scan_bus for bus 03
POST: 0x24
POST: 0x25
POST: 0x55
scan_bus: scanning of bus PCI: 00:1c.2 took 52 usecs
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
PMH7: ID 05 Revision 12
PNP: 00ff.1 enabled
EC Firmware ID G1HT32WW-3.22, Version 0.01B
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
No CMOS option 'power_management_beeps'.
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
No CMOS option 'low_battery_beep'.
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
H8: WWAN installed
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
PNP: 00ff.2 enabled
Hybrid graphics: Not installed
PNP: 00ff.f disabled
PNP: 0c31.0 enabled
scan_bus: scanning of bus PCI: 00:1f.0 took 4918 usecs
bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled
scan_bus: scanning of bus PCI: 00:1f.3 took 16 usecs
POST: 0x55
scan_bus: scanning of bus DOMAIN: 0000 took 5883 usecs
scan_bus: scanning of bus Root Device took 5888 usecs
done
FMAP: area RW_MRC_CACHE found @ 600000 (65536 bytes)
MRC: No data in cbmem for 'RW_MRC_CACHE'.
BS: BS_DEV_ENUMERATE times (us): entry 0 run 5914 exit 3
POST: 0x73
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
PNP: 00ff.1 missing read_resources
PNP: 00ff.2 missing read_resources
Done reading resources.
skipping PNP: 00ff.2@60 fixed resource, size=0!
skipping PNP: 00ff.2@62 fixed resource, size=0!
skipping PNP: 00ff.2@64 fixed resource, size=0!
skipping PNP: 00ff.2@66 fixed resource, size=0!
Setting resources...
TOUUD 0x27b600000 TOLUD 0x82a00000 TOM 0x200000000
MEBASE 0x1fe000000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0x80000000 size 8M
Available memory below 4GB: 2048M
Available memory above 4GB: 6070M
PCI: 00:02.0 10 <- [0x00e1000000 - 0x00e13fffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io
PCI: 00:14.0 10 <- [0x00e1620000 - 0x00e162ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:16.0 10 <- [0x00e1639000 - 0x00e163900f] size 0x00000010 gran 0x04 mem64
PCI: 00:19.0 10 <- [0x00e1600000 - 0x00e161ffff] size 0x00020000 gran 0x11 mem
PCI: 00:19.0 14 <- [0x00e1634000 - 0x00e1634fff] size 0x00001000 gran 0x0c mem
PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io
PCI: 00:1a.0 10 <- [0x00e1636000 - 0x00e16363ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x00e1630000 - 0x00e1633fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x00e1400000 - 0x00e14fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 01:00.0 10 <- [0x00e1400000 - 0x00e14000ff] size 0x00000100 gran 0x08 mem
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.1 20 <- [0x00e1500000 - 0x00e15fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 02:00.0 10 <- [0x00e1500000 - 0x00e1501fff] size 0x00002000 gran 0x0d mem64
PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io
PCI: 00:1c.2 24 <- [0x00e0000000 - 0x00e07fffff] size 0x00800000 gran 0x14 bus 03 prefmem
PCI: 00:1c.2 20 <- [0x00e0800000 - 0x00e0ffffff] size 0x00800000 gran 0x14 bus 03 mem
NONE missing set_resources
PCI: 00:1d.0 10 <- [0x00e1637000 - 0x00e16373ff] size 0x00000400 gran 0x0a mem
PNP: 00ff.1 missing set_resources
PNP: 00ff.2 missing set_resources
PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00e1635000 - 0x00e16357ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x00e1638000 - 0x00e16380ff] size 0x00000100 gran 0x08 mem64
Done setting resources.
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 1286 exit 0
POST: 0x74
Enabling resources...
PCI: 00:00.0 subsystem <- 17aa/21f3
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 17aa/21f3
PCI: 00:02.0 cmd <- 03
PCI: 00:14.0 subsystem <- 17aa/21f3
PCI: 00:14.0 cmd <- 102
PCI: 00:16.0 subsystem <- 17aa/21f3
PCI: 00:16.0 cmd <- 02
PCI: 00:19.0 subsystem <- 17aa/21f3
PCI: 00:19.0 cmd <- 103
PCI: 00:1a.0 subsystem <- 17aa/21f3
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 17aa/21f3
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0013
PCI: 00:1c.0 subsystem <- 17aa/21f3
PCI: 00:1c.0 cmd <- 106
PCI: 00:1c.1 bridge ctrl <- 0013
PCI: 00:1c.1 subsystem <- 17aa/21f3
PCI: 00:1c.1 cmd <- 106
PCI: 00:1c.2 bridge ctrl <- 0013
PCI: 00:1c.2 subsystem <- 17aa/21f3
PCI: 00:1c.2 cmd <- 107
PCI: 00:1d.0 subsystem <- 17aa/21f3
PCI: 00:1d.0 cmd <- 102
PCI: 00:1f.0 subsystem <- 17aa/21f3
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 17aa/21f3
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 17aa/21f3
PCI: 00:1f.3 cmd <- 103
PCI: 01:00.0 subsystem <- 17aa/21f3
PCI: 01:00.0 cmd <- 06
PCI: 02:00.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 131 exit 0
Found TPM ST33ZP24 by ST Microelectronics
TPM: Startup
TPM: command 0x99 returned 0x0
TPM: Asserting physical presence
TPM: command 0x4000000a returned 0x0
TPM: command 0x65 returned 0x0
TPM: flags disable=0, deactivated=0, nvlocked=1
TPM: setup succeeded
POST: 0x75
Initializing devices...
Root Device init ...
Root Device init finished in 0 usecs
POST: 0x75
CPU_CLUSTER: 0 init ...
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6
0x0000000080000000 - 0x00000000d0000000 size 0x50000000 type 0
0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
0x0000000100000000 - 0x000000027b600000 size 0x17b600000 type 6
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 4/4.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
MTRR: 1 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
MTRR: 2 base 0x0000000100000000 mask 0x0000000f00000000 type 6
MTRR: 3 base 0x0000000200000000 mask 0x0000000f80000000 type 6
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
CPU has 4 cores, 8 threads enabled.
Setting up SMI for CPU
Will perform SMM setup.
CBFS: 'Master Header Locator' located CBFS at [610200:c00000)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13080 size 6800
microcode: sig=0x306a9 pf=0x10 revision=0x21
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
Processing 16 relocs. Offset value of 0x00030000
Attempting to start 7 APs
Waiting for 10ms after sending INIT.
Waiting for 1st SIPI to complete...done.
Waiting for 2nd SIPI to complete...AP: slot 1 apic_id 1.
done.
AP: slot 2 apic_id 5.
AP: slot 3 apic_id 7.
AP: slot 7 apic_id 3.
AP: slot 4 apic_id 4.
AP: slot 6 apic_id 2.
AP: slot 5 apic_id 6.
Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
Processing 13 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 00038000. Will call 7ffa5c47(00000000)
Installing SMM handler to 0x80000000
Loading module at 80010000 with entry 800105fb. filesize: 0x1d10 memsize: 0x5d40
Processing 82 relocs. Offset value of 0x80010000
Loading module at 80008000 with entry 80008000. filesize: 0x1a8 memsize: 0x1a8
Processing 13 relocs. Offset value of 0x80008000
SMM Module: placing jmp sequence at 80007c00 rel16 0x03fd
SMM Module: placing jmp sequence at 80007800 rel16 0x07fd
SMM Module: placing jmp sequence at 80007400 rel16 0x0bfd
SMM Module: placing jmp sequence at 80007000 rel16 0x0ffd
SMM Module: placing jmp sequence at 80006c00 rel16 0x13fd
SMM Module: placing jmp sequence at 80006800 rel16 0x17fd
SMM Module: placing jmp sequence at 80006400 rel16 0x1bfd
SMM Module: stub loaded at 80008000. Will call 800105fb(00000000)
Initializing Southbridge SMI...
New SMBASE 0x80000000
In relocation handler: cpu 0
New SMBASE=0x80000000 IEDBASE=0x80400000
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
New SMBASE 0x7ffffc00
In relocation handler: cpu 1
New SMBASE=0x7ffffc00 IEDBASE=0x80400000
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
New SMBASE 0x7ffff800
In relocation handler: cpu 2
New SMBASE=0x7ffff800 IEDBASE=0x80400000
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
New SMBASE 0x7ffff000
In relocation handler: cpu 4
New SMBASE=0x7ffff000 IEDBASE=0x80400000
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
New SMBASE 0x7fffe800
In relocation handler: cpu 6
New SMBASE=0x7fffe800 IEDBASE=0x80400000
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
New SMBASE 0x7fffe400
In relocation handler: cpu 7
New SMBASE=0x7fffe400 IEDBASE=0x80400000
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
New SMBASE 0x7ffff400
In relocation handler: cpu 3
New SMBASE=0x7ffff400 IEDBASE=0x80400000
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
New SMBASE 0x7fffec00
In relocation handler: cpu 5
New SMBASE=0x7fffec00 IEDBASE=0x80400000
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
Initializing CPU #0
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
POST: 0x60
Enabling cache
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: AES supported
CPU: TXT supported
CPU: VT supported
Setting up local APIC...
apic_id: 0x00 done.
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2700
Turbo is available but hidden
Turbo is available and visible
CPU #0 initialized
Initializing CPU #1
Initializing CPU #2
Initializing CPU #4
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Initializing CPU #7
Initializing CPU #6
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
POST: 0x60
Enabling cache
POST: 0x60
Enabling cache
POST: 0x60
Enabling cache
POST: 0x60
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Initializing CPU #5
POST: 0x60
Enabling cache
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: platform id 4
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: cpuid(1) 0x306a9
CPU: AES supported
CPU: TXT supported
CPU: VT supported
CPU: AES supported
CPU: TXT supported
CPU: VT supported
Setting up local APIC...
Setting up local APIC...
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Initializing CPU #3
POST: 0x60
CPU: vendor Intel device 306a9
Enabling cache
CPU: family 06, model 3a, stepping 09
Enabling cache
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
POST: 0x60
Enabling cache
CPU: platform id 4
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
apic_id: 0x03 done.
apic_id: 0x02 VMX status: enabled
done.
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: cpuid(1) 0x306a9
CPU: platform id 4
CPU: AES supported
CPU: TXT supported
CPU: VT supported
CPU: cpuid(1) 0x306a9
Setting up local APIC...
CPU: AES supported
CPU: TXT supported
CPU: VT supported
CPU: platform id 4
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz.
CPU: platform id 4
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: cpuid(1) 0x306a9
CPU: AES supported
CPU: TXT supported
CPU: VT supported
CPU: AES supported
CPU: TXT supported
CPU: VT supported
Setting up local APIC...
Setting up local APIC...
IA32_FEATURE_CONTROL status: locked
VMX status: enabled
apic_id: 0x04 done.
apic_id: 0x06 done.
VMX status: enabled
Setting up local APIC...
IA32_FEATURE_CONTROL status: locked
apic_id: 0x07 done.
VMX status: enabled
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
IA32_FEATURE_CONTROL status: locked
apic_id: 0x05 done.
IA32_FEATURE_CONTROL status: locked
VMX status: enabled
CPU: cpuid(1) 0x306a9
model_x06ax: energy policy set to 6
CPU: AES supported
CPU: TXT supported
CPU: VT supported
IA32_FEATURE_CONTROL status: locked
Setting up local APIC...
model_x06ax: frequency set to 2700
CPU #7 initialized
model_x06ax: energy policy set to 6
apic_id: 0x01 done.
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2700
VMX status: enabled
model_x06ax: frequency set to 2700
model_x06ax: energy policy set to 6
CPU #5 initialized
IA32_FEATURE_CONTROL status: locked
model_x06ax: energy policy set to 6
CPU #4 initialized
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2700
CPU #3 initialized
model_x06ax: frequency set to 2700
CPU #6 initialized
model_x06ax: frequency set to 2700
CPU #2 initialized
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2700
CPU #1 initialized
bsp_do_flight_plan done after 25 msecs.
Initializing southbridge SMI...
SMI_STS:
GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO9 GPIO7 GPIO5 GPIO4 GPIO3 GPIO0
ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0
TCO_STS:
Locking SMM.
CPU_CLUSTER: 0 init finished in 39705 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:00.0 init ...
Disabling PEG12.
Disabling PEG11.
Disabling PEG10.
Disabling Device 4.
Disabling PEG60.
Disabling Device 7.
Disabling PEG IO clock.
Set BIOS_RESET_CPL
CPU TDP: 45 Watts
PCI: 00:00.0 init finished in 1012 usecs
POST: 0x75
PCI: 00:02.0 init ...
GT Power Management Init
IVB GT2 35W Power Meter Weights
CBFS: 'Master Header Locator' located CBFS at [610200:c00000)
CBFS: Locating 'pci8086,0166.rom'
CBFS: Found @ offset 32340 size 10000
In CBFS, ROM address for PCI: 00:02.0 = ffa42588
Copying VGA ROM Image from ffa42588 to 0xc0000, 0x10000 bytes
Calling Option ROM...
intel_vga_int15_handler: AX=5fac BX=0190 CX=0000 DX=00c0
Unknown INT15 function 5fac!
int15 call returned error.
intel_vga_int15_handler: AX=5f40 BX=0000 CX=0004 DX=0001
DISPLAY=0
intel_vga_int15_handler: AX=5f35 BX=c000 CX=0002 DX=03da
... Option ROM returned.
VBE: Getting information about VESA mode 4118
VBE: resolution: 1024x768@32
VBE: framebuffer: d0000000
VBE: Setting VESA mode 4118
VGA Option ROM was run
GT Power Management Init (post VBIOS)
PCI: 00:02.0 init finished in 841348 usecs
POST: 0x75
POST: 0x75
PCI: 00:14.0 init ...
XHCI: Setting up controller.. done.
PCI: 00:14.0 init finished in 6 usecs
POST: 0x75
PCI: 00:16.0 init ...
intel_me_path: mbp is not ready!
ME: BIOS path: Error
PCI: 00:16.0 init finished in 4 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:19.0 init ...
PCI: 00:19.0 init finished in 0 usecs
POST: 0x75
PCI: 00:1a.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1a.0 init finished in 12 usecs
POST: 0x75
PCI: 00:1b.0 init ...
Azalia: base = e1630000
Azalia: codec_mask = 09
Azalia: Initializing codec #3
Azalia: codec viddid: 80862806
Azalia: verb_size: 16
Azalia: verb loaded.
Azalia: Initializing codec #0
Azalia: codec viddid: 10ec0269
Azalia: verb_size: 44
Azalia: verb loaded.
PCI: 00:1b.0 init finished in 4601 usecs
POST: 0x75
PCI: 00:1c.0 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 10 usecs
POST: 0x75
PCI: 00:1c.1 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.1 init finished in 10 usecs
POST: 0x75
PCI: 00:1c.2 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.2 init finished in 12 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:1d.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 12 usecs
POST: 0x75
POST: 0x75
PCI: 00:1f.0 init ...
pch: lpc_init
PCH: detected QM77, device id: 0x1e55, rev id 0x4
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
Set power off after power failure.
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
NMI sources enabled.
PantherPoint PM init
RTC: failed = 0x0
RTC Init
Disabling ACPI via APMC:
done.
pch_spi_init
PCI: 00:1f.0 init finished in 1308 usecs
POST: 0x75
PCI: 00:1f.2 init ...
SATA: Initializing...
FMAP: area COREBOOT found @ 610200 (6225408 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
SATA: Controller in AHCI mode.
ABAR: e1635000
PCI: 00:1f.2 init finished in 697 usecs
POST: 0x75
PCI: 00:1f.3 init ...
PCI: 00:1f.3 init finished in 8 usecs
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 01:00.0 init ...
PCI: 01:00.0 init finished in 14 usecs
POST: 0x75
PCI: 02:00.0 init ...
PCI: 02:00.0 init finished in 1 usecs
POST: 0x75
POST: 0x75
POST: 0x75
PNP: 00ff.2 init ...
PNP: 00ff.2 init finished in 0 usecs
POST: 0x75
POST: 0x75
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ...
I2C: 01:54 init finished in 1 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ...
I2C: 01:55 init finished in 1 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ...
I2C: 01:56 init finished in 1 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ...
I2C: 01:57 init finished in 1 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ...
Locking EEPROM RFID
init EEPROM done
I2C: 01:5c init finished in 26905 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ...
I2C: 01:5d init finished in 1 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ...
I2C: 01:5e init finished in 1 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ...
I2C: 01:5f init finished in 1 usecs
Devices initialized
BS: BS_DEV_INIT times (us): entry 64961 run 915725 exit 0
POST: 0x76
Finalize devices...
PCI: 00:1f.0 final
flash size 0xc00000 bytes
SF: Detected Opaque HW-sequencing with sector size 0x1000, total 0xc00000
Devices finalized
BS: BS_POST_DEVICE times (us): entry 0 run 57 exit 0
POST: 0x77
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0
POST: 0x79
POST: 0x9c
CBFS: 'Master Header Locator' located CBFS at [610200:c00000)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 46a00 size 3921
CBFS: 'Master Header Locator' located CBFS at [610200:c00000)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at 7ff4f000.
ACPI: * FACS
ACPI: * DSDT
ACPI: * FADT
ACPI: added table 1/32, length now 40
ACPI: * SSDT
Generating ACPI PIRQ entries
Found 1 CPU(s) with 8 core(s) each.
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
PSS: 2701MHz power 45000 control 0x2500 status 0x2500
PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00
PSS: 2400MHz power 38601 control 0x1800 status 0x1800
PSS: 2200MHz power 34542 control 0x1600 status 0x1600
PSS: 2000MHz power 30669 control 0x1400 status 0x1400
PSS: 1800MHz power 26973 control 0x1200 status 0x1200
PSS: 1600MHz power 23389 control 0x1000 status 0x1000
PSS: 1400MHz power 19976 control 0xe00 status 0xe00
PSS: 1200MHz power 16703 control 0xc00 status 0xc00
ACPI: * H8
H8: BDC not installed
H8: WWAN installed
\_SB.PCI0.LPCB.TPM: LPC TPM PNP: 0c31.0
\_SB.PCI0.RP02.WF00: PCI: 02:00.0
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: added table 3/32, length now 48
ACPI: * TCPA
TCPA log created at 7ff3e000
ACPI: added table 4/32, length now 52
ACPI: * MADT
ACPI: added table 5/32, length now 56
current = 7ff55ea0
ACPI: * DMAR
ACPI: added table 6/32, length now 60
current = 7ff55f70
ACPI: * HPET
ACPI: added table 7/32, length now 64
CBFS: 'Master Header Locator' located CBFS at [610200:c00000)
CBFS: Locating 'vbt.bin'
CBFS: Found @ offset 31580 size 581
Found a VBT of 4459 bytes after decompression
GMA: Found VBT in CBFS
GMA: Found valid VBT in CBFS
ACPI: done.
ACPI tables: 36784 bytes.
smbios_write_tables: 7ff3d000
Create SMBIOS type 17
PCI: 02:00.0 (unknown)
SMBIOS tables: 918 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4fe7
Writing coreboot table at 0x7ff73000
CBFS: 'Master Header Locator' located CBFS at [610200:c00000)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 31b40 size 79c
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000a0000-00000000000fffff: RESERVED
3. 0000000000100000-000000007ff3cfff: RAM
4. 000000007ff3d000-000000007ff8bfff: CONFIGURATION TABLES
5. 000000007ff8c000-000000007ffd1fff: RAMSTAGE
6. 000000007ffd2000-000000007fffffff: CONFIGURATION TABLES
7. 0000000080000000-00000000829fffff: RESERVED
8. 00000000f0000000-00000000f3ffffff: RESERVED
9. 00000000fed40000-00000000fed44fff: RESERVED
10. 00000000fed90000-00000000fed91fff: RESERVED
11. 0000000100000000-000000027b5fffff: RAM
CBFS: 'Master Header Locator' located CBFS at [610200:c00000)
Wrote coreboot table at: 7ff73000, 0xb40 bytes, checksum 1e96
coreboot table: 2904 bytes.
IMD ROOT 0. 7ffff000 00001000
IMD SMALL 1. 7fffe000 00001000
CONSOLE 2. 7ffde000 00020000
TIME STAMP 3. 7ffdd000 00000910
ROMSTG STCK 4. 7ffdc000 00001000
AFTER CAR 5. 7ffd2000 0000a000
RAMSTAGE 6. 7ff8b000 00047000
SMM BACKUP 7. 7ff7b000 00010000
COREBOOT 8. 7ff73000 00008000
ACPI 9. 7ff4f000 00024000
ACPI GNVS 10. 7ff4e000 00001000
TCPA TCGLOG11. 7ff3e000 00010000
SMBIOS 12. 7ff3d000 00000800
IMD small region:
IMD ROOT 0. 7fffec00 00000400
FMAP 1. 7fffeb20 000000e0
MEM INFO 2. 7fffe960 000001b9
ROMSTAGE 3. 7fffe940 00000004
COREBOOTFWD 4. 7fffe900 00000028
BS: BS_WRITE_TABLES times (us): entry 0 run 26719 exit 0
POST: 0x7a
CBFS: 'Master Header Locator' located CBFS at [610200:c00000)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 4a380 size 106f4
Checking segment from ROM address 0xffa5a5b8
Payload being loaded at below 1MiB without region being marked as RAM usable.
Checking segment from ROM address 0xffa5a5d4
Loading segment from ROM address 0xffa5a5b8
code (compression=1)
New segment dstaddr 0x000e0d20 memsize 0x1f2e0 srcaddr 0xffa5a5f0 filesize 0x106bc
Loading Segment: addr: 0x000e0d20 memsz: 0x000000000001f2e0 filesz: 0x00000000000106bc
using LZMA
Loading segment from ROM address 0xffa5a5d4
Entry Point 0x000fd274
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 26918 exit 0
POST: 0x7b
ICH-NM10-PCH: watchdog disabled
Jumping to boot code at 000fd274(7ff73000)
POST: 0xf8
SeaBIOS (version rel-1.12.1-0-ga5cab58)
BUILD: gcc: (coreboot toolchain vf5fa96f9c3 2019-09-21) 8.3.0 binutils: (GNU Binutils) 2.32
Found coreboot cbmem console @ 7ffde000
Found mainboard LENOVO ThinkPad T430
Relocating init from 0x000e2380 to 0x7fef0580 (size 51680)
Found CBFS header at 0xffa10238
multiboot: eax=7ffbc5e0, ebx=7ffbc594
Found 16 PCI devices (max PCI bus is 03)
Copying SMBIOS entry point from 0x7ff3d000 to 0x000f67a0
Copying ACPI RSDP from 0x7ff4f000 to 0x000f6770
Using pmtimer, ioport 0x508
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.12.1-0-ga5cab58)
Machine UUID 5bf15e81-52be-11cb-aaba-9be2c2d005a0
XHCI init on dev 00:14.0: regs @ 0xe1620000, 8 ports, 32 slots, 32 byte contexts
XHCI protocol USB 2.00, 4 ports (offset 1), def 3001
XHCI protocol USB 3.00, 4 ports (offset 5), def 1000
XHCI extcap 0xc1 @ 0xe1628040
XHCI extcap 0xc0 @ 0xe1628070
XHCI extcap 0x1 @ 0xe1628330
EHCI init on dev 00:1a.0 (regs=0xe1636020)
EHCI init on dev 00:1d.0 (regs=0xe1637020)
AHCI controller at 00:1f.2, iobase 0xe1635000, irq 10
Searching bootorder for: /pci@i0cf8/pci-bridge@1c/*@0
Discarding ps2 data aa (status=11)
Found 0 lpt ports
Found 0 serial ports
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
AHCI/0: Set transfer mode to UDMA-6
AHCI/0: registering: "AHCI/0: Samsung SSD 840 EVO 120GB ATA-9 Hard-Disk (111 GiBytes)"
XHCI no devices found
USB keyboard initialized
PS2 keyboard initialized
Initialized USB HUB (0 ports used)
Initialized USB HUB (1 ports used)
Initialized USB HUB (1 ports used)
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@1/disk@0
AHCI/1: Set transfer mode to UDMA-6
AHCI/1: registering: "AHCI/1: HGST HTS541010A9E680 ATA-8 Hard-Disk (931 GiBytes)"
WARNING - Timeout at ehci_wait_td:517!
ehci pipe=0x7fee8a80 cur=7fee1dc0 tok=80080d80 next=7fee1e00 td=0x7fee1dc0 status=80080d80
Initialized USB HUB (0 ports used)
All threads complete.
Scan for option roms
Press ESC for boot menu.
Searching bootorder for: HALT
drive 0x000f6700: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=234441648
drive 0x000f66b0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=1953525168
Space available for UMB: d0000-eb800, f5fc0-f66b0
Returned 180224 bytes of ZoneHigh
e820 map has 9 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 000000007ff29000 = 1 RAM
4: 000000007ff29000 - 0000000082a00000 = 2 RESERVED
5: 00000000f0000000 - 00000000f4000000 = 2 RESERVED
6: 00000000fed40000 - 00000000fed45000 = 2 RESERVED
7: 00000000fed90000 - 00000000fed92000 = 2 RESERVED
8: 0000000100000000 - 000000027b600000 = 1 RAM
enter handle_19:
NULL
Booting from Hard Disk...
Booting from 0000:7c00