blob: c8a65d14abe0b90e28d31f83ac18dac358f37be9 [file] [log] [blame]
PCI: 00:1c.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 06:00.0
PCI: 06:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
PCI: 00:1d.0
PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
PCI: 00:1e.0
PCI: 00:1f.0 child on link 0 PNP: 00ff.1
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PCI: 00:1f.0 resource base fe00 size fc align 0 gran 0 limit 0 flags c0040100 index 10000200
PNP: 00ff.1
PNP: 004e.3
PNP: 004e.3 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 004e.4
PNP: 004e.4 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.4 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.5
PNP: 004e.5 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
PNP: 004e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PCI: 00:1f.2
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
PCI: 00:1f.3
PCI: 00:1f.5
PCI: 00:1f.6
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
NONE 18 * [0x0 - 0xfff] io
PCI: 00:1c.1 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
NONE 18 * [0x0 - 0xfff] io
PCI: 00:1c.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 1c * [0x0 - 0xfff] io
PCI: 00:1c.2 1c * [0x1000 - 0x1fff] io
PCI: 00:02.0 20 * [0x2000 - 0x203f] io
PCI: 00:19.0 18 * [0x2040 - 0x205f] io
PCI: 00:1f.2 20 * [0x2060 - 0x207f] io
PCI: 00:1f.2 10 * [0x2080 - 0x2087] io
PCI: 00:1f.2 18 * [0x2088 - 0x208f] io
PCI: 00:1f.2 14 * [0x2090 - 0x2093] io
PCI: 00:1f.2 1c * [0x2094 - 0x2097] io
DOMAIN: 0000 io: base: 2098 size: 2098 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
NONE 14 * [0x0 - 0x7fffff] prefmem
PCI: 00:1c.1 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
NONE 10 * [0x0 - 0x7fffff] mem
PCI: 00:1c.1 mem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
NONE 14 * [0x0 - 0x7fffff] prefmem
PCI: 00:1c.2 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
NONE 10 * [0x0 - 0x7fffff] mem
PCI: 04:00.1 30 * [0x800000 - 0x80ffff] mem
PCI: 04:00.0 10 * [0x810000 - 0x8107ff] mem
PCI: 04:00.0 14 * [0x811000 - 0x8110ff] mem
PCI: 04:00.1 10 * [0x812000 - 0x8120ff] mem
PCI: 04:00.2 10 * [0x813000 - 0x8130ff] mem
PCI: 04:00.3 10 * [0x814000 - 0x8140ff] mem
PCI: 04:00.4 10 * [0x815000 - 0x8150ff] mem
PCI: 00:1c.2 mem: base: 815100 size: 900000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 05:00.0 10 * [0x0 - 0x1ffff] mem
PCI: 05:00.0 30 * [0x20000 - 0x2ffff] mem
PCI: 00:1c.3 mem: base: 30000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 06:00.0 10 * [0x0 - 0x1fff] mem
PCI: 00:1c.4 mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
PCI: 00:1c.2 20 * [0x10000000 - 0x108fffff] mem
PCI: 00:1c.1 24 * [0x10c00000 - 0x113fffff] prefmem
PCI: 00:1c.1 20 * [0x11400000 - 0x11bfffff] mem
PCI: 00:1c.2 24 * [0x11c00000 - 0x123fffff] prefmem
PCI: 00:02.0 10 * [0x12400000 - 0x127fffff] mem
PCI: 00:1c.3 20 * [0x12800000 - 0x128fffff] mem
PCI: 00:1c.4 20 * [0x12900000 - 0x129fffff] mem
PCI: 00:19.0 10 * [0x12a00000 - 0x12a1ffff] mem
PCI: 00:04.0 10 * [0x12a20000 - 0x12a27fff] mem
PCI: 00:1b.0 10 * [0x12a28000 - 0x12a2bfff] mem
PCI: 00:19.0 14 * [0x12a2c000 - 0x12a2cfff] mem
PCI: 00:1f.2 24 * [0x12a2d000 - 0x12a2d7ff] mem
PCI: 00:1a.0 10 * [0x12a2e000 - 0x12a2e3ff] mem
PCI: 00:1d.0 10 * [0x12a2f000 - 0x12a2f3ff] mem
PCI: 00:16.0 10 * [0x12a30000 - 0x12a3000f] mem
DOMAIN: 0000 mem: base: 12a30010 size: 12a30010 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 60 base f8000000 limit fbffffff mem (fixed)
constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:1f.0 10000200 base 0000fe00 limit 0000fefb io (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000fdff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:2098 align:12 gran:0 limit:fdff
PCI: 00:1c.1 1c * [0x1000 - 0x1fff] io
PCI: 00:1c.2 1c * [0x2000 - 0x2fff] io
PCI: 00:02.0 20 * [0x3000 - 0x303f] io
PCI: 00:19.0 18 * [0x3040 - 0x305f] io
PCI: 00:1f.2 20 * [0x3060 - 0x307f] io
PCI: 00:1f.2 10 * [0x3080 - 0x3087] io
PCI: 00:1f.2 18 * [0x3088 - 0x308f] io
PCI: 00:1f.2 14 * [0x3090 - 0x3093] io
PCI: 00:1f.2 1c * [0x3094 - 0x3097] io
DOMAIN: 0000 io: next_base: 3098 size: 2098 align: 12 gran: 0 done
PCI: 00:01.0 io: base:fdff size:0 align:12 gran:12 limit:fdff
PCI: 00:01.0 io: next_base: fdff size: 0 align: 12 gran: 12 done
PCI: 00:1c.0 io: base:fdff size:0 align:12 gran:12 limit:fdff
PCI: 00:1c.0 io: next_base: fdff size: 0 align: 12 gran: 12 done
PCI: 00:1c.1 io: base:1000 size:1000 align:12 gran:12 limit:1fff
NONE 18 * [0x1000 - 0x1fff] io
PCI: 00:1c.1 io: next_base: 2000 size: 1000 align: 12 gran: 12 done
PCI: 00:1c.2 io: base:2000 size:1000 align:12 gran:12 limit:2fff
NONE 18 * [0x2000 - 0x2fff] io
PCI: 00:1c.2 io: next_base: 3000 size: 1000 align: 12 gran: 12 done
PCI: 00:1c.3 io: base:fdff size:0 align:12 gran:12 limit:fdff
PCI: 00:1c.3 io: next_base: fdff size: 0 align: 12 gran: 12 done
PCI: 00:1c.4 io: base:fdff size:0 align:12 gran:12 limit:fdff
PCI: 00:1c.4 io: next_base: fdff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:e0000000 size:12a30010 align:28 gran:0 limit:f7ffffff
PCI: 00:02.0 18 * [0xe0000000 - 0xefffffff] prefmem
PCI: 00:1c.2 20 * [0xf0000000 - 0xf08fffff] mem
PCI: 00:1c.1 24 * [0xf0c00000 - 0xf13fffff] prefmem
PCI: 00:1c.1 20 * [0xf1400000 - 0xf1bfffff] mem
PCI: 00:1c.2 24 * [0xf1c00000 - 0xf23fffff] prefmem
PCI: 00:02.0 10 * [0xf2400000 - 0xf27fffff] mem
PCI: 00:1c.3 20 * [0xf2800000 - 0xf28fffff] mem
PCI: 00:1c.4 20 * [0xf2900000 - 0xf29fffff] mem
PCI: 00:19.0 10 * [0xf2a00000 - 0xf2a1ffff] mem
PCI: 00:04.0 10 * [0xf2a20000 - 0xf2a27fff] mem
PCI: 00:1b.0 10 * [0xf2a28000 - 0xf2a2bfff] mem
PCI: 00:19.0 14 * [0xf2a2c000 - 0xf2a2cfff] mem
PCI: 00:1f.2 24 * [0xf2a2d000 - 0xf2a2d7ff] mem
PCI: 00:1a.0 10 * [0xf2a2e000 - 0xf2a2e3ff] mem
PCI: 00:1d.0 10 * [0xf2a2f000 - 0xf2a2f3ff] mem
PCI: 00:16.0 10 * [0xf2a30000 - 0xf2a3000f] mem
DOMAIN: 0000 mem: next_base: f2a30010 size: 12a30010 align: 28 gran: 0 done
PCI: 00:01.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:01.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:01.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:01.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.1 prefmem: base:f0c00000 size:800000 align:22 gran:20 limit:f13fffff
NONE 14 * [0xf0c00000 - 0xf13fffff] prefmem
PCI: 00:1c.1 prefmem: next_base: f1400000 size: 800000 align: 22 gran: 20 done
PCI: 00:1c.1 mem: base:f1400000 size:800000 align:22 gran:20 limit:f1bfffff
NONE 10 * [0xf1400000 - 0xf1bfffff] mem
PCI: 00:1c.1 mem: next_base: f1c00000 size: 800000 align: 22 gran: 20 done
PCI: 00:1c.2 prefmem: base:f1c00000 size:800000 align:22 gran:20 limit:f23fffff
NONE 14 * [0xf1c00000 - 0xf23fffff] prefmem
PCI: 00:1c.2 prefmem: next_base: f2400000 size: 800000 align: 22 gran: 20 done
PCI: 00:1c.2 mem: base:f0000000 size:900000 align:22 gran:20 limit:f08fffff
NONE 10 * [0xf0000000 - 0xf07fffff] mem
PCI: 04:00.1 30 * [0xf0800000 - 0xf080ffff] mem
PCI: 04:00.0 10 * [0xf0810000 - 0xf08107ff] mem
PCI: 04:00.0 14 * [0xf0811000 - 0xf08110ff] mem
PCI: 04:00.1 10 * [0xf0812000 - 0xf08120ff] mem
PCI: 04:00.2 10 * [0xf0813000 - 0xf08130ff] mem
PCI: 04:00.3 10 * [0xf0814000 - 0xf08140ff] mem
PCI: 04:00.4 10 * [0xf0815000 - 0xf08150ff] mem
PCI: 00:1c.2 mem: next_base: f0815100 size: 900000 align: 22 gran: 20 done
PCI: 00:1c.3 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.3 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.3 mem: base:f2800000 size:100000 align:20 gran:20 limit:f28fffff
PCI: 05:00.0 10 * [0xf2800000 - 0xf281ffff] mem
PCI: 05:00.0 30 * [0xf2820000 - 0xf282ffff] mem
PCI: 00:1c.3 mem: next_base: f2830000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.4 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.4 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.4 mem: base:f2900000 size:100000 align:20 gran:20 limit:f29fffff
PCI: 06:00.0 10 * [0xf2900000 - 0xf2901fff] mem
PCI: 00:1c.4 mem: next_base: f2902000 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
TOUUD 0x100600000 TOLUD 0x7fa00000 TOM 0x80000000
MEBASE 0x7ffff00000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0x7d000000 size 8M
Available memory below 4GB: 2000M
Available memory above 4GB: 6M
memalign Enter, boundary 8, size 2560, free_mem_ptr 7cfd4930
memalign 7cfd4930
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:01.0 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:02.0 10 <- [0x00f2400000 - 0x00f27fffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io
PCI: 00:04.0 10 <- [0x00f2a20000 - 0x00f2a27fff] size 0x00008000 gran 0x0f mem64
PCI: 00:16.0 10 <- [0x00f2a30000 - 0x00f2a3000f] size 0x00000010 gran 0x04 mem64
PCI: 00:19.0 10 <- [0x00f2a00000 - 0x00f2a1ffff] size 0x00020000 gran 0x11 mem
PCI: 00:19.0 14 <- [0x00f2a2c000 - 0x00f2a2cfff] size 0x00001000 gran 0x0c mem
PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io
PCI: 00:1a.0 10 <- [0x00f2a2e000 - 0x00f2a2e3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x00f2a28000 - 0x00f2a2bfff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:1c.1 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 03 io
PCI: 00:1c.1 24 <- [0x00f0c00000 - 0x00f13fffff] size 0x00800000 gran 0x14 bus 03 prefmem
PCI: 00:1c.1 20 <- [0x00f1400000 - 0x00f1bfffff] size 0x00800000 gran 0x14 bus 03 mem
PCI: 00:1c.1 assign_resources, bus 3 link: 0
NONE missing set_resources
PCI: 00:1c.1 assign_resources, bus 3 link: 0
PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 04 io
PCI: 00:1c.2 24 <- [0x00f1c00000 - 0x00f23fffff] size 0x00800000 gran 0x14 bus 04 prefmem
PCI: 00:1c.2 20 <- [0x00f0000000 - 0x00f08fffff] size 0x00900000 gran 0x14 bus 04 mem
PCI: 00:1c.2 assign_resources, bus 4 link: 0
PCI: 04:00.0 10 <- [0x00f0810000 - 0x00f08107ff] size 0x00000800 gran 0x0b mem
PCI: 04:00.0 14 <- [0x00f0811000 - 0x00f08110ff] size 0x00000100 gran 0x08 mem
PCI: 04:00.1 10 <- [0x00f0812000 - 0x00f08120ff] size 0x00000100 gran 0x08 mem
PCI: 04:00.1 30 <- [0x00f0800000 - 0x00f080ffff] size 0x00010000 gran 0x10 romem
PCI: 04:00.2 10 <- [0x00f0813000 - 0x00f08130ff] size 0x00000100 gran 0x08 mem
PCI: 04:00.3 10 <- [0x00f0814000 - 0x00f08140ff] size 0x00000100 gran 0x08 mem
PCI: 04:00.4 10 <- [0x00f0815000 - 0x00f08150ff] size 0x00000100 gran 0x08 mem
NONE missing set_resources
PCI: 00:1c.2 assign_resources, bus 4 link: 0
PCI: 00:1c.3 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 05 io
PCI: 00:1c.3 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 05 prefmem
PCI: 00:1c.3 20 <- [0x00f2800000 - 0x00f28fffff] size 0x00100000 gran 0x14 bus 05 mem
PCI: 00:1c.3 assign_resources, bus 5 link: 0
PCI: 05:00.0 10 <- [0x00f2800000 - 0x00f281ffff] size 0x00020000 gran 0x11 mem64
PCI: 05:00.0 30 <- [0x00f2820000 - 0x00f282ffff] size 0x00010000 gran 0x10 romem
PCI: 00:1c.3 assign_resources, bus 5 link: 0
PCI: 00:1c.4 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 06 io
PCI: 00:1c.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 06 prefmem
PCI: 00:1c.4 20 <- [0x00f2900000 - 0x00f29fffff] size 0x00100000 gran 0x14 bus 06 mem
PCI: 00:1c.4 assign_resources, bus 6 link: 0
PCI: 06:00.0 10 <- [0x00f2900000 - 0x00f2901fff] size 0x00002000 gran 0x0d mem64
PCI: 00:1c.4 assign_resources, bus 6 link: 0
PCI: 00:1d.0 10 <- [0x00f2a2f000 - 0x00f2a2f3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PNP: 004e.3 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io
PNP: 004e.3 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
ERROR: PNP: 004e.3 74 not allocated
PNP: 004e.4 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 004e.4 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00f2a2d000 - 0x00f2a2d7ff] size 0x00000800 gran 0x0b mem
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: acac
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 1000 size 2098 align 12 gran 0 limit fdff flags 40040100 index 10000000
DOMAIN: 0000 resource base e0000000 size 12a30010 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
DOMAIN: 0000 resource base 100000 size 7cf00000 align 0 gran 0 limit 0 flags e0004200 index 4
DOMAIN: 0000 resource base 100000000 size 600000 align 0 gran 0 limit 0 flags e0004200 index 5
DOMAIN: 0000 resource base 7d000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8
DOMAIN: 0000 resource base 20000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index 9
DOMAIN: 0000 resource base 40000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index a
DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
PCI: 00:00.0
PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
PCI: 00:01.0
PCI: 00:01.0 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c
PCI: 00:01.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:01.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
PCI: 00:02.0
PCI: 00:02.0 resource base f2400000 size 400000 align 22 gran 22 limit f27fffff flags 60000201 index 10
PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18
PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20
PCI: 00:04.0
PCI: 00:04.0 resource base f2a20000 size 8000 align 15 gran 15 limit f2a27fff flags 60000201 index 10
PCI: 00:16.0
PCI: 00:16.0 resource base f2a30000 size 10 align 12 gran 4 limit f2a3000f flags 60000201 index 10
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:19.0
PCI: 00:19.0 resource base f2a00000 size 20000 align 17 gran 17 limit f2a1ffff flags 60000200 index 10
PCI: 00:19.0 resource base f2a2c000 size 1000 align 12 gran 12 limit f2a2cfff flags 60000200 index 14
PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 18
PCI: 00:1a.0
PCI: 00:1a.0 resource base f2a2e000 size 400 align 12 gran 10 limit f2a2e3ff flags 60000200 index 10
PCI: 00:1b.0
PCI: 00:1b.0 resource base f2a28000 size 4000 align 14 gran 14 limit f2a2bfff flags 60000201 index 10
PCI: 00:1c.0
PCI: 00:1c.0 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c
PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
PCI: 00:1c.1 child on link 0 NONE
PCI: 00:1c.1 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
PCI: 00:1c.1 resource base f0c00000 size 800000 align 22 gran 20 limit f13fffff flags 60081202 index 24
PCI: 00:1c.1 resource base f1400000 size 800000 align 22 gran 20 limit f1bfffff flags 60080202 index 20
NONE
NONE resource base f1400000 size 800000 align 22 gran 22 limit f1bfffff flags 40000200 index 10
NONE resource base f0c00000 size 800000 align 22 gran 22 limit f13fffff flags 40001200 index 14
NONE resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 40000100 index 18
PCI: 00:1c.2 child on link 0 PCI: 04:00.0
PCI: 00:1c.2 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
PCI: 00:1c.2 resource base f1c00000 size 800000 align 22 gran 20 limit f23fffff flags 60081202 index 24
PCI: 00:1c.2 resource base f0000000 size 900000 align 22 gran 20 limit f08fffff flags 60080202 index 20
PCI: 04:00.0
PCI: 04:00.0 resource base f0810000 size 800 align 12 gran 11 limit f08107ff flags 60000200 index 10
PCI: 04:00.0 resource base f0811000 size 100 align 12 gran 8 limit f08110ff flags 60000200 index 14
PCI: 04:00.1
PCI: 04:00.1 resource base f0812000 size 100 align 12 gran 8 limit f08120ff flags 60000200 index 10
PCI: 04:00.1 resource base f0800000 size 10000 align 16 gran 16 limit f080ffff flags 60002200 index 30
PCI: 04:00.2
PCI: 04:00.2 resource base f0813000 size 100 align 12 gran 8 limit f08130ff flags 60000200 index 10
PCI: 04:00.3
PCI: 04:00.3 resource base f0814000 size 100 align 12 gran 8 limit f08140ff flags 60000200 index 10
PCI: 04:00.4
PCI: 04:00.4 resource base f0815000 size 100 align 12 gran 8 limit f08150ff flags 60000200 index 10
NONE
NONE resource base f0000000 size 800000 align 22 gran 22 limit f07fffff flags 40000200 index 10
NONE resource base f1c00000 size 800000 align 22 gran 22 limit f23fffff flags 40001200 index 14
NONE resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18
PCI: 00:1c.3 child on link 0 PCI: 05:00.0
PCI: 00:1c.3 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c
PCI: 00:1c.3 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:1c.3 resource base f2800000 size 100000 align 20 gran 20 limit f28fffff flags 60080202 index 20
PCI: 05:00.0
PCI: 05:00.0 resource base f2800000 size 20000 align 17 gran 17 limit f281ffff flags 60000201 index 10
PCI: 05:00.0 resource base f2820000 size 10000 align 16 gran 16 limit f282ffff flags 60002200 index 30
PCI: 00:1c.7
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.4 child on link 0 PCI: 06:00.0
PCI: 00:1c.4 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c
PCI: 00:1c.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:1c.4 resource base f2900000 size 100000 align 20 gran 20 limit f29fffff flags 60080202 index 20
PCI: 06:00.0
PCI: 06:00.0 resource base f2900000 size 2000 align 13 gran 13 limit f2901fff flags 60000201 index 10
PCI: 00:1d.0
PCI: 00:1d.0 resource base f2a2f000 size 400 align 12 gran 10 limit f2a2f3ff flags 60000200 index 10
PCI: 00:1e.0
PCI: 00:1f.0 child on link 0 PNP: 00ff.1
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PCI: 00:1f.0 resource base fe00 size fc align 0 gran 0 limit 0 flags c0040100 index 10000200
PNP: 00ff.1
PNP: 004e.3
PNP: 004e.3 resource base 378 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 004e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 004e.4
PNP: 004e.4 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 004e.4 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 004e.5
PNP: 004e.5 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
PNP: 004e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PCI: 00:1f.2
PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit 3087 flags 60000100 index 10
PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit 3093 flags 60000100 index 14
PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit 308f flags 60000100 index 18
PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit 3097 flags 60000100 index 1c
PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit 307f flags 60000100 index 20
PCI: 00:1f.2 resource base f2a2d000 size 800 align 12 gran 11 limit f2a2d7ff flags 60000200 index 24
PCI: 00:1f.3
PCI: 00:1f.5
PCI: 00:1f.6
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 4147 exit 0
Enabling resources...
PCI: 00:00.0 subsystem <- 103c/161c
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 0003
PCI: 00:01.0 cmd <- 00
PCI: 00:02.0 subsystem <- 103c/161c
PCI: 00:02.0 cmd <- 03
PCI: 00:04.0 cmd <- 02
PCI: 00:16.0 subsystem <- 103c/161c
PCI: 00:16.0 cmd <- 02
PCI: 00:19.0 subsystem <- 103c/161c
PCI: 00:19.0 cmd <- 103
PCI: 00:1a.0 subsystem <- 103c/161c
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 103c/161c
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 103c/161c
PCI: 00:1c.0 cmd <- 100
PCI: 00:1c.1 bridge ctrl <- 0003
PCI: 00:1c.1 subsystem <- 103c/161c
PCI: 00:1c.1 cmd <- 107
PCI: 00:1c.2 bridge ctrl <- 0003
PCI: 00:1c.2 subsystem <- 103c/161c
PCI: 00:1c.2 cmd <- 107
PCI: 00:1c.3 bridge ctrl <- 0003
PCI: 00:1c.3 subsystem <- 103c/161c
PCI: 00:1c.3 cmd <- 106
PCI: 00:1c.4 bridge ctrl <- 0003
PCI: 00:1c.4 subsystem <- 103c/161c
PCI: 00:1c.4 cmd <- 106
PCI: 00:1d.0 subsystem <- 103c/161c
PCI: 00:1d.0 cmd <- 102
pch_decode_init
PCI: 00:1f.0 subsystem <- 103c/161c
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 103c/161c
PCI: 00:1f.2 cmd <- 03
PCI: 04:00.0 cmd <- 02
PCI: 04:00.1 cmd <- 06
PCI: 04:00.2 cmd <- 06
PCI: 04:00.3 cmd <- 06
PCI: 04:00.4 cmd <- 06
PCI: 05:00.0 cmd <- 02
PCI: 06:00.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 226 exit 0
Initializing devices...
Root Device init ...
Root Device init finished in 1 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Setting up SMI for CPU
Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
Processing 12 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 00038000. Will call 7cfaf32f(7cfd37e0)
Installing SMM handler to 0x7d000000
Loading module at 7d010000 with entry 7d01105f. filesize: 0x2cd8 memsize: 0x6cf8
Processing 184 relocs. Offset value of 0x7d010000
Loading module at 7d008000 with entry 7d008000. filesize: 0x1a8 memsize: 0x1a8
Processing 12 relocs. Offset value of 0x7d008000
SMM Module: placing jmp sequence at 7d007c00 rel16 0x03fd
SMM Module: placing jmp sequence at 7d007800 rel16 0x07fd
SMM Module: placing jmp sequence at 7d007400 rel16 0x0bfd
SMM Module: stub loaded at 7d008000. Will call 7d01105f(00000000)
Initializing southbridge SMI... ... pmbase = 0x0500
SMI_STS: PM1
PM1_STS: WAK PCIEXPWAK PWRBTN
GPE0_STS: GPIO15 GPIO10 GPIO9 GPIO7 GPIO6 GPIO4 GPIO3 GPIO1
ALT_GP_SMI_STS: GPI15 GPI10 GPI9 GPI7 GPI6 GPI4 GPI3 GPI1
TCO_STS: INTRD_DET
... raise SMI#
In relocation handler: cpu 0
New SMBASE=0x7d000000 IEDBASE=0x7d400000 @ 0003fc00
Writing SMRR. base = 0x7d000006, mask=0xff800800
Relocation complete.
Locking SMM.
Initializing CPU #0
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [18100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 142ac
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 143c0
CBFS: File @ offset 143c0 size 33c
CBFS: Unmatched 'config' at 143c0
CBFS: Checking offset 14740
CBFS: File @ offset 14740 size 240
CBFS: Unmatched 'revision' at 14740
CBFS: Checking offset 149c0
CBFS: File @ offset 149c0 size 660
CBFS: Unmatched 'payload_config' at 149c0
CBFS: Checking offset 15080
CBFS: File @ offset 15080 size ea
CBFS: Unmatched 'payload_revision' at 15080
CBFS: Checking offset 151c0
CBFS: File @ offset 151c0 size 2cd8
CBFS: Unmatched '' at 151c0
CBFS: Checking offset 17ec0
CBFS: File @ offset 17ec0 size 10000
CBFS: Unmatched 'mrc.cache' at 17ec0
CBFS: Checking offset 27f00
CBFS: File @ offset 27f00 size 5800
CBFS: Found @ offset 27f00 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x29
CPU: Intel(R) Core(TM) i5-2520M CPU @ 2.50GHz.
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5330
memalign 7cfd5330
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5348
memalign 7cfd5348
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5360
memalign 7cfd5360
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5378
memalign 7cfd5378
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5390
memalign 7cfd5390
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd53a8
memalign 7cfd53a8
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd53c0
memalign 7cfd53c0
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd53d8
memalign 7cfd53d8
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd53f0
memalign 7cfd53f0
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5408
memalign 7cfd5408
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5420
memalign 7cfd5420
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5438
memalign 7cfd5438
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5450
memalign 7cfd5450
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5468
memalign 7cfd5468
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5480
memalign 7cfd5480
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5498
memalign 7cfd5498
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd54b0
memalign 7cfd54b0
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x000000007d000000 size 0x7cf40000 type 6
0x000000007d000000 - 0x00000000e0000000 size 0x63000000 type 0
0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1
0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0
0x0000000100000000 - 0x0000000100600000 size 0x00600000 type 6
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 6/5.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
MTRR: 1 base 0x000000007d000000 mask 0x0000000fff000000 type 0
MTRR: 2 base 0x000000007e000000 mask 0x0000000ffe000000 type 0
MTRR: 3 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1
MTRR: 4 base 0x0000000100000000 mask 0x0000000f00000000 type 6
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC... apic_id: 0x00 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2500
Turbo is available but hidden
Turbo has been enabled
CPU: 0 has 2 cores, 2 threads per core
memalign Enter, boundary 8, size 152, free_mem_ptr 7cfd54c8
memalign 7cfd54c8
CPU: 0 has core 1
CPU1: stack_base 7cfcc000, stack_end 7cfccff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
In relocation handler: cpu 1
New SMBASE=0x7cfffc00 IEDBASE=0x7d400000 @ 0003fc00
Writing SMRR. base = 0x7d000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
memalign Enter, boundary 8, size 152, free_mem_ptr 7cfd5560
CPU: vendor Intel device 206a7
memalign 7cfd5560
CPU: family 06, model 2a, stepping 07
CPU: 0 has core 2
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [18100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 142ac
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 143c0
CBFS: File @ offset 143c0 size 33c
CBFS: Unmatched 'config' at 143c0
CBFS: Checking offset 14740
CBFS: File @ offset 14740 size 240
CBFS: Unmatched 'revision' at 14740
CBFS: Checking offset 149c0
CBFS: File @ offset 149c0 size 660
CBFS: Unmatched 'payload_config' at 149c0
CBFS: Checking offset 15080
CBFS: File @ offset 15080 size ea
CBFS: Unmatched 'payload_revision' at 15080
CBFS: Checking offset 151c0
CBFS: File @ offset 151c0 size 2cd8
CBFS: Unmatched '' at 151c0
CBFS: Checking offset 17ec0
CBFS: File @ offset 17ec0 size 10000
CBFS: Unmatched 'mrc.cache' at 17ec0
CBFS: Checking offset 27f00
CBFS: File @ offset 27f00 size 5800
CBFS: Found @ offset 27f00 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x29
CPU: Intel(R) Core(TM) i5-2520M CPU @ 2.50GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC... apic_id: 0x01 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2500
CPU #1 initialized
CPU2: stack_base 7cfcb000, stack_end 7cfcbff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 2.
After apic_write.
In relocation handler: cpu 2
Startup point 1.
Waiting for send to finish...
+New SMBASE=0x7cfff800 IEDBASE=0x7d400000 @ 0003fc00
Sending STARTUP #2 to 2.
After apic_write.
Writing SMRR. base = 0x7d000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+After Startup.
memalign Enter, boundary 8, size 152, free_mem_ptr 7cfd55f8
memalign 7cfd55f8
CPU: 0 has core 3
Initializing CPU #2
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [18100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 142ac
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 143c0
CBFS: File @ offset 143c0 size 33c
CBFS: Unmatched 'config' at 143c0
CBFS: Checking offset 14740
CBFS: File @ offset 14740 size 240
CBFS: Unmatched 'revision' at 14740
CBFS: Checking offset 149c0
CBFS: File @ offset 149c0 size 660
CBFS: Unmatched 'payload_config' at 149c0
CBFS: Checking offset 15080
CBFS: File @ offset 15080 size ea
CBFS: Unmatched 'payload_revision' at 15080
CBFS: Checking offset 151c0
CBFS: File @ offset 151c0 size 2cd8
CBFS: Unmatched '' at 151c0
CBFS: Checking offset 17ec0
CBFS: File @ offset 17ec0 size 10000
CBFS: Unmatched 'mrc.cache' at 17ec0
CBFS: Checking offset 27f00
CBFS: File @ offset 27f00 size 5800
CBFS: Found @ offset 27f00 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x0
microcode: updated to revision 0x29 date=2013-06-12
CPU: Intel(R) Core(TM) i5-2520M CPU @ 2.50GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC... apic_id: 0x02 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2500
CPU #2 initialized
CPU3: stack_base 7cfca000, stack_end 7cfcaff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 3.
After apic_write.
In relocation handler: cpu 3
New SMBASE=0x7cfff400 IEDBASE=0x7d400000 @ 0003fc00
Writing SMRR. base = 0x7d000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU #0 initialized
Waiting for 1 CPUS to stop
Initializing CPU #3
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [18100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 142ac
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 143c0
CBFS: File @ offset 143c0 size 33c
CBFS: Unmatched 'config' at 143c0
CBFS: Checking offset 14740
CBFS: File @ offset 14740 size 240
CBFS: Unmatched 'revision' at 14740
CBFS: Checking offset 149c0
CBFS: File @ offset 149c0 size 660
CBFS: Unmatched 'payload_config' at 149c0
CBFS: Checking offset 15080
CBFS: File @ offset 15080 size ea
CBFS: Unmatched 'payload_revision' at 15080
CBFS: Checking offset 151c0
CBFS: File @ offset 151c0 size 2cd8
CBFS: Unmatched '' at 151c0
CBFS: Checking offset 17ec0
CBFS: File @ offset 17ec0 size 10000
CBFS: Unmatched 'mrc.cache' at 17ec0
CBFS: Checking offset 27f00
CBFS: File @ offset 27f00 size 5800
CBFS: Found @ offset 27f00 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x29
CPU: Intel(R) Core(TM) i5-2520M CPU @ 2.50GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
*** Pre-CBMEM romstage console overflowed, log truncated! ***
pping
Update PCI-E configuration space:
PCI(0, 0, 0)[a0] = 80000000
PCI(0, 0, 0)[a4] = 0
PCI(0, 0, 0)[bc] = 7fa00000
PCI(0, 0, 0)[a8] = 600000
PCI(0, 0, 0)[ac] = 1
PCI(0, 0, 0)[b8] = 7d000000
PCI(0, 0, 0)[b0] = 7da00000
PCI(0, 0, 0)[b4] = 7d800000
Done memory map
RCOMP...done
COMP2 done
COMP1 done
FORCE RCOMP and wait 20us...done
Done io registers
CPE
CP5b
CP5c
OTHP [400c] = 690
t123: 1912, 9120, 500
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : NO
ME: Manufacturing Mode : YES
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Initializing
ME: Current Operation State : Bring up
ME: Current Operation Mode : Debug or Disabled by AltDisableBit
ME: Error Code : No Error
ME: Progress Phase : BUP Phase
ME: Power Management Event : Pseudo-global reset
ME: Progress Phase State : Check to see if straps say ME DISABLED
ME: Wrong mode : 2
ME: FWS2: 0x160a0000
ME: Bist in progress: 0x0
ME: ICC Status : 0x0
ME: Invoke MEBx : 0x0
ME: CPU replaced : 0x0
ME: MBP ready : 0x0
ME: MFS failure : 0x0
ME: Warm reset req : 0x0
ME: CPU repl valid : 0x0
ME: (Reserved) : 0x0
ME: FW update req : 0x0
ME: (Reserved) : 0x0
ME: Current state : 0xa
ME: Current PM event: 0x6
ME: Progress code : 0x1
Waited long enough, or CPU was not replaced, continue...
PASSED! Tell ME that DRAM is ready
ME: ME is reporting as disabled, so not waiting for a response.
ME: FWS2: 0x160a0000
ME: Bist in progress: 0x0
ME: ICC Status : 0x0
ME: Invoke MEBx : 0x0
ME: CPU replaced : 0x0
ME: MBP ready : 0x0
ME: MFS failure : 0x0
ME: Warm reset req : 0x0
ME: CPU repl valid : 0x0
ME: (Reserved) : 0x0
ME: FW update req : 0x0
ME: (Reserved) : 0x0
ME: Current state : 0xa
ME: Current PM event: 0x6
ME: Progress code : 0x1
ME: Requested BIOS Action: No DID Ack received
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : NO
ME: Manufacturing Mode : YES
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Initializing
ME: Current Operation State : Bring up
ME: Current Operation Mode : Debug or Disabled by AltDisableBit
ME: Error Code : No Error
ME: Progress Phase : BUP Phase
ME: Power Management Event : Pseudo-global reset
ME: Progress Phase State : Check to see if straps say ME DISABLED
memcfg DDR3 ref clock 133 MHz
memcfg DDR3 clock 1330 MHz
memcfg channel assignment: A: 0, B 1, C 2
memcfg channel[0] config (00600008):
ECC inactive
enhanced interleave mode on
rank interleave on
DIMMA 2048 MB width x8 single rank, selected
DIMMB 0 MB width x8 single rank
memcfg channel[1] config (00000000):
ECC inactive
enhanced interleave mode off
rank interleave off
DIMMA 0 MB width x8 single rank, selected
DIMMB 0 MB width x8 single rank
CBMEM:
IMD: root @ 7cfff000 254 entries.
IMD: root @ 7cffec00 62 entries.
CBMEM entry for DIMM info: 0x7cffe960
MTRR Range: Start=ff800000 End=0 (Size 800000)
MTRR Range: Start=0 End=1000000 (Size 1000000)
MTRR Range: Start=7c800000 End=7d000000 (Size 800000)
MTRR Range: Start=7d000000 End=7d800000 (Size 800000)
CBFS: 'Master Header Locator' located CBFS at [18100:7fffc0)
CBFS: Locating 'fallback/ramstage'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 142ac
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 143c0
CBFS: File @ offset 143c0 size 33c
CBFS: Unmatched 'config' at 143c0
CBFS: Checking offset 14740
CBFS: File @ offset 14740 size 240
CBFS: Unmatched 'revision' at 14740
CBFS: Checking offset 149c0
CBFS: File @ offset 149c0 size 660
CBFS: Unmatched 'payload_config' at 149c0
CBFS: Checking offset 15080
CBFS: File @ offset 15080 size ea
CBFS: Unmatched 'payload_revision' at 15080
CBFS: Checking offset 151c0
CBFS: File @ offset 151c0 size 2cd8
CBFS: Unmatched '' at 151c0
CBFS: Checking offset 17ec0
CBFS: File @ offset 17ec0 size 10000
CBFS: Unmatched 'mrc.cache' at 17ec0
CBFS: Checking offset 27f00
CBFS: File @ offset 27f00 size 5800
CBFS: Unmatched 'cpu_microcode_blob.bin' at 27f00
CBFS: Checking offset 2d780
CBFS: File @ offset 2d780 size 15d28
CBFS: Found @ offset 2d780 size 15d28
Decompressing stage fallback/ramstage @ 0x7cf95fc0 (268432 bytes)
Loading module at 7cf96000 with entry 7cf96000. filesize: 0x2f210 memsize: 0x41850
Processing 2970 relocs. Offset value of 0x7ce96000
coreboot-4.6-2138-gc09c2a4883 Fri Nov 17 21:33:25 UTC 2017 ramstage starting...
Normal boot.
BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3 exit 0
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 1
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 0
PNP: 004e.3: enabled 1
PNP: 004e.4: enabled 1
PNP: 004e.5: enabled 0
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 0
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
Compare with tree...
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 1
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 0
PNP: 004e.3: enabled 1
PNP: 004e.4: enabled 1
PNP: 004e.5: enabled 0
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 0
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
Root Device scanning...
root_dev_scan_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0104] ops
PCI: 00:00.0 [8086/0104] enabled
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
PCI: 00:01.0 subordinate bus PCI Express
PCI: 00:01.0 [8086/0101] enabled
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/0126] enabled
memalign Enter, boundary 8, size 152, free_mem_ptr 7cfd3850
memalign 7cfd3850
PCI: 00:04.0 [8086/0103] enabled
PCI: 00:16.0 [8086/1c3a] ops
PCI: 00:16.0 [8086/1c3a] enabled
PCI: 00:16.1: Disabling device
PCI: 00:16.2: Disabling device
PCI: Static device PCI: 00:16.3 not found, disabling it.
PCI: 00:19.0 [8086/1502] enabled
PCI: 00:1a.0 [8086/0000] ops
PCI: 00:1a.0 [8086/1c2d] enabled
PCI: 00:1b.0 [8086/0000] ops
PCI: 00:1b.0 [8086/1c20] enabled
PCH: PCIe Root Port coalescing is enabled
PCI: 00:1c.0 [8086/0000] bus ops
PCI: 00:1c.0 [8086/1c10] enabled
PCI: 00:1c.1 [8086/0000] bus ops
PCI: 00:1c.1 [8086/1c12] enabled
PCI: 00:1c.2 [8086/0000] bus ops
PCI: 00:1c.2 [8086/1c14] enabled
PCI: 00:1c.3 [8086/0000] bus ops
PCI: 00:1c.3 [8086/1c16] enabled
PCI: 00:1c.4: Disabling device
PCI: 00:1c.4: check set enabled
PCI: 00:1c.5: Disabling device
PCI: 00:1c.6: Disabling device
PCH: Remap PCIe function 7 to 4
PCH: RPFN 0x76543210 -> 0x4edf3210
PCH: PCIe map 1c.4 -> 1c.7
PCH: PCIe map 1c.7 -> 1c.4
PCI: 00:1c.4 [8086/0000] bus ops
PCI: 00:1c.4 [8086/1c1e] enabled
PCI: 00:1d.0 [8086/0000] ops
PCI: 00:1d.0 [8086/1c26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1e.0 [8086/2448] bus ops
PCI: 00:1e.0 [8086/2448] disabled
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/1c4f] enabled
PCI: 00:1f.2 [8086/0000] ops
PCI: 00:1f.2 [8086/1c01] enabled
PCI: 00:1f.3: Disabling device
PCI: 00:1f.3 [8086/0000] bus ops
PCI: 00:1f.3 [8086/1c22] disabled
PCI: 00:1f.5: Disabling device
PCI: 00:1f.6: Disabling device
PCI: 00:1f.6 [8086/1c24] disabled No operations
PCI: 00:01.0 scanning...
do_pci_scan_bridge for PCI: 00:01.0
memalign Enter, boundary 8, size 36, free_mem_ptr 7cfd38e8
memalign 7cfd38e8
PCI: pci_scan_bus for bus 01
scan_bus: scanning of bus PCI: 00:01.0 took 24 usecs
PCI: 00:1c.0 scanning...
do_pci_scan_bridge for PCI: 00:1c.0
memalign Enter, boundary 8, size 36, free_mem_ptr 7cfd390c
memalign 7cfd3910
PCI: pci_scan_bus for bus 02
scan_bus: scanning of bus PCI: 00:1c.0 took 55 usecs
PCI: 00:1c.1 scanning...
do_pci_scan_bridge for PCI: 00:1c.1
memalign Enter, boundary 8, size 36, free_mem_ptr 7cfd3934
memalign 7cfd3938
PCI: pci_scan_bus for bus 03
memalign Enter, boundary 8, size 152, free_mem_ptr 7cfd395c
memalign 7cfd3960
scan_bus: scanning of bus PCI: 00:1c.1 took 59 usecs
PCI: 00:1c.2 scanning...
do_pci_scan_bridge for PCI: 00:1c.2
memalign Enter, boundary 8, size 36, free_mem_ptr 7cfd39f8
memalign 7cfd39f8
PCI: pci_scan_bus for bus 04
memalign Enter, boundary 8, size 152, free_mem_ptr 7cfd3a1c
memalign 7cfd3a20
PCI: 04:00.0 [197b/2380] enabled
memalign Enter, boundary 8, size 152, free_mem_ptr 7cfd3ab8
memalign 7cfd3ab8
PCI: 04:00.1 [197b/2392] enabled
memalign Enter, boundary 8, size 152, free_mem_ptr 7cfd3b50
memalign 7cfd3b50
PCI: 04:00.2 [197b/2391] enabled
memalign Enter, boundary 8, size 152, free_mem_ptr 7cfd3be8
memalign 7cfd3be8
PCI: 04:00.3 [197b/2393] enabled
memalign Enter, boundary 8, size 152, free_mem_ptr 7cfd3c80
memalign 7cfd3c80
PCI: 04:00.4 [197b/2394] enabled
Capability: type 0x01 @ 0x44
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0x44
Capability: type 0x10 @ 0x80
Failed to enable LTR for dev = PCI: 04:00.0
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Failed to enable LTR for dev = PCI: 04:00.1
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Failed to enable LTR for dev = PCI: 04:00.2
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Failed to enable LTR for dev = PCI: 04:00.3
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Failed to enable LTR for dev = PCI: 04:00.4
memalign Enter, boundary 8, size 152, free_mem_ptr 7cfd3d18
memalign 7cfd3d18
scan_bus: scanning of bus PCI: 00:1c.2 took 926 usecs
PCI: 00:1c.3 scanning...
do_pci_scan_bridge for PCI: 00:1c.3
memalign Enter, boundary 8, size 36, free_mem_ptr 7cfd3db0
memalign 7cfd3db0
PCI: pci_scan_bus for bus 05
memalign Enter, boundary 8, size 152, free_mem_ptr 7cfd3dd4
memalign 7cfd3dd8
PCI: 05:00.0 [168c/0030] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled L0s and L1
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Failed to enable LTR for dev = PCI: 05:00.0
scan_bus: scanning of bus PCI: 00:1c.3 took 246 usecs
PCI: 00:1c.4 scanning...
do_pci_scan_bridge for PCI: 00:1c.4
memalign Enter, boundary 8, size 36, free_mem_ptr 7cfd3e70
memalign 7cfd3e70
PCI: pci_scan_bus for bus 06
memalign Enter, boundary 8, size 152, free_mem_ptr 7cfd3e94
memalign 7cfd3e98
PCI: 06:00.0 [1033/0194] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x05 @ 0x70
Capability: type 0x11 @ 0x90
Capability: type 0x10 @ 0xa0
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
Capability: type 0x01 @ 0x50
Capability: type 0x05 @ 0x70
Capability: type 0x11 @ 0x90
Capability: type 0x10 @ 0xa0
scan_bus: scanning of bus PCI: 00:1c.4 took 302 usecs
PCI: 00:1f.0 scanning...
scan_lpc_bus for PCI: 00:1f.0
KBC1126: initialize fan control...KBC1126: fan control initialized.
PNP: 00ff.1 disabled
memalign Enter, boundary 8, size 2560, free_mem_ptr 7cfd3f30
memalign 7cfd3f30
PNP: 004e.3 enabled
PNP: 004e.4 enabled
PNP: 004e.5 disabled
scan_lpc_bus for PCI: 00:1f.0 done
scan_bus: scanning of bus PCI: 00:1f.0 took 8077 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 10091 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 10102 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 10240 exit 0
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
PCI: 00:01.0 read_resources bus 1 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0 done
PCI: 00:1c.0 read_resources bus 2 link: 0
PCI: 00:1c.0 read_resources bus 2 link: 0 done
PCI: 00:1c.1 read_resources bus 3 link: 0
PCI: 00:1c.1 read_resources bus 3 link: 0 done
PCI: 00:1c.2 read_resources bus 4 link: 0
PCI: 00:1c.2 read_resources bus 4 link: 0 done
PCI: 00:1c.3 read_resources bus 5 link: 0
PCI: 00:1c.3 read_resources bus 5 link: 0 done
PCI: 00:1c.4 read_resources bus 6 link: 0
PCI: 00:1c.4 read_resources bus 6 link: 0 done
PCI: 00:1f.0 read_resources bus 0 link: 0
PCI: 00:1f.0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: acac
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
PCI: 00:01.0
PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:02.0
PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
PCI: 00:04.0
PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
PCI: 00:16.0
PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:19.0
PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
PCI: 00:1a.0
PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
PCI: 00:1b.0
PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
PCI: 00:1c.0
PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:1c.1 child on link 0 NONE
PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
NONE
NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10
NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14
NONE resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18
PCI: 00:1c.2 child on link 0 PCI: 04:00.0
PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 04:00.0
PCI: 04:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 10
PCI: 04:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
PCI: 04:00.1
PCI: 04:00.1 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 04:00.1 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
PCI: 04:00.2
PCI: 04:00.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 04:00.3
PCI: 04:00.3 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 04:00.4
PCI: 04:00.4 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
NONE
NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10
NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14
NONE resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18
PCI: 00:1c.3 child on link 0 PCI: 05:00.0
PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 05:00.0
PCI: 05:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
PCI: 05:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
PCI: 00:1c.7
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.4 child on link 0 PCI: 06:00.0
PCI: 00:1c.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.4 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 06:00.0
PCI: 06:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
PCI: 00:1d.0
PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
PCI: 00:1e.0
PCI: 00:1f.0 child on link 0 PNP: 00ff.1
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PCI: 00:1f.0 resource base fe00 size fc align 0 gran 0 limit 0 flags c0040100 index 10000200
PNP: 00ff.1
PNP: 004e.3
PNP: 004e.3 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 004e.4
PNP: 004e.4 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.4 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.5
PNP: 004e.5 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
PNP: 004e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PCI: 00:1f.2
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
PCI: 00:1f.3
PCI: 00:1f.5
PCI: 00:1f.6
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
NONE 18 * [0x0 - 0xfff] io
PCI: 00:1c.1 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
NONE 18 * [0x0 - 0xfff] io
PCI: 00:1c.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 1c * [0x0 - 0xfff] io
PCI: 00:1c.2 1c * [0x1000 - 0x1fff] io
PCI: 00:02.0 20 * [0x2000 - 0x203f] io
PCI: 00:19.0 18 * [0x2040 - 0x205f] io
PCI: 00:1f.2 20 * [0x2060 - 0x207f] io
PCI: 00:1f.2 10 * [0x2080 - 0x2087] io
PCI: 00:1f.2 18 * [0x2088 - 0x208f] io
PCI: 00:1f.2 14 * [0x2090 - 0x2093] io
PCI: 00:1f.2 1c * [0x2094 - 0x2097] io
DOMAIN: 0000 io: base: 2098 size: 2098 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
NONE 14 * [0x0 - 0x7fffff] prefmem
PCI: 00:1c.1 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
NONE 10 * [0x0 - 0x7fffff] mem
PCI: 00:1c.1 mem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
NONE 14 * [0x0 - 0x7fffff] prefmem
PCI: 00:1c.2 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
NONE 10 * [0x0 - 0x7fffff] mem
PCI: 04:00.1 30 * [0x800000 - 0x80ffff] mem
PCI: 04:00.0 10 * [0x810000 - 0x8107ff] mem
PCI: 04:00.0 14 * [0x811000 - 0x8110ff] mem
PCI: 04:00.1 10 * [0x812000 - 0x8120ff] mem
PCI: 04:00.2 10 * [0x813000 - 0x8130ff] mem
PCI: 04:00.3 10 * [0x814000 - 0x8140ff] mem
PCI: 04:00.4 10 * [0x815000 - 0x8150ff] mem
PCI: 00:1c.2 mem: base: 815100 size: 900000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 05:00.0 10 * [0x0 - 0x1ffff] mem
PCI: 05:00.0 30 * [0x20000 - 0x2ffff] mem
PCI: 00:1c.3 mem: base: 30000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 06:00.0 10 * [0x0 - 0x1fff] mem
PCI: 00:1c.4 mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
PCI: 00:1c.2 20 * [0x10000000 - 0x108fffff] mem
PCI: 00:1c.1 24 * [0x10c00000 - 0x113fffff] prefmem
PCI: 00:1c.1 20 * [0x11400000 - 0x11bfffff] mem
PCI: 00:1c.2 24 * [0x11c00000 - 0x123fffff] prefmem
PCI: 00:02.0 10 * [0x12400000 - 0x127fffff] mem
PCI: 00:1c.3 20 * [0x12800000 - 0x128fffff] mem
PCI: 00:1c.4 20 * [0x12900000 - 0x129fffff] mem
PCI: 00:19.0 10 * [0x12a00000 - 0x12a1ffff] mem
PCI: 00:04.0 10 * [0x12a20000 - 0x12a27fff] mem
PCI: 00:1b.0 10 * [0x12a28000 - 0x12a2bfff] mem
PCI: 00:19.0 14 * [0x12a2c000 - 0x12a2cfff] mem
PCI: 00:1f.2 24 * [0x12a2d000 - 0x12a2d7ff] mem
PCI: 00:1a.0 10 * [0x12a2e000 - 0x12a2e3ff] mem
PCI: 00:1d.0 10 * [0x12a2f000 - 0x12a2f3ff] mem
PCI: 00:16.0 10 * [0x12a30000 - 0x12a3000f] mem
DOMAIN: 0000 mem: base: 12a30010 size: 12a30010 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 60 base f8000000 limit fbffffff mem (fixed)
constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:1f.0 10000200 base 0000fe00 limit 0000fefb io (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000fdff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:2098 align:12 gran:0 limit:fdff
PCI: 00:1c.1 1c * [0x1000 - 0x1fff] io
PCI: 00:1c.2 1c * [0x2000 - 0x2fff] io
PCI: 00:02.0 20 * [0x3000 - 0x303f] io
PCI: 00:19.0 18 * [0x3040 - 0x305f] io
PCI: 00:1f.2 20 * [0x3060 - 0x307f] io
PCI: 00:1f.2 10 * [0x3080 - 0x3087] io
PCI: 00:1f.2 18 * [0x3088 - 0x308f] io
PCI: 00:1f.2 14 * [0x3090 - 0x3093] io
PCI: 00:1f.2 1c * [0x3094 - 0x3097] io
DOMAIN: 0000 io: next_base: 3098 size: 2098 align: 12 gran: 0 done
PCI: 00:01.0 io: base:fdff size:0 align:12 gran:12 limit:fdff
PCI: 00:01.0 io: next_base: fdff size: 0 align: 12 gran: 12 done
PCI: 00:1c.0 io: base:fdff size:0 align:12 gran:12 limit:fdff
PCI: 00:1c.0 io: next_base: fdff size: 0 align: 12 gran: 12 done
PCI: 00:1c.1 io: base:1000 size:1000 align:12 gran:12 limit:1fff
NONE 18 * [0x1000 - 0x1fff] io
PCI: 00:1c.1 io: next_base: 2000 size: 1000 align: 12 gran: 12 done
PCI: 00:1c.2 io: base:2000 size:1000 align:12 gran:12 limit:2fff
NONE 18 * [0x2000 - 0x2fff] io
PCI: 00:1c.2 io: next_base: 3000 size: 1000 align: 12 gran: 12 done
PCI: 00:1c.3 io: base:fdff size:0 align:12 gran:12 limit:fdff
PCI: 00:1c.3 io: next_base: fdff size: 0 align: 12 gran: 12 done
PCI: 00:1c.4 io: base:fdff size:0 align:12 gran:12 limit:fdff
PCI: 00:1c.4 io: next_base: fdff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:e0000000 size:12a30010 align:28 gran:0 limit:f7ffffff
PCI: 00:02.0 18 * [0xe0000000 - 0xefffffff] prefmem
PCI: 00:1c.2 20 * [0xf0000000 - 0xf08fffff] mem
PCI: 00:1c.1 24 * [0xf0c00000 - 0xf13fffff] prefmem
PCI: 00:1c.1 20 * [0xf1400000 - 0xf1bfffff] mem
PCI: 00:1c.2 24 * [0xf1c00000 - 0xf23fffff] prefmem
PCI: 00:02.0 10 * [0xf2400000 - 0xf27fffff] mem
PCI: 00:1c.3 20 * [0xf2800000 - 0xf28fffff] mem
PCI: 00:1c.4 20 * [0xf2900000 - 0xf29fffff] mem
PCI: 00:19.0 10 * [0xf2a00000 - 0xf2a1ffff] mem
PCI: 00:04.0 10 * [0xf2a20000 - 0xf2a27fff] mem
PCI: 00:1b.0 10 * [0xf2a28000 - 0xf2a2bfff] mem
PCI: 00:19.0 14 * [0xf2a2c000 - 0xf2a2cfff] mem
PCI: 00:1f.2 24 * [0xf2a2d000 - 0xf2a2d7ff] mem
PCI: 00:1a.0 10 * [0xf2a2e000 - 0xf2a2e3ff] mem
PCI: 00:1d.0 10 * [0xf2a2f000 - 0xf2a2f3ff] mem
PCI: 00:16.0 10 * [0xf2a30000 - 0xf2a3000f] mem
DOMAIN: 0000 mem: next_base: f2a30010 size: 12a30010 align: 28 gran: 0 done
PCI: 00:01.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:01.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:01.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:01.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.1 prefmem: base:f0c00000 size:800000 align:22 gran:20 limit:f13fffff
NONE 14 * [0xf0c00000 - 0xf13fffff] prefmem
PCI: 00:1c.1 prefmem: next_base: f1400000 size: 800000 align: 22 gran: 20 done
PCI: 00:1c.1 mem: base:f1400000 size:800000 align:22 gran:20 limit:f1bfffff
NONE 10 * [0xf1400000 - 0xf1bfffff] mem
PCI: 00:1c.1 mem: next_base: f1c00000 size: 800000 align: 22 gran: 20 done
PCI: 00:1c.2 prefmem: base:f1c00000 size:800000 align:22 gran:20 limit:f23fffff
NONE 14 * [0xf1c00000 - 0xf23fffff] prefmem
PCI: 00:1c.2 prefmem: next_base: f2400000 size: 800000 align: 22 gran: 20 done
PCI: 00:1c.2 mem: base:f0000000 size:900000 align:22 gran:20 limit:f08fffff
NONE 10 * [0xf0000000 - 0xf07fffff] mem
PCI: 04:00.1 30 * [0xf0800000 - 0xf080ffff] mem
PCI: 04:00.0 10 * [0xf0810000 - 0xf08107ff] mem
PCI: 04:00.0 14 * [0xf0811000 - 0xf08110ff] mem
PCI: 04:00.1 10 * [0xf0812000 - 0xf08120ff] mem
PCI: 04:00.2 10 * [0xf0813000 - 0xf08130ff] mem
PCI: 04:00.3 10 * [0xf0814000 - 0xf08140ff] mem
PCI: 04:00.4 10 * [0xf0815000 - 0xf08150ff] mem
PCI: 00:1c.2 mem: next_base: f0815100 size: 900000 align: 22 gran: 20 done
PCI: 00:1c.3 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.3 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.3 mem: base:f2800000 size:100000 align:20 gran:20 limit:f28fffff
PCI: 05:00.0 10 * [0xf2800000 - 0xf281ffff] mem
PCI: 05:00.0 30 * [0xf2820000 - 0xf282ffff] mem
PCI: 00:1c.3 mem: next_base: f2830000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.4 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.4 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.4 mem: base:f2900000 size:100000 align:20 gran:20 limit:f29fffff
PCI: 06:00.0 10 * [0xf2900000 - 0xf2901fff] mem
PCI: 00:1c.4 mem: next_base: f2902000 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
TOUUD 0x100600000 TOLUD 0x7fa00000 TOM 0x80000000
MEBASE 0x7ffff00000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0x7d000000 size 8M
Available memory below 4GB: 2000M
Available memory above 4GB: 6M
memalign Enter, boundary 8, size 2560, free_mem_ptr 7cfd4930
memalign 7cfd4930
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:01.0 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:02.0 10 <- [0x00f2400000 - 0x00f27fffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io
PCI: 00:04.0 10 <- [0x00f2a20000 - 0x00f2a27fff] size 0x00008000 gran 0x0f mem64
PCI: 00:16.0 10 <- [0x00f2a30000 - 0x00f2a3000f] size 0x00000010 gran 0x04 mem64
PCI: 00:19.0 10 <- [0x00f2a00000 - 0x00f2a1ffff] size 0x00020000 gran 0x11 mem
PCI: 00:19.0 14 <- [0x00f2a2c000 - 0x00f2a2cfff] size 0x00001000 gran 0x0c mem
PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io
PCI: 00:1a.0 10 <- [0x00f2a2e000 - 0x00f2a2e3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x00f2a28000 - 0x00f2a2bfff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:1c.1 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 03 io
PCI: 00:1c.1 24 <- [0x00f0c00000 - 0x00f13fffff] size 0x00800000 gran 0x14 bus 03 prefmem
PCI: 00:1c.1 20 <- [0x00f1400000 - 0x00f1bfffff] size 0x00800000 gran 0x14 bus 03 mem
PCI: 00:1c.1 assign_resources, bus 3 link: 0
NONE missing set_resources
PCI: 00:1c.1 assign_resources, bus 3 link: 0
PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 04 io
PCI: 00:1c.2 24 <- [0x00f1c00000 - 0x00f23fffff] size 0x00800000 gran 0x14 bus 04 prefmem
PCI: 00:1c.2 20 <- [0x00f0000000 - 0x00f08fffff] size 0x00900000 gran 0x14 bus 04 mem
PCI: 00:1c.2 assign_resources, bus 4 link: 0
PCI: 04:00.0 10 <- [0x00f0810000 - 0x00f08107ff] size 0x00000800 gran 0x0b mem
PCI: 04:00.0 14 <- [0x00f0811000 - 0x00f08110ff] size 0x00000100 gran 0x08 mem
PCI: 04:00.1 10 <- [0x00f0812000 - 0x00f08120ff] size 0x00000100 gran 0x08 mem
PCI: 04:00.1 30 <- [0x00f0800000 - 0x00f080ffff] size 0x00010000 gran 0x10 romem
PCI: 04:00.2 10 <- [0x00f0813000 - 0x00f08130ff] size 0x00000100 gran 0x08 mem
PCI: 04:00.3 10 <- [0x00f0814000 - 0x00f08140ff] size 0x00000100 gran 0x08 mem
PCI: 04:00.4 10 <- [0x00f0815000 - 0x00f08150ff] size 0x00000100 gran 0x08 mem
NONE missing set_resources
PCI: 00:1c.2 assign_resources, bus 4 link: 0
PCI: 00:1c.3 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 05 io
PCI: 00:1c.3 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 05 prefmem
PCI: 00:1c.3 20 <- [0x00f2800000 - 0x00f28fffff] size 0x00100000 gran 0x14 bus 05 mem
PCI: 00:1c.3 assign_resources, bus 5 link: 0
PCI: 05:00.0 10 <- [0x00f2800000 - 0x00f281ffff] size 0x00020000 gran 0x11 mem64
PCI: 05:00.0 30 <- [0x00f2820000 - 0x00f282ffff] size 0x00010000 gran 0x10 romem
PCI: 00:1c.3 assign_resources, bus 5 link: 0
PCI: 00:1c.4 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 06 io
PCI: 00:1c.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 06 prefmem
PCI: 00:1c.4 20 <- [0x00f2900000 - 0x00f29fffff] size 0x00100000 gran 0x14 bus 06 mem
PCI: 00:1c.4 assign_resources, bus 6 link: 0
PCI: 06:00.0 10 <- [0x00f2900000 - 0x00f2901fff] size 0x00002000 gran 0x0d mem64
PCI: 00:1c.4 assign_resources, bus 6 link: 0
PCI: 00:1d.0 10 <- [0x00f2a2f000 - 0x00f2a2f3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PNP: 004e.3 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io
PNP: 004e.3 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
ERROR: PNP: 004e.3 74 not allocated
PNP: 004e.4 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 004e.4 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00f2a2d000 - 0x00f2a2d7ff] size 0x00000800 gran 0x0b mem
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: acac
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 1000 size 2098 align 12 gran 0 limit fdff flags 40040100 index 10000000
DOMAIN: 0000 resource base e0000000 size 12a30010 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
DOMAIN: 0000 resource base 100000 size 7cf00000 align 0 gran 0 limit 0 flags e0004200 index 4
DOMAIN: 0000 resource base 100000000 size 600000 align 0 gran 0 limit 0 flags e0004200 index 5
DOMAIN: 0000 resource base 7d000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8
DOMAIN: 0000 resource base 20000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index 9
DOMAIN: 0000 resource base 40000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index a
DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
PCI: 00:00.0
PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
PCI: 00:01.0
PCI: 00:01.0 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c
PCI: 00:01.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:01.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
PCI: 00:02.0
PCI: 00:02.0 resource base f2400000 size 400000 align 22 gran 22 limit f27fffff flags 60000201 index 10
PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18
PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20
PCI: 00:04.0
PCI: 00:04.0 resource base f2a20000 size 8000 align 15 gran 15 limit f2a27fff flags 60000201 index 10
PCI: 00:16.0
PCI: 00:16.0 resource base f2a30000 size 10 align 12 gran 4 limit f2a3000f flags 60000201 index 10
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:19.0
PCI: 00:19.0 resource base f2a00000 size 20000 align 17 gran 17 limit f2a1ffff flags 60000200 index 10
PCI: 00:19.0 resource base f2a2c000 size 1000 align 12 gran 12 limit f2a2cfff flags 60000200 index 14
PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 18
PCI: 00:1a.0
PCI: 00:1a.0 resource base f2a2e000 size 400 align 12 gran 10 limit f2a2e3ff flags 60000200 index 10
PCI: 00:1b.0
PCI: 00:1b.0 resource base f2a28000 size 4000 align 14 gran 14 limit f2a2bfff flags 60000201 index 10
PCI: 00:1c.0
PCI: 00:1c.0 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c
PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
PCI: 00:1c.1 child on link 0 NONE
PCI: 00:1c.1 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
PCI: 00:1c.1 resource base f0c00000 size 800000 align 22 gran 20 limit f13fffff flags 60081202 index 24
PCI: 00:1c.1 resource base f1400000 size 800000 align 22 gran 20 limit f1bfffff flags 60080202 index 20
NONE
NONE resource base f1400000 size 800000 align 22 gran 22 limit f1bfffff flags 40000200 index 10
NONE resource base f0c00000 size 800000 align 22 gran 22 limit f13fffff flags 40001200 index 14
NONE resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 40000100 index 18
PCI: 00:1c.2 child on link 0 PCI: 04:00.0
PCI: 00:1c.2 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
PCI: 00:1c.2 resource base f1c00000 size 800000 align 22 gran 20 limit f23fffff flags 60081202 index 24
PCI: 00:1c.2 resource base f0000000 size 900000 align 22 gran 20 limit f08fffff flags 60080202 index 20
PCI: 04:00.0
PCI: 04:00.0 resource base f0810000 size 800 align 12 gran 11 limit f08107ff flags 60000200 index 10
PCI: 04:00.0 resource base f0811000 size 100 align 12 gran 8 limit f08110ff flags 60000200 index 14
PCI: 04:00.1
PCI: 04:00.1 resource base f0812000 size 100 align 12 gran 8 limit f08120ff flags 60000200 index 10
PCI: 04:00.1 resource base f0800000 size 10000 align 16 gran 16 limit f080ffff flags 60002200 index 30
PCI: 04:00.2
PCI: 04:00.2 resource base f0813000 size 100 align 12 gran 8 limit f08130ff flags 60000200 index 10
PCI: 04:00.3
PCI: 04:00.3 resource base f0814000 size 100 align 12 gran 8 limit f08140ff flags 60000200 index 10
PCI: 04:00.4
PCI: 04:00.4 resource base f0815000 size 100 align 12 gran 8 limit f08150ff flags 60000200 index 10
NONE
NONE resource base f0000000 size 800000 align 22 gran 22 limit f07fffff flags 40000200 index 10
NONE resource base f1c00000 size 800000 align 22 gran 22 limit f23fffff flags 40001200 index 14
NONE resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18
PCI: 00:1c.3 child on link 0 PCI: 05:00.0
PCI: 00:1c.3 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c
PCI: 00:1c.3 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:1c.3 resource base f2800000 size 100000 align 20 gran 20 limit f28fffff flags 60080202 index 20
PCI: 05:00.0
PCI: 05:00.0 resource base f2800000 size 20000 align 17 gran 17 limit f281ffff flags 60000201 index 10
PCI: 05:00.0 resource base f2820000 size 10000 align 16 gran 16 limit f282ffff flags 60002200 index 30
PCI: 00:1c.7
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.4 child on link 0 PCI: 06:00.0
PCI: 00:1c.4 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c
PCI: 00:1c.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:1c.4 resource base f2900000 size 100000 align 20 gran 20 limit f29fffff flags 60080202 index 20
PCI: 06:00.0
PCI: 06:00.0 resource base f2900000 size 2000 align 13 gran 13 limit f2901fff flags 60000201 index 10
PCI: 00:1d.0
PCI: 00:1d.0 resource base f2a2f000 size 400 align 12 gran 10 limit f2a2f3ff flags 60000200 index 10
PCI: 00:1e.0
PCI: 00:1f.0 child on link 0 PNP: 00ff.1
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PCI: 00:1f.0 resource base fe00 size fc align 0 gran 0 limit 0 flags c0040100 index 10000200
PNP: 00ff.1
PNP: 004e.3
PNP: 004e.3 resource base 378 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 004e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 004e.4
PNP: 004e.4 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 004e.4 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 004e.5
PNP: 004e.5 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
PNP: 004e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PCI: 00:1f.2
PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit 3087 flags 60000100 index 10
PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit 3093 flags 60000100 index 14
PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit 308f flags 60000100 index 18
PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit 3097 flags 60000100 index 1c
PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit 307f flags 60000100 index 20
PCI: 00:1f.2 resource base f2a2d000 size 800 align 12 gran 11 limit f2a2d7ff flags 60000200 index 24
PCI: 00:1f.3
PCI: 00:1f.5
PCI: 00:1f.6
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 4163 exit 0
Enabling resources...
PCI: 00:00.0 subsystem <- 103c/161c
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 0003
PCI: 00:01.0 cmd <- 00
PCI: 00:02.0 subsystem <- 103c/161c
PCI: 00:02.0 cmd <- 03
PCI: 00:04.0 cmd <- 02
PCI: 00:16.0 subsystem <- 103c/161c
PCI: 00:16.0 cmd <- 02
PCI: 00:19.0 subsystem <- 103c/161c
PCI: 00:19.0 cmd <- 103
PCI: 00:1a.0 subsystem <- 103c/161c
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 103c/161c
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 103c/161c
PCI: 00:1c.0 cmd <- 100
PCI: 00:1c.1 bridge ctrl <- 0003
PCI: 00:1c.1 subsystem <- 103c/161c
PCI: 00:1c.1 cmd <- 107
PCI: 00:1c.2 bridge ctrl <- 0003
PCI: 00:1c.2 subsystem <- 103c/161c
PCI: 00:1c.2 cmd <- 107
PCI: 00:1c.3 bridge ctrl <- 0003
PCI: 00:1c.3 subsystem <- 103c/161c
PCI: 00:1c.3 cmd <- 106
PCI: 00:1c.4 bridge ctrl <- 0003
PCI: 00:1c.4 subsystem <- 103c/161c
PCI: 00:1c.4 cmd <- 106
PCI: 00:1d.0 subsystem <- 103c/161c
PCI: 00:1d.0 cmd <- 102
pch_decode_init
PCI: 00:1f.0 subsystem <- 103c/161c
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 103c/161c
PCI: 00:1f.2 cmd <- 03
PCI: 04:00.0 cmd <- 02
PCI: 04:00.1 cmd <- 06
PCI: 04:00.2 cmd <- 06
PCI: 04:00.3 cmd <- 06
PCI: 04:00.4 cmd <- 06
PCI: 05:00.0 cmd <- 02
PCI: 06:00.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 227 exit 0
Initializing devices...
Root Device init ...
Root Device init finished in 1 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Setting up SMI for CPU
Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
Processing 12 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 00038000. Will call 7cfaf32f(7cfd37e0)
Installing SMM handler to 0x7d000000
Loading module at 7d010000 with entry 7d01105f. filesize: 0x2cd8 memsize: 0x6cf8
Processing 184 relocs. Offset value of 0x7d010000
Loading module at 7d008000 with entry 7d008000. filesize: 0x1a8 memsize: 0x1a8
Processing 12 relocs. Offset value of 0x7d008000
SMM Module: placing jmp sequence at 7d007c00 rel16 0x03fd
SMM Module: placing jmp sequence at 7d007800 rel16 0x07fd
SMM Module: placing jmp sequence at 7d007400 rel16 0x0bfd
SMM Module: stub loaded at 7d008000. Will call 7d01105f(00000000)
Initializing southbridge SMI... ... pmbase = 0x0500
SMI_STS:
PM1_STS:
GPE0_STS: GPIO15 GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO7 GPIO6 GPIO4 GPIO3 GPIO1 EL_SCI/BATLOW
ALT_GP_SMI_STS: GPI15 GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI4 GPI3 GPI1
TCO_STS: INTRD_DET
... raise SMI#
In relocation handler: cpu 0
New SMBASE=0x7d000000 IEDBASE=0x7d400000 @ 0003fc00
Writing SMRR. base = 0x7d000006, mask=0xff800800
Relocation complete.
Locking SMM.
Initializing CPU #0
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [18100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 142ac
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 143c0
CBFS: File @ offset 143c0 size 33c
CBFS: Unmatched 'config' at 143c0
CBFS: Checking offset 14740
CBFS: File @ offset 14740 size 240
CBFS: Unmatched 'revision' at 14740
CBFS: Checking offset 149c0
CBFS: File @ offset 149c0 size 660
CBFS: Unmatched 'payload_config' at 149c0
CBFS: Checking offset 15080
CBFS: File @ offset 15080 size ea
CBFS: Unmatched 'payload_revision' at 15080
CBFS: Checking offset 151c0
CBFS: File @ offset 151c0 size 2cd8
CBFS: Unmatched '' at 151c0
CBFS: Checking offset 17ec0
CBFS: File @ offset 17ec0 size 10000
CBFS: Unmatched 'mrc.cache' at 17ec0
CBFS: Checking offset 27f00
CBFS: File @ offset 27f00 size 5800
CBFS: Found @ offset 27f00 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x29
CPU: Intel(R) Core(TM) i5-2520M CPU @ 2.50GHz.
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5330
memalign 7cfd5330
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5348
memalign 7cfd5348
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5360
memalign 7cfd5360
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5378
memalign 7cfd5378
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5390
memalign 7cfd5390
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd53a8
memalign 7cfd53a8
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd53c0
memalign 7cfd53c0
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd53d8
memalign 7cfd53d8
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd53f0
memalign 7cfd53f0
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5408
memalign 7cfd5408
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5420
memalign 7cfd5420
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5438
memalign 7cfd5438
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5450
memalign 7cfd5450
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5468
memalign 7cfd5468
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5480
memalign 7cfd5480
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5498
memalign 7cfd5498
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd54b0
memalign 7cfd54b0
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x000000007d000000 size 0x7cf40000 type 6
0x000000007d000000 - 0x00000000e0000000 size 0x63000000 type 0
0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1
0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0
0x0000000100000000 - 0x0000000100600000 size 0x00600000 type 6
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 6/5.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
MTRR: 1 base 0x000000007d000000 mask 0x0000000fff000000 type 0
MTRR: 2 base 0x000000007e000000 mask 0x0000000ffe000000 type 0
MTRR: 3 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1
MTRR: 4 base 0x0000000100000000 mask 0x0000000f00000000 type 6
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC... apic_id: 0x00 done.
VMX is locked, so set_vmx will do nothing
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2500
Turbo is available but hidden
Turbo has been enabled
CPU: 0 has 2 cores, 2 threads per core
memalign Enter, boundary 8, size 152, free_mem_ptr 7cfd54c8
memalign 7cfd54c8
CPU: 0 has core 1
CPU1: stack_base 7cfcc000, stack_end 7cfccff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
In relocation handler: cpu 1
New SMBASE=0x7cfffc00 IEDBASE=0x7d400000 @ 0003fc00
Writing SMRR. base = 0x7d000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
memalign Enter, boundary 8, size 152, free_mem_ptr 7cfd5560
CPU: vendor Intel device 206a7
memalign 7cfd5560
CPU: family 06, model 2a, stepping 07
CPU: 0 has core 2
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [18100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 142ac
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 143c0
CBFS: File @ offset 143c0 size 33c
CBFS: Unmatched 'config' at 143c0
CBFS: Checking offset 14740
CBFS: File @ offset 14740 size 240
CBFS: Unmatched 'revision' at 14740
CBFS: Checking offset 149c0
CBFS: File @ offset 149c0 size 660
CBFS: Unmatched 'payload_config' at 149c0
CBFS: Checking offset 15080
CBFS: File @ offset 15080 size ea
CBFS: Unmatched 'payload_revision' at 15080
CBFS: Checking offset 151c0
CBFS: File @ offset 151c0 size 2cd8
CBFS: Unmatched '' at 151c0
CBFS: Checking offset 17ec0
CBFS: File @ offset 17ec0 size 10000
CBFS: Unmatched 'mrc.cache' at 17ec0
CBFS: Checking offset 27f00
CBFS: File @ offset 27f00 size 5800
CBFS: Found @ offset 27f00 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x29
CPU: Intel(R) Core(TM) i5-2520M CPU @ 2.50GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC... apic_id: 0x01 done.
VMX is locked, so set_vmx will do nothing
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2500
CPU #1 initialized
CPU2: stack_base 7cfcb000, stack_end 7cfcbff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 2.
After apic_write.
In relocation handler: cpu 2
Startup point 1.
Waiting for send to finish...
+New SMBASE=0x7cfff800 IEDBASE=0x7d400000 @ 0003fc00
Sending STARTUP #2 to 2.
After apic_write.
Writing SMRR. base = 0x7d000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+After Startup.
memalign Enter, boundary 8, size 152, free_mem_ptr 7cfd55f8
memalign 7cfd55f8
CPU: 0 has core 3
Initializing CPU #2
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [18100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 142ac
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 143c0
CBFS: File @ offset 143c0 size 33c
CBFS: Unmatched 'config' at 143c0
CBFS: Checking offset 14740
CBFS: File @ offset 14740 size 240
CBFS: Unmatched 'revision' at 14740
CBFS: Checking offset 149c0
CBFS: File @ offset 149c0 size 660
CBFS: Unmatched 'payload_config' at 149c0
CBFS: Checking offset 15080
CBFS: File @ offset 15080 size ea
CBFS: Unmatched 'payload_revision' at 15080
CBFS: Checking offset 151c0
CBFS: File @ offset 151c0 size 2cd8
CBFS: Unmatched '' at 151c0
CBFS: Checking offset 17ec0
CBFS: File @ offset 17ec0 size 10000
CBFS: Unmatched 'mrc.cache' at 17ec0
CBFS: Checking offset 27f00
CBFS: File @ offset 27f00 size 5800
CBFS: Found @ offset 27f00 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x0
microcode: updated to revision 0x29 date=2013-06-12
CPU: Intel(R) Core(TM) i5-2520M CPU @ 2.50GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC... apic_id: 0x02 done.
VMX is locked, so set_vmx will do nothing
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2500
CPU #2 initialized
CPU3: stack_base 7cfca000, stack_end 7cfcaff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 3.
After apic_write.
In relocation handler: cpu 3
New SMBASE=0x7cfff400 IEDBASE=0x7d400000 @ 0003fc00
Writing SMRR. base = 0x7d000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU #0 initialized
Waiting for 1 CPUS to stop
Initializing CPU #3
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [18100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 142ac
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 143c0
CBFS: File @ offset 143c0 size 33c
CBFS: Unmatched 'config' at 143c0
CBFS: Checking offset 14740
CBFS: File @ offset 14740 size 240
CBFS: Unmatched 'revision' at 14740
CBFS: Checking offset 149c0
CBFS: File @ offset 149c0 size 660
CBFS: Unmatched 'payload_config' at 149c0
CBFS: Checking offset 15080
CBFS: File @ offset 15080 size ea
CBFS: Unmatched 'payload_revision' at 15080
CBFS: Checking offset 151c0
CBFS: File @ offset 151c0 size 2cd8
CBFS: Unmatched '' at 151c0
CBFS: Checking offset 17ec0
CBFS: File @ offset 17ec0 size 10000
CBFS: Unmatched 'mrc.cache' at 17ec0
CBFS: Checking offset 27f00
CBFS: File @ offset 27f00 size 5800
CBFS: Found @ offset 27f00 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x29
CPU: Intel(R) Core(TM) i5-2520M CPU @ 2.50GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC... apic_id: 0x03 done.
VMX is locked, so set_vmx will do nothing
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2500
CPU #3 initialized
All AP CPUs stopped (568 loops)
CPU0: stack: 7cfcd000 - 7cfce000, lowest used address 7cfcda40, stack used: 1472 bytes
CPU1: stack: 7cfcc000 - 7cfcd000, lowest used address 7cfccc40, stack used: 960 bytes
CPU2: stack: 7cfcb000 - 7cfcc000, lowest used address 7cfcbc40, stack used: 960 bytes
CPU3: stack: 7cfca000 - 7cfcb000, lowest used address 7cfcac40, stack used: 960 bytes
CPU_CLUSTER: 0 init finished in 90348 usecs
PCI: 00:00.0 init ...
Disabling PEG12.
Disabling PEG11.
Disabling PEG60.
Disabling Device 7.
Set BIOS_RESET_CPL
CPU TDP: 35 Watts
PCI: 00:00.0 init finished in 1017 usecs
PCI: 00:02.0 init ...
GT Power Management Init
SNB GT2 Power Meter Weights
GT Power Management Init (post VBIOS)
Initializing VGA without OPROM.
EDID:
00 ff ff ff ff ff ff 00 0d ae 74 14 00 00 00 00
23 15 01 04 90 1f 11 78 0a 2b 35 97 57 54 8f 29
23 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 da 1d 56 e2 50 00 20 30 44 2d
47 00 35 ae 10 00 00 1a e7 13 56 e2 50 00 20 30
44 2d 47 00 35 ae 10 00 00 1a 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02
00 0c 44 ff 0a 3c 64 11 14 21 64 00 00 00 00 43
Extracted contents:
header: 00 ff ff ff ff ff ff 00
serial number: 0d ae 74 14 00 00 00 00 23 15
version: 01 04
basic params: 90 1f 11 78 0a
chroma info: 2b 35 97 57 54 8f 29 23 50 54
established: 00 00 00
standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
descriptor 1: da 1d 56 e2 50 00 20 30 44 2d 47 00 35 ae 10 00 00 1a
descriptor 2: e7 13 56 e2 50 00 20 30 44 2d 47 00 35 ae 10 00 00 1a
descriptor 3: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
descriptor 4: 00 00 00 02 00 0c 44 ff 0a 3c 64 11 14 21 64 00 00 00
extensions: 00
checksum: 43
Manufacturer: CMN Model 1474 Serial Number 0
Made week 35 of 2011
EDID version: 1.4
Digital display
6 bits per primary color channel
Digital interface is not defined
Maximum image size: 31 cm x 17 cm
Gamma: 220%
Check DPMS levels
Supported color formats: RGB 4:4:4, YCrCb 4:2:2
First detailed timing is preferred timing
Established timings supported:
Standard timings supported:
Detailed timings
Hex of detail: da1d56e250002030442d470035ae1000001a
Detailed mode (IN HEX): Clock 76420 KHz, 135 mm x ae mm
0556 059a 05c7 0638 hborder 0
0300 0304 030b 0320 vborder 0
+hsync -vsync
Did detailed timing
Hex of detail: e71356e250002030442d470035ae1000001a
Detailed mode (IN HEX): Clock 50950 KHz, 135 mm x ae mm
0556 059a 05c7 0638 hborder 0
0300 0304 030b 0320 vborder 0
+hsync -vsync
Hex of detail: 000000000000000000000000000000000000
Manufacturer-specified data, tag 0
Hex of detail: 00000002000c44ff0a3c6411142164000000
Manufacturer-specified data, tag 2
Checksum
Checksum: 0x43 (valid)
bringing up panel at resolution 1376 x 768
Borders 0 x 0
Blank 226 x 32
Sync 45 x 7
Front porch 68 x 4
Spread spectrum clock
Single channel
Polarities 0, 1
Data M1=1335536, N1=8388608
Link frequency 270000 kHz
Link M1=148392, N1=524288
Pixel N=6, M1=20, M2=7, P1=2
Pixel clock 152857 kHz
waiting for panel powerup
panel powered up
PCI: 00:02.0 init finished in 28382 usecs
PCI: 00:04.0 init ...
PCI: 00:04.0 init finished in 0 usecs
PCI: 00:16.0 init ...
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : NO
ME: Manufacturing Mode : YES
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Initializing
ME: Current Operation State : Bring up
ME: Current Operation Mode : Debug or Disabled by AltDisableBit
ME: Error Code : No Error
ME: Progress Phase : BUP Phase
ME: Power Management Event : Pseudo-global reset
ME: Progress Phase State : Check to see if straps say ME DISABLED
ME: BIOS path: Disable
PCI: 00:16.0 init finished in 16 usecs
PCI: 00:19.0 init ...
PCI: 00:19.0 init finished in 0 usecs
PCI: 00:1a.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1a.0 init finished in 12 usecs
PCI: 00:1b.0 init ...
Azalia: base = f2a28000
Azalia: codec_mask = 0b
Azalia: Initializing codec #3
Azalia: codec viddid: 80862805
Azalia: No verb!
Azalia: Initializing codec #1
Azalia: codec viddid: 11c11040
Azalia: verb_size: 4
Azalia: verb loaded.
Azalia: Initializing codec #0
Azalia: codec viddid: 111d7605
Azalia: verb_size: 44
Azalia: verb loaded.
PCI: 00:1b.0 init finished in 4141 usecs
PCI: 00:1c.0 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 8 usecs
PCI: 00:1c.1 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.1 init finished in 10 usecs
PCI: 00:1c.2 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.2 init finished in 10 usecs
PCI: 00:1c.3 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.3 init finished in 8 usecs
PCI: 00:1c.4 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.4 init finished in 8 usecs
PCI: 00:1d.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 12 usecs
PCI: 00:1f.0 init ...
pch: lpc_init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
reg 0x0000: 0x02000000
reg 0x0001: 0x00170020
reg 0x0002: 0x00170020
Set power off after power failure.
NMI sources disabled.
CougarPoint PM init
rtc_failed = 0x0
RTC Init
Enabling BIOS updates outside of SMM... Disabling ACPI via APMC:
done.
pch_spi_init
PCI: 00:1f.0 init finished in 261 usecs
PCI: 00:1f.2 init ...
SATA: Initializing...
SATA: Controller in AHCI mode.
ABAR: f2a2d000
PCI: 00:1f.2 init finished in 72 usecs
PCI: 04:00.0 init ...
PCI: 04:00.0 init finished in 0 usecs
PCI: 04:00.1 init ...
PCI: 04:00.1 init finished in 0 usecs
PCI: 04:00.2 init ...
PCI: 04:00.2 init finished in 0 usecs
PCI: 04:00.3 init ...
PCI: 04:00.3 init finished in 0 usecs
PCI: 04:00.4 init ...
PCI: 04:00.4 init finished in 0 usecs
PCI: 05:00.0 init ...
PCI: 05:00.0 init finished in 0 usecs
PCI: 06:00.0 init ...
PCI: 06:00.0 init finished in 0 usecs
PNP: 004e.3 init ...
PNP: 004e.3 init finished in 0 usecs
PNP: 004e.4 init ...
PNP: 004e.4 init finished in 0 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 00:1c.7: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.4: enabled 1
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 0
PNP: 004e.3: enabled 1
PNP: 004e.4: enabled 1
PNP: 004e.5: enabled 0
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 0
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
PCI: 00:04.0: enabled 1
NONE: enabled 1
PCI: 04:00.0: enabled 1
PCI: 04:00.1: enabled 1
PCI: 04:00.2: enabled 1
PCI: 04:00.3: enabled 1
PCI: 04:00.4: enabled 1
NONE: enabled 1
PCI: 05:00.0: enabled 1
PCI: 06:00.0: enabled 1
APIC: 01: enabled 1
APIC: 02: enabled 1
APIC: 03: enabled 1
Updating MRC cache data.
No MRC cache in cbmem. Can't update flash.
BS: BS_DEV_INIT times (us): entry 6 run 124457 exit 1
Finalize devices...
PCI: 00:1f.0 final
Devices finalized
BS: BS_POST_DEVICE times (us): entry 0 run 55 exit 0
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 2 exit 0
CBFS: 'Master Header Locator' located CBFS at [18100:7fffc0)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 142ac
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 143c0
CBFS: File @ offset 143c0 size 33c
CBFS: Unmatched 'config' at 143c0
CBFS: Checking offset 14740
CBFS: File @ offset 14740 size 240
CBFS: Unmatched 'revision' at 14740
CBFS: Checking offset 149c0
CBFS: File @ offset 149c0 size 660
CBFS: Unmatched 'payload_config' at 149c0
CBFS: Checking offset 15080
CBFS: File @ offset 15080 size ea
CBFS: Unmatched 'payload_revision' at 15080
CBFS: Checking offset 151c0
CBFS: File @ offset 151c0 size 2cd8
CBFS: Unmatched '' at 151c0
CBFS: Checking offset 17ec0
CBFS: File @ offset 17ec0 size 10000
CBFS: Unmatched 'mrc.cache' at 17ec0
CBFS: Checking offset 27f00
CBFS: File @ offset 27f00 size 5800
CBFS: Unmatched 'cpu_microcode_blob.bin' at 27f00
CBFS: Checking offset 2d780
CBFS: File @ offset 2d780 size 15d28
CBFS: Unmatched 'fallback/ramstage' at 2d780
CBFS: Checking offset 43500
CBFS: File @ offset 43500 size 6800
CBFS: Unmatched 'vgaroms/seavgabios.bin' at 43500
CBFS: Checking offset 49d80
CBFS: File @ offset 49d80 size 3546
CBFS: Found @ offset 49d80 size 3546
CBFS: 'Master Header Locator' located CBFS at [18100:7fffc0)
CBFS: Locating 'fallback/slic'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 142ac
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 143c0
CBFS: File @ offset 143c0 size 33c
CBFS: Unmatched 'config' at 143c0
CBFS: Checking offset 14740
CBFS: File @ offset 14740 size 240
CBFS: Unmatched 'revision' at 14740
CBFS: Checking offset 149c0
CBFS: File @ offset 149c0 size 660
CBFS: Unmatched 'payload_config' at 149c0
CBFS: Checking offset 15080
CBFS: File @ offset 15080 size ea
CBFS: Unmatched 'payload_revision' at 15080
CBFS: Checking offset 151c0
CBFS: File @ offset 151c0 size 2cd8
CBFS: Unmatched '' at 151c0
CBFS: Checking offset 17ec0
CBFS: File @ offset 17ec0 size 10000
CBFS: Unmatched 'mrc.cache' at 17ec0
CBFS: Checking offset 27f00
CBFS: File @ offset 27f00 size 5800
CBFS: Unmatched 'cpu_microcode_blob.bin' at 27f00
CBFS: Checking offset 2d780
CBFS: File @ offset 2d780 size 15d28
CBFS: Unmatched 'fallback/ramstage' at 2d780
CBFS: Checking offset 43500
CBFS: File @ offset 43500 size 6800
CBFS: Unmatched 'vgaroms/seavgabios.bin' at 43500
CBFS: Checking offset 49d80
CBFS: File @ offset 49d80 size 3546
CBFS: Unmatched 'fallback/dsdt.aml' at 49d80
CBFS: Checking offset 4d340
CBFS: File @ offset 4d340 size 18f38
CBFS: Unmatched 'img/coreinfo' at 4d340
CBFS: Checking offset 662c0
CBFS: File @ offset 662c0 size 228dc
CBFS: Unmatched 'img/nvramcui' at 662c0
CBFS: Checking offset 88c00
CBFS: File @ offset 88c00 size f66a
CBFS: Unmatched 'fallback/payload' at 88c00
CBFS: Checking offset 982c0
CBFS: File @ offset 982c0 size 2c02c
CBFS: Unmatched 'img/memtest' at 982c0
CBFS: Checking offset c4340
CBFS: File @ offset c4340 size 711b58
CBFS: Unmatched '' at c4340
CBFS: Checking offset 7d5ec0
CBFS: File @ offset 7d5ec0 size fc00
CBFS: Unmatched 'ecfw2.bin' at 7d5ec0
CBFS: Checking offset 7e5b00
CBFS: File @ offset 7e5b00 size b98
CBFS: Unmatched '' at 7e5b00
CBFS: Checking offset 7e66c0
CBFS: File @ offset 7e66c0 size 800
CBFS: Unmatched 'ecfw1.bin' at 7e66c0
CBFS: Checking offset 7e6f00
CBFS: File @ offset 7e6f00 size 7d8
CBFS: Unmatched '' at 7e6f00
CBFS: Checking offset 7e7700
CBFS: File @ offset 7e7700 size 7b0
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at 7cf17000.
ACPI: * FACS
ACPI: * DSDT
ACPI: * FADT
ACPI: added table 1/32, length now 40
ACPI: * SSDT
Found 1 CPU(s) with 4 core(s) each.
PSS: 2501MHz power 35000 control 0x2000 status 0x2000
PSS: 2500MHz power 35000 control 0x1900 status 0x1900
PSS: 2000MHz power 26404 control 0x1400 status 0x1400
PSS: 1600MHz power 20160 control 0x1000 status 0x1000
PSS: 1200MHz power 14397 control 0xc00 status 0xc00
PSS: 800MHz power 9139 control 0x800 status 0x800
PSS: 2501MHz power 35000 control 0x2000 status 0x2000
PSS: 2500MHz power 35000 control 0x1900 status 0x1900
PSS: 2000MHz power 26404 control 0x1400 status 0x1400
PSS: 1600MHz power 20160 control 0x1000 status 0x1000
PSS: 1200MHz power 14397 control 0xc00 status 0xc00
PSS: 800MHz power 9139 control 0x800 status 0x800
PSS: 2501MHz power 35000 control 0x2000 status 0x2000
PSS: 2500MHz power 35000 control 0x1900 status 0x1900
PSS: 2000MHz power 26404 control 0x1400 status 0x1400
PSS: 1600MHz power 20160 control 0x1000 status 0x1000
PSS: 1200MHz power 14397 control 0xc00 status 0xc00
PSS: 800MHz power 9139 control 0x800 status 0x800
PSS: 2501MHz power 35000 control 0x2000 status 0x2000
PSS: 2500MHz power 35000 control 0x1900 status 0x1900
PSS: 2000MHz power 26404 control 0x1400 status 0x1400
PSS: 1600MHz power 20160 control 0x1000 status 0x1000
PSS: 1200MHz power 14397 control 0xc00 status 0xc00
PSS: 800MHz power 9139 control 0x800 status 0x800
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: added table 3/32, length now 48
ACPI: * TCPA
TCPA log created at 7cf06000
ACPI: added table 4/32, length now 52
ACPI: * MADT
ACPI: added table 5/32, length now 56
current = 7cf1c000
ACPI: * DMAR
ACPI: added table 6/32, length now 60
current = 7cf1c0b0
CBFS: 'Master Header Locator' located CBFS at [18100:7fffc0)
CBFS: Locating 'vbt.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 142ac
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 143c0
CBFS: File @ offset 143c0 size 33c
CBFS: Unmatched 'config' at 143c0
CBFS: Checking offset 14740
CBFS: File @ offset 14740 size 240
CBFS: Unmatched 'revision' at 14740
CBFS: Checking offset 149c0
CBFS: File @ offset 149c0 size 660
CBFS: Unmatched 'payload_config' at 149c0
CBFS: Checking offset 15080
CBFS: File @ offset 15080 size ea
CBFS: Unmatched 'payload_revision' at 15080
CBFS: Checking offset 151c0
CBFS: File @ offset 151c0 size 2cd8
CBFS: Unmatched '' at 151c0
CBFS: Checking offset 17ec0
CBFS: File @ offset 17ec0 size 10000
CBFS: Unmatched 'mrc.cache' at 17ec0
CBFS: Checking offset 27f00
CBFS: File @ offset 27f00 size 5800
CBFS: Unmatched 'cpu_microcode_blob.bin' at 27f00
CBFS: Checking offset 2d780
CBFS: File @ offset 2d780 size 15d28
CBFS: Unmatched 'fallback/ramstage' at 2d780
CBFS: Checking offset 43500
CBFS: File @ offset 43500 size 6800
CBFS: Unmatched 'vgaroms/seavgabios.bin' at 43500
CBFS: Checking offset 49d80
CBFS: File @ offset 49d80 size 3546
CBFS: Unmatched 'fallback/dsdt.aml' at 49d80
CBFS: Checking offset 4d340
CBFS: File @ offset 4d340 size 18f38
CBFS: Unmatched 'img/coreinfo' at 4d340
CBFS: Checking offset 662c0
CBFS: File @ offset 662c0 size 228dc
CBFS: Unmatched 'img/nvramcui' at 662c0
CBFS: Checking offset 88c00
CBFS: File @ offset 88c00 size f66a
CBFS: Unmatched 'fallback/payload' at 88c00
CBFS: Checking offset 982c0
CBFS: File @ offset 982c0 size 2c02c
CBFS: Unmatched 'img/memtest' at 982c0
CBFS: Checking offset c4340
CBFS: File @ offset c4340 size 711b58
CBFS: Unmatched '' at c4340
CBFS: Checking offset 7d5ec0
CBFS: File @ offset 7d5ec0 size fc00
CBFS: Unmatched 'ecfw2.bin' at 7d5ec0
CBFS: Checking offset 7e5b00
CBFS: File @ offset 7e5b00 size b98
CBFS: Unmatched '' at 7e5b00
CBFS: Checking offset 7e66c0
CBFS: File @ offset 7e66c0 size 800
CBFS: Unmatched 'ecfw1.bin' at 7e66c0
CBFS: Checking offset 7e6f00
CBFS: File @ offset 7e6f00 size 7d8
CBFS: Unmatched '' at 7e6f00
CBFS: Checking offset 7e7700
CBFS: File @ offset 7e7700 size 7b0
CBFS: 'vbt.bin' not found.
CBFS: 'Master Header Locator' located CBFS at [18100:7fffc0)
CBFS: Locating 'pci8086,0126.rom'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 142ac
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 143c0
CBFS: File @ offset 143c0 size 33c
CBFS: Unmatched 'config' at 143c0
CBFS: Checking offset 14740
CBFS: File @ offset 14740 size 240
CBFS: Unmatched 'revision' at 14740
CBFS: Checking offset 149c0
CBFS: File @ offset 149c0 size 660
CBFS: Unmatched 'payload_config' at 149c0
CBFS: Checking offset 15080
CBFS: File @ offset 15080 size ea
CBFS: Unmatched 'payload_revision' at 15080
CBFS: Checking offset 151c0
CBFS: File @ offset 151c0 size 2cd8
CBFS: Unmatched '' at 151c0
CBFS: Checking offset 17ec0
CBFS: File @ offset 17ec0 size 10000
CBFS: Unmatched 'mrc.cache' at 17ec0
CBFS: Checking offset 27f00
CBFS: File @ offset 27f00 size 5800
CBFS: Unmatched 'cpu_microcode_blob.bin' at 27f00
CBFS: Checking offset 2d780
CBFS: File @ offset 2d780 size 15d28
CBFS: Unmatched 'fallback/ramstage' at 2d780
CBFS: Checking offset 43500
CBFS: File @ offset 43500 size 6800
CBFS: Unmatched 'vgaroms/seavgabios.bin' at 43500
CBFS: Checking offset 49d80
CBFS: File @ offset 49d80 size 3546
CBFS: Unmatched 'fallback/dsdt.aml' at 49d80
CBFS: Checking offset 4d340
CBFS: File @ offset 4d340 size 18f38
CBFS: Unmatched 'img/coreinfo' at 4d340
CBFS: Checking offset 662c0
CBFS: File @ offset 662c0 size 228dc
CBFS: Unmatched 'img/nvramcui' at 662c0
CBFS: Checking offset 88c00
CBFS: File @ offset 88c00 size f66a
CBFS: Unmatched 'fallback/payload' at 88c00
CBFS: Checking offset 982c0
CBFS: File @ offset 982c0 size 2c02c
CBFS: Unmatched 'img/memtest' at 982c0
CBFS: Checking offset c4340
CBFS: File @ offset c4340 size 711b58
CBFS: Unmatched '' at c4340
CBFS: Checking offset 7d5ec0
CBFS: File @ offset 7d5ec0 size fc00
CBFS: Unmatched 'ecfw2.bin' at 7d5ec0
CBFS: Checking offset 7e5b00
CBFS: File @ offset 7e5b00 size b98
CBFS: Unmatched '' at 7e5b00
CBFS: Checking offset 7e66c0
CBFS: File @ offset 7e66c0 size 800
CBFS: Unmatched 'ecfw1.bin' at 7e66c0
CBFS: Checking offset 7e6f00
CBFS: File @ offset 7e6f00 size 7d8
CBFS: Unmatched '' at 7e6f00
CBFS: Checking offset 7e7700
CBFS: File @ offset 7e7700 size 7b0
CBFS: 'pci8086,0126.rom' not found.
CBFS: 'Master Header Locator' located CBFS at [18100:7fffc0)
CBFS: Locating 'pci8086,0106.rom'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 142ac
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 143c0
CBFS: File @ offset 143c0 size 33c
CBFS: Unmatched 'config' at 143c0
CBFS: Checking offset 14740
CBFS: File @ offset 14740 size 240
CBFS: Unmatched 'revision' at 14740
CBFS: Checking offset 149c0
CBFS: File @ offset 149c0 size 660
CBFS: Unmatched 'payload_config' at 149c0
CBFS: Checking offset 15080
CBFS: File @ offset 15080 size ea
CBFS: Unmatched 'payload_revision' at 15080
CBFS: Checking offset 151c0
CBFS: File @ offset 151c0 size 2cd8
CBFS: Unmatched '' at 151c0
CBFS: Checking offset 17ec0
CBFS: File @ offset 17ec0 size 10000
CBFS: Unmatched 'mrc.cache' at 17ec0
CBFS: Checking offset 27f00
CBFS: File @ offset 27f00 size 5800
CBFS: Unmatched 'cpu_microcode_blob.bin' at 27f00
CBFS: Checking offset 2d780
CBFS: File @ offset 2d780 size 15d28
CBFS: Unmatched 'fallback/ramstage' at 2d780
CBFS: Checking offset 43500
CBFS: File @ offset 43500 size 6800
CBFS: Unmatched 'vgaroms/seavgabios.bin' at 43500
CBFS: Checking offset 49d80
CBFS: File @ offset 49d80 size 3546
CBFS: Unmatched 'fallback/dsdt.aml' at 49d80
CBFS: Checking offset 4d340
CBFS: File @ offset 4d340 size 18f38
CBFS: Unmatched 'img/coreinfo' at 4d340
CBFS: Checking offset 662c0
CBFS: File @ offset 662c0 size 228dc
CBFS: Unmatched 'img/nvramcui' at 662c0
CBFS: Checking offset 88c00
CBFS: File @ offset 88c00 size f66a
CBFS: Unmatched 'fallback/payload' at 88c00
CBFS: Checking offset 982c0
CBFS: File @ offset 982c0 size 2c02c
CBFS: Unmatched 'img/memtest' at 982c0
CBFS: Checking offset c4340
CBFS: File @ offset c4340 size 711b58
CBFS: Unmatched '' at c4340
CBFS: Checking offset 7d5ec0
CBFS: File @ offset 7d5ec0 size fc00
CBFS: Unmatched 'ecfw2.bin' at 7d5ec0
CBFS: Checking offset 7e5b00
CBFS: File @ offset 7e5b00 size b98
CBFS: Unmatched '' at 7e5b00
CBFS: Checking offset 7e66c0
CBFS: File @ offset 7e66c0 size 800
CBFS: Unmatched 'ecfw1.bin' at 7e66c0
CBFS: Checking offset 7e6f00
CBFS: File @ offset 7e6f00 size 7d8
CBFS: Unmatched '' at 7e6f00
CBFS: Checking offset 7e7700
CBFS: File @ offset 7e7700 size 7b0
CBFS: 'pci8086,0106.rom' not found.
PCI Option ROM loading disabled for PCI: 00:02.0
GMA: locate_vbt_vbios: aa55 8086 0 0 3
GMA: Found valid VBT in legacy area
ACPI: * HPET
ACPI: added table 7/32, length now 64
ACPI: done.
ACPI tables: 28912 bytes.
smbios_write_tables: 7cf05000
Create SMBIOS type 17
Root Device (HP EliteBook 8460p)
CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge)
APIC: 00 (unknown)
APIC: acac (Intel SandyBridge/IvyBridge CPU)
DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PNP: 00ff.1 (SMSC KBC1126 for HP laptops)
PNP: 004e.3 (SMSC LPC47N217 Super I/O)
PNP: 004e.4 (SMSC LPC47N217 Super I/O)
PNP: 004e.5 (SMSC LPC47N217 Super I/O)
PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:04.0 (unknown)
NONE (unknown)
PCI: 04:00.0 (unknown)
PCI: 04:00.1 (unknown)
PCI: 04:00.2 (unknown)
PCI: 04:00.3 (unknown)
PCI: 04:00.4 (unknown)
NONE (unknown)
PCI: 05:00.0 (unknown)
PCI: 06:00.0 (unknown)
APIC: 01 (unknown)
APIC: 02 (unknown)
APIC: 03 (unknown)
SMBIOS tables: 445 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum d2ea
Writing coreboot table at 0x7cf3b000
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5690
memalign 7cfd5690
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd56a8
memalign 7cfd56a8
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd56c0
memalign 7cfd56c0
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd56d8
memalign 7cfd56d8
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd56f0
memalign 7cfd56f0
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5708
memalign 7cfd5708
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5720
memalign 7cfd5720
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5738
memalign 7cfd5738
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5750
memalign 7cfd5750
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5768
memalign 7cfd5768
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5780
memalign 7cfd5780
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd5798
memalign 7cfd5798
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd57b0
memalign 7cfd57b0
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000a0000-00000000000fffff: RESERVED
3. 0000000000100000-000000001fffffff: RAM
4. 0000000020000000-00000000201fffff: RESERVED
5. 0000000020200000-000000003fffffff: RAM
6. 0000000040000000-00000000401fffff: RESERVED
7. 0000000040200000-000000007cf04fff: RAM
8. 000000007cf05000-000000007cffffff: CONFIGURATION TABLES
9. 000000007d000000-000000007f9fffff: RESERVED
10. 00000000f8000000-00000000fbffffff: RESERVED
11. 00000000fed90000-00000000fed91fff: RESERVED
12. 0000000100000000-00000001005fffff: RAM
Manufacturer: ef
SF: Detected W25Q64 with sector size 0x1000, total 0x800000
CBFS: 'Master Header Locator' located CBFS at [18100:7fffc0)
FMAP: Found "FLASH" version 1.1 at 18000.
FMAP: base = ff800000 size = 800000 #areas = 3
Wrote coreboot table at: 7cf3b000, 0x3a0 bytes, checksum 2bb3
coreboot table: 952 bytes.
IMD ROOT 0. 7cfff000 00001000
IMD SMALL 1. 7cffe000 00001000
CONSOLE 2. 7cfde000 00020000
TIME STAMP 3. 7cfdd000 00000400
ROMSTG STCK 4. 7cfd8000 00005000
RAMSTAGE 5. 7cf95000 00043000
57a9e100 6. 7cf53000 00041850
SMM BACKUP 7. 7cf43000 00010000
COREBOOT 8. 7cf3b000 00008000
ACPI 9. 7cf17000 00024000
ACPI GNVS 10. 7cf16000 00001000
TCPA LOG 11. 7cf06000 00010000
SMBIOS 12. 7cf05000 00000800
IMD small region:
IMD ROOT 0. 7cffec00 00000400
CAR GLOBALS 1. 7cffeac0 00000140
MEM INFO 2. 7cffe960 00000141
ROMSTAGE 3. 7cffe940 00000004
57a9e000 4. 7cffe920 00000018
COREBOOTFWD 5. 7cffe8e0 00000028
BS: BS_WRITE_TABLES times (us): entry 0 run 5497 exit 0
CBFS: 'Master Header Locator' located CBFS at [18100:7fffc0)
CBFS: Locating 'fallback/payload'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 142ac
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 143c0
CBFS: File @ offset 143c0 size 33c
CBFS: Unmatched 'config' at 143c0
CBFS: Checking offset 14740
CBFS: File @ offset 14740 size 240
CBFS: Unmatched 'revision' at 14740
CBFS: Checking offset 149c0
CBFS: File @ offset 149c0 size 660
CBFS: Unmatched 'payload_config' at 149c0
CBFS: Checking offset 15080
CBFS: File @ offset 15080 size ea
CBFS: Unmatched 'payload_revision' at 15080
CBFS: Checking offset 151c0
CBFS: File @ offset 151c0 size 2cd8
CBFS: Unmatched '' at 151c0
CBFS: Checking offset 17ec0
CBFS: File @ offset 17ec0 size 10000
CBFS: Unmatched 'mrc.cache' at 17ec0
CBFS: Checking offset 27f00
CBFS: File @ offset 27f00 size 5800
CBFS: Unmatched 'cpu_microcode_blob.bin' at 27f00
CBFS: Checking offset 2d780
CBFS: File @ offset 2d780 size 15d28
CBFS: Unmatched 'fallback/ramstage' at 2d780
CBFS: Checking offset 43500
CBFS: File @ offset 43500 size 6800
CBFS: Unmatched 'vgaroms/seavgabios.bin' at 43500
CBFS: Checking offset 49d80
CBFS: File @ offset 49d80 size 3546
CBFS: Unmatched 'fallback/dsdt.aml' at 49d80
CBFS: Checking offset 4d340
CBFS: File @ offset 4d340 size 18f38
CBFS: Unmatched 'img/coreinfo' at 4d340
CBFS: Checking offset 662c0
CBFS: File @ offset 662c0 size 228dc
CBFS: Unmatched 'img/nvramcui' at 662c0
CBFS: Checking offset 88c00
CBFS: File @ offset 88c00 size f66a
CBFS: Found @ offset 88c00 size f66a
Loading segment from ROM address 0xff8a0d38
code (compression=1)
memalign Enter, boundary 8, size 28, free_mem_ptr 7cfd57c8
memalign 7cfd57c8
New segment dstaddr 0xe31c0 memsize 0x1ce40 srcaddr 0xff8a0d70 filesize 0xf632
Loading segment from ROM address 0xff8a0d54
Entry Point 0x000ff06e
Payload being loaded at below 1MiB without region being marked as RAM usable.
memalign Enter, boundary 8, size 24, free_mem_ptr 7cfd57e4
memalign 7cfd57e8
Loading Segment: addr: 0x00000000000e31c0 memsz: 0x000000000001ce40 filesz: 0x000000000000f632
lb: [0x000000007cf96000, 0x000000007cfd7850)
Post relocation: addr: 0x00000000000e31c0 memsz: 0x000000000001ce40 filesz: 0x000000000000f632
using LZMA
[ 0x000e31c0, 00100000, 0x00100000) <- ff8a0d70
dest 000e31c0, end 00100000, bouncebuffer ffffffff
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 31545 exit 0
PCH watchdog disabled
Jumping to boot code at 000ff06e(7cf3b000)
CPU0: stack: 7cfcd000 - 7cfce000, lowest used address 7cfcda40, stack used: 1472 bytes
CI: 00:1c.1 child on link 0 NONE
PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
NONE
NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10
NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14
NONE resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18
PCI: 00:1c.2 child on link 0 PCI: 04:00.0
PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 04:00.0
PCI: 04:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 10
PCI: 04:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
PCI: 04:00.1
PCI: 04:00.1 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 04:00.1 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
PCI: 04:00.2
PCI: 04:00.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 04:00.3
PCI: 04:00.3 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 04:00.4
PCI: 04:00.4 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
NONE
NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10
NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14
NONE resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18
PCI: 00:1c.3 child on link 0 PCI: 05:00.0
PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 05:00.0
PCI: 05:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
PCI: 05:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
PCI: 00:1c.7
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.4 child on link 0 PCI: 06:00.0
PCI: 00:1c.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.4 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24