blob: e3d9bee9a8e9033b7b59a92f06bfbfff3b2fe13d [file] [log] [blame]
*** Pre-CBMEM romstage console overflowed, log truncated! ***
4.
Found compatible clock, CAS pair.
Selected DRAM frequency: 666 MHz
Selected CAS latency : 9T
PLL busy... done in 70 us
MCU frequency is set at : 666 MHz
Done dimm mapping
Update PCI-E configuration space:
PCI(0, 0, 0)[a0] = 0
PCI(0, 0, 0)[a4] = 1
PCI(0, 0, 0)[bc] = c2a00000
PCI(0, 0, 0)[a8] = 3c600000
PCI(0, 0, 0)[ac] = 1
PCI(0, 0, 0)[b8] = c0000000
PCI(0, 0, 0)[b0] = c0a00000
PCI(0, 0, 0)[b4] = c0800000
PCI(0, 0, 0)[7c] = 7f
PCI(0, 0, 0)[70] = ff000000
PCI(0, 0, 0)[74] = 0
PCI(0, 0, 0)[78] = ff000c00
Done memory map
Done io registers
t123: 1912, 6000, 7620
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : NO
ME: Manufacturing Mode : NO
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Normal
ME: Current Operation State : Bring up
ME: Current Operation Mode : Security Override via Jumper
ME: Error Code : No Error
ME: Progress Phase : BUP Phase
ME: Power Management Event : Pseudo-global reset
ME: Progress Phase State : Waiting for DID BIOS message
ME: Wrong mode : 4
ME: FWS2: 0x161f0136
ME: Bist in progress: 0x0
ME: ICC Status : 0x3
ME: Invoke MEBx : 0x0
ME: CPU replaced : 0x1
ME: MBP ready : 0x1
ME: MFS failure : 0x0
ME: Warm reset req : 0x0
ME: CPU repl valid : 0x1
ME: (Reserved) : 0x0
ME: FW update req : 0x0
ME: (Reserved) : 0x0
ME: Current state : 0x1f
ME: Current PM event: 0x6
ME: Progress code : 0x1
Full training required
PASSED! Tell ME that DRAM is ready
ME: FWS2: 0x16520136
ME: Bist in progress: 0x0
ME: ICC Status : 0x3
ME: Invoke MEBx : 0x0
ME: CPU replaced : 0x1
ME: MBP ready : 0x1
ME: MFS failure : 0x0
ME: Warm reset req : 0x0
ME: CPU repl valid : 0x1
ME: (Reserved) : 0x0
ME: FW update req : 0x0
ME: (Reserved) : 0x0
ME: Current state : 0x52
ME: Current PM event: 0x6
ME: Progress code : 0x1
ME: Requested BIOS Action: Continue to boot
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : NO
ME: Manufacturing Mode : NO
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Normal
ME: Current Operation State : Bring up
ME: Current Operation Mode : Security Override via Jumper
ME: Error Code : No Error
ME: Progress Phase : BUP Phase
ME: Power Management Event : Pseudo-global reset
ME: Progress Phase State : 0x52
memcfg DDR3 ref clock 133 MHz
memcfg DDR3 clock 1330 MHz
memcfg channel assignment: A: 1, B 0, C 2
memcfg channel[0] config (00000000):
ECC inactive
enhanced interleave mode off
rank interleave off
DIMMA 0 MB width x8 single rank, selected
DIMMB 0 MB width x8 single rank
memcfg channel[1] config (00600010):
ECC inactive
enhanced interleave mode on
rank interleave on
DIMMA 4096 MB width x8 single rank, selected
DIMMB 0 MB width x8 single rank
CBMEM:
IMD: root @ 0xbffff000 254 entries.
IMD: root @ 0xbfffec00 62 entries.
External stage cache:
IMD: root @ 0xc03ff000 254 entries.
IMD: root @ 0xc03fec00 62 entries.
CBMEM entry for DIMM info: 0xbfffe960
SMM Memory Map
SMRAM : 0xc0000000 0x800000
Subregion 0: 0xc0000000 0x300000
Subregion 1: 0xc0300000 0x100000
Subregion 2: 0xc0400000 0x400000
MTRR Range: Start=bf800000 End=c0000000 (Size 800000)
MTRR Range: Start=c0000000 End=c0800000 (Size 800000)
MTRR Range: Start=ff800000 End=0 (Size 800000)
FMAP: area COREBOOT found @ 410200 (4128256 bytes)
CBFS: Locating 'fallback/postcar'
CBFS: Found @ offset 44840 size 4a2c
Decompressing stage fallback/postcar @ 0xbffd2fc0 (35408 bytes)
Loading module at 0xbffd3000 with entry 0xbffd3000. filesize: 0x4710 memsize: 0x8a10
Processing 176 relocs. Offset value of 0xbdfd3000
BS: romstage times (exec / console): total (unknown) / 2 ms
coreboot-4.12-2069-gbc9757ff17 Mon Aug 10 10:45:46 UTC 2020 postcar starting (log level: 7)...
FMAP: area COREBOOT found @ 410200 (4128256 bytes)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 1a2c0 size 16786
Decompressing stage fallback/ramstage @ 0xbff8dfc0 (276816 bytes)
Loading module at 0xbff8e000 with entry 0xbff8e000. filesize: 0x2e538 memsize: 0x43910
Processing 3150 relocs. Offset value of 0xbf18e000
BS: postcar times (exec / console): total (unknown) / 0 ms
coreboot-4.12-2069-gbc9757ff17 Mon Aug 10 10:45:46 UTC 2020 ramstage starting (log level: 7)...
Normal boot
Enumerating buses...
Root Device scanning...
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0154] enabled
PCI: 00:01.0 [8086/0151] enabled
PCI: 00:02.0 [8086/0156] enabled
PCI: 00:04.0 [8086/0153] enabled
PCI: 00:14.0 [8086/1e31] enabled
PCI: 00:16.0 [8086/1e3a] enabled
PCI: 00:16.1: Disabling device
PCI: 00:16.2: Disabling device
PCI: 00:16.3: Disabling device
PCI: 00:19.0: Disabling device
PCI: 00:1a.0 [8086/1e2d] enabled
PCI: 00:1b.0 [8086/1e20] enabled
PCH: PCIe Root Port coalescing is enabled
PCI: 00:1c.0 [8086/1e10] enabled
PCI: 00:1c.1 [8086/1e12] enabled
PCI: 00:1c.2 [8086/1e14] enabled
PCI: 00:1c.3: Disabling device
PCI: 00:1c.3 [8086/1e16] disabled
PCI: 00:1c.4: Disabling device
PCI: 00:1c.4: check set enabled
PCH: Remap PCIe function 5 to 3
PCI: 00:1c.5 [8086/1e1a] enabled
PCI: 00:1c.6: Disabling device
PCI: 00:1c.7: Disabling device
PCH: PCIe map 1c.3 -> 1c.5
PCH: PCIe map 1c.5 -> 1c.3
PCI: 00:1d.0 [8086/1e26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1e.0 [8086/2448] disabled
PCI: 00:1f.0 [8086/1e57] enabled
PCI: 00:1f.2 [8086/1e01] enabled
PCI: 00:1f.3 [8086/1e22] enabled
PCI: 00:1f.5: Disabling device
PCI: 00:1f.5 [8086/1e09] disabled No operations
PCI: 00:1f.6: Disabling device
PCI: 00:1f.6 [8086/1e24] disabled No operations
PCI: Leftover static devices:
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:19.0
PCI: 00:1c.4
PCI: 00:1c.6
PCI: 00:1c.7
PCI: Check your devicetree.cb.
PCI: 00:01.0 scanning...
PCI: pci_scan_bus for bus 01
scan_bus: bus PCI: 00:01.0 finished in 0 msecs
PCI: 00:1c.0 scanning...
PCI: pci_scan_bus for bus 02
scan_bus: bus PCI: 00:1c.0 finished in 0 msecs
PCI: 00:1c.1 scanning...
PCI: pci_scan_bus for bus 03
PCI: 03:00.0 [168c/0034] enabled
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
Failed to enable LTR for dev = PCI: 03:00.0
scan_bus: bus PCI: 00:1c.1 finished in 0 msecs
PCI: 00:1c.2 scanning...
PCI: pci_scan_bus for bus 04
PCI: 04:00.0 [10ec/5209] enabled
Enabling Common Clock Configuration
ASPM: Enabled None
PCIe: Max_Payload_Size adjusted to 128
Failed to enable LTR for dev = PCI: 04:00.0
scan_bus: bus PCI: 00:1c.2 finished in 0 msecs
PCI: 00:1c.3 scanning...
PCI: pci_scan_bus for bus 05
PCI: 05:00.0 [10ec/8168] enabled
Enabling Common Clock Configuration
ASPM: Enabled L1
PCIe: Max_Payload_Size adjusted to 128
Failed to enable LTR for dev = PCI: 05:00.0
scan_bus: bus PCI: 00:1c.3 finished in 0 msecs
PCI: 00:1f.0 scanning...
PNP: 0c31.0 enabled
PNP: 00ff.1 enabled
PNP: 00ff.0 enabled
scan_bus: bus PCI: 00:1f.0 finished in 0 msecs
PCI: 00:1f.3 scanning...
scan_bus: bus PCI: 00:1f.3 finished in 0 msecs
scan_bus: bus DOMAIN: 0000 finished in 1 msecs
scan_bus: bus Root Device finished in 1 msecs
done
BS: BS_DEV_ENUMERATE run times (exec / console): 1 / 0 ms
FMAP: area RW_MRC_CACHE found @ 400000 (65536 bytes)
MRC: No data in cbmem for 'RW_MRC_CACHE'.
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
TOUUD 0x13c600000 TOLUD 0xc2a00000 TOM 0x100000000
MEBASE 0xff000000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0xc0000000 size 8M
Available memory below 4GB: 3072M
Available memory above 4GB: 966M
PNP: 00ff.1 missing read_resources
Done reading resources.
==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 03:00.0 10 * [0x0 - 0x7ffff] mem
PCI: 03:00.0 30 * [0x80000 - 0x8ffff] mem
PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 04:00.0 10 * [0x0 - 0xfff] mem
PCI: 00:1c.2 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.3 io: size: 0 align: 12 gran: 12 limit: ffff
PCI: 05:00.0 10 * [0x0 - 0xff] io
PCI: 00:1c.3 io: size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.3 mem: size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.3 mem: size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.3 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 05:00.0 20 * [0x0 - 0x3fff] prefmem
PCI: 05:00.0 18 * [0x4000 - 0x4fff] prefmem
PCI: 00:1c.3 prefmem: size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
=== Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
update_constraints: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
update_constraints: PCI: 00:1f.0 10000200 base 00001610 limit 0000162b io (fixed)
update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed)
DOMAIN: 0000: Resource ranges:
* Base: 1000, Size: 610, Tag: 100
* Base: 162c, Size: e9d4, Tag: 100
PCI: 00:1c.3 1c * [0x2000 - 0x2fff] limit: 2fff io
PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
PCI: 00:1f.2 20 * [0x1040 - 0x105f] limit: 105f io
PCI: 00:1f.2 10 * [0x1060 - 0x1067] limit: 1067 io
PCI: 00:1f.2 18 * [0x1068 - 0x106f] limit: 106f io
PCI: 00:1f.2 14 * [0x1070 - 0x1073] limit: 1073 io
PCI: 00:1f.2 1c * [0x1074 - 0x1077] limit: 1077 io
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff
update_constraints: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
update_constraints: PCI: 00:00.0 03 base 00000000 limit 0009ffff mem (fixed)
update_constraints: PCI: 00:00.0 04 base 00100000 limit bfffffff mem (fixed)
update_constraints: PCI: 00:00.0 05 base 100000000 limit 13c5fffff mem (fixed)
update_constraints: PCI: 00:00.0 06 base c0000000 limit c29fffff mem (fixed)
update_constraints: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
update_constraints: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
update_constraints: PCI: 00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed)
update_constraints: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
update_constraints: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
DOMAIN: 0000: Resource ranges:
* Base: c2a00000, Size: 2d600000, Tag: 200
* Base: f4000000, Size: ac00000, Tag: 200
* Base: fec01000, Size: 13f000, Tag: 200
* Base: fed45000, Size: 2bb000, Tag: 200
* Base: 13c600000, Size: ec3a00000, Tag: 100200
PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] limit: dfffffff prefmem
PCI: 00:02.0 10 * [0xc2c00000 - 0xc2ffffff] limit: c2ffffff mem
PCI: 00:1c.1 20 * [0xc2a00000 - 0xc2afffff] limit: c2afffff mem
PCI: 00:1c.2 20 * [0xc2b00000 - 0xc2bfffff] limit: c2bfffff mem
PCI: 00:1c.3 24 * [0xc3000000 - 0xc30fffff] limit: c30fffff prefmem
PCI: 00:14.0 10 * [0xc3100000 - 0xc310ffff] limit: c310ffff mem
PCI: 00:04.0 10 * [0xc3110000 - 0xc3117fff] limit: c3117fff mem
PCI: 00:1b.0 10 * [0xc3118000 - 0xc311bfff] limit: c311bfff mem
PCI: 00:1f.2 24 * [0xc311c000 - 0xc311c7ff] limit: c311c7ff mem
PCI: 00:1a.0 10 * [0xc311d000 - 0xc311d3ff] limit: c311d3ff mem
PCI: 00:1d.0 10 * [0xc311e000 - 0xc311e3ff] limit: c311e3ff mem
PCI: 00:1f.3 10 * [0xc311f000 - 0xc311f0ff] limit: c311f0ff mem
PCI: 00:16.0 10 * [0xc3120000 - 0xc312000f] limit: c312000f mem
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff done
PCI: 00:1c.1 mem: base: c2a00000 size: 100000 align: 20 gran: 20 limit: c2afffff
PCI: 00:1c.1: Resource ranges:
* Base: c2a00000, Size: 100000, Tag: 200
PCI: 03:00.0 10 * [0xc2a00000 - 0xc2a7ffff] limit: c2a7ffff mem
PCI: 03:00.0 30 * [0xc2a80000 - 0xc2a8ffff] limit: c2a8ffff mem
PCI: 00:1c.1 mem: base: c2a00000 size: 100000 align: 20 gran: 20 limit: c2afffff done
PCI: 00:1c.2 mem: base: c2b00000 size: 100000 align: 20 gran: 20 limit: c2bfffff
PCI: 00:1c.2: Resource ranges:
* Base: c2b00000, Size: 100000, Tag: 200
PCI: 04:00.0 10 * [0xc2b00000 - 0xc2b00fff] limit: c2b00fff mem
PCI: 00:1c.2 mem: base: c2b00000 size: 100000 align: 20 gran: 20 limit: c2bfffff done
PCI: 00:1c.3 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff
PCI: 00:1c.3: Resource ranges:
* Base: 2000, Size: 1000, Tag: 100
PCI: 05:00.0 10 * [0x2000 - 0x20ff] limit: 20ff io
PCI: 00:1c.3 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done
PCI: 00:1c.3 prefmem: base: c3000000 size: 100000 align: 20 gran: 20 limit: c30fffff
PCI: 00:1c.3: Resource ranges:
* Base: c3000000, Size: 100000, Tag: 1200
PCI: 05:00.0 20 * [0xc3000000 - 0xc3003fff] limit: c3003fff prefmem
PCI: 05:00.0 18 * [0xc3004000 - 0xc3004fff] limit: c3004fff prefmem
PCI: 00:1c.3 prefmem: base: c3000000 size: 100000 align: 20 gran: 20 limit: c30fffff done
=== Resource allocator: DOMAIN: 0000 - resource allocation complete ===
PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:02.0 10 <- [0x00c2c00000 - 0x00c2ffffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
PCI: 00:04.0 10 <- [0x00c3110000 - 0x00c3117fff] size 0x00008000 gran 0x0f mem64
PCI: 00:14.0 10 <- [0x00c3100000 - 0x00c310ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:16.0 10 <- [0x00c3120000 - 0x00c312000f] size 0x00000010 gran 0x04 mem64
PCI: 00:1a.0 10 <- [0x00c311d000 - 0x00c311d3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x00c3118000 - 0x00c311bfff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.0 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:1c.1 20 <- [0x00c2a00000 - 0x00c2afffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 03:00.0 10 <- [0x00c2a00000 - 0x00c2a7ffff] size 0x00080000 gran 0x13 mem64
PCI: 03:00.0 30 <- [0x00c2a80000 - 0x00c2a8ffff] size 0x00010000 gran 0x10 romem
PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
PCI: 00:1c.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:1c.2 20 <- [0x00c2b00000 - 0x00c2bfffff] size 0x00100000 gran 0x14 bus 04 mem
PCI: 04:00.0 10 <- [0x00c2b00000 - 0x00c2b00fff] size 0x00001000 gran 0x0c mem
PCI: 00:1c.3 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 05 io
PCI: 00:1c.3 24 <- [0x00c3000000 - 0x00c30fffff] size 0x00100000 gran 0x14 bus 05 prefmem
PCI: 00:1c.3 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 05 mem
PCI: 05:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
PCI: 05:00.0 18 <- [0x00c3004000 - 0x00c3004fff] size 0x00001000 gran 0x0c prefmem64
PCI: 05:00.0 20 <- [0x00c3000000 - 0x00c3003fff] size 0x00004000 gran 0x0e prefmem64
PCI: 00:1d.0 10 <- [0x00c311e000 - 0x00c311e3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1f.2 10 <- [0x0000001060 - 0x0000001067] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000001070 - 0x0000001073] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000001068 - 0x000000106f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000001074 - 0x0000001077] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00c311c000 - 0x00c311c7ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x00c311f000 - 0x00c311f0ff] size 0x00000100 gran 0x08 mem64
Done setting resources.
Done allocating resources.
BS: BS_DEV_RESOURCES run times (exec / console): 2 / 0 ms
Enabling resources...
PCI: 00:00.0 subsystem <- 1ae0/c000
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 0013
PCI: 00:01.0 cmd <- 00
PCI: 00:02.0 subsystem <- 1ae0/c000
PCI: 00:02.0 cmd <- 03
PCI: 00:04.0 cmd <- 02
PCI: 00:14.0 subsystem <- 1ae0/c000
PCI: 00:14.0 cmd <- 102
PCI: 00:16.0 subsystem <- 1ae0/c000
PCI: 00:16.0 cmd <- 02
PCI: 00:1a.0 subsystem <- 1ae0/c000
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 1ae0/c000
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0013
PCI: 00:1c.0 subsystem <- 1ae0/c000
PCI: 00:1c.0 cmd <- 100
PCI: 00:1c.1 bridge ctrl <- 0013
PCI: 00:1c.1 subsystem <- 1ae0/c000
PCI: 00:1c.1 cmd <- 106
PCI: 00:1c.2 bridge ctrl <- 0013
PCI: 00:1c.2 subsystem <- 1ae0/c000
PCI: 00:1c.2 cmd <- 106
PCI: 00:1c.3 bridge ctrl <- 0013
PCI: 00:1c.3 subsystem <- 1ae0/c000
PCI: 00:1c.3 cmd <- 107
PCI: 00:1d.0 subsystem <- 1ae0/c000
PCI: 00:1d.0 cmd <- 102
PCI: 00:1f.0 subsystem <- 1ae0/c000
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 1ae0/c000
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 1ae0/c000
PCI: 00:1f.3 cmd <- 103
PCI: 03:00.0 cmd <- 02
PCI: 04:00.0 cmd <- 02
PCI: 05:00.0 cmd <- 03
done.
Found TPM ST33ZP24 by ST Microelectronics
TPM: Startup
TPM: command 0x99 returned 0x0
TPM: Asserting physical presence
TPM: command 0x4000000a returned 0x0
TPM: command 0x65 returned 0x801
TPM: Continue self test
TPM: command 0x53 returned 0x0
TPM: command 0x65 returned 0x0
TPM: flags disable=0, deactivated=0, nvlocked=1
TPM: setup succeeded
BS: BS_DEV_INIT entry times (exec / console): 140 / 0 ms
Initializing devices...
Root Device init
stout_ec_init: EC FW version 3080
Root Device init finished in 16 msecs
CPU_CLUSTER: 0 init
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6
0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 0
0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
0x0000000100000000 - 0x000000013c600000 size 0x3c600000 type 6
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 3/4.
MTRR: WB selected as default type.
MTRR: 0 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0
MTRR: 1 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
MTRR: 2 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
CPU has 2 cores, 2 threads enabled.
Setting up SMI for CPU
Will perform SMM setup.
FMAP: area COREBOOT found @ 410200 (4128256 bytes)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13a40 size 6800
microcode: sig=0x306a9 pf=0x10 revision=0x21
CPU: Intel(R) Celeron(R) CPU 1007U @ 1.50GHz.
Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
Processing 16 relocs. Offset value of 0x00030000
Attempting to start 1 APs
Waiting for 10ms after sending INIT.
Waiting for 1st SIPI to complete...done.
Waiting for 2nd SIPI to complete...done.
AP: slot 1 apic_id 2.
Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
Processing 13 relocs. Offset value of 0x00038000
Unable to locate Global NVS
SMM Module: stub loaded at 0x00038000. Will call 0xbffa4ca3(0x00000000)
Installing SMM handler to 0xc0000000
Loading module at 0xc0010000 with entry 0xc0010628. filesize: 0x1d88 memsize: 0x5de8
Processing 76 relocs. Offset value of 0xc0010000
Loading module at 0xc0008000 with entry 0xc0008000. filesize: 0x1b8 memsize: 0x1b8
Processing 13 relocs. Offset value of 0xc0008000
SMM Module: placing jmp sequence at 0xc0007c00 rel16 0x03fd
Unable to locate Global NVS
SMM Module: stub loaded at 0xc0008000. Will call 0xc0010628(0x00000000)
Initializing southbridge SMI...
New SMBASE 0xc0000000
In relocation handler: cpu 0
New SMBASE=0xc0000000 IEDBASE=0xc0400000
Writing SMRR. base = 0xc0000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
New SMBASE 0xbffffc00
In relocation handler: cpu 1
New SMBASE=0xbffffc00 IEDBASE=0xc0400000
Writing SMRR. base = 0xc0000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
Initializing CPU #0
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Enabling cache
CPU: Intel(R) Celeron(R) CPU 1007U @ 1.50GHz.
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: AES NOT supported
CPU: TXT NOT supported
CPU: VT supported
Setting up local APIC...
apic_id: 0x00 done.
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 1500
Turbo is unavailable
CPU #0 initialized
Initializing CPU #1
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Enabling cache
CPU: Intel(R) Celeron(R) CPU 1007U @ 1.50GHz.
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: AES NOT supported
CPU: TXT NOT supported
CPU: VT supported
Setting up local APIC...
apic_id: 0x02 done.
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 1500
CPU #1 initialized
bsp_do_flight_plan done after 5 msecs.
Initializing southbridge SMI...
SMI_STS:
GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO10 GPIO9 GPIO7 GPIO4 GPIO3 GPIO2
ALT_GP_SMI_STS: GPI15 GPI14 GPI11 GPI10 GPI9 GPI8 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0
TCO_STS:
Locking SMM.
CPU_CLUSTER: 0 init finished in 18 msecs
PCI: 00:00.0 init
Disabling PEG12.
Disabling PEG11.
Disabling PEG60.
Disabling Device 7.
Set BIOS_RESET_CPL
CPU TDP: 17 Watts
PCI: 00:00.0 init finished in 1 msecs
PCI: 00:01.0 init
PCI: 00:01.0 init finished in 0 msecs
PCI: 00:02.0 init
FMAP: area COREBOOT found @ 410200 (4128256 bytes)
CBFS: Locating 'vbt.bin'
CBFS: 'vbt.bin' not found.
FMAP: area COREBOOT found @ 410200 (4128256 bytes)
CBFS: Locating 'pci8086,0156.rom'
CBFS: 'pci8086,0156.rom' not found.
FMAP: area COREBOOT found @ 410200 (4128256 bytes)
CBFS: Locating 'pci8086,0106.rom'
CBFS: Found @ offset 347c0 size 10000
In CBFS, ROM address for PCI: 00:02.0 = 0xffc44a08
GMA: Found VBIOS in CBFS
GMA: locate_vbt_vbios: aa55 8086 0 0 3
GMA: Found valid VBT in VBIOS
GT Power Management Init
IVB GT1 Power Meter Weights
GT Power Management Init (post VBIOS)
PCI: 00:02.0 init finished in 1 msecs
PCI: 00:04.0 init
PCI: 00:04.0 init finished in 0 msecs
PCI: 00:14.0 init
XHCI: Setting up controller.. done.
PCI: 00:14.0 init finished in 0 msecs
PCI: 00:16.0 init
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : NO
ME: Manufacturing Mode : NO
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Normal
ME: Current Operation State : Bring up
ME: Current Operation Mode : Security Override via Jumper
ME: Error Code : No Error
ME: Progress Phase : BUP Phase
ME: Power Management Event : Pseudo-global reset
ME: Progress Phase State : 0x52
ME: BIOS path: Disable
PCI: 00:16.0 init finished in 0 msecs
PCI: 00:1a.0 init
EHCI: Setting up controller.. done.
PCI: 00:1a.0 init finished in 0 msecs
PCI: 00:1b.0 init
Azalia: base = c3118000
Azalia: codec_mask = 09
Azalia: Initializing codec #3
Azalia: codec viddid: 80862806
Azalia: verb_size: 16
Azalia: verb loaded.
Azalia: Initializing codec #0
Azalia: codec viddid: 10ec0269
Azalia: verb_size: 48
Azalia: verb loaded.
PCI: 00:1b.0 init finished in 5 msecs
PCI: 00:1c.0 init
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 0 msecs
PCI: 00:1c.1 init
Initializing PCH PCIe bridge.
PCI: 00:1c.1 init finished in 0 msecs
PCI: 00:1c.2 init
Initializing PCH PCIe bridge.
PCI: 00:1c.2 init finished in 0 msecs
PCI: 00:1c.3 init
Initializing PCH PCIe bridge.
PCI: 00:1c.3 init finished in 0 msecs
PCI: 00:1d.0 init
EHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 0 msecs
PCI: 00:1f.0 init
pch: lpc_init
PCH: detected HM77, device id: 0x1e57, rev id 0x4
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
Set power on after power failure.
NMI sources enabled.
PantherPoint PM init
RTC: failed = 0x0
RTC Init
Disabling ACPI via APMC.
APMC done.
pch_spi_init
PCI: 00:1f.0 init finished in 0 msecs
PCI: 00:1f.2 init
SATA: Initializing...
SATA: Controller in AHCI mode.
ABAR: 0xc311c000
PCI: 00:1f.2 init finished in 0 msecs
PCI: 00:1f.3 init
PCI: 00:1f.3 init finished in 0 msecs
PCI: 03:00.0 init
PCI: 03:00.0 init finished in 0 msecs
PCI: 04:00.0 init
PCI: 04:00.0 init finished in 0 msecs
PCI: 05:00.0 init
PCI: 05:00.0 init finished in 0 msecs
PNP: 00ff.0 init
Quanta IT8518: Initializing keyboard.
Keyboard init...
PS/2 keyboard initialized on primary channel
PNP: 00ff.0 init finished in 138 msecs
Devices initialized
BS: BS_DEV_INIT run times (exec / console): 182 / 0 ms
Finalize devices...
PCI: 00:1f.0 final
Manufacturer: ef
SF: Detected ef 4017 with sector size 0x1000, total 0x800000
Finalizing SMM.
APMC done.
Devices finalized
BS: BS_POST_DEVICE run times (exec / console): 5 / 0 ms
FMAP: area COREBOOT found @ 410200 (4128256 bytes)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 31080 size 30a5
FMAP: area COREBOOT found @ 410200 (4128256 bytes)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at bff4f000.
ACPI: * FACS
ACPI: * DSDT
ACPI: * FADT
ACPI: added table 1/32, length now 40
ACPI: * SSDT
Found 1 CPU(s) with 2 core(s) each.
PSS: 1500MHz power 17000 control 0xf00 status 0xf00
PSS: 1200MHz power 13137 control 0xc00 status 0xc00
PSS: 1000MHz power 10676 control 0xa00 status 0xa00
PSS: 800MHz power 8345 control 0x800 status 0x800
PSS: 1500MHz power 17000 control 0xf00 status 0xf00
PSS: 1200MHz power 13137 control 0xc00 status 0xc00
PSS: 1000MHz power 10676 control 0xa00 status 0xa00
PSS: 800MHz power 8345 control 0x800 status 0x800
Generating ACPI PIRQ entries
\_SB.PCI0.LPCB.TPM.TPM: LPC TPM PNP: 0c31.0
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: added table 3/32, length now 48
ACPI: * TCPA
TCPA log created at 0xbff3e000
ACPI: added table 4/32, length now 52
ACPI: * MADT
ACPI: added table 5/32, length now 56
current = bff53410
ACPI: * HPET
ACPI: added table 6/32, length now 60
ACPI: done.
ACPI tables: 17488 bytes.
smbios_write_tables: bff3d000
SMBIOS firmware version is set to coreboot_version: '4.12-2069-gbc9757ff17'
Create SMBIOS type 16
Create SMBIOS type 17
SMBIOS tables: 730 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum fe7
Writing coreboot table at 0xbff73000
FMAP: area COREBOOT found @ 410200 (4128256 bytes)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 342c0 size 4a4
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000a0000-00000000000fffff: RESERVED
3. 0000000000100000-00000000bff3cfff: RAM
4. 00000000bff3d000-00000000bff8dfff: CONFIGURATION TABLES
5. 00000000bff8e000-00000000bffd1fff: RAMSTAGE
6. 00000000bffd2000-00000000bfffffff: CONFIGURATION TABLES
7. 00000000c0000000-00000000c29fffff: RESERVED
8. 00000000f0000000-00000000f3ffffff: RESERVED
9. 00000000fed40000-00000000fed44fff: RESERVED
10. 0000000100000000-000000013c5fffff: RAM
FMAP: area COREBOOT found @ 410200 (4128256 bytes)
Wrote coreboot table at: 0xbff73000, 0x804 bytes, checksum aaad
coreboot table: 2076 bytes.
IMD ROOT 0. 0xbffff000 0x00001000
IMD SMALL 1. 0xbfffe000 0x00001000
CONSOLE 2. 0xbffde000 0x00020000
TIME STAMP 3. 0xbffdd000 0x00000910
ROMSTG STCK 4. 0xbffdc000 0x00001000
AFTER CAR 5. 0xbffd2000 0x0000a000
RAMSTAGE 6. 0xbff8d000 0x00045000
SMM BACKUP 7. 0xbff7d000 0x00010000
4f444749 8. 0xbff7b000 0x00002000
COREBOOT 9. 0xbff73000 0x00008000
ACPI 10. 0xbff4f000 0x00024000
ACPI GNVS 11. 0xbff4e000 0x00001000
TCPA TCGLOG12. 0xbff3e000 0x00010000
SMBIOS 13. 0xbff3d000 0x00000800
IMD small region:
IMD ROOT 0. 0xbfffec00 0x00000400
FMAP 1. 0xbfffeb20 0x000000e0
MEM INFO 2. 0xbfffe960 0x000001c0
ROMSTAGE 3. 0xbfffe940 0x00000004
BS: BS_WRITE_TABLES run times (exec / console): 3 / 0 ms
FMAP: area COREBOOT found @ 410200 (4128256 bytes)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 59fc0 size 10c1a
Checking segment from ROM address 0xffc6a1f8
Payload being loaded at below 1MiB without region being marked as RAM usable.
Checking segment from ROM address 0xffc6a214
Loading segment from ROM address 0xffc6a1f8
code (compression=1)
New segment dstaddr 0x000e0280 memsize 0x1fd80 srcaddr 0xffc6a230 filesize 0x10be2
Loading Segment: addr: 0x000e0280 memsz: 0x000000000001fd80 filesz: 0x0000000000010be2
using LZMA
Loading segment from ROM address 0xffc6a214
Entry Point 0x000fd25e
BS: BS_PAYLOAD_LOAD run times (exec / console): 41 / 0 ms
ICH-NM10-PCH: watchdog disabled
Jumping to boot code at 0x000fd25e(0xbff73000)
SeaBIOS (version rel-1.13.0-0-gf21b5a4)
BUILD: gcc: (coreboot toolchain vf2741aa632 2020-07-06) 8.3.0 binutils: (GNU Binutils) 2.33.1
Found coreboot cbmem console @ bffde000
Found mainboard Google Stout
Relocating init from 0x000e1960 to 0xbfeefd60 (size 53760)
Found CBFS header at 0xffc10238
multiboot: eax=bffbbbe0, ebx=bffbbba4
Found 19 PCI devices (max PCI bus is 05)
Copying SMBIOS entry point from 0xbff3d000 to 0x000f6780
Copying ACPI RSDP from 0xbff4f000 to 0x000f6750
Using pmtimer, ioport 0x508
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.13.0-0-gf21b5a4)
XHCI init on dev 00:14.0: regs @ 0xc3100000, 8 ports, 32 slots, 32 byte contexts
XHCI protocol USB 2.00, 4 ports (offset 1), def 3001
XHCI protocol USB 3.00, 4 ports (offset 5), def 1000
XHCI extcap 0xc1 @ 0xc3108040
XHCI extcap 0xc0 @ 0xc3108070
XHCI extcap 0x1 @ 0xc3108330
EHCI init on dev 00:1a.0 (regs=0xc311d020)
EHCI init on dev 00:1d.0 (regs=0xc311e020)
AHCI controller at 00:1f.2, iobase 0xc311c000, irq 11
Found 0 lpt ports
Found 0 serial ports
Searching bootorder for: /rom@img/nvramcui
XHCI no devices found
PS2 keyboard initialized
Initialized USB HUB (0 ports used)
Initialized USB HUB (0 ports used)
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@1/disk@0
AHCI/1: Set transfer mode to UDMA-6
Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@1/disk@0
AHCI/1: registering: "AHCI/1: Crucial_CT256M550SSD3 ATA-9 Hard-Disk (238 GiBytes)"
All threads complete.
Scan for option roms
Press ESC for boot menu.
Searching bootorder for: HALT
drive 0x000f66e0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=500118192
Space available for UMB: cf000-ed800, f5fa0-f66e0
Returned 188416 bytes of ZoneHigh
e820 map has 8 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 00000000bff2b000 = 1 RAM
4: 00000000bff2b000 - 00000000c2a00000 = 2 RESERVED
5: 00000000f0000000 - 00000000f4000000 = 2 RESERVED
6: 00000000fed40000 - 00000000fed45000 = 2 RESERVED
7: 0000000100000000 - 000000013c600000 = 1 RAM
enter handle_19:
NULL
Booting from Hard Disk...
Booting from 0000:7c00