blob: 32b729ca67a07290cbbb89be05f6f3149dd7ecc0 [file] [log] [blame]
coreboot-4.8-2610-g7f520c8fe6 Wed Dec 19 18:05:51 UTC 2018 romstage starting...
Mobile Intel(R) 82945GM/GME Express Chipset
(G)MCH capable of up to FSB 800 MHz
(G)MCH capable of up to DDR2-667
Setting up static southbridge registers... done.
Disabling Watchdog reboot... done.
Setting up static northbridge registers... done.
Waiting for MCHBAR to come up...ok
PM1_CNT: 00001c00
SMBus controller enabled.
Setting up RAM controller.
This mainboard supports Dual Channel Operation.
Reading SPD using i2c block operation.
DDR II Channel 0 Socket 0: x8DDS
DIMM 0 side 0 = 1024 MB
DIMM 0 side 1 = 1024 MB
DDR II Channel 0 Socket 1: N/A
Reading SPD using i2c block operation.
DDR II Channel 1 Socket 0: x8DDS
DIMM 2 side 0 = 512 MB
DIMM 2 side 1 = 512 MB
DDR II Channel 1 Socket 1: N/A
Memory will be driven at 533MT with CAS=4 clocks
tRAS = 12 cycles
tRP = 4 cycles
tRCD = 4 cycles
tWR = 4 cycles
tRFC = 34 cycles
Refresh: 7.8us
Setting Graphics Frequency...
FSB: 667 MHz Voltage: 1.05V Render: 250MHz Display: 200MHz
Setting Memory Frequency... CLKCFG = 0x00010023, MVCO 4x, second VCO, CLKCFG = 0x200100b3, ok
Setting mode of operation for memory channels...Dual Channel Asymmetric.
Programming Clock Crossing...MEM=533 FSB=667... ok
Setting RAM size...
C0DRB = 0x40404020
C1DRB = 0x60606050
TOLUD = 0x00c0
Setting row attributes...
C0DRA = 0x0033
C1DRA = 0x0033
one dimm per channel config..
Initializing System Memory IO...
Programming Dual Channel RCOMP
Table Index: 18
Programming DLL Timings...
Enabling System Memory IO...
jedec enable sequence: bank 0
jedec enable sequence: bank 1
bankaddr from bank size of rank 0
jedec enable sequence: bank 4
bankaddr from bank size of rank 1
jedec enable sequence: bank 5
bankaddr from bank size of rank 4
RAM initialization finished.
Setting up Egress Port RCRB
Loading port arbitration table ...ok
Wait for VC1 negotiation ...ok
Setting up DMI RCRB
Wait for VC1 negotiation ...done..
Internal graphics: enabled
Waiting for DMI hardware...ok
Enabling PCI Express x16 Link
SLOTSTS: 0000
Disabling PCI Express x16 Link
Wait for link to enter detect state... ok
Setting up Root Complex Topology
CBMEM:
IMD: root @ bf3ff000 254 entries.
IMD: root @ bf3fec00 62 entries.
MTRR Range: Start=ffc00000 End=0 (Size 400000)
MTRR Range: Start=0 End=1000000 (Size 1000000)
MTRR Range: Start=bec00000 End=bf000000 (Size 400000)
MTRR Range: Start=bf000000 End=bf400000 (Size 400000)
MTRR Range: Start=bf600000 End=bf800000 (Size 200000)
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'fallback/postcar'
CBFS: Found @ offset 3df00 size 39e4
Decompressing stage fallback/postcar @ 0xbf3cffc0 (31472 bytes)
Loading module at bf3d0000 with entry bf3d0000. filesize: 0x3810 memsize: 0x7ab0
Processing 94 relocs. Offset value of 0xbd3d0000
coreboot-4.8-2610-g7f520c8fe6 Wed Dec 19 18:05:51 UTC 2018 postcar starting...
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 22880 size 13ef9
Decompressing stage fallback/ramstage @ 0xbf38cfc0 (233720 bytes)
Loading module at bf38d000 with entry bf38d000. filesize: 0x29748 memsize: 0x390b8
Processing 2750 relocs. Offset value of 0xbe58d000
coreboot-4.8-2610-g7f520c8fe6 Wed Dec 19 18:05:51 UTC 2018 ramstage starting...
Normal boot.
BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0
Enumerating buses...
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/27a0] enabled
PCI: 00:02.0 [8086/27a2] enabled
PCI: 00:02.1 [8086/27a6] enabled
PCI: 00:1b.0 [8086/27d8] enabled
PCI: 00:1c.0 [8086/27d0] enabled
PCI: 00:1c.1 [8086/27d2] enabled
PCI: 00:1c.2 [8086/27d4] enabled
PCI: 00:1c.3 [8086/27d6] enabled
PCI: 00:1d.0 [8086/27c8] enabled
PCI: 00:1d.1 [8086/27c9] enabled
PCI: 00:1d.2 [8086/27ca] enabled
PCI: 00:1d.3 [8086/27cb] enabled
PCI: 00:1d.7 [8086/27cc] enabled
PCI: 00:1e.0 [8086/2448] enabled
PCI: 00:1f.0 [8086/27b9] enabled
Set SATA mode early
Set SATA mode early
PCI: 00:1f.2 [8086/27c4] enabled
PCI: 00:1f.3 [8086/27da] enabled
PCI: Left over static devices:
PCI: 00:1e.2
PCI: 00:1e.3
PCI: Check your devicetree.cb.
PCI: pci_scan_bus for bus 01
scan_bus: scanning of bus PCI: 00:1c.0 took 2652 usecs
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 [8086/4222] enabled
scan_bus: scanning of bus PCI: 00:1c.1 took 5623 usecs
PCI: pci_scan_bus for bus 03
scan_bus: scanning of bus PCI: 00:1c.2 took 2652 usecs
PCI: pci_scan_bus for bus 04
PCI: 04:00.0 [10ec/8168] enabled
scan_bus: scanning of bus PCI: 00:1c.3 took 5614 usecs
PCI: pci_scan_bus for bus 05
PCI: 05:05.0 [104c/8039] enabled
PCI: 05:05.1 [104c/803a] enabled
PCI: 05:05.2 [104c/803b] enabled
PCI: 05:05.3 [104c/803c] enabled
PCI: 05:05.4 [104c/803d] enabled
PCI: pci_scan_bus for bus 06
scan_bus: scanning of bus PCI: 05:05.0 took 2668 usecs
scan_bus: scanning of bus PCI: 00:1e.0 took 25007 usecs
PNP: 002e.0 disabled
PNP: 002e.1 disabled
PNP: 002e.3 enabled
PNP: 002e.4 enabled
PNP: 002e.5 disabled
PNP: 002e.7 disabled
PNP: 002e.8 disabled
PNP: 004e.0 disabled
PNP: 004e.1 disabled
PNP: 004e.5 enabled
PNP: 004e.7 disabled
PNP: 004e.8 disabled
PNP: 004e.9 disabled
PNP: 004e.a disabled
PNP: 004e.b disabled
scan_bus: scanning of bus PCI: 00:1f.0 took 28510 usecs
scan_bus: scanning of bus PCI: 00:1f.3 took 2 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 168761 usecs
scan_bus: scanning of bus Root Device took 177805 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 185229 exit 0
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
pci_tolm: 0xffffffff
IGD decoded, subtracting 8M UMA
TSEG decoded, subtracting 2M
Unused RAM between cbmem_top and TOM: 0x800K
Available memory: 3133440K (3060M)
Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
PNP: 002e.3 missing read_resources
Done reading resources.
skipping PNP: 002e.3@60 fixed resource, size=0!
skipping PNP: 002e.3@70 fixed resource, size=0!
Setting resources...
DOMAIN: 0000 03 <- [0x0000000000 - 0x000009ffff] size 0x000a0000 gran 0x00 mem
DOMAIN: 0000 04 <- [0x00000c0000 - 0x00bfffffff] size 0xbff40000 gran 0x00 mem
DOMAIN: 0000 05 <- [0x00bf800000 - 0x00bfffffff] size 0x00800000 gran 0x00 mem
DOMAIN: 0000 06 <- [0x00bf600000 - 0x00bf7fffff] size 0x00200000 gran 0x00 mem
DOMAIN: 0000 07 <- [0x00bf400000 - 0x00bf5fffff] size 0x00200000 gran 0x00 mem
PCI: 00:02.0 10 <- [0x00e4300000 - 0x00e437ffff] size 0x00080000 gran 0x13 mem
PCI: 00:02.0 14 <- [0x0000004090 - 0x0000004097] size 0x00000008 gran 0x03 io
PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:02.0 1c <- [0x00e4400000 - 0x00e443ffff] size 0x00040000 gran 0x12 mem
PCI: 00:02.1 10 <- [0x00e4380000 - 0x00e43fffff] size 0x00080000 gran 0x13 mem
PCI: 00:1b.0 10 <- [0x00e4440000 - 0x00e4443fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.1 20 <- [0x00e4100000 - 0x00e41fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 02:00.0 10 <- [0x00e4100000 - 0x00e4100fff] size 0x00001000 gran 0x0c mem
PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:1c.2 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:1c.2 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 mem
PCI: 00:1c.3 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 04 io
PCI: 00:1c.3 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:1c.3 20 <- [0x00e4200000 - 0x00e42fffff] size 0x00100000 gran 0x14 bus 04 mem
PCI: 04:00.0 10 <- [0x0000003000 - 0x00000030ff] size 0x00000100 gran 0x08 io
PCI: 04:00.0 18 <- [0x00e4220000 - 0x00e4220fff] size 0x00001000 gran 0x0c mem64
PCI: 04:00.0 30 <- [0x00e4200000 - 0x00e421ffff] size 0x00020000 gran 0x11 romem
PCI: 00:1d.0 20 <- [0x0000004000 - 0x000000401f] size 0x00000020 gran 0x05 io
PCI: 00:1d.1 20 <- [0x0000004020 - 0x000000403f] size 0x00000020 gran 0x05 io
PCI: 00:1d.2 20 <- [0x0000004040 - 0x000000405f] size 0x00000020 gran 0x05 io
PCI: 00:1d.3 20 <- [0x0000004060 - 0x000000407f] size 0x00000020 gran 0x05 io
PCI: 00:1d.7 10 <- [0x00e4444000 - 0x00e44443ff] size 0x00000400 gran 0x0a mem
PCI: 00:1e.0 1c <- [0x0000001000 - 0x0000002fff] size 0x00002000 gran 0x0c bus 05 io
PCI: 00:1e.0 24 <- [0x00e2100000 - 0x00e40fffff] size 0x02000000 gran 0x14 bus 05 prefmem
PCI: 00:1e.0 20 <- [0x00e0000000 - 0x00e20fffff] size 0x02100000 gran 0x14 bus 05 mem
PCI: 05:05.0 In set resources
PCI: 05:05.0 10 <- [0x00e2004000 - 0x00e2004fff] size 0x00001000 gran 0x0c mem
PCI: 05:05.0 2c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x02 io
PCI: 05:05.0 34 <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x02 io
PCI: 05:05.0 1c <- [0x00e2100000 - 0x00e40fffff] size 0x02000000 gran 0x0c prefmem
PCI: 05:05.0 24 <- [0x00e0004000 - 0x00e2003fff] size 0x02000000 gran 0x0c mem
PCI: 05:05.0 done set resources
PCI: 05:05.1 10 <- [0x00e2008000 - 0x00e20087ff] size 0x00000800 gran 0x0b mem
PCI: 05:05.1 14 <- [0x00e0000000 - 0x00e0003fff] size 0x00004000 gran 0x0e mem
PCI: 05:05.2 10 <- [0x00e2005000 - 0x00e2005fff] size 0x00001000 gran 0x0c mem
PCI: 05:05.3 10 <- [0x00e2009000 - 0x00e20090ff] size 0x00000100 gran 0x08 mem
PCI: 05:05.4 10 <- [0x00e2006000 - 0x00e2006fff] size 0x00001000 gran 0x0c mem
PCI: 05:05.4 14 <- [0x00e2007000 - 0x00e2007fff] size 0x00001000 gran 0x0c mem
PNP: 002e.3 missing set_resources
PNP: 002e.4 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.4 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 004e.5 60 <- [0x0000000060 - 0x0000000067] size 0x00000008 gran 0x03 io
PNP: 004e.5 62 <- [0x0000000064 - 0x000000006b] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 10 <- [0x0000004098 - 0x000000409f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x00000040a8 - 0x00000040ab] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x00000040a0 - 0x00000040a7] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x00000040ac - 0x00000040af] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000004080 - 0x000000408f] size 0x00000010 gran 0x04 io
PCI: 00:1f.2 24 <- [0x00e4445000 - 0x00e44453ff] size 0x00000400 gran 0x0a mem
Done setting resources.
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 468355 exit 0
Enabling resources...
PCI: 00:00.0 subsystem <- 8086/27a0
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 8086/27a2
PCI: 00:02.0 cmd <- 03
PCI: 00:02.1 subsystem <- 8086/27a6
PCI: 00:02.1 cmd <- 02
PCI: 00:1b.0 subsystem <- 8086/27d8
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 8086/27d0
PCI: 00:1c.0 cmd <- 100
PCI: 00:1c.1 bridge ctrl <- 0003
PCI: 00:1c.1 subsystem <- 8086/27d2
PCI: 00:1c.1 cmd <- 106
PCI: 00:1c.2 bridge ctrl <- 0003
PCI: 00:1c.2 subsystem <- 8086/27d4
PCI: 00:1c.2 cmd <- 100
PCI: 00:1c.3 bridge ctrl <- 0003
PCI: 00:1c.3 subsystem <- 8086/27d6
PCI: 00:1c.3 cmd <- 107
PCI: 00:1d.0 subsystem <- 8086/27c8
PCI: 00:1d.0 cmd <- 01
PCI: 00:1d.1 subsystem <- 8086/27c9
PCI: 00:1d.1 cmd <- 01
PCI: 00:1d.2 subsystem <- 8086/27ca
PCI: 00:1d.2 cmd <- 01
PCI: 00:1d.3 subsystem <- 8086/27cb
PCI: 00:1d.3 cmd <- 01
PCI: 00:1d.7 subsystem <- 8086/27cc
PCI: 00:1d.7 cmd <- 102
PCI: 00:1e.0 bridge ctrl <- 0003
PCI: 00:1e.0 subsystem <- 0000/0000
PCI: 00:1e.0 cmd <- 107
PCI: 00:1f.0 subsystem <- 8086/27b9
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 8086/27c4
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 8086/27da
PCI: 00:1f.3 cmd <- 101
PCI: 02:00.0 cmd <- 02
PCI: 04:00.0 cmd <- 03
PCI: 05:05.0 bridge ctrl <- 0143
PCI: 05:05.0 cmd <- 07
PCI: 05:05.1 cmd <- 02
PCI: 05:05.2 cmd <- 02
PCI: 05:05.3 cmd <- 06
PCI: 05:05.4 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 126121 exit 0
Initializing devices...
Root Device init ...
Root Device init finished in 2460 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Setting up SMI for CPU
Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
Processing 13 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 00038000. Will call bf3a38e3(bf3c1f80)
Installing SMM handler to 0xbf600000
Loading module at bf610000 with entry bf61013a. filesize: 0xa10 memsize: 0x4a28
Processing 38 relocs. Offset value of 0xbf610000
Loading module at bf608000 with entry bf608000. filesize: 0x1a8 memsize: 0x1a8
Processing 13 relocs. Offset value of 0xbf608000
SMM Module: placing jmp sequence at bf607c00 rel16 0x03fd
SMM Module: stub loaded at bf608000. Will call bf61013a(00000000)
Initializing southbridge SMI...
SMI_STS: MCSMI GPI PM1
GPE0_STS: GPIO11 GPIO8 GPIO7 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
ALT_GP_SMI_STS: GPI11 GPI8 GPI7 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0
TCO_STS:
In relocation handler: cpu 0
New SMBASE=0xbf600000 @ 0003fc00
Relocation complete.
Locking SMM.
Initializing CPU #0
CPU: vendor Intel device 6f6
CPU: family 06, model 0f, stepping 06
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset b800 size 17000
microcode: sig=0x6f6 pf=0x20 revision=0x0
microcode: updated to revision 0xd1 date=2010-10-01
CPU: Intel(R) Core(TM)2 CPU T7200 @ 2.00GHz.
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x00000000bf400000 size 0xbf340000 type 6
0x00000000bf400000 - 0x00000000d0000000 size 0x10c00000 type 0
0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 5/5.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
MTRR: 1 base 0x0000000080000000 mask 0x0000000fc0000000 type 6
MTRR: 2 base 0x00000000bf400000 mask 0x0000000fffc00000 type 0
MTRR: 3 base 0x00000000bf800000 mask 0x0000000fff800000 type 0
MTRR: 4 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC... apic_id: 0x00 done.
VMX status: enabled, locked
CPU: 0 2 siblings
CPU: 0 has sibling 1
CPU #0 initialized
In relocation handler: cpu 1
New SMBASE=0xbf5ffc00 @ 0003fc00
Initializing CPU #1
Waiting for 1 CPUS to stop
CPU: vendor Intel device 6f6
CPU: family 06, model 0f, stepping 06
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset b800 size 17000
microcode: sig=0x6f6 pf=0x20 revision=0x0
microcode: updated to revision 0xd1 date=2010-10-01
CPU: Intel(R) Core(TM)2 CPU T7200 @ 2.00GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
CPU physical address size: 36 bits
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local APIC... apic_id: 0x01 done.
VMX status: enabled, locked
CPU: 1 2 siblings
CPU #1 initialized
CPU 1 going down...
All AP CPUs stopped (9761 loops)
CPU_CLUSTER: 0 init finished in 384296 usecs
PCI: 00:02.0 init ...
Initializing VGA without OPROM.
No display connected on slave 2
WARNING: EDID block does NOT fully conform to EDID 1.3.
Missing name descriptor
Missing monitor ranges
bringing up panel at resolution 1280 x 800
Borders 0 x 0
Blank 130 x 19
Sync 26 x 4
Front porch 39 x 2
DREF clock
Single channel
Polarities 1, 1
Pixel N=3, M1=16, M2=5, P1=2
Pixel clock 69285 kHz
VGA mode: text
waiting for panel powerup
panel powered up
gtt_setup is enabled.
8M UMA
GTT PGETBL_CTL register: 0xbffc0001
GTT Enabled
PCI: 00:02.0 init finished in 138000 usecs
PCI: 00:02.1 init ...
PCI: 00:02.1 init finished in 2002 usecs
PCI: 00:1b.0 init ...
Azalia: codec type: Azalia
Azalia: base = e4440000
Azalia: codec_mask = 03
Azalia: Initializing codec #1
Azalia: codec viddid: 14f12c06
Azalia: No verb!
Azalia: Initializing codec #0
Azalia: codec viddid: 10ec0262
Azalia: verb_size: 52
Azalia: verb loaded.
PCI: 00:1b.0 init finished in 30482 usecs
PCI: 00:1c.0 init ...
Initializing ICH7 PCIe bridge.
PCI: 00:1c.0 init finished in 4803 usecs
PCI: 00:1c.1 init ...
Initializing ICH7 PCIe bridge.
PCI: 00:1c.1 init finished in 4803 usecs
PCI: 00:1c.2 init ...
Initializing ICH7 PCIe bridge.
PCI: 00:1c.2 init finished in 4802 usecs
PCI: 00:1c.3 init ...
Initializing ICH7 PCIe bridge.
PCI: 00:1c.3 init finished in 4802 usecs
PCI: 00:1d.0 init ...
UHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 5226 usecs
PCI: 00:1d.1 init ...
UHCI: Setting up controller.. done.
PCI: 00:1d.1 init finished in 5228 usecs
PCI: 00:1d.2 init ...
UHCI: Setting up controller.. done.
PCI: 00:1d.2 init finished in 5228 usecs
PCI: 00:1d.3 init ...
UHCI: Setting up controller.. done.
PCI: 00:1d.3 init finished in 5228 usecs
PCI: 00:1d.7 init ...
EHCI: Setting up controller.. done.
PCI: 00:1d.7 init finished in 5232 usecs
PCI: 00:1e.0 init ...
PCI: 00:1e.0 init finished in 2013 usecs
PCI: 00:1f.0 init ...
i82801gx: lpc_init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
Set power on after power failure.
NMI sources disabled.
rtc_failed = 0x0
RTC Init
Disabling ACPI via APMC:
done.
Locking SMM.
PCI: 00:1f.0 init finished in 25087 usecs
PCI: 00:1f.2 init ...
i82801gx_sata: initializing...
SATA controller in combined mode.
PCI: 00:1f.2 init finished in 7851 usecs
PCI: 02:00.0 init ...
PCI: 02:00.0 init finished in 2001 usecs
PCI: 04:00.0 init ...
PCI: 04:00.0 init finished in 2002 usecs
PCI: 05:05.0 init ...
TI PCIxx12 init
PCI: 05:05.0 init finished in 3481 usecs
PCI: 05:05.1 init ...
PCI: 05:05.1 init finished in 2001 usecs
PCI: 05:05.2 init ...
PCI: 05:05.2 init finished in 2002 usecs
PCI: 05:05.3 init ...
PCI: 05:05.3 init finished in 2002 usecs
PCI: 05:05.4 init ...
PCI: 05:05.4 init finished in 2002 usecs
PNP: 002e.4 init ...
PNP: 002e.4 init finished in 1914 usecs
PNP: 004e.5 init ...
PNP: 004e.5 init finished in 1914 usecs
Devices initialized
BS: BS_DEV_INIT times (us): entry 7 run 756212 exit 0
Finalize devices...
PCI: 00:1f.0 final
Devices finalized
BS: BS_POST_DEVICE times (us): entry 0 run 5236 exit 0
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 0 exit 0
Copying Interrupt Routing Table to 0x000f0000... done.
Copying Interrupt Routing Table to 0xbf339000... done.
PIRQ table: 320 bytes.
Wrote the mp table end at: 000f0410 - 000f05a4
Wrote the mp table end at: bf338010 - bf3381a4
MP table: 420 bytes.
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 41940 size 3d71
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at bf314000.
ACPI: * FACS
ACPI: * DSDT
ACPI: * FADT
ACPI: added table 1/32, length now 40
ACPI: * SSDT
Found 1 CPU(s) with 2 core(s) each.
clocks between 1000 and 2000 MHz.
adding 4 P-States between busratio 6 and c, incl. P0
PSS: 2000MHz power 35000 control 0xc24 status 0xc24
PSS: 1666MHz power 31666 control 0xa1d status 0xa1d
PSS: 1333MHz power 28333 control 0x818 status 0x818
PSS: 1000MHz power 25000 control 0x613 status 0x613
clocks between 1000 and 2000 MHz.
adding 4 P-States between busratio 6 and c, incl. P0
PSS: 2000MHz power 35000 control 0xc24 status 0xc24
PSS: 1666MHz power 31666 control 0xa1d status 0xa1d
PSS: 1333MHz power 28333 control 0x818 status 0x818
PSS: 1000MHz power 25000 control 0x613 status 0x613
Generating ACPI PIRQ entries
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: added table 3/32, length now 48
ACPI: * MADT
ACPI: added table 4/32, length now 52
current = bf318920
ACPI: * ECDT
ACPI: added table 5/32, length now 56
current = bf318980
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'vbt.bin'
CBFS: 'vbt.bin' not found.
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'pci8086,27a2.rom'
CBFS: 'pci8086,27a2.rom' not found.
PCI Option ROM loading disabled for PCI: 00:02.0
GMA: locate_vbt_vbios: aa55 8086 0 0 3
GMA: Found valid VBT in legacy area
ACPI: * HPET
ACPI: added table 6/32, length now 60
ACPI: done.
ACPI tables: 27072 bytes.
smbios_write_tables: bf313000
SMBIOS tables: 343 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum a0aa
Writing coreboot table at 0xbf33a000
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000c0000-00000000bf312fff: RAM
3. 00000000bf313000-00000000bf38cfff: CONFIGURATION TABLES
4. 00000000bf38d000-00000000bf3c6fff: RAMSTAGE
5. 00000000bf3c7000-00000000bf3fffff: CONFIGURATION TABLES
6. 00000000bf400000-00000000bfffffff: RESERVED
7. 00000000f0000000-00000000f3ffffff: RESERVED
Manufacturer: 20
SF: Detected M25P32 with sector size 0x10000, total 0x400000
CBFS: 'Master Header Locator' located CBFS at [200:400000)
FMAP: Found "FLASH" version 1.1 at 0.
FMAP: base = ffc00000 size = 400000 #areas = 3
Wrote coreboot table at: bf33a000, 0x35c bytes, checksum 91e7
coreboot table: 884 bytes.
IMD ROOT 0. bf3ff000 00001000
IMD SMALL 1. bf3fe000 00001000
CONSOLE 2. bf3de000 00020000
TIME STAMP 3. bf3dd000 00000910
ROMSTG STCK 4. bf3d8000 00005000
AFTER CAR 5. bf3cf000 00009000
57a9e102 6. bf3c7000 00007ab0
RAMSTAGE 7. bf38c000 0003b000
57a9e100 8. bf352000 000390b8
SMM BACKUP 9. bf342000 00010000
COREBOOT 10. bf33a000 00008000
IRQ TABLE 11. bf339000 00001000
SMP TABLE 12. bf338000 00001000
ACPI 13. bf314000 00024000
SMBIOS 14. bf313000 00000800
IMD small region:
IMD ROOT 0. bf3fec00 00000400
ROMSTAGE 1. bf3febe0 00000004
57a9e002 2. bf3febc0 00000018
57a9e000 3. bf3feba0 00000018
ACPI GNVS 4. bf3feaa0 00000100
COREBOOTFWD 5. bf3fea60 00000028
BS: BS_WRITE_TABLES times (us): entry 0 run 334832 exit 0
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 45700 size 10a02
Checking segment from ROM address 0xffc45938
Checking segment from ROM address 0xffc45954
Loading segment from ROM address 0xffc45938
code (compression=1)
New segment dstaddr 0x000e06a0 memsize 0x1f960 srcaddr 0xffc45970 filesize 0x109ca
Loading Segment: addr: 0x000e06a0 memsz: 0x000000000001f960 filesz: 0x00000000000109ca
using LZMA
Loading segment from ROM address 0xffc45954
Entry Point 0x000fd258
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 87056 exit 0
ICH7 watchdog disabled
Jumping to boot code at 000fd258(bf33a000)
SeaBIOS (version rel-1.12.0-4-g29ba89e-dirty-20181220_163913-pgeorgi)
BUILD: gcc: (coreboot toolchain v1.53 August 16th, 2018) 8.1.0 binutils: (GNU Binutils) 2.30
Found coreboot cbmem console @ bf3de000
Found mainboard Getac P470
Relocating init from 0x000e1d00 to 0xbf2c6560 (size 51712)
Found CBFS header at 0xffc00238
multiboot: eax=bf3b6280, ebx=bf3b6234
Found 24 PCI devices (max PCI bus is 06)
Copying SMBIOS entry point from 0xbf313000 to 0x000f6280
Copying ACPI RSDP from 0xbf314000 to 0x000f6250
Copying MPTABLE from 0xbf338000/bf338010 to 0x000f60a0
Copying PIR from 0xbf339000 to 0x000f5f60
Using pmtimer, ioport 0x508
Scan for VGA option rom
Running option rom at c000:0003
pmm call arg1=0
Turning on vga text mode console
SeaBIOS (version rel-1.12.0-4-g29ba89e-dirty-20181220_163913-pgeorgi)
EHCI init on dev 00:1d.7 (regs=0xe4444020)
UHCI init on dev 00:1d.0 (io=4000)
UHCI init on dev 00:1d.1 (io=4020)
UHCI init on dev 00:1d.2 (io=4040)
UHCI init on dev 00:1d.3 (io=4060)
ATA controller 1 at 1f0/3f4/0 (irq 14 dev fa)
ATA controller 2 at 170/374/0 (irq 15 dev fa)
Searching bootorder for: /pci@i0cf8/pci-bridge@1e/*@5,3
Found 0 lpt ports
Found 2 serial ports
DVD/CD [ata1-0: MATSHITADVD-RAM UJ-850S ATAPI-7 DVD/CD]
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@1/disk@0
PS2 keyboard initialized
ata0-0: FUJITSU MHW2120BH ATA-8 Hard-Disk (111 GiBytes)
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
Initialized USB HUB (0 ports used)
All threads complete.
Scan for option roms
Press ESC for boot menu.
Searching bootorder for: HALT
drive 0x000f5ec0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=234441648
Space available for UMB: c7000-ed000, f5aa0-f5e90
Returned 262144 bytes of ZoneHigh
e820 map has 6 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 00000000bf313000 = 1 RAM
4: 00000000bf313000 - 00000000c0000000 = 2 RESERVED
5: 00000000f0000000 - 00000000f4000000 = 2 RESERVED
enter handle_19:
NULL
Booting from DVD/CD...
Device reports MEDIUM NOT PRESENT
scsi_is_ready returned -1
Boot failed: Could not read from CDROM (code 0003)
enter handle_18:
NULL
Booting from Hard Disk...
Booting from 0000:7c00