blob: 6ea6fa047c5925b33cd063a400adac7adb91b884 [file] [log] [blame]
coreboot-4.7-673-g5e32f41b43 Mon Apr 9 12:06:51 UTC 2018 romstage starting...
APIC 00: CPU Family_Model = 00610f31
APIC 00: ** Enter AmdInitReset [00020007]
Fch OEM config in INIT RESET
AmdInitReset() returned AGESA_SUCCESS
APIC 00: Heap in LocalCache (2) at 0x00400000
APIC 00: ** Exit AmdInitReset [00020007]
APIC 00: ** Enter AmdInitEarly [00020002]
AmdInitEarly() returned AGESA_SUCCESS
APIC 00: Heap in LocalCache (2) at 0x00400000
APIC 00: ** Exit AmdInitEarly [00020002]
APIC 00: ** Enter AmdInitPost [00020006]
-------------READING SPD-----------
iobase: 0x00000B00, SmbusSlave: 0x000000A0, count: 128
-------------SPD READ ERROR-----------
-------------READING SPD-----------
iobase: 0x00000B00, SmbusSlave: 0x000000A4, count: 128
-------------FINISHED READING SPD-----------
-------------READING SPD-----------
iobase: 0x00000B00, SmbusSlave: 0x000000A2, count: 128
-------------SPD READ ERROR-----------
-------------READING SPD-----------
iobase: 0x00000B00, SmbusSlave: 0x000000A6, count: 128
-------------FINISHED READING SPD-----------
AmdInitPost() returned AGESA_CRITICAL
APIC 00: Heap in TempMem (3) at 0x000b0000
APIC 00: ** Exit AmdInitPost [00020006]
CBMEM:
IMD: root @ bffff000 254 entries.
IMD: root @ bfffec00 62 entries.
MTRR Range: Start=0 End=80000000 (Size 80000000)
MTRR Range: Start=80000000 End=c0000000 (Size 40000000)
MTRR Range: Start=ff800000 End=0 (Size 800000)
CBFS: 'Master Header Locator' located CBFS at [200:7fffc0)
CBFS: Locating 'fallback/postcar'
CBFS: Found @ offset 1a7c0 size 33d4
Decompressing stage fallback/postcar @ 0xbffbcfc0 (29104 bytes)
Loading module at bffbd000 with entry bffbd000. filesize: 0x32d0 memsize: 0x7170
Processing 42 relocs. Offset value of 0xbdfbd000
coreboot-4.7-673-g5e32f41b43 Mon Apr 9 12:06:51 UTC 2018 ramstage starting...
APIC 00: ** Enter AmdInitEnv [00020003]
Wiped HEAP at [10000000 - 1002ffff]
Fch OEM config in INIT ENV
AmdInitEnv() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdInitEnv [00020003]
BS: BS_PRE_DEVICE times (us): entry 54975 run 0 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 4 exit 0
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 10: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 1
PCI: 00:06.0: enabled 1
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:10.0: enabled 1
PCI: 00:10.1: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 004e.0: enabled 0
PNP: 004e.1: enabled 1
PNP: 004e.2: enabled 0
PNP: 004e.3: enabled 1
PNP: 004e.4: enabled 1
PNP: 004e.5: enabled 1
PNP: 004e.6: enabled 1
PNP: 004e.7: enabled 1
PNP: 004e.8: enabled 0
PNP: 004e.a: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:14.6: enabled 0
PCI: 00:14.7: enabled 0
PCI: 00:15.0: enabled 0
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
Compare with tree...
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 10: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 1
PCI: 00:06.0: enabled 1
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:10.0: enabled 1
PCI: 00:10.1: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 004e.0: enabled 0
PNP: 004e.1: enabled 1
PNP: 004e.2: enabled 0
PNP: 004e.3: enabled 1
PNP: 004e.4: enabled 1
PNP: 004e.5: enabled 1
PNP: 004e.6: enabled 1
PNP: 004e.7: enabled 1
PNP: 004e.8: enabled 0
PNP: 004e.a: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:14.6: enabled 0
PCI: 00:14.7: enabled 0
PCI: 00:15.0: enabled 0
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
Mainboard MS-7721 Enable.
Root Device scanning...
root_dev_scan_bus for Root Device
setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000
setup_bsp_ramtop, TOP MEM2: msr.lo = 0x9f000000, msr.hi = 0x00000001
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
CPU_CLUSTER: 0 scanning...
PCI: 00:18.5 family15h, core_max=0x10, core_nums=0xf, siblings=0x3
lpaicid_start=0x10 node 0x0 core 0x0 apicid=0x10
CPU: APIC: 10 enabled
lpaicid_start=0x10 node 0x0 core 0x1 apicid=0x11
CPU: APIC: 11 enabled
lpaicid_start=0x10 node 0x0 core 0x2 apicid=0x12
CPU: APIC: 12 enabled
lpaicid_start=0x10 node 0x0 core 0x3 apicid=0x13
CPU: APIC: 13 enabled
scan_bus: scanning of bus CPU_CLUSTER: 0 took 16867 usecs
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [1022/1410] enabled
PCI: 00:00.2 [1022/1419] ops
PCI: 00:00.2 [1022/1419] enabled
PCI: 00:01.0 [1002/990e] enabled
PCI: 00:01.1 [1002/9902] enabled
PCI: Static device PCI: 00:02.0 not found, disabling it.
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:04.0 subordinate bus PCI Express
PCI: 00:04.0 [1022/1414] enabled
PCI: Static device PCI: 00:05.0 not found, disabling it.
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:06.0 subordinate bus PCI Express
PCI: 00:06.0 [1022/1416] enabled
hudson_enable()
PCI: 00:10.0 [1022/7812] enabled
hudson_enable()
PCI: 00:10.1 [1022/7812] enabled
hudson_enable()
PCI: 00:11.0 [1022/7801] ops
PCI: 00:11.0 [1022/7801] enabled
hudson_enable()
PCI: 00:12.0 [1022/7807] ops
PCI: 00:12.0 [1022/7807] enabled
hudson_enable()
PCI: 00:12.2 [1022/7808] ops
PCI: 00:12.2 [1022/7808] enabled
hudson_enable()
PCI: 00:13.0 [1022/7807] ops
PCI: 00:13.0 [1022/7807] enabled
hudson_enable()
PCI: 00:13.2 [1022/7808] ops
PCI: 00:13.2 [1022/7808] enabled
hudson_enable()
PCI: 00:14.0 [1022/780b] bus ops
PCI: 00:14.0 [1022/780b] enabled
hudson_enable()
hudson_enable()
PCI: 00:14.2 [1022/780d] ops
PCI: 00:14.2 [1022/780d] enabled
hudson_enable()
PCI: 00:14.3 [1022/780e] bus ops
PCI: 00:14.3 [1022/780e] enabled
hudson_enable()
PCI: 00:14.4 [1022/780f] bus ops
PCI: 00:14.4 [1022/780f] enabled
hudson_enable()
PCI: 00:14.5 [1022/7809] ops
PCI: 00:14.5 [1022/7809] enabled
hudson_enable()
hudson_enable()
hudson_enable()
hudson_enable()
hudson_enable()
hudson_enable()
PCI: 00:18.0 [1022/1400] ops
PCI: 00:18.0 [1022/1400] enabled
PCI: 00:18.1 [1022/1401] enabled
PCI: 00:18.2 [1022/1402] enabled
PCI: 00:18.3 [1022/1403] enabled
PCI: 00:18.4 [1022/1404] enabled
PCI: 00:18.5 [1022/1405] enabled
PCI: 00:04.0 scanning...
do_pci_scan_bridge for PCI: 00:04.0
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [10ec/8168] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Failed to enable LTR for dev = PCI: 01:00.0
scan_bus: scanning of bus PCI: 00:04.0 took 17927 usecs
PCI: 00:06.0 scanning...
do_pci_scan_bridge for PCI: 00:06.0
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 [10ec/8168] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Failed to enable LTR for dev = PCI: 02:00.0
scan_bus: scanning of bus PCI: 00:06.0 took 17931 usecs
PCI: 00:14.0 scanning...
scan_generic_bus for PCI: 00:14.0
bus: PCI: 00:14.0[0]->I2C: 01:50 enabled
bus: PCI: 00:14.0[0]->I2C: 01:51 enabled
scan_generic_bus for PCI: 00:14.0 done
scan_bus: scanning of bus PCI: 00:14.0 took 8040 usecs
PCI: 00:14.3 scanning...
scan_lpc_bus for PCI: 00:14.3
PNP: 004e.0 disabled
PNP: 004e.1 enabled
PNP: 004e.2 disabled
PNP: 004e.3 enabled
PNP: 004e.4 enabled
PNP: 004e.5 enabled
PNP: 004e.6 enabled
PNP: 004e.7 enabled
PNP: 004e.8 disabled
PNP: 004e.a enabled
scan_lpc_bus for PCI: 00:14.3 done
scan_bus: scanning of bus PCI: 00:14.3 took 13548 usecs
PCI: 00:14.4 scanning...
do_pci_scan_bridge for PCI: 00:14.4
PCI: pci_scan_bus for bus 03
PCI: 03:05.0 [1131/7134] enabled
scan_bus: scanning of bus PCI: 00:14.4 took 5546 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 170427 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 204760 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 17 run 329227 exit 0
found VGA at PCI: 00:01.0
Setting up VGA for PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
fx_devs=0x1
DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:04.0 read_resources bus 1 link: 0
PCI: 00:04.0 read_resources bus 1 link: 0 done
PCI: 00:06.0 read_resources bus 2 link: 0
PCI: 00:06.0 read_resources bus 2 link: 0 done
PCI: 00:14.0 read_resources bus 1 link: 0
I2C: 01:50 missing read_resources
I2C: 01:51 missing read_resources
PCI: 00:14.0 read_resources bus 1 link: 0 done
PCI: 00:14.3 read_resources bus 0 link: 0
PCI: 00:14.3 read_resources bus 0 link: 0 done
PCI: 00:14.4 read_resources bus 3 link: 0
PCI: 00:14.4 read_resources bus 3 link: 0 done
Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1
PCI: 00:18.0 read_resources bus 0 link: 1 done
PCI: 00:18.0 read_resources bus 0 link: 2
PCI: 00:18.0 read_resources bus 0 link: 2 done
PCI: 00:18.0 read_resources bus 0 link: 3
PCI: 00:18.0 read_resources bus 0 link: 3 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 10
APIC: 10
APIC: 11
APIC: 12
APIC: 13
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.2
PCI: 00:00.2 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 44
PCI: 00:01.0
PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14
PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18
PCI: 00:01.1
PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10
PCI: 00:02.0
PCI: 00:03.0
PCI: 00:04.0 child on link 0 PCI: 01:00.0
PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18
PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
PCI: 00:05.0
PCI: 00:06.0 child on link 0 PCI: 02:00.0
PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
PCI: 00:07.0
PCI: 00:08.0
PCI: 00:10.0
PCI: 00:10.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
PCI: 00:10.1
PCI: 00:10.1 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
PCI: 00:11.0
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:11.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
PCI: 00:12.0
PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:12.2
PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:13.0
PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:13.2
PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:14.0 child on link 0 I2C: 01:50
I2C: 01:50
I2C: 01:51
PCI: 00:14.1
PCI: 00:14.2
PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
PCI: 00:14.3 child on link 0 PNP: 004e.0
PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 004e.0
PNP: 004e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 004e.1
PNP: 004e.1 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.2
PNP: 004e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.3
PNP: 004e.3 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.3 resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
PNP: 004e.3 resource base 44 size 0 align 0 gran 0 limit 0 flags c0000400 index f0
PNP: 004e.4
PNP: 004e.4 resource base 225 size 8 align 3 gran 3 limit fff flags c0000100 index 60
PNP: 004e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.5
PNP: 004e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
PNP: 004e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
PNP: 004e.6
PNP: 004e.7
PNP: 004e.8
PNP: 004e.8 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
PNP: 004e.8 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.a
PCI: 00:14.4 child on link 0 PCI: 03:05.0
PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 03:05.0
PCI: 03:05.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
PCI: 00:14.5
PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:14.6
PCI: 00:14.7
PCI: 00:15.0
PCI: 00:15.1
PCI: 00:15.2
PCI: 00:15.3
PCI: 00:18.0
PCI: 00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
PCI: 00:18.1
PCI: 00:18.2
PCI: 00:18.3
PCI: 00:18.4
PCI: 00:18.5
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 01:00.0 10 * [0x0 - 0xff] io
PCI: 00:04.0 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:06.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 02:00.0 10 * [0x0 - 0xff] io
PCI: 00:06.0 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:04.0 1c * [0x0 - 0xfff] io
PCI: 00:06.0 1c * [0x1000 - 0x1fff] io
PCI: 00:01.0 14 * [0x2000 - 0x20ff] io
PCI: 00:11.0 20 * [0x2400 - 0x240f] io
PCI: 00:11.0 10 * [0x2410 - 0x2417] io
PCI: 00:11.0 18 * [0x2418 - 0x241f] io
PCI: 00:11.0 14 * [0x2420 - 0x2423] io
PCI: 00:11.0 1c * [0x2424 - 0x2427] io
DOMAIN: 0000 io: base: 2428 size: 2428 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 01:00.0 20 * [0x0 - 0x3fff] prefmem
PCI: 01:00.0 18 * [0x4000 - 0x4fff] prefmem
PCI: 00:04.0 prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:06.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 02:00.0 20 * [0x0 - 0x3fff] prefmem
PCI: 00:06.0 prefmem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:06.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 18 * [0x0 - 0xfff] mem
PCI: 00:06.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 03:05.0 10 * [0x0 - 0x3ff] mem
PCI: 00:14.4 mem: base: 400 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:01.0 10 * [0x0 - 0xfffffff] prefmem
PCI: 00:04.0 24 * [0x10000000 - 0x100fffff] prefmem
PCI: 00:06.0 24 * [0x10100000 - 0x101fffff] prefmem
PCI: 00:06.0 20 * [0x10200000 - 0x102fffff] mem
PCI: 00:14.4 20 * [0x10300000 - 0x103fffff] mem
PCI: 00:00.2 44 * [0x10400000 - 0x1047ffff] mem
PCI: 00:01.0 18 * [0x10480000 - 0x104bffff] mem
PCI: 00:01.1 10 * [0x104c0000 - 0x104c3fff] mem
PCI: 00:14.2 10 * [0x104c4000 - 0x104c7fff] mem
PCI: 00:10.0 10 * [0x104c8000 - 0x104c9fff] mem
PCI: 00:10.1 10 * [0x104ca000 - 0x104cbfff] mem
PCI: 00:12.0 10 * [0x104cc000 - 0x104ccfff] mem
PCI: 00:13.0 10 * [0x104cd000 - 0x104cdfff] mem
PCI: 00:14.5 10 * [0x104ce000 - 0x104cefff] mem
PCI: 00:11.0 24 * [0x104cf000 - 0x104cf7ff] mem
PCI: 00:12.2 10 * [0x104d0000 - 0x104d00ff] mem
PCI: 00:13.2 10 * [0x104d1000 - 0x104d10ff] mem
DOMAIN: 0000 mem: base: 104d1100 size: 104d1100 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:14.3 10000100 base ff800000 limit ffffffff mem (fixed)
constrain_resources: PCI: 00:14.3 02 base fec10000 limit fec103ff mem (fixed)
constrain_resources: PCI: 00:14.3 03 base fec00000 limit fec00fff mem (fixed)
skipping PNP: 004e.3@f0 fixed resource, size=0!
constrain_resources: PCI: 00:18.0 c0010058 base f8000000 limit fbffffff mem (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:2428 align:12 gran:0 limit:ffff
PCI: 00:04.0 1c * [0x1000 - 0x1fff] io
PCI: 00:06.0 1c * [0x2000 - 0x2fff] io
PCI: 00:01.0 14 * [0x3000 - 0x30ff] io
PCI: 00:11.0 20 * [0x3400 - 0x340f] io
PCI: 00:11.0 10 * [0x3410 - 0x3417] io
PCI: 00:11.0 18 * [0x3418 - 0x341f] io
PCI: 00:11.0 14 * [0x3420 - 0x3423] io
PCI: 00:11.0 1c * [0x3424 - 0x3427] io
DOMAIN: 0000 io: next_base: 3428 size: 2428 align: 12 gran: 0 done
PCI: 00:04.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff
PCI: 01:00.0 10 * [0x1000 - 0x10ff] io
PCI: 00:04.0 io: next_base: 1100 size: 1000 align: 12 gran: 12 done
PCI: 00:06.0 io: base:2000 size:1000 align:12 gran:12 limit:2fff
PCI: 02:00.0 10 * [0x2000 - 0x20ff] io
PCI: 00:06.0 io: next_base: 2100 size: 1000 align: 12 gran: 12 done
PCI: 00:14.4 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:14.4 io: next_base: ffff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:e0000000 size:104d1100 align:28 gran:0 limit:f7ffffff
PCI: 00:01.0 10 * [0xe0000000 - 0xefffffff] prefmem
PCI: 00:04.0 24 * [0xf0000000 - 0xf00fffff] prefmem
PCI: 00:06.0 24 * [0xf0100000 - 0xf01fffff] prefmem
PCI: 00:06.0 20 * [0xf0200000 - 0xf02fffff] mem
PCI: 00:14.4 20 * [0xf0300000 - 0xf03fffff] mem
PCI: 00:00.2 44 * [0xf0400000 - 0xf047ffff] mem
PCI: 00:01.0 18 * [0xf0480000 - 0xf04bffff] mem
PCI: 00:01.1 10 * [0xf04c0000 - 0xf04c3fff] mem
PCI: 00:14.2 10 * [0xf04c4000 - 0xf04c7fff] mem
PCI: 00:10.0 10 * [0xf04c8000 - 0xf04c9fff] mem
PCI: 00:10.1 10 * [0xf04ca000 - 0xf04cbfff] mem
PCI: 00:12.0 10 * [0xf04cc000 - 0xf04ccfff] mem
PCI: 00:13.0 10 * [0xf04cd000 - 0xf04cdfff] mem
PCI: 00:14.5 10 * [0xf04ce000 - 0xf04cefff] mem
PCI: 00:11.0 24 * [0xf04cf000 - 0xf04cf7ff] mem
PCI: 00:12.2 10 * [0xf04d0000 - 0xf04d00ff] mem
PCI: 00:13.2 10 * [0xf04d1000 - 0xf04d10ff] mem
DOMAIN: 0000 mem: next_base: f04d1100 size: 104d1100 align: 28 gran: 0 done
PCI: 00:04.0 prefmem: base:f0000000 size:100000 align:20 gran:20 limit:f00fffff
PCI: 01:00.0 20 * [0xf0000000 - 0xf0003fff] prefmem
PCI: 01:00.0 18 * [0xf0004000 - 0xf0004fff] prefmem
PCI: 00:04.0 prefmem: next_base: f0005000 size: 100000 align: 20 gran: 20 done
PCI: 00:04.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:04.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:06.0 prefmem: base:f0100000 size:100000 align:20 gran:20 limit:f01fffff
PCI: 02:00.0 20 * [0xf0100000 - 0xf0103fff] prefmem
PCI: 00:06.0 prefmem: next_base: f0104000 size: 100000 align: 20 gran: 20 done
PCI: 00:06.0 mem: base:f0200000 size:100000 align:20 gran:20 limit:f02fffff
PCI: 02:00.0 18 * [0xf0200000 - 0xf0200fff] mem
PCI: 00:06.0 mem: next_base: f0201000 size: 100000 align: 20 gran: 20 done
PCI: 00:14.4 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:14.4 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 mem: base:f0300000 size:100000 align:20 gran:20 limit:f03fffff
PCI: 03:05.0 10 * [0xf0300000 - 0xf03003ff] mem
PCI: 00:14.4 mem: next_base: f0300400 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
node 0: mmio_basek=00380000, basek=00400000, limitk=00660000
add_uma_resource_below_tolm: uma size 0x20000000, memory start 0xc0000000
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:00.2 44 <- [0x00f0400000 - 0x00f047ffff] size 0x00080000 gran 0x13 mem
PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:01.0 14 <- [0x0000003000 - 0x00000030ff] size 0x00000100 gran 0x08 io
PCI: 00:01.0 18 <- [0x00f0480000 - 0x00f04bffff] size 0x00040000 gran 0x12 mem
PCI: 00:01.1 10 <- [0x00f04c0000 - 0x00f04c3fff] size 0x00004000 gran 0x0e mem
PCI: 00:04.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
PCI: 00:04.0 24 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14 bus 01 prefmem
PCI: 00:04.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:04.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 01:00.0 18 <- [0x00f0004000 - 0x00f0004fff] size 0x00001000 gran 0x0c prefmem64
PCI: 01:00.0 20 <- [0x00f0000000 - 0x00f0003fff] size 0x00004000 gran 0x0e prefmem64
PCI: 00:04.0 assign_resources, bus 1 link: 0
PCI: 00:06.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 02 io
PCI: 00:06.0 24 <- [0x00f0100000 - 0x00f01fffff] size 0x00100000 gran 0x14 bus 02 prefmem
PCI: 00:06.0 20 <- [0x00f0200000 - 0x00f02fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:06.0 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
PCI: 02:00.0 18 <- [0x00f0200000 - 0x00f0200fff] size 0x00001000 gran 0x0c mem64
PCI: 02:00.0 20 <- [0x00f0100000 - 0x00f0103fff] size 0x00004000 gran 0x0e prefmem64
PCI: 00:06.0 assign_resources, bus 2 link: 0
PCI: 00:10.0 10 <- [0x00f04c8000 - 0x00f04c9fff] size 0x00002000 gran 0x0d mem64
PCI: 00:10.1 10 <- [0x00f04ca000 - 0x00f04cbfff] size 0x00002000 gran 0x0d mem64
PCI: 00:11.0 10 <- [0x0000003410 - 0x0000003417] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x0000003420 - 0x0000003423] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x0000003418 - 0x000000341f] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x0000003424 - 0x0000003427] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000003400 - 0x000000340f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f04cf000 - 0x00f04cf7ff] size 0x00000800 gran 0x0b mem
PCI: 00:12.0 10 <- [0x00f04cc000 - 0x00f04ccfff] size 0x00001000 gran 0x0c mem
PCI: 00:12.2 10 <- [0x00f04d0000 - 0x00f04d00ff] size 0x00000100 gran 0x08 mem
PCI: 00:13.0 10 <- [0x00f04cd000 - 0x00f04cdfff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00f04d1000 - 0x00f04d10ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.2 10 <- [0x00f04c4000 - 0x00f04c7fff] size 0x00004000 gran 0x0e mem64
PCI: 00:14.3 assign_resources, bus 0 link: 0
PNP: 004e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 004e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 004e.3 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io
PNP: 004e.3 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq
PNP: 004e.3 74 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 drq
PNP: 004e.3 f0 <- [0x0000000044 - 0x0000000043] size 0x00000000 gran 0x00 irq
PNP: 004e.4 60 <- [0x0000000225 - 0x000000022c] size 0x00000008 gran 0x03 io
PNP: 004e.4 70 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
PNP: 004e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 004e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 004e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PCI: 00:14.3 assign_resources, bus 0 link: 0
PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:14.4 20 <- [0x00f0300000 - 0x00f03fffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 00:14.4 assign_resources, bus 3 link: 0
PCI: 03:05.0 10 <- [0x00f0300000 - 0x00f03003ff] size 0x00000400 gran 0x0a mem
PCI: 00:14.4 assign_resources, bus 3 link: 0
PCI: 00:14.5 10 <- [0x00f04ce000 - 0x00f04cefff] size 0x00001000 gran 0x0c mem
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 10
APIC: 10
APIC: 11
APIC: 12
APIC: 13
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 1000 size 2428 align 12 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base e0000000 size 104d1100 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
DOMAIN: 0000 resource base c0000 size dff40000 align 0 gran 0 limit 0 flags e0004200 index 20
DOMAIN: 0000 resource base 100000000 size 9f000000 align 0 gran 0 limit 0 flags e0004200 index 30
DOMAIN: 0000 resource base c0000000 size 20000000 align 0 gran 0 limit 0 flags f0000200 index 7
PCI: 00:00.0
PCI: 00:00.2
PCI: 00:00.2 resource base f0400000 size 80000 align 19 gran 19 limit f047ffff flags 60000200 index 44
PCI: 00:01.0
PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001200 index 10
PCI: 00:01.0 resource base 3000 size 100 align 8 gran 8 limit 30ff flags 60000100 index 14
PCI: 00:01.0 resource base f0480000 size 40000 align 18 gran 18 limit f04bffff flags 60000200 index 18
PCI: 00:01.1
PCI: 00:01.1 resource base f04c0000 size 4000 align 14 gran 14 limit f04c3fff flags 60000200 index 10
PCI: 00:02.0
PCI: 00:03.0
PCI: 00:04.0 child on link 0 PCI: 01:00.0
PCI: 00:04.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
PCI: 00:04.0 resource base f0000000 size 100000 align 20 gran 20 limit f00fffff flags 60081202 index 24
PCI: 00:04.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10
PCI: 01:00.0 resource base f0004000 size 1000 align 12 gran 12 limit f0004fff flags 60001201 index 18
PCI: 01:00.0 resource base f0000000 size 4000 align 14 gran 14 limit f0003fff flags 60001201 index 20
PCI: 00:05.0
PCI: 00:06.0 child on link 0 PCI: 02:00.0
PCI: 00:06.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
PCI: 00:06.0 resource base f0100000 size 100000 align 20 gran 20 limit f01fffff flags 60081202 index 24
PCI: 00:06.0 resource base f0200000 size 100000 align 20 gran 20 limit f02fffff flags 60080202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 10
PCI: 02:00.0 resource base f0200000 size 1000 align 12 gran 12 limit f0200fff flags 60000201 index 18
PCI: 02:00.0 resource base f0100000 size 4000 align 14 gran 14 limit f0103fff flags 60001201 index 20
PCI: 00:07.0
PCI: 00:08.0
PCI: 00:10.0
PCI: 00:10.0 resource base f04c8000 size 2000 align 13 gran 13 limit f04c9fff flags 60000201 index 10
PCI: 00:10.1
PCI: 00:10.1 resource base f04ca000 size 2000 align 13 gran 13 limit f04cbfff flags 60000201 index 10
PCI: 00:11.0
PCI: 00:11.0 resource base 3410 size 8 align 3 gran 3 limit 3417 flags 60000100 index 10
PCI: 00:11.0 resource base 3420 size 4 align 2 gran 2 limit 3423 flags 60000100 index 14
PCI: 00:11.0 resource base 3418 size 8 align 3 gran 3 limit 341f flags 60000100 index 18
PCI: 00:11.0 resource base 3424 size 4 align 2 gran 2 limit 3427 flags 60000100 index 1c
PCI: 00:11.0 resource base 3400 size 10 align 4 gran 4 limit 340f flags 60000100 index 20
PCI: 00:11.0 resource base f04cf000 size 800 align 12 gran 11 limit f04cf7ff flags 60000200 index 24
PCI: 00:12.0
PCI: 00:12.0 resource base f04cc000 size 1000 align 12 gran 12 limit f04ccfff flags 60000200 index 10
PCI: 00:12.2
PCI: 00:12.2 resource base f04d0000 size 100 align 12 gran 8 limit f04d00ff flags 60000200 index 10
PCI: 00:13.0
PCI: 00:13.0 resource base f04cd000 size 1000 align 12 gran 12 limit f04cdfff flags 60000200 index 10
PCI: 00:13.2
PCI: 00:13.2 resource base f04d1000 size 100 align 12 gran 8 limit f04d10ff flags 60000200 index 10
PCI: 00:14.0 child on link 0 I2C: 01:50
I2C: 01:50
I2C: 01:51
PCI: 00:14.1
PCI: 00:14.2
PCI: 00:14.2 resource base f04c4000 size 4000 align 14 gran 14 limit f04c7fff flags 60000201 index 10
PCI: 00:14.3 child on link 0 PNP: 004e.0
PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 004e.0
PNP: 004e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 004e.1
PNP: 004e.1 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 004e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 004e.2
PNP: 004e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.3
PNP: 004e.3 resource base 378 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 004e.3 resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 004e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
PNP: 004e.3 resource base 44 size 0 align 0 gran 0 limit 0 flags e0000400 index f0
PNP: 004e.4
PNP: 004e.4 resource base 225 size 8 align 3 gran 3 limit fff flags e0000100 index 60
PNP: 004e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 004e.5
PNP: 004e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
PNP: 004e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 004e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72
PNP: 004e.6
PNP: 004e.7
PNP: 004e.8
PNP: 004e.8 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
PNP: 004e.8 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.a
PCI: 00:14.4 child on link 0 PCI: 03:05.0
PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:14.4 resource base f0300000 size 100000 align 20 gran 20 limit f03fffff flags 60080202 index 20
PCI: 03:05.0
PCI: 03:05.0 resource base f0300000 size 400 align 12 gran 10 limit f03003ff flags 60000200 index 10
PCI: 00:14.5
PCI: 00:14.5 resource base f04ce000 size 1000 align 12 gran 12 limit f04cefff flags 60000200 index 10
PCI: 00:14.6
PCI: 00:14.7
PCI: 00:15.0
PCI: 00:15.1
PCI: 00:15.2
PCI: 00:15.3
PCI: 00:18.0
PCI: 00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
PCI: 00:18.1
PCI: 00:18.2
PCI: 00:18.3
PCI: 00:18.4
PCI: 00:18.5
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 1189684 exit 0
APIC 00: ** Enter AmdInitMid [00020005]
AmdInitMid() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdInitMid [00020005]
Warning: Can't write PCI_INTR 0xC00/0xC01 registers because
'mainboard_picr_data' or 'mainboard_intr_data' tables are NULL
Warning: Can't write PCI IRQ assignments because 'mainboard_pirq_data' structure does not exist
Enabling resources...
PCI: 00:00.0 subsystem <- 1022/1410
PCI: 00:00.0 cmd <- 06
PCI: 00:00.2 subsystem <- 1022/1410
PCI: 00:00.2 cmd <- 06
PCI: 00:01.0 subsystem <- 1022/1410
PCI: 00:01.0 cmd <- 07
PCI: 00:01.1 subsystem <- 1022/1410
PCI: 00:01.1 cmd <- 02
PCI: 00:04.0 bridge ctrl <- 0003
PCI: 00:04.0 cmd <- 07
PCI: 00:06.0 bridge ctrl <- 0003
PCI: 00:06.0 cmd <- 07
PCI: 00:10.0 subsystem <- 1022/1410
PCI: 00:10.0 cmd <- 02
PCI: 00:10.1 subsystem <- 1022/1410
PCI: 00:10.1 cmd <- 02
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 subsystem <- 1022/1410
PCI: 00:12.0 cmd <- 02
PCI: 00:12.2 subsystem <- 1022/1410
PCI: 00:12.2 cmd <- 02
PCI: 00:13.0 subsystem <- 1022/1410
PCI: 00:13.0 cmd <- 02
PCI: 00:13.2 subsystem <- 1022/1410
PCI: 00:13.2 cmd <- 02
PCI: 00:14.0 subsystem <- 1022/1410
PCI: 00:14.0 cmd <- 403
PCI: 00:14.2 subsystem <- 1022/1410
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1022/1410
PCI: 00:14.3 cmd <- 0f
hudson lpc decode:PNP: 004e.1, base=0x000003f8, end=0x000003ff
hudson lpc decode:PNP: 004e.3, base=0x00000378, end=0x0000037f
hudson lpc decode:PNP: 004e.4, base=0x00000225, end=0x0000022c
hudson lpc decode:PNP: 004e.5, base=0x00000060, end=0x00000060
PCI: 00:14.4 bridge ctrl <- 0003
PCI: 00:14.4 cmd <- 06
PCI: 00:14.5 subsystem <- 1022/1410
PCI: 00:14.5 cmd <- 02
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1022/1410
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1022/1410
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 subsystem <- 1022/1410
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 subsystem <- 1022/1410
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 subsystem <- 1022/1410
PCI: 00:18.5 cmd <- 00
PCI: 01:00.0 cmd <- 03
PCI: 02:00.0 cmd <- 03
PCI: 03:05.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 46647 run 75679 exit 0
Initializing devices...
Root Device init ...
Root Device init finished in 955 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Initializing CPU #0
CPU: vendor AMD device 610f31
CPU: family 15, model 13, stepping 01
Model 15 Init.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Enabling cache
Setting up local APIC... apic_id: 0x10 done.
siblings = 03, CPU #0 initialized
CPU1: stack_base bfeec000, stack_end bfeecff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 17.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 17.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
CPU: vendor AMD device 610f31
CPU: family 15, model 13, stepping 01
Model 15 Init.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Enabling cache
Setting up local APIC... apic_id: 0x11 done.
siblings = 03, CPU #1 initialized
CPU2: stack_base bfeeb000, stack_end bfeebff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 18.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 18.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #2
CPU: vendor AMD device 610f31
CPU: family 15, model 13, stepping 01
Model 15 Init.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Enabling cache
Setting up local APIC... apic_id: 0x12 done.
siblings = 03, CPU #2 initialized
CPU3: stack_base bfeea000, stack_end bfeeaff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 19.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 19.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #3
Waiting for 1 CPUS to stop
CPU: vendor AMD device 610f31
CPU: family 15, model 13, stepping 01
Model 15 Init.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Enabling cache
Setting up local APIC... apic_id: 0x13 done.
siblings = 03, CPU #3 initialized
All AP CPUs stopped (1084 loops)
CPU0: stack: bfeed000 - bfeee000, lowest used address bfeed52c, stack used: 2772 bytes
CPU1: stack: bfeec000 - bfeed000, lowest used address bfeecddc, stack used: 548 bytes
CPU2: stack: bfeeb000 - bfeec000, lowest used address bfeebddc, stack used: 548 bytes
CPU3: stack: bfeea000 - bfeeb000, lowest used address bfeeaddc, stack used: 548 bytes
CPU_CLUSTER: 0 init finished in 151337 usecs
DOMAIN: 0000 init ...
DOMAIN: 0000 init finished in 1000 usecs
PCI: 00:00.0 init ...
PCI: 00:00.0 init finished in 1000 usecs
PCI: 00:01.0 init ...
PCI: 00:01.0 init finished in 998 usecs
PCI: 00:01.1 init ...
PCI: 00:01.1 init finished in 999 usecs
PCI: 00:10.0 init ...
PCI: 00:10.0 init finished in 1000 usecs
PCI: 00:10.1 init ...
PCI: 00:10.1 init finished in 1000 usecs
PCI: 00:11.0 init ...
PCI: 00:11.0 init finished in 998 usecs
PCI: 00:12.0 init ...
PCI: 00:12.0 init finished in 998 usecs
PCI: 00:12.2 init ...
PCI: 00:12.2 init finished in 998 usecs
PCI: 00:13.0 init ...
PCI: 00:13.0 init finished in 998 usecs
PCI: 00:13.2 init ...
PCI: 00:13.2 init finished in 998 usecs
PCI: 00:14.0 init ...
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x10
IOAPIC: ID = 0x04
IOAPIC: Dumping registers
reg 0x0000: 0x04000000
reg 0x0001: 0x00178021
reg 0x0002: 0x04000000
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x10000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
PCI: 00:14.0 init finished in 66995 usecs
PCI: 00:14.2 init ...
PCI: 00:14.2 init finished in 999 usecs
PCI: 00:14.3 init ...
RTC Init
PCI: 00:14.3 init finished in 1458 usecs
PCI: 00:14.4 init ...
PCI: 00:14.4 init finished in 998 usecs
PCI: 00:14.5 init ...
PCI: 00:14.5 init finished in 998 usecs
PCI: 00:18.0 init ...
PCI: 00:18.0 init finished in 999 usecs
PCI: 00:18.1 init ...
PCI: 00:18.1 init finished in 999 usecs
PCI: 00:18.2 init ...
PCI: 00:18.2 init finished in 999 usecs
PCI: 00:18.3 init ...
PCI: 00:18.3 init finished in 998 usecs
PCI: 00:18.4 init ...
PCI: 00:18.4 init finished in 998 usecs
PCI: 00:18.5 init ...
PCI: 00:18.5 init finished in 999 usecs
PCI: 01:00.0 init ...
PCI: 01:00.0 init finished in 998 usecs
PCI: 02:00.0 init ...
PCI: 02:00.0 init finished in 999 usecs
PNP: 004e.1 init ...
PNP: 004e.1 init finished in 955 usecs
PNP: 004e.3 init ...
PNP: 004e.3 init finished in 955 usecs
PNP: 004e.4 init ...
Fintek F71869AD Super I/O HWM: Initializing Hardware Monitor..
Fintek F71869AD Super I/O HWM: Base Address at 0x225
PNP: 004e.4 init finished in 6102 usecs
PNP: 004e.5 init ...
PNP: 004e.5 init finished in 955 usecs
PNP: 004e.6 init ...
PNP: 004e.6 init finished in 955 usecs
PNP: 004e.7 init ...
PNP: 004e.7 init finished in 955 usecs
PNP: 004e.a init ...
PNP: 004e.a init finished in 955 usecs
PCI: 03:05.0 init ...
PCI: 03:05.0 init finished in 1000 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 10: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:02.0: enabled 0
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 1
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:10.0: enabled 1
PCI: 00:10.1: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 01:50: enabled 1
I2C: 01:51: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 004e.0: enabled 0
PNP: 004e.1: enabled 1
PNP: 004e.2: enabled 0
PNP: 004e.3: enabled 1
PNP: 004e.4: enabled 1
PNP: 004e.5: enabled 1
PNP: 004e.6: enabled 1
PNP: 004e.7: enabled 1
PNP: 004e.8: enabled 0
PNP: 004e.a: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:14.6: enabled 0
PCI: 00:14.7: enabled 0
PCI: 00:15.0: enabled 0
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
APIC: 11: enabled 1
APIC: 12: enabled 1
APIC: 13: enabled 1
PCI: 01:00.0: enabled 1
PCI: 02:00.0: enabled 1
PCI: 03:05.0: enabled 1
BS: BS_DEV_INIT times (us): entry 0 run 381278 exit 0
Finalize devices...
Devices finalized
APIC 00: ** Enter AmdInitLate [00020004]
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
AmdInitLate() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdInitLate [00020004]
BS: BS_POST_DEVICE times (us): entry 0 run 1739 exit 81561
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 0 exit 0
Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
Writing IRQ routing tables to 0xbfda8000...write_pirq_routing_table done.
PIRQ table: 48 bytes.
Wrote the mp table end at: 000f0410 - 000f0604
Wrote the mp table end at: bfda7010 - bfda7204
MP table: 516 bytes.
CBFS: 'Master Header Locator' located CBFS at [200:7fffc0)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 1dc00 size 1c25
CBFS: 'Master Header Locator' located CBFS at [200:7fffc0)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at bfd83000.
ACPI: * FACS
ACPI: * DSDT
ACPI: * FADT
pm_base: 0x0800
ACPI: added table 1/32, length now 40
ACPI: * SSDT
CBFS: 'Master Header Locator' located CBFS at [200:7fffc0)
CBFS: Locating 'pci1002,990e.rom'
CBFS: Found @ offset 8b280 size f200
In CBFS, ROM address for PCI: 00:01.0 = ff88b4c8
PCI expansion ROM, signature 0xaa55, INIT size 0xf200, data ptr 0x01b4
PCI ROM image, vendor ID 1002, device ID 990e,
PCI ROM image, Class Code 030000, Code Type 00
PCI: 00:01.0: Missing ACPI scope
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: * TCPA
TCPA log created at bfd73000
ACPI: added table 3/32, length now 48
ACPI: * MADT
ACPI: added table 4/32, length now 52
current = bfd85100
CBFS: 'Master Header Locator' located CBFS at [200:7fffc0)
CBFS: Locating 'pci1002,990e.rom'
CBFS: Found @ offset 8b280 size f200
In CBFS, ROM address for PCI: 00:01.0 = ff88b4c8
PCI expansion ROM, signature 0xaa55, INIT size 0xf200, data ptr 0x01b4
PCI ROM image, vendor ID 1002, device ID 990e,
PCI ROM image, Class Code 030000, Code Type 00
ACPI: * VFCT at bfd85100
CBFS: 'Master Header Locator' located CBFS at [200:7fffc0)
CBFS: Locating 'pci1002,990e.rom'
CBFS: Found @ offset 8b280 size f200
In CBFS, ROM address for PCI: 00:01.0 = ff88b4c8
PCI expansion ROM, signature 0xaa55, INIT size 0xf200, data ptr 0x01b4
PCI ROM image, vendor ID 1002, device ID 990e,
PCI ROM image, Class Code 030000, Code Type 00
Copying VBIOS image from ff88b4c8
ACPI: added table 5/32, length now 56
ACPI: * HPET
ACPI: added table 6/32, length now 60
ACPI: added table 7/32, length now 64
ACPI: * IVRS at bfd94580
ACPI: added table 8/32, length now 68
ACPI: * SRAT at bfd945f0
AGESA SRAT table NULL. Skipping.
ACPI: * SLIT at bfd945f0
AGESA SLIT table NULL. Skipping.
ACPI: * AGESA ALIB SSDT at bfd945f0
ACPI: added table 9/32, length now 72
ACPI: * SSDT at bfd94b10
ACPI: added table 10/32, length now 76
ACPI: * SSDT for PState at bfd956ac
ACPI: done.
ACPI tables: 75440 bytes.
smbios_write_tables: bfd72000
Root Device (MSI MS-7721)
CPU_CLUSTER: 0 (AMD Family 15tn Root Complex)
APIC: 10 (AMD CPU Family 15h Model 10h-1Fh)
DOMAIN: 0000 (AMD Family 15tn Root Complex)
PCI: 00:00.0 (AMD FAM15 Northbridge)
PCI: 00:00.2 (AMD FAM15 Northbridge)
PCI: 00:01.0 (AMD FAM15 Northbridge)
PCI: 00:01.1 (AMD FAM15 Northbridge)
PCI: 00:02.0 (AMD FAM15 Northbridge)
PCI: 00:03.0 (AMD FAM15 Northbridge)
PCI: 00:04.0 (AMD FAM15 Northbridge)
PCI: 00:05.0 (AMD FAM15 Northbridge)
PCI: 00:06.0 (AMD FAM15 Northbridge)
PCI: 00:07.0 (AMD FAM15 Northbridge)
PCI: 00:08.0 (AMD FAM15 Northbridge)
PCI: 00:10.0 (ATI HUDSON)
PCI: 00:10.1 (ATI HUDSON)
PCI: 00:11.0 (ATI HUDSON)
PCI: 00:12.0 (ATI HUDSON)
PCI: 00:12.2 (ATI HUDSON)
PCI: 00:13.0 (ATI HUDSON)
PCI: 00:13.2 (ATI HUDSON)
PCI: 00:14.0 (ATI HUDSON)
I2C: 01:50 (unknown)
I2C: 01:51 (unknown)
PCI: 00:14.1 (ATI HUDSON)
PCI: 00:14.2 (ATI HUDSON)
PCI: 00:14.3 (ATI HUDSON)
PNP: 004e.0 (Fintek F71869AD Super I/O)
PNP: 004e.1 (Fintek F71869AD Super I/O)
PNP: 004e.2 (Fintek F71869AD Super I/O)
PNP: 004e.3 (Fintek F71869AD Super I/O)
PNP: 004e.4 (Fintek F71869AD Super I/O)
PNP: 004e.5 (Fintek F71869AD Super I/O)
PNP: 004e.6 (Fintek F71869AD Super I/O)
PNP: 004e.7 (Fintek F71869AD Super I/O)
PNP: 004e.8 (Fintek F71869AD Super I/O)
PNP: 004e.a (Fintek F71869AD Super I/O)
PCI: 00:14.4 (ATI HUDSON)
PCI: 00:14.5 (ATI HUDSON)
PCI: 00:14.6 (ATI HUDSON)
PCI: 00:14.7 (ATI HUDSON)
PCI: 00:15.0 (ATI HUDSON)
PCI: 00:15.1 (ATI HUDSON)
PCI: 00:15.2 (ATI HUDSON)
PCI: 00:15.3 (ATI HUDSON)
PCI: 00:18.0 (AMD FAM15 Northbridge)
PCI: 00:18.1 (AMD FAM15 Northbridge)
PCI: 00:18.2 (AMD FAM15 Northbridge)
PCI: 00:18.3 (AMD FAM15 Northbridge)
PCI: 00:18.4 (AMD FAM15 Northbridge)
PCI: 00:18.5 (AMD FAM15 Northbridge)
APIC: 11 (unknown)
APIC: 12 (unknown)
APIC: 13 (unknown)
PCI: 01:00.0 (unknown)
PCI: 02:00.0 (unknown)
PCI: 03:05.0 (unknown)
SMBIOS tables: 342 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum b003
Writing coreboot table at 0xbfda9000
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000c0000-00000000bfd71fff: RAM
3. 00000000bfd72000-00000000bfffffff: CONFIGURATION TABLES
4. 00000000c0000000-00000000dfffffff: RESERVED
5. 00000000f8000000-00000000fbffffff: RESERVED
6. 0000000100000000-000000019effffff: RAM
CBFS: 'Master Header Locator' located CBFS at [200:7fffc0)
FMAP: Found "FLASH" version 1.1 at 0.
FMAP: base = ff800000 size = 800000 #areas = 3
Wrote coreboot table at: bfda9000, 0x334 bytes, checksum 889f
coreboot table: 844 bytes.
IMD ROOT 0. bffff000 00001000
IMD SMALL 1. bfffe000 00001000
CONSOLE 2. bffde000 00020000
TIME STAMP 3. bffdd000 00000400
ROMSTG STCK 4. bffc5000 00018000
AFTER CAR 5. bffbc000 00009000
57a9e102 6. bffb4000 00007170
RAMSTAGE 7. bfeb2000 00102000
57a9e100 8. bfdb1000 001005f0
COREBOOT 9. bfda9000 00008000
IRQ TABLE 10. bfda8000 00001000
SMP TABLE 11. bfda7000 00001000
ACPI 12. bfd83000 00024000
TCPA LOG 13. bfd73000 00010000
SMBIOS 14. bfd72000 00000800
IMD small region:
IMD ROOT 0. bfffec00 00000400
ROMSTAGE 1. bfffebe0 00000004
57a9e002 2. bfffebc0 00000018
57a9e000 3. bfffeba0 00000018
COREBOOTFWD 4. bfffeb60 00000028
BS: BS_WRITE_TABLES times (us): entry 8 run 273392 exit 0
CBFS: 'Master Header Locator' located CBFS at [200:7fffc0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset a6300 size 10a46
Loading segment from ROM address 0xff8a6538
code (compression=1)
New segment dstaddr 0xe0520 memsize 0x1fae0 srcaddr 0xff8a6570 filesize 0x10a0e
Loading segment from ROM address 0xff8a6554
Entry Point 0x000fd234
Loading Segment: addr: 0x00000000000e0520 memsz: 0x000000000001fae0 filesz: 0x0000000000010a0e
lb: [0x00000000bfeb3000, 0x00000000bffb35f0)
Post relocation: addr: 0x00000000000e0520 memsz: 0x000000000001fae0 filesz: 0x0000000000010a0e
using LZMA
[ 0x000e0520, 00100000, 0x00100000) <- ff8a6570
dest 000e0520, end 00100000, bouncebuffer ffffffff
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 44583 exit 0
Jumping to boot code at 000fd234(bfda9000)
CPU0: stack: bfeed000 - bfeee000, lowest used address bfeed52c, stack used: 2772 bytes
SeaBIOS (version rel-1.11.1-0-g0551a4b)
BUILD: gcc: (coreboot toolchain v1.50 October 15th, 2017) 6.3.0 binutils: (GNU Binutils) 2.29.1
Found coreboot cbmem console @ bffde000
Found mainboard MSI MS-7721
Relocating init from 0x000e1b60 to 0xbfd25320 (size 52288)
Found CBFS header at 0xff800238
multiboot: eax=bfee7000, ebx=bfee6fb4
Found 27 PCI devices (max PCI bus is 03)
Copying SMBIOS entry point from 0xbfd72000 to 0x000f61e0
Copying ACPI RSDP from 0xbfd83000 to 0x000f61b0
Copying MPTABLE from 0xbfda7000/bfda7010 to 0x000f5fa0
Copying PIR from 0xbfda8000 to 0x000f5f70
Using pmtimer, ioport 0x818
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.11.1-0-g0551a4b)
XHCI init on dev 00:10.0: regs @ 0xf04c8000, 4 ports, 32 slots, 32 byte contexts
XHCI extcap 0x1 @ 0xf04c8500
XHCI protocol USB 3.00, 2 ports (offset 1), def 0
XHCI protocol USB 2.00, 2 ports (offset 3), def 0
XHCI init on dev 00:10.1: regs @ 0xf04ca000, 4 ports, 32 slots, 32 byte contexts
XHCI extcap 0x1 @ 0xf04ca500
XHCI protocol USB 3.00, 2 ports (offset 1), def 0
XHCI protocol USB 2.00, 2 ports (offset 3), def 0
EHCI init on dev 00:12.2 (regs=0xf04d0020)
EHCI init on dev 00:13.2 (regs=0xf04d1020)
OHCI init on dev 00:12.0 (regs=0xf04cc000)
OHCI init on dev 00:13.0 (regs=0xf04cd000)
OHCI init on dev 00:14.5 (regs=0xf04ce000)
AHCI controller at 00:11.0, iobase 0xf04cf000, irq 0
Found 1 lpt ports
Found 1 serial ports
Searching bootorder for: /rom@img/memtest
Searching bootorder for: /rom@img/coreinfo
Got ps2 nak (status=51)
XHCI no devices found
XHCI no devices found
USB keyboard initialized
Initialized USB HUB (1 ports used)
Searching bootorder for: /pci@i0cf8/*@11/drive@0/disk@0
AHCI/0: Set transfer mode to UDMA-6
AHCI/0: registering: "AHCI/0: Hitachi HUA722010CLA331 ATA-8 Hard-Disk (931 GiBytes)"
All threads complete.
Scan for option roms
Press ESC for boot menu.
Searching bootorder for: HALT
drive 0x000f5f00: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=1953525168
Space available for UMB: cf800-ed000, f5a00-f5f00
Returned 249856 bytes of ZoneHigh
e820 map has 7 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 00000000bfd6f000 = 1 RAM
4: 00000000bfd6f000 - 00000000e0000000 = 2 RESERVED
5: 00000000f8000000 - 00000000fc000000 = 2 RESERVED
6: 0000000100000000 - 000000019f000000 = 1 RAM
enter handle_19:
NULL
Booting from Hard Disk...
Booting from 0000:7c00