CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffa38/0x100000
CBFS: CBFS location: 0x0~0xffa40, align: 64
CBFS: Looking for 'cmos_layout.bin' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS: Found file (offset=0x28, len=2704).
POST: 0x39
coreboot-4.0-8040-g9d821a4-dirty Tue Feb  3 13:50:08 CST 2015 booting...
POST: 0x40
profiling:/home/eldarion/coreboot/coreboot/build/superio/winbond/w83627thg/superio.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/superio/common/conf_mode.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/southbridge/nvidia/ck804/ck804.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/southbridge/nvidia/ck804/fadt.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/southbridge/nvidia/ck804/ht.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/southbridge/nvidia/ck804/ide.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/southbridge/nvidia/ck804/lpc.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/southbridge/nvidia/ck804/nic.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/southbridge/nvidia/ck804/pci.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/southbridge/nvidia/ck804/pcie.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/southbridge/nvidia/ck804/reset.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/southbridge/nvidia/ck804/sata.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/southbridge/nvidia/ck804/smbus.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/southbridge/nvidia/ck804/usb.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/southbridge/nvidia/ck804/usb2.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/northbridge/amd/amdfam10/acpi.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/northbridge/amd/amdfam10/get_pci1234.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/northbridge/amd/amdfam10/misc_control.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/northbridge/amd/amdfam10/northbridge.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/mainboard/asus/kfsn4-dre/acpi_tables.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/mainboard/asus/kfsn4-dre/get_bus_conf.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/mainboard/asus/kfsn4-dre/mptable.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/loaders/cbfs_payload_loader.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/loaders/load_and_run_payload.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/bootmem.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/bootmode.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/cbfs.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/cbfs_core.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/cbmem_common.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/cbmem_console.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/clog2.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/compute_ip_checksum.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/coreboot_table.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/delay.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/dynamic_cbmem.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/fallback_boot.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/gcc.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/halt.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/hardwaremain.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/hexdump.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/libgcov.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/lzma.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/lzmadecode.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/malloc.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/memchr.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/memcmp.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/memrange.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/selfboot.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/stack.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/lib/timestamp.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/drivers/xgi/z9s/z9s.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/drivers/xgi/common/vb_init.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/drivers/xgi/common/vb_setmode.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/drivers/xgi/common/vb_util.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/drivers/xgi/common/xgi_coreboot.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/drivers/uart/uart8250io.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/drivers/uart/util.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/drivers/pc80/vga/vga.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/drivers/pc80/vga/vga_io.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/drivers/pc80/i8254.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/drivers/pc80/i8259.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/drivers/pc80/isa-dma.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/drivers/pc80/keyboard.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/drivers/pc80/mc146818rtc.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/drivers/intel/wifi/wifi.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/device/cardbus_device.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/device/cpu_device.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/device/device.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/device/device_util.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/device/hypertransport.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/device/pci_device.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/device/pci_ops.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/device/pciexp_device.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/device/pcix_device.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/device/pnp_device.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/device/root_device.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/device/smbus_ops.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/cpu/x86/mtrr/mtrr.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/cpu/x86/lapic/apic_timer.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/cpu/x86/lapic/boot_cpu.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/cpu/x86/lapic/lapic.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/cpu/x86/lapic/lapic_cpu_init.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/cpu/x86/cache/cache.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/cpu/amd/quadcore/amd_sibling.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/cpu/amd/mtrr/amd_mtrr.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/cpu/amd/model_10xxx/model_10xxx_init.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/cpu/amd/model_10xxx/powernow_acpi.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/cpu/amd/model_10xxx/processor_name.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/cpu/amd/microcode/microcode.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/console/console.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/console/die.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/console/init.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/console/post.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/console/printk.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/console/vsprintf.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/console/vtxprintf.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/lib/cpu.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/lib/ebda.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/lib/exception.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/lib/ioapic.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/lib/memcpy.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/lib/memmove.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/lib/memset.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/lib/pci_ops_conf1.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/lib/pci_ops_mmconf.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/lib/rom_media.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/lib/timestamp.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/boot/acpi.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/boot/acpigen.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/boot/boot.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/boot/cbmem.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/boot/gdt.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/boot/mpspec.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/boot/smbios.ramstage.gcda:Version mismatch - expected 407* got 408*
profiling:/home/eldarion/coreboot/coreboot/build/arch/x86/boot/tables.ramstage.gcda:Version mismatch - expected 407* got 408*
POST: 0x70
POST: 0x71
POST: 0x72
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PNP: 002e.0: enabled 1
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.7: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.9: enabled 1
PNP: 002e.a: enabled 0
PNP: 002e.b: enabled 1
PCI: 00:01.1: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
I2C: 00:52: enabled 1
I2C: 00:53: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:02.1: enabled 1
PCI: 00:04.0: enabled 0
PCI: 00:04.1: enabled 0
PCI: 00:06.0: enabled 1
PCI: 00:07.0: enabled 1
PCI: 00:08.0: enabled 1
PCI: 00:09.0: enabled 1
PCI: 00:04.0: enabled 1
PCI: 00:0a.0: enabled 0
PCI: 00:0b.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:0c.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:0d.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:0e.0: enabled 1
PCI: 00:0f.0: enabled 0
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 1
PCI: 00:19.2: enabled 1
PCI: 00:19.3: enabled 1
PCI: 00:19.4: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
 DOMAIN: 0000: enabled 1
  PCI: 00:18.0: enabled 1
   PCI: 00:00.0: enabled 1
   PCI: 00:01.0: enabled 1
    PNP: 002e.0: enabled 1
    PNP: 002e.1: enabled 0
    PNP: 002e.2: enabled 1
    PNP: 002e.3: enabled 1
    PNP: 002e.5: enabled 1
    PNP: 002e.7: enabled 0
    PNP: 002e.8: enabled 0
    PNP: 002e.9: enabled 1
    PNP: 002e.a: enabled 0
    PNP: 002e.b: enabled 1
   PCI: 00:01.1: enabled 1
    I2C: 00:50: enabled 1
    I2C: 00:51: enabled 1
    I2C: 00:52: enabled 1
    I2C: 00:53: enabled 1
    I2C: 00:54: enabled 1
    I2C: 00:55: enabled 1
    I2C: 00:56: enabled 1
    I2C: 00:57: enabled 1
   PCI: 00:02.0: enabled 1
   PCI: 00:02.1: enabled 1
   PCI: 00:04.0: enabled 0
   PCI: 00:04.1: enabled 0
   PCI: 00:06.0: enabled 1
   PCI: 00:07.0: enabled 1
   PCI: 00:08.0: enabled 1
   PCI: 00:09.0: enabled 1
    PCI: 00:04.0: enabled 1
   PCI: 00:0a.0: enabled 0
   PCI: 00:0b.0: enabled 1
    PCI: 00:00.0: enabled 1
   PCI: 00:0c.0: enabled 1
    PCI: 00:00.0: enabled 1
   PCI: 00:0d.0: enabled 1
    PCI: 00:00.0: enabled 1
   PCI: 00:0e.0: enabled 1
   PCI: 00:0f.0: enabled 0
  PCI: 00:18.1: enabled 1
  PCI: 00:18.2: enabled 1
  PCI: 00:18.3: enabled 1
  PCI: 00:18.4: enabled 1
  PCI: 00:19.0: enabled 1
  PCI: 00:19.1: enabled 1
  PCI: 00:19.2: enabled 1
  PCI: 00:19.3: enabled 1
  PCI: 00:19.4: enabled 1
scan_static_bus for Root Device
setup_bsp_ramtop, TOP MEM: msr.lo = 0x40000000, msr.hi = 0x00000000
setup_bsp_ramtop, TOP MEM2: msr.lo = 0x00000000, msr.hi = 0x00000000
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
CPU_CLUSTER: 0 scanning...
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffa38/0x100000
CBFS: CBFS location: 0x0~0xffa40, align: 64
CBFS: Looking for 'cmos_layout.bin' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS: Found file (offset=0x28, len=2704).
  PCI: 00:18.3 siblings=5
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
CPU: APIC: 02 enabled
CPU: APIC: 03 enabled
CPU: APIC: 04 enabled
CPU: APIC: 05 enabled
  PCI: 00:19.3 siblings=5
CPU: APIC: 08 enabled
CPU: APIC: 09 enabled
CPU: APIC: 0a enabled
CPU: APIC: 0b enabled
CPU: APIC: 0c enabled
CPU: APIC: 0d enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:18.0 [1022/1200] bus ops
PCI: 00:18.0 [1022/1200] enabled
PCI: 00:18.1 [1022/1201] enabled
PCI: 00:18.2 [1022/1202] enabled
PCI: 00:18.3 [1022/1203] ops
PCI: 00:18.3 [1022/1203] enabled
PCI: 00:18.4 [1022/1204] enabled
PCI: 00:19.0 [1022/1200] bus ops
PCI: 00:19.0 [1022/1200] enabled
PCI: 00:19.1 [1022/1201] enabled
PCI: 00:19.2 [1022/1202] enabled
PCI: 00:19.3 [1022/1203] ops
PCI: 00:19.3 [1022/1203] enabled
PCI: 00:19.4 [1022/1204] enabled
POST: 0x25
PCI: 00:00.0 [10de/005e] ops
PCI: 00:00.0 [10de/005e] enabled
Capability: type 0x08 @ 0x44
flags: 0x01e0
PCI: 00:00.0 count: 000f static_count: 0010
PCI: 00:00.0 [10de/005e] enabled next_unitid: 0010
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [10de/005e] enabled
PCI: 00:01.0 [10de/0051] bus ops
PCI: 00:01.0 [10de/0051] enabled
PCI: 00:01.1 [10de/0052] bus ops
PCI: 00:01.1 [10de/0052] enabled
PCI: 00:02.0 [10de/005a] ops
PCI: 00:02.0 [10de/005a] enabled
PCI: 00:02.1 [10de/005b] ops
PCI: 00:02.1 [10de/005b] enabled
PCI: 00:04.0 [10de/0059] ops
PCI: 00:04.0 [10de/0059] disabled
PCI: 00:04.1 [10de/0058] ops
PCI: 00:04.1 [10de/0058] disabled
PCI: 00:06.0 [10de/0053] ops
PCI: 00:06.0 [10de/0053] enabled
PCI: 00:07.0 [10de/0054] ops
PCI: 00:07.0 [10de/0054] enabled
PCI: 00:08.0 [10de/0055] ops
PCI: 00:08.0 [10de/0055] enabled
PCI: 00:09.0 [10de/005c] bus ops
PCI: 00:09.0 [10de/005c] enabled
PCI: 00:0b.0 [10de/005d] bus ops
PCI: 00:0b.0 [10de/005d] enabled
PCI: 00:0c.0 [10de/005d] bus ops
PCI: 00:0c.0 [10de/005d] enabled
PCI: 00:0d.0 [10de/005d] bus ops
PCI: 00:0d.0 [10de/005d] enabled
PCI: 00:0e.0 [10de/005d] bus ops
PCI: 00:0e.0 [10de/005d] enabled
POST: 0x25
scan_static_bus for PCI: 00:01.0
PNP: 002e.0 enabled
PNP: 002e.1 disabled
PNP: 002e.2 enabled
PNP: 002e.3 enabled
PNP: 002e.5 enabled
PNP: 002e.7 disabled
PNP: 002e.8 disabled
PNP: 002e.9 enabled
PNP: 002e.a disabled
PNP: 002e.b enabled
scan_static_bus for PCI: 00:01.0 done
scan_static_bus for PCI: 00:01.1
smbus: PCI: 00:01.1[0]->I2C: 01:50 enabled
smbus: PCI: 00:01.1[0]->I2C: 01:51 enabled
smbus: PCI: 00:01.1[0]->I2C: 01:52 enabled
smbus: PCI: 00:01.1[0]->I2C: 01:53 enabled
smbus: PCI: 00:01.1[0]->I2C: 01:54 enabled
smbus: PCI: 00:01.1[0]->I2C: 01:55 enabled
smbus: PCI: 00:01.1[0]->I2C: 01:56 enabled
smbus: PCI: 00:01.1[0]->I2C: 01:57 enabled
scan_static_bus for PCI: 00:01.1 done
do_pci_scan_bridge for PCI: 00:09.0
PCI: pci_scan_bus for bus 01
POST: 0x24
PCI: 01:04.0 [18ca/0020] ops
PCI: 01:04.0 [18ca/0020] enabled
POST: 0x25
PCI: pci_scan_bus returning with max=001
POST: 0x55
do_pci_scan_bridge returns max 1
do_pci_scan_bridge for PCI: 00:0b.0
PCI: pci_scan_bus for bus 02
POST: 0x24
PCI: 02:00.0 [14e4/1659] enabled
POST: 0x25
PCI: pci_scan_bus returning with max=002
POST: 0x55
do_pci_scan_bridge returns max 2
do_pci_scan_bridge for PCI: 00:0c.0
PCI: pci_scan_bus for bus 03
POST: 0x24
PCI: 03:00.0 [14e4/1659] enabled
POST: 0x25
PCI: pci_scan_bus returning with max=003
POST: 0x55
do_pci_scan_bridge returns max 3
do_pci_scan_bridge for PCI: 00:0d.0
PCI: pci_scan_bus for bus 04
POST: 0x24
PCI: Static device PCI: 04:00.0 not found, disabling it.
POST: 0x25
PCI: pci_scan_bus returning with max=004
POST: 0x55
do_pci_scan_bridge returns max 4
do_pci_scan_bridge for PCI: 00:0e.0
PCI: pci_scan_bus for bus 05
POST: 0x24
POST: 0x25
PCI: pci_scan_bus returning with max=005
POST: 0x55
do_pci_scan_bridge returns max 5
PCI: pci_scan_bus returning with max=005
POST: 0x55
PCI: pci_scan_bus returning with max=005
POST: 0x55
DOMAIN: 0000 passpw: enabled
DOMAIN: 0000 passpw: enabled
scan_static_bus for Root Device done
done
POST: 0x73
found VGA at PCI: 01:04.0
Setting up VGA for PCI: 01:04.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:09.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
APIC: 01 missing read_resources
APIC: 02 missing read_resources
APIC: 03 missing read_resources
APIC: 04 missing read_resources
APIC: 05 missing read_resources
APIC: 08 missing read_resources
APIC: 09 missing read_resources
APIC: 0a missing read_resources
APIC: 0b missing read_resources
APIC: 0c missing read_resources
APIC: 0d missing read_resources
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1
PCI: 00:01.0 read_resources bus 0 link: 0
PCI: 00:01.0 read_resources bus 0 link: 0 done
PCI: 00:01.1 read_resources bus 1 link: 0
I2C: 01:50 missing read_resources
I2C: 01:51 missing read_resources
I2C: 01:52 missing read_resources
I2C: 01:53 missing read_resources
I2C: 01:54 missing read_resources
I2C: 01:55 missing read_resources
I2C: 01:56 missing read_resources
I2C: 01:57 missing read_resources
PCI: 00:01.1 read_resources bus 1 link: 0 done
PCI: 00:01.1 read_resources bus 0 link: 1
PCI: 00:01.1 read_resources bus 0 link: 1 done
PCI: 00:09.0 read_resources bus 1 link: 0
PCI: 00:09.0 read_resources bus 1 link: 0 done
PCI: 00:0b.0 read_resources bus 2 link: 0
PCI: 00:0b.0 read_resources bus 2 link: 0 done
PCI: 00:0c.0 read_resources bus 3 link: 0
PCI: 00:0c.0 read_resources bus 3 link: 0 done
PCI: 00:0d.0 read_resources bus 4 link: 0
PCI: 00:0d.0 read_resources bus 4 link: 0 done
PCI: 00:0e.0 read_resources bus 5 link: 0
PCI: 00:0e.0 read_resources bus 5 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1 done
PCI: 00:18.0 read_resources bus 0 link: 2
PCI: 00:18.0 read_resources bus 0 link: 2 done
PCI: 00:18.0 read_resources bus 0 link: 3
PCI: 00:18.0 read_resources bus 0 link: 3 done
PCI: 00:18.0 read_resources bus 0 link: 4
PCI: 00:18.0 read_resources bus 0 link: 4 done
PCI: 00:18.0 read_resources bus 0 link: 5
PCI: 00:18.0 read_resources bus 0 link: 5 done
PCI: 00:18.0 read_resources bus 0 link: 6
PCI: 00:18.0 read_resources bus 0 link: 6 done
PCI: 00:18.0 read_resources bus 0 link: 7
PCI: 00:18.0 read_resources bus 0 link: 7 done
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffa38/0x100000
CBFS: CBFS location: 0x0~0xffa40, align: 64
CBFS: Looking for 'cmos_layout.bin' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS: Found file (offset=0x28, len=2704).
PCI: 00:19.0 read_resources bus 0 link: 0
PCI: 00:19.0 read_resources bus 0 link: 0 done
PCI: 00:19.0 read_resources bus 0 link: 1
PCI: 00:19.0 read_resources bus 0 link: 1 done
PCI: 00:19.0 read_resources bus 0 link: 2
PCI: 00:19.0 read_resources bus 0 link: 2 done
PCI: 00:19.0 read_resources bus 0 link: 3
PCI: 00:19.0 read_resources bus 0 link: 3 done
PCI: 00:19.0 read_resources bus 0 link: 4
PCI: 00:19.0 read_resources bus 0 link: 4 done
PCI: 00:19.0 read_resources bus 0 link: 5
PCI: 00:19.0 read_resources bus 0 link: 5 done
PCI: 00:19.0 read_resources bus 0 link: 6
PCI: 00:19.0 read_resources bus 0 link: 6 done
PCI: 00:19.0 read_resources bus 0 link: 7
PCI: 00:19.0 read_resources bus 0 link: 7 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: 01
   APIC: 02
   APIC: 03
   APIC: 04
   APIC: 05
   APIC: 08
   APIC: 09
   APIC: 0a
   APIC: 0b
   APIC: 0c
   APIC: 0d
  DOMAIN: 0000 child on link 0 PCI: 00:18.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
  DOMAIN: 0000 resource base 0 size 40000000 align 0 gran 0 limit 0 flags e0004200 index 7
   PCI: 00:18.0
   PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 110d8
   PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 110b8
   PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 110b0
    PCI: 00:00.0
    PCI: 00:01.0 child on link 0 PNP: 002e.0
    PCI: 00:01.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 10
    PCI: 00:01.0 resource base fec00000 size 1000 align 12 gran 12 limit ffffffff flags c0000200 index 14
    PCI: 00:01.0 resource base fed00000 size 1000 align 12 gran 12 limit ffffffff flags c0000200 index 44
    PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 60
    PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 64
    PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 68
    PCI: 00:01.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
    PCI: 00:01.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
     PNP: 002e.0
     PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
     PNP: 002e.1
     PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
     PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
     PNP: 002e.2
     PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.3
     PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000500 index f1
     PNP: 002e.5
     PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
     PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
     PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
     PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0
     PNP: 002e.7
     PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
     PNP: 002e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62
     PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.8
     PNP: 002e.9
     PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30
     PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0
     PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1
     PNP: 002e.a
     PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.b
     PNP: 002e.b resource base 290 size 8 align 3 gran 3 limit fff flags c0000100 index 60
     PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PCI: 00:01.1 child on link 0 I2C: 01:50
    PCI: 00:01.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 10
    PCI: 00:01.1 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
    PCI: 00:01.1 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 24
     I2C: 01:50
     I2C: 01:51
     I2C: 01:52
     I2C: 01:53
     I2C: 01:54
     I2C: 01:55
     I2C: 01:56
     I2C: 01:57
    PCI: 00:02.0
    PCI: 00:02.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
    PCI: 00:02.1
    PCI: 00:02.1 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
    PCI: 00:04.0
    PCI: 00:04.1
    PCI: 00:06.0
    PCI: 00:06.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
    PCI: 00:07.0
    PCI: 00:07.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
    PCI: 00:07.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
    PCI: 00:07.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
    PCI: 00:07.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
    PCI: 00:07.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
    PCI: 00:07.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 24
    PCI: 00:08.0
    PCI: 00:08.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
    PCI: 00:08.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
    PCI: 00:08.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
    PCI: 00:08.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
    PCI: 00:08.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
    PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 24
    PCI: 00:09.0 child on link 0 PCI: 01:04.0
    PCI: 00:09.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
    PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
    PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
     PCI: 01:04.0
     PCI: 01:04.0 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 1200 index 10
     PCI: 01:04.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 14
     PCI: 01:04.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 18
    PCI: 00:0a.0
    PCI: 00:0b.0 child on link 0 PCI: 02:00.0
    PCI: 00:0b.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
    PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
    PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
     PCI: 02:00.0
     PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
    PCI: 00:0c.0 child on link 0 PCI: 03:00.0
    PCI: 00:0c.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
    PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
    PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
     PCI: 03:00.0
     PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
    PCI: 00:0d.0 child on link 0 PCI: 04:00.0
    PCI: 00:0d.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
    PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
    PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
     PCI: 04:00.0
    PCI: 00:0e.0
    PCI: 00:0e.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
    PCI: 00:0e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
    PCI: 00:0e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 00:0f.0
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.4
   PCI: 00:19.0
   PCI: 00:19.1
   PCI: 00:19.2
   PCI: 00:19.3
   PCI: 00:19.4
DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:09.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 01:04.0 18 *  [0x0 - 0x7f] io
PCI: 00:09.0 compute_resources_io: base: 80 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:0b.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:0b.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:0c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:0c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:0d.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:0d.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:0e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:0e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:09.0 1c *  [0x0 - 0xfff] io
PCI: 00:01.0 60 *  [0x1000 - 0x10ff] io
PCI: 00:01.0 64 *  [0x1400 - 0x14ff] io
PCI: 00:01.0 68 *  [0x1800 - 0x18ff] io
PCI: 00:01.0 10 *  [0x1c00 - 0x1c7f] io
PCI: 00:01.1 20 *  [0x1c80 - 0x1cbf] io
PCI: 00:01.1 24 *  [0x1cc0 - 0x1cff] io
PCI: 00:01.1 10 *  [0x2000 - 0x201f] io
PCI: 00:06.0 20 *  [0x2020 - 0x202f] io
PCI: 00:07.0 20 *  [0x2030 - 0x203f] io
PCI: 00:08.0 20 *  [0x2040 - 0x204f] io
PCI: 00:07.0 10 *  [0x2050 - 0x2057] io
PCI: 00:07.0 18 *  [0x2058 - 0x205f] io
PCI: 00:08.0 10 *  [0x2060 - 0x2067] io
PCI: 00:08.0 18 *  [0x2068 - 0x206f] io
PCI: 00:07.0 14 *  [0x2070 - 0x2073] io
PCI: 00:07.0 1c *  [0x2074 - 0x2077] io
PCI: 00:08.0 14 *  [0x2078 - 0x207b] io
PCI: 00:08.0 1c *  [0x207c - 0x207f] io
PCI: 00:18.0 compute_resources_io: base: 2080 size: 3000 align: 12 gran: 12 limit: ffff done
PCI: 00:18.0 110d8 *  [0x0 - 0x2fff] io
DOMAIN: 0000 compute_resources_io: base: 3000 size: 3000 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
PCI: 00:09.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:04.0 10 *  [0x0 - 0x3ffffff] prefmem
PCI: 00:09.0 compute_resources_prefmem: base: 4000000 size: 4000000 align: 26 gran: 20 limit: ffffffff done
PCI: 00:0b.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:0b.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:0c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:0c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:0d.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:0d.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:0e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:0e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:09.0 24 *  [0x0 - 0x3ffffff] prefmem
PCI: 00:18.0 compute_resources_prefmem: base: 4000000 size: 4000000 align: 26 gran: 20 limit: ffffffff done
PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
PCI: 00:09.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:04.0 14 *  [0x0 - 0x3ffff] mem
PCI: 00:09.0 compute_resources_mem: base: 40000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:0b.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 10 *  [0x0 - 0xffff] mem
PCI: 00:0b.0 compute_resources_mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:0c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 03:00.0 10 *  [0x0 - 0xffff] mem
PCI: 00:0c.0 compute_resources_mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:0d.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:0d.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:0e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:0e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:09.0 20 *  [0x0 - 0xfffff] mem
PCI: 00:0b.0 20 *  [0x100000 - 0x1fffff] mem
PCI: 00:0c.0 20 *  [0x200000 - 0x2fffff] mem
PCI: 00:02.0 10 *  [0x300000 - 0x300fff] mem
PCI: 00:07.0 24 *  [0x301000 - 0x301fff] mem
PCI: 00:08.0 24 *  [0x302000 - 0x302fff] mem
PCI: 00:02.1 10 *  [0x303000 - 0x3030ff] mem
PCI: 00:18.0 compute_resources_mem: base: 303100 size: 400000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:18.0 110b8 *  [0x0 - 0x3ffffff] prefmem
PCI: 00:18.0 110b0 *  [0x4000000 - 0x43fffff] mem
DOMAIN: 0000 compute_resources_mem: base: 4400000 size: 4400000 align: 26 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: DOMAIN: 0000
constrain_resources: PCI: 00:18.0
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:01.0
constrain_resources: PNP: 002e.0
constrain_resources: PNP: 002e.2
constrain_resources: PNP: 002e.3
constrain_resources: PNP: 002e.5
constrain_resources: PNP: 002e.9
constrain_resources: PNP: 002e.b
constrain_resources: PCI: 00:01.1
constrain_resources: I2C: 01:50
constrain_resources: I2C: 01:51
constrain_resources: I2C: 01:52
constrain_resources: I2C: 01:53
constrain_resources: I2C: 01:54
constrain_resources: I2C: 01:55
constrain_resources: I2C: 01:56
constrain_resources: I2C: 01:57
constrain_resources: PCI: 00:02.0
constrain_resources: PCI: 00:02.1
constrain_resources: PCI: 00:06.0
constrain_resources: PCI: 00:07.0
constrain_resources: PCI: 00:08.0
constrain_resources: PCI: 00:09.0
constrain_resources: PCI: 01:04.0
constrain_resources: PCI: 00:0b.0
constrain_resources: PCI: 02:00.0
constrain_resources: PCI: 00:0c.0
constrain_resources: PCI: 03:00.0
constrain_resources: PCI: 00:0d.0
constrain_resources: PCI: 00:0e.0
constrain_resources: PCI: 00:18.1
constrain_resources: PCI: 00:18.2
constrain_resources: PCI: 00:18.3
constrain_resources: PCI: 00:18.4
constrain_resources: PCI: 00:19.0
constrain_resources: PCI: 00:19.1
constrain_resources: PCI: 00:19.2
constrain_resources: PCI: 00:19.3
constrain_resources: PCI: 00:19.4
avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff
	lim->base 00001000 lim->limit 0000ffff
avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff
	lim->base 40000000 lim->limit dfffffff
Setting resources...
DOMAIN: 0000 allocate_resources_io: base:1000 size:3000 align:12 gran:0 limit:ffff
Assigned: PCI: 00:18.0 110d8 *  [0x1000 - 0x3fff] io
DOMAIN: 0000 allocate_resources_io: next_base: 4000 size: 3000 align: 12 gran: 0 done
PCI: 00:18.0 allocate_resources_io: base:1000 size:3000 align:12 gran:12 limit:ffff
Assigned: PCI: 00:09.0 1c *  [0x1000 - 0x1fff] io
Assigned: PCI: 00:01.0 60 *  [0x2000 - 0x20ff] io
Assigned: PCI: 00:01.0 64 *  [0x2400 - 0x24ff] io
Assigned: PCI: 00:01.0 68 *  [0x2800 - 0x28ff] io
Assigned: PCI: 00:01.0 10 *  [0x2c00 - 0x2c7f] io
Assigned: PCI: 00:01.1 20 *  [0x2c80 - 0x2cbf] io
Assigned: PCI: 00:01.1 24 *  [0x2cc0 - 0x2cff] io
Assigned: PCI: 00:01.1 10 *  [0x3000 - 0x301f] io
Assigned: PCI: 00:06.0 20 *  [0x3020 - 0x302f] io
Assigned: PCI: 00:07.0 20 *  [0x3030 - 0x303f] io
Assigned: PCI: 00:08.0 20 *  [0x3040 - 0x304f] io
Assigned: PCI: 00:07.0 10 *  [0x3050 - 0x3057] io
Assigned: PCI: 00:07.0 18 *  [0x3058 - 0x305f] io
Assigned: PCI: 00:08.0 10 *  [0x3060 - 0x3067] io
Assigned: PCI: 00:08.0 18 *  [0x3068 - 0x306f] io
Assigned: PCI: 00:07.0 14 *  [0x3070 - 0x3073] io
Assigned: PCI: 00:07.0 1c *  [0x3074 - 0x3077] io
Assigned: PCI: 00:08.0 14 *  [0x3078 - 0x307b] io
Assigned: PCI: 00:08.0 1c *  [0x307c - 0x307f] io
PCI: 00:18.0 allocate_resources_io: next_base: 3080 size: 3000 align: 12 gran: 12 done
PCI: 00:09.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff
Assigned: PCI: 01:04.0 18 *  [0x1000 - 0x107f] io
PCI: 00:09.0 allocate_resources_io: next_base: 1080 size: 1000 align: 12 gran: 12 done
PCI: 00:0b.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:0b.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:0c.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:0c.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:0d.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:0d.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:0e.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:0e.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 allocate_resources_mem: base:d8000000 size:4400000 align:26 gran:0 limit:dfffffff
Assigned: PCI: 00:18.0 110b8 *  [0xd8000000 - 0xdbffffff] prefmem
Assigned: PCI: 00:18.0 110b0 *  [0xdc000000 - 0xdc3fffff] mem
DOMAIN: 0000 allocate_resources_mem: next_base: dc400000 size: 4400000 align: 26 gran: 0 done
PCI: 00:18.0 allocate_resources_prefmem: base:d8000000 size:4000000 align:26 gran:20 limit:dfffffff
Assigned: PCI: 00:09.0 24 *  [0xd8000000 - 0xdbffffff] prefmem
PCI: 00:18.0 allocate_resources_prefmem: next_base: dc000000 size: 4000000 align: 26 gran: 20 done
PCI: 00:09.0 allocate_resources_prefmem: base:d8000000 size:4000000 align:26 gran:20 limit:dfffffff
Assigned: PCI: 01:04.0 10 *  [0xd8000000 - 0xdbffffff] prefmem
PCI: 00:09.0 allocate_resources_prefmem: next_base: dc000000 size: 4000000 align: 26 gran: 20 done
PCI: 00:0b.0 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
PCI: 00:0b.0 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
PCI: 00:0c.0 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
PCI: 00:0c.0 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
PCI: 00:0d.0 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
PCI: 00:0d.0 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
PCI: 00:0e.0 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
PCI: 00:0e.0 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
PCI: 00:18.0 allocate_resources_mem: base:dc000000 size:400000 align:20 gran:20 limit:dfffffff
Assigned: PCI: 00:09.0 20 *  [0xdc000000 - 0xdc0fffff] mem
Assigned: PCI: 00:0b.0 20 *  [0xdc100000 - 0xdc1fffff] mem
Assigned: PCI: 00:0c.0 20 *  [0xdc200000 - 0xdc2fffff] mem
Assigned: PCI: 00:02.0 10 *  [0xdc300000 - 0xdc300fff] mem
Assigned: PCI: 00:07.0 24 *  [0xdc301000 - 0xdc301fff] mem
Assigned: PCI: 00:08.0 24 *  [0xdc302000 - 0xdc302fff] mem
Assigned: PCI: 00:02.1 10 *  [0xdc303000 - 0xdc3030ff] mem
PCI: 00:18.0 allocate_resources_mem: next_base: dc303100 size: 400000 align: 20 gran: 20 done
PCI: 00:09.0 allocate_resources_mem: base:dc000000 size:100000 align:20 gran:20 limit:dfffffff
Assigned: PCI: 01:04.0 14 *  [0xdc000000 - 0xdc03ffff] mem
PCI: 00:09.0 allocate_resources_mem: next_base: dc040000 size: 100000 align: 20 gran: 20 done
PCI: 00:0b.0 allocate_resources_mem: base:dc100000 size:100000 align:20 gran:20 limit:dfffffff
Assigned: PCI: 02:00.0 10 *  [0xdc100000 - 0xdc10ffff] mem
PCI: 00:0b.0 allocate_resources_mem: next_base: dc110000 size: 100000 align: 20 gran: 20 done
PCI: 00:0c.0 allocate_resources_mem: base:dc200000 size:100000 align:20 gran:20 limit:dfffffff
Assigned: PCI: 03:00.0 10 *  [0xdc200000 - 0xdc20ffff] mem
PCI: 00:0c.0 allocate_resources_mem: next_base: dc210000 size: 100000 align: 20 gran: 20 done
PCI: 00:0d.0 allocate_resources_mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
PCI: 00:0d.0 allocate_resources_mem: next_base: dfffffff size: 0 align: 20 gran: 20 done
PCI: 00:0e.0 allocate_resources_mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
PCI: 00:0e.0 allocate_resources_mem: next_base: dfffffff size: 0 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
0: mmio_basek=00360000, basek=00000300, limitk=00100000
DOMAIN: 0000 assign_resources, bus 0 link: 0
VGA: PCI: 00:18.0 (aka node 0) link 1 has VGA device
PCI: 00:18.0 110d8 <- [0x0000001000 - 0x0000003fff] size 0x00003000 gran 0x0c io <node 0 link 1>
PCI: 00:18.0 110b8 <- [0x00d8000000 - 0x00dbffffff] size 0x04000000 gran 0x14 prefmem <node 0 link 1>
PCI: 00:18.0 110b0 <- [0x00dc000000 - 0x00dc3fffff] size 0x00400000 gran 0x14 mem <node 0 link 1>
PCI: 00:18.0 assign_resources, bus 0 link: 1
PCI: 00:01.0 10 <- [0x0000002c00 - 0x0000002c7f] size 0x00000080 gran 0x07 io
PCI: 00:01.0 60 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
PCI: 00:01.0 64 <- [0x0000002400 - 0x00000024ff] size 0x00000100 gran 0x08 io
PCI: 00:01.0 68 <- [0x0000002800 - 0x00000028ff] size 0x00000100 gran 0x08 io
PCI: 00:01.0 assign_resources, bus 0 link: 0
PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io
PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq
PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq
PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
PNP: 002e.3 f1 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 io
PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
ERROR: PNP: 002e.5 f0 irq size: 0x0000000001 not assigned
ERROR: PNP: 002e.9 30 irq size: 0x0000000001 not assigned
ERROR: PNP: 002e.9 f0 irq size: 0x0000000001 not assigned
ERROR: PNP: 002e.9 f1 irq size: 0x0000000001 not assigned
PNP: 002e.b 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io
PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq
PCI: 00:01.0 assign_resources, bus 0 link: 0
PCI: 00:01.0 14 <- [0x00fec00000 - 0x00fec00fff] size 0x00001000 gran 0x0c mem
PCI: 00:01.0 44 <- [0x00fed00000 - 0x00fed00fff] size 0x00001000 gran 0x0c mem
PCI: 00:01.1 10 <- [0x0000003000 - 0x000000301f] size 0x00000020 gran 0x05 io
PCI: 00:01.1 20 <- [0x0000002c80 - 0x0000002cbf] size 0x00000040 gran 0x06 io
PCI: 00:01.1 24 <- [0x0000002cc0 - 0x0000002cff] size 0x00000040 gran 0x06 io
PCI: 00:01.1 assign_resources, bus 1 link: 0
PCI: 00:01.1 assign_resources, bus 1 link: 0
PCI: 00:02.0 10 <- [0x00dc300000 - 0x00dc300fff] size 0x00001000 gran 0x0c mem
PCI: 00:02.1 10 <- [0x00dc303000 - 0x00dc3030ff] size 0x00000100 gran 0x08 mem
PCI: 00:06.0 20 <- [0x0000003020 - 0x000000302f] size 0x00000010 gran 0x04 io
PCI: 00:07.0 10 <- [0x0000003050 - 0x0000003057] size 0x00000008 gran 0x03 io
PCI: 00:07.0 14 <- [0x0000003070 - 0x0000003073] size 0x00000004 gran 0x02 io
PCI: 00:07.0 18 <- [0x0000003058 - 0x000000305f] size 0x00000008 gran 0x03 io
PCI: 00:07.0 1c <- [0x0000003074 - 0x0000003077] size 0x00000004 gran 0x02 io
PCI: 00:07.0 20 <- [0x0000003030 - 0x000000303f] size 0x00000010 gran 0x04 io
PCI: 00:07.0 24 <- [0x00dc301000 - 0x00dc301fff] size 0x00001000 gran 0x0c mem
PCI: 00:08.0 10 <- [0x0000003060 - 0x0000003067] size 0x00000008 gran 0x03 io
PCI: 00:08.0 14 <- [0x0000003078 - 0x000000307b] size 0x00000004 gran 0x02 io
PCI: 00:08.0 18 <- [0x0000003068 - 0x000000306f] size 0x00000008 gran 0x03 io
PCI: 00:08.0 1c <- [0x000000307c - 0x000000307f] size 0x00000004 gran 0x02 io
PCI: 00:08.0 20 <- [0x0000003040 - 0x000000304f] size 0x00000010 gran 0x04 io
PCI: 00:08.0 24 <- [0x00dc302000 - 0x00dc302fff] size 0x00001000 gran 0x0c mem
PCI: 00:09.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
PCI: 00:09.0 24 <- [0x00d8000000 - 0x00dbffffff] size 0x04000000 gran 0x14 bus 01 prefmem
PCI: 00:09.0 20 <- [0x00dc000000 - 0x00dc0fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:09.0 assign_resources, bus 1 link: 0
PCI: 01:04.0 10 <- [0x00d8000000 - 0x00dbffffff] size 0x04000000 gran 0x1a prefmem
PCI: 01:04.0 14 <- [0x00dc000000 - 0x00dc03ffff] size 0x00040000 gran 0x12 mem
PCI: 01:04.0 18 <- [0x0000001000 - 0x000000107f] size 0x00000080 gran 0x07 io
PCI: 00:09.0 assign_resources, bus 1 link: 0
PCI: 00:0b.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:0b.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:0b.0 20 <- [0x00dc100000 - 0x00dc1fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:0b.0 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x00dc100000 - 0x00dc10ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:0b.0 assign_resources, bus 2 link: 0
PCI: 00:0c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:0c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:0c.0 20 <- [0x00dc200000 - 0x00dc2fffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 00:0c.0 assign_resources, bus 3 link: 0
PCI: 03:00.0 10 <- [0x00dc200000 - 0x00dc20ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:0c.0 assign_resources, bus 3 link: 0
PCI: 00:0d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
PCI: 00:0d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:0d.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 04 mem
PCI: 00:0d.0 assign_resources, bus 4 link: 0
PCI: 00:0d.0 assign_resources, bus 4 link: 0
PCI: 00:0e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io
PCI: 00:0e.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 05 prefmem
PCI: 00:0e.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 05 mem
PCI: 00:18.0 assign_resources, bus 0 link: 1
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: 01
   APIC: 02
   APIC: 03
   APIC: 04
   APIC: 05
   APIC: 08
   APIC: 09
   APIC: 0a
   APIC: 0b
   APIC: 0c
   APIC: 0d
  DOMAIN: 0000 child on link 0 PCI: 00:18.0
  DOMAIN: 0000 resource base 1000 size 3000 align 12 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base d8000000 size 4400000 align 26 gran 0 limit dfffffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
  DOMAIN: 0000 resource base 0 size 40000000 align 0 gran 0 limit 0 flags e0004200 index 7
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
  DOMAIN: 0000 resource base c0000 size 3ff40000 align 0 gran 0 limit 0 flags e0004200 index 20
   PCI: 00:18.0
   PCI: 00:18.0 resource base 1000 size 3000 align 12 gran 12 limit ffff flags 60080100 index 110d8
   PCI: 00:18.0 resource base d8000000 size 4000000 align 26 gran 20 limit dfffffff flags 60081200 index 110b8
   PCI: 00:18.0 resource base dc000000 size 400000 align 20 gran 20 limit dfffffff flags 60080200 index 110b0
    PCI: 00:00.0
    PCI: 00:01.0 child on link 0 PNP: 002e.0
    PCI: 00:01.0 resource base 2c00 size 80 align 7 gran 7 limit ffff flags 60000100 index 10
    PCI: 00:01.0 resource base fec00000 size 1000 align 12 gran 12 limit ffffffff flags e0000200 index 14
    PCI: 00:01.0 resource base fed00000 size 1000 align 12 gran 12 limit ffffffff flags e0000200 index 44
    PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit ffff flags 60000100 index 60
    PCI: 00:01.0 resource base 2400 size 100 align 8 gran 8 limit ffff flags 60000100 index 64
    PCI: 00:01.0 resource base 2800 size 100 align 8 gran 8 limit ffff flags 60000100 index 68
    PCI: 00:01.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
    PCI: 00:01.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
     PNP: 002e.0
     PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
     PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
     PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
     PNP: 002e.1
     PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
     PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
     PNP: 002e.2
     PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
     PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
     PNP: 002e.3
     PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
     PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
     PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000500 index f1
     PNP: 002e.5
     PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
     PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62
     PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
     PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72
     PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0
     PNP: 002e.7
     PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
     PNP: 002e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62
     PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.8
     PNP: 002e.9
     PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30
     PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0
     PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1
     PNP: 002e.a
     PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.b
     PNP: 002e.b resource base 290 size 8 align 3 gran 3 limit fff flags e0000100 index 60
     PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PCI: 00:01.1 child on link 0 I2C: 01:50
    PCI: 00:01.1 resource base 3000 size 20 align 5 gran 5 limit ffff flags 60000100 index 10
    PCI: 00:01.1 resource base 2c80 size 40 align 6 gran 6 limit ffff flags 60000100 index 20
    PCI: 00:01.1 resource base 2cc0 size 40 align 6 gran 6 limit ffff flags 60000100 index 24
     I2C: 01:50
     I2C: 01:51
     I2C: 01:52
     I2C: 01:53
     I2C: 01:54
     I2C: 01:55
     I2C: 01:56
     I2C: 01:57
    PCI: 00:02.0
    PCI: 00:02.0 resource base dc300000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10
    PCI: 00:02.1
    PCI: 00:02.1 resource base dc303000 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10
    PCI: 00:04.0
    PCI: 00:04.1
    PCI: 00:06.0
    PCI: 00:06.0 resource base 3020 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
    PCI: 00:07.0
    PCI: 00:07.0 resource base 3050 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
    PCI: 00:07.0 resource base 3070 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
    PCI: 00:07.0 resource base 3058 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
    PCI: 00:07.0 resource base 3074 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
    PCI: 00:07.0 resource base 3030 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
    PCI: 00:07.0 resource base dc301000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 24
    PCI: 00:08.0
    PCI: 00:08.0 resource base 3060 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
    PCI: 00:08.0 resource base 3078 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
    PCI: 00:08.0 resource base 3068 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
    PCI: 00:08.0 resource base 307c size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
    PCI: 00:08.0 resource base 3040 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
    PCI: 00:08.0 resource base dc302000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 24
    PCI: 00:09.0 child on link 0 PCI: 01:04.0
    PCI: 00:09.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c
    PCI: 00:09.0 resource base d8000000 size 4000000 align 26 gran 20 limit dfffffff flags 60081202 index 24
    PCI: 00:09.0 resource base dc000000 size 100000 align 20 gran 20 limit dfffffff flags 60080202 index 20
     PCI: 01:04.0
     PCI: 01:04.0 resource base d8000000 size 4000000 align 26 gran 26 limit dfffffff flags 60001200 index 10
     PCI: 01:04.0 resource base dc000000 size 40000 align 18 gran 18 limit dfffffff flags 60000200 index 14
     PCI: 01:04.0 resource base 1000 size 80 align 7 gran 7 limit ffff flags 60000100 index 18
     PCI: 01:04.0 resource base a0000 size 1fc00 align 0 gran 0 limit 0 flags f0000200 index 3
    PCI: 00:0a.0
    PCI: 00:0b.0 child on link 0 PCI: 02:00.0
    PCI: 00:0b.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
    PCI: 00:0b.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
    PCI: 00:0b.0 resource base dc100000 size 100000 align 20 gran 20 limit dfffffff flags 60080202 index 20
     PCI: 02:00.0
     PCI: 02:00.0 resource base dc100000 size 10000 align 16 gran 16 limit dfffffff flags 60000201 index 10
    PCI: 00:0c.0 child on link 0 PCI: 03:00.0
    PCI: 00:0c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
    PCI: 00:0c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
    PCI: 00:0c.0 resource base dc200000 size 100000 align 20 gran 20 limit dfffffff flags 60080202 index 20
     PCI: 03:00.0
     PCI: 03:00.0 resource base dc200000 size 10000 align 16 gran 16 limit dfffffff flags 60000201 index 10
    PCI: 00:0d.0 child on link 0 PCI: 04:00.0
    PCI: 00:0d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
    PCI: 00:0d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
    PCI: 00:0d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20
     PCI: 04:00.0
    PCI: 00:0e.0
    PCI: 00:0e.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
    PCI: 00:0e.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
    PCI: 00:0e.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20
    PCI: 00:0f.0
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.4
   PCI: 00:19.0
   PCI: 00:19.1
   PCI: 00:19.2
   PCI: 00:19.3
   PCI: 00:19.4
Done allocating resources.
POST: 0x74
Enabling resources...
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1043/8162
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1043/8162
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 subsystem <- 1043/8162
PCI: 00:18.4 cmd <- 00
PCI: 00:19.0 cmd <- 00
PCI: 00:19.1 subsystem <- 1043/8162
PCI: 00:19.1 cmd <- 00
PCI: 00:19.2 subsystem <- 1043/8162
PCI: 00:19.2 cmd <- 00
PCI: 00:19.3 cmd <- 00
PCI: 00:19.4 subsystem <- 1043/8162
PCI: 00:19.4 cmd <- 00
PCI: 00:00.0 subsystem <- 1043/8162
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 subsystem <- 1043/8162
PCI: 00:01.0 cmd <- 0f
ck804 lpc decode:PNP: 002e.0, base=0x000003f0, end=0x000003f7
ck804 lpc decode:PNP: 002e.2, base=0x000003f8, end=0x000003ff
ck804 lpc decode:PNP: 002e.3, base=0x000002f8, end=0x000002ff
ck804 lpc decode:PNP: 002e.3, base=0x00000004, end=0x00000004
ck804 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060
ck804 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064
ck804 lpc decode:PNP: 002e.b, base=0x00000290, end=0x00000297
PCI: 00:01.1 subsystem <- 1043/8162
PCI: 00:01.1 cmd <- 01
PCI: 00:02.0 subsystem <- 1043/8162
PCI: 00:02.0 cmd <- 02
PCI: 00:02.1 subsystem <- 1043/8162
PCI: 00:02.1 cmd <- 02
PCI: 00:06.0 subsystem <- 1043/8162
PCI: 00:06.0 cmd <- 01
PCI: 00:07.0 subsystem <- 1043/8162
PCI: 00:07.0 cmd <- 03
PCI: 00:08.0 subsystem <- 1043/8162
PCI: 00:08.0 cmd <- 03
PCI: 00:09.0 bridge ctrl <- 000b
PCI: 00:09.0 cmd <- 07
PCI: 00:0b.0 bridge ctrl <- 0003
PCI: 00:0b.0 cmd <- 06
PCI: 00:0c.0 bridge ctrl <- 0003
PCI: 00:0c.0 cmd <- 06
PCI: 00:0d.0 bridge ctrl <- 0003
PCI: 00:0d.0 cmd <- 00
PCI: 00:0e.0 bridge ctrl <- 0003
PCI: 00:0e.0 cmd <- 00
PCI: 01:04.0 cmd <- 03
PCI: 02:00.0 subsystem <- 1043/8162
PCI: 02:00.0 cmd <- 02
PCI: 03:00.0 subsystem <- 1043/8162
PCI: 03:00.0 cmd <- 02
done.
POST: 0x75
Initializing devices...
Root Device init
POST: 0x75
CPU_CLUSTER: 0 init
start_eip=0x00001000, code_size=0x00000031
CPU1: stack_base 001a6000, stack_end 001a6ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
Initializing CPU #1
Startup point 1.
Waiting for send to finish...
+CPU: vendor AMD device 100f80
Sending STARTUP #2 to 1.
After apic_write.
CPU: family 10, model 08, stepping 00
Startup point 1.
Waiting for send to finish...
+nodeid = 00, coreid = 01
After Startup.
POST: 0x60
CPU2: stack_base 001a5000, stack_end 001a5ff8
Enabling cache
Asserting INIT.
CPU ID 0x80000001: 100f80
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
Waiting for send to finish...
+MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x0000000040000000 size 0x3ff40000 type 6
0x0000000040000000 - 0x00000000d8000000 size 0x98000000 type 0
0x00000000d8000000 - 0x00000000dc000000 size 0x04000000 type 1
0x00000000dc000000 - 0x0000000100000000 size 0x24000000 type 0
Deasserting INIT.
MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
Waiting for send to finish...
+MTRR: default type WB/UC MTRR counts: 7/2.
MTRR: UC selected as default type.
#startup loops: 2.
Sending STARTUP #1 to 2.
MTRR: 0 base 0x0000000000000000 mask 0x0000ffffc0000000 type 6
After apic_write.
MTRR: 1 base 0x00000000d8000000 mask 0x0000fffffc000000 type 1
Startup point 1.
Waiting for send to finish...
+
MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Sending STARTUP #2 to 2.
POST: 0x93
After apic_write.
Setting up local apic...Startup point 1.
Waiting for send to finish...
+ apic_id: 0x01 done.
After Startup.
POST: 0x9b
CPU3: stack_base 001a4000, stack_end 001a4ff8
CPU model: Six-Core AMD Opteron(tm) Processor 2431
Asserting INIT.
siblings = 05, Waiting for send to finish...
+CPU #1 initialized
Deasserting INIT.
Waiting for send to finish...
+Initializing CPU #2
#startup loops: 2.
Sending STARTUP #1 to 3.
After apic_write.
CPU: vendor AMD device 100f80
Startup point 1.
Waiting for send to finish...
+CPU: family 10, model 08, stepping 00
Sending STARTUP #2 to 3.
After apic_write.
nodeid = 00, coreid = 02
Startup point 1.
Waiting for send to finish...
+Initializing CPU #3
After Startup.
CPU4: stack_base 001a3000, stack_end 001a3ff8
POST: 0x60
Asserting INIT.
Waiting for send to finish...
+Enabling cache
Deasserting INIT.
CPU ID 0x80000001: 100f80
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
Waiting for send to finish...
+MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
#startup loops: 2.
Sending STARTUP #1 to 4.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
After apic_write.
Setting up local apic...Startup point 1.
Waiting for send to finish...
+ apic_id: 0x02 done.
Sending STARTUP #2 to 4.
POST: 0x9b
After apic_write.
CPU model: Six-Core AMD Opteron(tm) Processor 2431
Startup point 1.
Waiting for send to finish...
+siblings = 05, After Startup.
CPU #2 initialized
CPU5: stack_base 001a2000, stack_end 001a2ff8
Initializing CPU #4
Asserting INIT.
Waiting for send to finish...
+CPU: vendor AMD device 100f80
Deasserting INIT.
Waiting for send to finish...
+CPU: family 10, model 08, stepping 00
#startup loops: 2.
Sending STARTUP #1 to 5.
After apic_write.
CPU: vendor AMD device 100f80
Startup point 1.
Waiting for send to finish...
+CPU: family 10, model 08, stepping 00
Sending STARTUP #2 to 5.
After apic_write.
nodeid = 00, coreid = 04
Startup point 1.
Waiting for send to finish...
+nodeid = 00, coreid = 03
After Startup.
CPU6: stack_base 001a1000, stack_end 001a1ff8
Initializing CPU #5
Asserting INIT.
Waiting for send to finish...
+CPU: vendor AMD device 100f80
Deasserting INIT.
Waiting for send to finish...
+CPU: family 10, model 08, stepping 00
#startup loops: 2.
Sending STARTUP #1 to 8.
After apic_write.
POST: 0x60
Startup point 1.
Waiting for send to finish...
+POST: 0x60
Sending STARTUP #2 to 8.
After apic_write.
nodeid = 00, coreid = 05
Startup point 1.
Waiting for send to finish...
+Initializing CPU #6
After Startup.
CPU7: stack_base 001a0000, stack_end 001a0ff8
Enabling cache
Asserting INIT.
CPU ID 0x80000001: 100f80
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
Waiting for send to finish...
+MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
Deasserting INIT.
Waiting for send to finish...
+
MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
#startup loops: 2.
Sending STARTUP #1 to 9.
Setting up local apic...After apic_write.
 apic_id: 0x03 Startup point 1.
Waiting for send to finish...
+done.
Sending STARTUP #2 to 9.
POST: 0x9b
After apic_write.
CPU model: Six-Core AMD Opteron(tm) Processor 2431
Startup point 1.
Waiting for send to finish...
+siblings = 05, After Startup.
CPU #3 initialized
CPU8: stack_base 0019f000, stack_end 0019fff8
CPU: vendor AMD device 100f80
Asserting INIT.
Waiting for send to finish...
+Initializing CPU #7
Deasserting INIT.
Waiting for send to finish...
+CPU: family 10, model 08, stepping 00
#startup loops: 2.
Sending STARTUP #1 to 10.
After apic_write.
nodeid = 01, coreid = 00
Startup point 1.
Waiting for send to finish...
+POST: 0x60
Sending STARTUP #2 to 10.
After apic_write.
Initializing CPU #8
Startup point 1.
Waiting for send to finish...
+CPU: vendor AMD device 100f80
After Startup.
CPU9: stack_base 0019e000, stack_end 0019eff8
POST: 0x60
Asserting INIT.
Waiting for send to finish...
+CPU: family 10, model 08, stepping 00
Deasserting INIT.
Waiting for send to finish...
+CPU: vendor AMD device 100f80
#startup loops: 2.
Sending STARTUP #1 to 11.
After apic_write.
Enabling cache
Startup point 1.
Waiting for send to finish...
+CPU ID 0x80000001: 100f80
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
Sending STARTUP #2 to 11.
After apic_write.
MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
Startup point 1.
Waiting for send to finish...
+
MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

After Startup.
POST: 0x93
CPU10: stack_base 0019d000, stack_end 0019dff8
Setting up local apic...Asserting INIT.
 apic_id: 0x08 done.
POST: 0x9b
Waiting for send to finish...
+CPU model: Six-Core AMD Opteron(tm) Processor 2431
Deasserting INIT.
siblings = 05, Waiting for send to finish...
+CPU #6 initialized
#startup loops: 2.
Sending STARTUP #1 to 12.
After apic_write.
CPU: family 10, model 08, stepping 00
Startup point 1.
Waiting for send to finish...
+nodeid = 01, coreid = 02
Sending STARTUP #2 to 12.
After apic_write.
Enabling cache
Startup point 1.
Waiting for send to finish...
+CPU ID 0x80000001: 100f80
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
After Startup.
MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
CPU11: stack_base 0019c000, stack_end 0019cff8

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Asserting INIT.
Setting up local apic...Waiting for send to finish...
+ apic_id: 0x05 done.
Deasserting INIT.
POST: 0x9b
Waiting for send to finish...
+CPU model: Six-Core AMD Opteron(tm) Processor 2431
#startup loops: 2.
Sending STARTUP #1 to 13.
siblings = 05, After apic_write.
CPU #5 initialized
Startup point 1.
Waiting for send to finish...
+Initializing CPU #11
Sending STARTUP #2 to 13.
After apic_write.
nodeid = 01, coreid = 01
Startup point 1.
Waiting for send to finish...
+Initializing CPU #10
After Startup.
Initializing CPU #0
CPU: vendor AMD device 100f80
CPU: family 10, model 08, stepping 00
CPU: vendor AMD device 100f80
nodeid = 00, coreid = 00
POST: 0x60
Enabling cache
CPU ID 0x80000001: 100f80
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
POST: 0x60
MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
Enabling cache
POST: 0x60
CPU ID 0x80000001: 100f80
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
POST: 0x93
CPU: family 10, model 08, stepping 00
Setting up local apic...
MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
 apic_id: 0x00 done.
POST: 0x9b
Setting up local apic...CPU model: Six-Core AMD Opteron(tm) Processor 2431
 apic_id: 0x0a done.
siblings = 05, POST: 0x9b
CPU #0 initialized
CPU model: Six-Core AMD Opteron(tm) Processor 2431
Waiting for 6 CPUS to stop
siblings = 05, Initializing CPU #9
CPU #8 initialized
CPU: vendor AMD device 100f80
Waiting for 5 CPUS to stop
Enabling cache
CPU: family 10, model 08, stepping 00
CPU ID 0x80000001: 100f80
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
CPU: vendor AMD device 100f80
MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
nodeid = 01, coreid = 03
nodeid = 01, coreid = 05

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
CPU: family 10, model 08, stepping 00
Setting up local apic...POST: 0x60
 apic_id: 0x09 done.
POST: 0x9b
Enabling cache
CPU model: Six-Core AMD Opteron(tm) Processor 2431
CPU ID 0x80000001: 100f80
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
siblings = 05, MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
CPU #7 initialized
nodeid = 01, coreid = 04
Waiting for 4 CPUS to stop

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
POST: 0x60
Setting up local apic...POST: 0x60
 apic_id: 0x0b done.
POST: 0x9b
Enabling cache
CPU model: Six-Core AMD Opteron(tm) Processor 2431
CPU ID 0x80000001: 100f80
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
siblings = 05, MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
CPU #9 initialized
Enabling cache
Waiting for 3 CPUS to stop

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
CPU ID 0x80000001: 100f80
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
Setting up local apic...MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
 apic_id: 0x0c done.
POST: 0x9b
Enabling cache
CPU model: Six-Core AMD Opteron(tm) Processor 2431
CPU ID 0x80000001: 100f80
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
siblings = 05, MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
CPU #10 initialized

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Waiting for 2 CPUS to stop

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
POST: 0x93
Setting up local apic...Setting up local apic... apic_id: 0x0d done.
POST: 0x9b
 apic_id: 0x04 done.
CPU model: Six-Core AMD Opteron(tm) Processor 2431
POST: 0x9b
siblings = 05, CPU model: Six-Core AMD Opteron(tm) Processor 2431
CPU #11 initialized
siblings = 05, Waiting for 1 CPUS to stop
CPU #4 initialized
All AP CPUs stopped (36398 loops)
CPU1: stack: 001a6000 - 001a7000, lowest used address 001a6bdc, stack used: 1060 bytes
CPU2: stack: 001a5000 - 001a6000, lowest used address 001a5c8c, stack used: 884 bytes
CPU3: stack: 001a4000 - 001a5000, lowest used address 001a4c8c, stack used: 884 bytes
CPU4: stack: 001a3000 - 001a4000, lowest used address 001a3c8c, stack used: 884 bytes
CPU5: stack: 001a2000 - 001a3000, lowest used address 001a2c8c, stack used: 884 bytes
CPU6: stack: 001a1000 - 001a2000, lowest used address 001a1c8c, stack used: 884 bytes
CPU7: stack: 001a0000 - 001a1000, lowest used address 001a0c8c, stack used: 884 bytes
CPU8: stack: 0019f000 - 001a0000, lowest used address 0019fc8c, stack used: 884 bytes
CPU9: stack: 0019e000 - 0019f000, lowest used address 0019ec8c, stack used: 884 bytes
CPU10: stack: 0019d000 - 0019e000, lowest used address 0019dc8c, stack used: 884 bytes
CPU11: stack: 0019c000 - 0019d000, lowest used address 0019cc8c, stack used: 884 bytes
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:18.0 init
POST: 0x75
PCI: 00:18.1 init
POST: 0x75
PCI: 00:18.2 init
POST: 0x75
PCI: 00:18.3 init
NB: Function 3 Misc Control.. done.
POST: 0x75
PCI: 00:18.4 init
POST: 0x75
PCI: 00:19.0 init
POST: 0x75
PCI: 00:19.1 init
POST: 0x75
PCI: 00:19.2 init
POST: 0x75
PCI: 00:19.3 init
NB: Function 3 Misc Control.. done.
POST: 0x75
PCI: 00:19.4 init
POST: 0x75
PCI: 00:00.0 init
POST: 0x75
PCI: 00:01.0 init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: Dumping registers
  reg 0x0000: 0x00000000
  reg 0x0001: 0x00170011
  reg 0x0002: 0x00000000
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
lpc_init: pm_base = 2000 
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffa38/0x100000
CBFS: CBFS location: 0x0~0xffa40, align: 64
CBFS: Looking for 'cmos_layout.bin' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS: Found file (offset=0x28, len=2704).
set power on after power fail
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffa38/0x100000
CBFS: CBFS location: 0x0~0xffa40, align: 64
CBFS: Looking for 'cmos_layout.bin' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS: Found file (offset=0x28, len=2704).
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffa38/0x100000
CBFS: CBFS location: 0x0~0xffa40, align: 64
CBFS: Looking for 'cmos_layout.bin' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS: Found file (offset=0x28, len=2704).
RTC Init
RTC: Power Problem
POST: 0x75
POST: 0x75
PCI: 00:02.0 init
POST: 0x75
PCI: 00:02.1 init
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:06.0 init
IDE1 	IDE0
POST: 0x75
PCI: 00:07.0 init
SATA S 	SATA P 
POST: 0x75
PCI: 00:08.0 init
SATA S 	SATA P 
POST: 0x75
PCI: 00:09.0 init
PCI DOMAIN mem base = 0x00d8000000
[0x50] <-- 0xd8000000
POST: 0x75
POST: 0x75
PCI: 00:0b.0 init
POST: 0x75
PCI: 00:0c.0 init
POST: 0x75
PCI: 00:0d.0 init
POST: 0x75
PCI: 00:0e.0 init
POST: 0x75
POST: 0x75
PNP: 002e.0 init
POST: 0x75
POST: 0x75
PNP: 002e.2 init
POST: 0x75
PNP: 002e.3 init
POST: 0x75
PNP: 002e.5 init
Keyboard init...
No PS/2 keyboard detected.
POST: 0x75
POST: 0x75
POST: 0x75
PNP: 002e.9 init
POST: 0x75
POST: 0x75
PNP: 002e.b init
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 01:04.0 init
XGI Z9s: initializing video device
XGI VGA: Relocate IO address: 1000 [00001030]
XGI VGA: chipid = 31
XGI VGA: Framebuffer at 0xd8000000, mapped to 0xd8000000, size 16384k
XGI VGA: MMIO at 0xdc000000, mapped to 0xdc000000, size 256k
XGI VGA: No or unknown bridge type detected
XGI VGA: Default mode is 800x600x8 (60Hz)
XGI VGA text mode initialized
POST: 0x75
PCI: 02:00.0 init
POST: 0x75
PCI: 03:00.0 init
POST: 0x75
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PNP: 002e.0: enabled 1
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.7: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.9: enabled 1
PNP: 002e.a: enabled 0
PNP: 002e.b: enabled 1
PCI: 00:01.1: enabled 1
I2C: 01:50: enabled 1
I2C: 01:51: enabled 1
I2C: 01:52: enabled 1
I2C: 01:53: enabled 1
I2C: 01:54: enabled 1
I2C: 01:55: enabled 1
I2C: 01:56: enabled 1
I2C: 01:57: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:02.1: enabled 1
PCI: 00:04.0: enabled 0
PCI: 00:04.1: enabled 0
PCI: 00:06.0: enabled 1
PCI: 00:07.0: enabled 1
PCI: 00:08.0: enabled 1
PCI: 00:09.0: enabled 1
PCI: 01:04.0: enabled 1
PCI: 00:0a.0: enabled 0
PCI: 00:0b.0: enabled 1
PCI: 02:00.0: enabled 1
PCI: 00:0c.0: enabled 1
PCI: 03:00.0: enabled 1
PCI: 00:0d.0: enabled 1
PCI: 04:00.0: enabled 0
PCI: 00:0e.0: enabled 1
PCI: 00:0f.0: enabled 0
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 1
PCI: 00:19.2: enabled 1
PCI: 00:19.3: enabled 1
PCI: 00:19.4: enabled 1
APIC: 01: enabled 1
APIC: 02: enabled 1
APIC: 03: enabled 1
APIC: 04: enabled 1
APIC: 05: enabled 1
APIC: 08: enabled 1
APIC: 09: enabled 1
APIC: 0a: enabled 1
APIC: 0b: enabled 1
APIC: 0c: enabled 1
APIC: 0d: enabled 1
CBMEM: root @ 3ffff000 254 entries.
Moving GDT to 3ffdd000...ok
POST: 0x76
Finalize devices...
Devices finalized
POST: 0x77
POST: 0x79
POST: 0x9b
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffa38/0x100000
CBFS: CBFS location: 0x0~0xffa40, align: 64
CBFS: Looking for 'cmos_layout.bin' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS: Found file (offset=0x28, len=2704).
CONFIG_LOGICAL_CPUS==1: apicid_base: 00000001
Wrote the mp table end at: 000f0010 - 000f021c
Wrote the mp table end at: 3ffdc010 - 3ffdc21c
MP table: 540 bytes.
POST: 0x9c
ACPI: Writing ACPI tables at 3ffb8000.
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * FADT
pm_base: 0x2000
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
processor_brand=Six-Core AMD Opteron(tm) Processor 2431
Pstates algorithm ...
Pstate_freq[0] = 2400MHz	Pstate_power[0] = 15840mw
Pstate_latency[0] = 5us
Pstate_freq[1] = 1900MHz	Pstate_power[1] = 11960mw
Pstate_latency[1] = 5us
Pstate_freq[2] = 1500MHz	Pstate_power[2] = 9675mw
Pstate_latency[2] = 5us
Pstate_freq[3] = 1200MHz	Pstate_power[3] = 7310mw
Pstate_latency[3] = 5us
PSS: 2400MHz power 15840 control 0x0 status 0x0
PSS: 1900MHz power 11960 control 0x1 status 0x1
PSS: 1500MHz power 9675 control 0x2 status 0x2
PSS: 1200MHz power 7310 control 0x3 status 0x3
PSS: 2400MHz power 15840 control 0x0 status 0x0
PSS: 1900MHz power 11960 control 0x1 status 0x1
PSS: 1500MHz power 9675 control 0x2 status 0x2
PSS: 1200MHz power 7310 control 0x3 status 0x3
PSS: 2400MHz power 15840 control 0x0 status 0x0
PSS: 1900MHz power 11960 control 0x1 status 0x1
PSS: 1500MHz power 9675 control 0x2 status 0x2
PSS: 1200MHz power 7310 control 0x3 status 0x3
PSS: 2400MHz power 15840 control 0x0 status 0x0
PSS: 1900MHz power 11960 control 0x1 status 0x1
PSS: 1500MHz power 9675 control 0x2 status 0x2
PSS: 1200MHz power 7310 control 0x3 status 0x3
PSS: 2400MHz power 15840 control 0x0 status 0x0
PSS: 1900MHz power 11960 control 0x1 status 0x1
PSS: 1500MHz power 9675 control 0x2 status 0x2
PSS: 1200MHz power 7310 control 0x3 status 0x3
PSS: 2400MHz power 15840 control 0x0 status 0x0
PSS: 1900MHz power 11960 control 0x1 status 0x1
PSS: 1500MHz power 9675 control 0x2 status 0x2
PSS: 1200MHz power 7310 control 0x3 status 0x3
PSS: 2400MHz power 15840 control 0x0 status 0x0
PSS: 1900MHz power 11960 control 0x1 status 0x1
PSS: 1500MHz power 9675 control 0x2 status 0x2
PSS: 1200MHz power 7310 control 0x3 status 0x3
PSS: 2400MHz power 15840 control 0x0 status 0x0
PSS: 1900MHz power 11960 control 0x1 status 0x1
PSS: 1500MHz power 9675 control 0x2 status 0x2
PSS: 1200MHz power 7310 control 0x3 status 0x3
PSS: 2400MHz power 15840 control 0x0 status 0x0
PSS: 1900MHz power 11960 control 0x1 status 0x1
PSS: 1500MHz power 9675 control 0x2 status 0x2
PSS: 1200MHz power 7310 control 0x3 status 0x3
PSS: 2400MHz power 15840 control 0x0 status 0x0
PSS: 1900MHz power 11960 control 0x1 status 0x1
PSS: 1500MHz power 9675 control 0x2 status 0x2
PSS: 1200MHz power 7310 control 0x3 status 0x3
PSS: 2400MHz power 15840 control 0x0 status 0x0
PSS: 1900MHz power 11960 control 0x1 status 0x1
PSS: 1500MHz power 9675 control 0x2 status 0x2
PSS: 1200MHz power 7310 control 0x3 status 0x3
PSS: 2400MHz power 15840 control 0x0 status 0x0
PSS: 1900MHz power 11960 control 0x1 status 0x1
PSS: 1500MHz power 9675 control 0x2 status 0x2
PSS: 1200MHz power 7310 control 0x3 status 0x3
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI:    * MADT
ACPI: added table 3/32, length now 48
current = 3ffbbb80
ACPI:    * SRAT at 3ffbbb80
SRAT: lapic cpu_index=00, node_id=00, apic_id=00
SRAT: lapic cpu_index=01, node_id=00, apic_id=01
SRAT: lapic cpu_index=02, node_id=00, apic_id=02
SRAT: lapic cpu_index=03, node_id=00, apic_id=03
SRAT: lapic cpu_index=04, node_id=00, apic_id=04
SRAT: lapic cpu_index=05, node_id=00, apic_id=05
SRAT: lapic cpu_index=06, node_id=01, apic_id=08
SRAT: lapic cpu_index=07, node_id=01, apic_id=09
SRAT: lapic cpu_index=08, node_id=01, apic_id=0a
SRAT: lapic cpu_index=09, node_id=01, apic_id=0b
SRAT: lapic cpu_index=0a, node_id=01, apic_id=0c
SRAT: lapic cpu_index=0b, node_id=01, apic_id=0d
set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00100000
set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=000ffd00
ACPI: added table 4/32, length now 52
ACPI:   * SLIT at 3ffbbce8
ACPI: added table 5/32, length now 56
ACPI:    * HPET
ACPI: added table 6/32, length now 60
ACPI:    * SRAT at 3ffbbd60
SRAT: lapic cpu_index=00, node_id=00, apic_id=00
SRAT: lapic cpu_index=01, node_id=00, apic_id=01
SRAT: lapic cpu_index=02, node_id=00, apic_id=02
SRAT: lapic cpu_index=03, node_id=00, apic_id=03
SRAT: lapic cpu_index=04, node_id=00, apic_id=04
SRAT: lapic cpu_index=05, node_id=00, apic_id=05
SRAT: lapic cpu_index=06, node_id=01, apic_id=08
SRAT: lapic cpu_index=07, node_id=01, apic_id=09
SRAT: lapic cpu_index=08, node_id=01, apic_id=0a
SRAT: lapic cpu_index=09, node_id=01, apic_id=0b
SRAT: lapic cpu_index=0a, node_id=01, apic_id=0c
SRAT: lapic cpu_index=0b, node_id=01, apic_id=0d
set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00100000
set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=000ffd00
ACPI: added table 7/32, length now 64
ACPI:   * SLIT at 3ffbbec8
ACPI: added table 8/32, length now 68
ACPI: done.
ACPI tables: 16128 bytes.
smbios_write_tables: 3ffb7000
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffa38/0x100000
Root Device (ASUS KFSN4-DRE)
CPU_CLUSTER: 0 (AMD FAM10 Root Complex)
APIC: 00 (socket F_1207)
DOMAIN: 0000 (AMD FAM10 Root Complex)
PCI: 00:18.0 (AMD FAM10 Northbridge)
PCI: 00:00.0 (NVIDIA CK804 Southbridge)
PCI: 00:01.0 (NVIDIA CK804 Southbridge)
PNP: 002e.0 (Winbond W83627THG Super I/O)
PNP: 002e.1 (Winbond W83627THG Super I/O)
PNP: 002e.2 (Winbond W83627THG Super I/O)
PNP: 002e.3 (Winbond W83627THG Super I/O)
PNP: 002e.5 (Winbond W83627THG Super I/O)
PNP: 002e.7 (Winbond W83627THG Super I/O)
PNP: 002e.8 (Winbond W83627THG Super I/O)
PNP: 002e.9 (Winbond W83627THG Super I/O)
PNP: 002e.a (Winbond W83627THG Super I/O)
PNP: 002e.b (Winbond W83627THG Super I/O)
PCI: 00:01.1 (NVIDIA CK804 Southbridge)
I2C: 01:50 (unknown)
I2C: 01:51 (unknown)
I2C: 01:52 (unknown)
I2C: 01:53 (unknown)
I2C: 01:54 (unknown)
I2C: 01:55 (unknown)
I2C: 01:56 (unknown)
I2C: 01:57 (unknown)
PCI: 00:02.0 (NVIDIA CK804 Southbridge)
PCI: 00:02.1 (NVIDIA CK804 Southbridge)
PCI: 00:04.0 (NVIDIA CK804 Southbridge)
PCI: 00:04.1 (NVIDIA CK804 Southbridge)
PCI: 00:06.0 (NVIDIA CK804 Southbridge)
PCI: 00:07.0 (NVIDIA CK804 Southbridge)
PCI: 00:08.0 (NVIDIA CK804 Southbridge)
PCI: 00:09.0 (NVIDIA CK804 Southbridge)
PCI: 01:04.0 (NVIDIA CK804 Southbridge)
PCI: 00:0a.0 (NVIDIA CK804 Southbridge)
PCI: 00:0b.0 (NVIDIA CK804 Southbridge)
PCI: 02:00.0 (NVIDIA CK804 Southbridge)
PCI: 00:0c.0 (NVIDIA CK804 Southbridge)
PCI: 03:00.0 (NVIDIA CK804 Southbridge)
PCI: 00:0d.0 (NVIDIA CK804 Southbridge)
PCI: 04:00.0 (NVIDIA CK804 Southbridge)
PCI: 00:0e.0 (NVIDIA CK804 Southbridge)
PCI: 00:0f.0 (NVIDIA CK804 Southbridge)
PCI: 00:18.1 (AMD FAM10 Northbridge)
PCI: 00:18.2 (AMD FAM10 Northbridge)
PCI: 00:18.3 (AMD FAM10 Northbridge)
PCI: 00:18.4 (AMD FAM10 Northbridge)
PCI: 00:19.0 (AMD FAM10 Northbridge)
PCI: 00:19.1 (AMD FAM10 Northbridge)
PCI: 00:19.2 (AMD FAM10 Northbridge)
PCI: 00:19.3 (AMD FAM10 Northbridge)
PCI: 00:19.4 (AMD FAM10 Northbridge)
APIC: 01 (unknown)
APIC: 02 (unknown)
APIC: 03 (unknown)
APIC: 04 (unknown)
APIC: 05 (unknown)
APIC: 08 (unknown)
APIC: 09 (unknown)
APIC: 0a (unknown)
APIC: 0b (unknown)
APIC: 0c (unknown)
APIC: 0d (unknown)
SMBIOS tables: 338 bytes.
POST: 0x9e
POST: 0x9d
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum cfe3
Table forward entry ends at 0x00000528.
... aligned to 0x00001000
Writing coreboot table at 0x3ffaf000
rom_table_end = 0x3ffaf000
... aligned to 0x3ffb0000
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffa38/0x100000
CBFS: CBFS location: 0x0~0xffa40, align: 64
CBFS: Looking for 'cmos_layout.bin' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS: Found file (offset=0x28, len=2704).
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000a0000-00000000000bffff: RESERVED
 3. 00000000000c0000-000000003ffaefff: RAM
 4. 000000003ffaf000-000000003fffffff: CONFIGURATION TABLES
 5. 00000000e0000000-00000000efffffff: RESERVED
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffa38/0x100000
CBFS: CBFS location: 0x0~0xffa40, align: 64
CBFS: Looking for 'cmos_layout.bin' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS: Found file (offset=0x28, len=2704).
Wrote coreboot table at: 3ffaf000, 0xc1c bytes, checksum d9f9
coreboot table: 3124 bytes.
CBMEM ROOT  0. 3ffff000 00001000
CONSOLE     1. 3ffdf000 00020000
TIME STAMP  2. 3ffde000 00001000
GDT         3. 3ffdd000 00001000
SMP TABLE   4. 3ffdc000 00001000
ACPI        5. 3ffb8000 00024000
SMBIOS      6. 3ffb7000 00001000
COREBOOT    7. 3ffaf000 00008000
POST: 0x7a
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffa38/0x100000
CBFS: CBFS location: 0x0~0xffa40, align: 64
CBFS: Looking for 'fallback/payload' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS:  (unmatched file @0x0: cmos_layout.bin)
CBFS:  - load entry 0xac0 file name (16 bytes)...
CBFS:  (unmatched file @0xac0: cmos.default)
CBFS:  - load entry 0xc00 file name (72 bytes)...
CBFS:  (unmatched file @0xc00: cpu_microcode_blob.bin)
CBFS:  - load entry 0x4480 file name (32 bytes)...
CBFS:  (unmatched file @0x4480: fallback/romstage)
CBFS:  - load entry 0x1bd00 file name (32 bytes)...
CBFS:  (unmatched file @0x1bd00: fallback/ramstage)
CBFS:  - load entry 0x40dc0 file name (32 bytes)...
CBFS: Found file (offset=0x40df8, len=55617).
CBFS: located payload @ fff40df8, 55617 bytes.
Loading segment from rom address 0xfff40df8
  code (compression=1)
  New segment dstaddr 0xe5dc8 memsize 0x1a238 srcaddr 0xfff40e30 filesize 0xd909
Loading segment from rom address 0xfff40e14
  Entry Point 0x000fd4c3
Bounce Buffer at 3fcdb000, 2964928 bytes
Loading Segment: addr: 0x00000000000e5dc8 memsz: 0x000000000001a238 filesz: 0x000000000000d909
lb: [0x0000000000100000, 0x0000000000269ee0)
Post relocation: addr: 0x00000000000e5dc8 memsz: 0x000000000001a238 filesz: 0x000000000000d909
using LZMA
[ 0x000e5dc8, 00100000, 0x00100000) <- fff40e30
dest 000e5dc8, end 00100000, bouncebuffer 3fcdb000
Loaded segments
POST: 0x7b
Jumping to boot code at 000fd4c3
POST: 0xf8
CPU0: stack: 001a7000 - 001a8000, lowest used address 001a78e8, stack used: 1816 bytes
entry    = 0x000fd4c3
lb_start = 0x00100000
lb_size  = 0x00169ee0
buffer   = 0x3fcdb000
SeaBIOS (version rel-1.7.5-150-g301dd09-20150216_172955-apollo)
Found coreboot cbmem console @ 3ffdf000
Found mainboard ASUS KFSN4-DRE
Relocating init from 0x000e6fe0 to 0x3ff64800 (size 42816)
Found CBFS header at 0xfffffa38
CPU Mhz=2413
Found 26 PCI devices (max PCI bus is 05)
Copying SMBIOS entry point from 0x3ffb7000 to 0x000f1700
Copying ACPI RSDP from 0x3ffb8000 to 0x000f16d0
Copying MPTABLE from 0x3ffdc000/3ffdc010 to 0x000f14b0
Using pmtimer, ioport 0x2008
Scan for VGA option rom
Running option rom at c000:0003
pmm call arg1=0
Turning on vga text mode console
SeaBIOS (version rel-1.7.5-150-g301dd09-20150216_172955-apollo)
EHCI init on dev 00:02.1 (regs=0xdc303020)
OHCI init on dev 00:02.0 (regs=0xdc300000)
Found 0 lpt ports
Found 2 serial ports
ATA controller 1 at 1f0/3f4/0 (irq 14 dev 30)
ATA controller 2 at 170/374/0 (irq 15 dev 30)
ATA controller 3 at 3050/3070/0 (irq 0 dev 38)
ATA controller 4 at 3058/3074/0 (irq 0 dev 38)
ATA controller 5 at 3060/3078/0 (irq 0 dev 40)
ATA controller 6 at 3068/307c/0 (irq 0 dev 40)
USB keyboard initialized
Got ps2 nak (status=51)
All threads complete.
Scan for option roms
Running option rom at c780:0003
pmm call arg1=1
pmm call arg1=0
pmm call arg1=1
pmm call arg1=0
Running option rom at c880:0003
pmm call arg1=1
pmm call arg1=1
Searching bootorder for: /pci@i0cf8/pci-bridge@b/*@0
Searching bootorder for: /pci@i0cf8/pci-bridge@c/*@0

Press F12 for boot menu.

Unable to find vesa video mode dimensions 640/480
failed to find a videomode with 640x480 0bpp (0=any).
Searching bootorder for: HALT
Space available for UMB: c9800-ed000, f0000-f1450
Returned 253952 bytes of ZoneHigh
e820 map has 6 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 000000003ffad000 = 1 RAM
  4: 000000003ffad000 - 0000000040000000 = 2 RESERVED
  5: 00000000e0000000 - 00000000f0000000 = 2 RESERVED
enter handle_19:
  NULL
Booting from ROM...
Booting from c780:0361