

coreboot-4.4-590-gf359997 Thu Jun 23 19:53:04 UTC 2016 romstage starting...
Setting up static southbridge registers... done.
Disabling Watchdog reboot... done.
Setting up static northbridge registers... done.
Initializing Graphics...
Back from sandybridge_early_initialization()
SMBus controller enabled.
Memory Straps:
 - memory capacity 2GB
 - die revision 1
 - vendor Other
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'spd.bin'
CBFS: Found @ offset e9c0 size 600
CPU id(206a7): Intel(R) Core(TM) i5-2467M CPU @ 1.60GHz
AES supported, TXT NOT supported, VT supported
PCH type: HM65, device id: 1c49, rev id 5
Intel ME early init
Intel ME firmware is ready
ME: Requested 8MB UMA
Starting UEFI PEI System Agent
Read scrambler seed    0x0000c637 from CMOS 0x98
Read S3 scrambler seed 0x0000b979 from CMOS 0x9c
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'mrc.cache'
CBFS: Found @ offset fec0 size 10000
find_current_mrc_cache_local: picked entry 0 from cache block
prepare_mrc_cache: at fff10010, size bb0 checksum 1206
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'mrc.bin'
CBFS: Found @ offset 9fec0 size 2fc94
System Agent: Starting up...
System Agent: Initializing PCH
System Agent: Initializing PCH (SMBUS)
System Agent: Initializing PCH (USB)
System Agent: Initializing PCH (SA Init)
SA PciExpress skipped (pcie_init is 0)
System Agent: Initializing PCH (Me UMA)
System Agent: Initializing Memory
System Agent: Done.
System Agent Version 1.2.2 Build 0
ME: Sending Init Done with status: 0, UMA base: 0x17f8
ME: Requested BIOS Action: Continue to boot
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : NO
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Normal
ME: Current Operation State : Bring up
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : BUP Phase
ME: Power Management Event  : Clean Moff->Mx wake
ME: Progress Phase State    : 0x50
memcfg DDR3 clock 1333 MHz
memcfg channel assignment: A: 0, B  1, C  2
memcfg channel[0] config (00600010):
   ECC inactive
   enhanced interleave mode on
   rank interleave on
   DIMMA 4096 MB width x8 single rank, selected
   DIMMB 0 MB width x8 single rank
memcfg channel[1] config (00600008):
   ECC inactive
   enhanced interleave mode on
   rank interleave on
   DIMMA 2048 MB width x8 single rank, selected
   DIMMB 0 MB width x8 single rank
CBMEM:
IMD: root @ acfff000 254 entries.
IMD: root @ acffec00 62 entries.
Relocate MRC DATA from ff7e3237 to acfdc000 (2992 bytes)
Save scrambler seed    0x00005ece to CMOS 0x98
Save s3 scrambler seed 0x0000c637 to CMOS 0x9c
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 1ff00 size 1186d


coreboot-4.4-590-gf359997 Thu Jun 23 19:53:04 UTC 2016 ramstage starting...
Moving GDT to acffe8a0...ok
Normal boot.
BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 4 exit 0
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 0
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 0
PCI: 00:1c.2: enabled 0
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 0
PNP: 002e.3: enabled 0
PNP: 002e.4: enabled 0
PNP: 002e.7: enabled 1
PNP: 002e.8: enabled 1
PNP: 002e.9: enabled 1
PNP: 00ff.1: enabled 0
IOAPIC: 04: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
  APIC: acac: enabled 0
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:02.0: enabled 1
  PCI: 00:16.0: enabled 1
  PCI: 00:16.1: enabled 0
  PCI: 00:16.2: enabled 0
  PCI: 00:16.3: enabled 0
  PCI: 00:19.0: enabled 0
  PCI: 00:1a.0: enabled 1
  PCI: 00:1b.0: enabled 1
  PCI: 00:1c.0: enabled 1
  PCI: 00:1c.1: enabled 0
  PCI: 00:1c.2: enabled 0
  PCI: 00:1c.3: enabled 1
  PCI: 00:1c.4: enabled 0
  PCI: 00:1c.5: enabled 0
  PCI: 00:1c.6: enabled 0
  PCI: 00:1c.7: enabled 0
  PCI: 00:1d.0: enabled 1
  PCI: 00:1e.0: enabled 0
  PCI: 00:1f.0: enabled 1
   PNP: 002e.1: enabled 1
   PNP: 002e.2: enabled 0
   PNP: 002e.3: enabled 0
   PNP: 002e.4: enabled 0
   PNP: 002e.7: enabled 1
   PNP: 002e.8: enabled 1
   PNP: 002e.9: enabled 1
   PNP: 00ff.1: enabled 0
   IOAPIC: 04: enabled 1
  PCI: 00:1f.2: enabled 1
  PCI: 00:1f.3: enabled 1
  PCI: 00:1f.5: enabled 0
  PCI: 00:1f.6: enabled 1
Root Device scanning...
root_dev_scan_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0104] ops
Normal boot.
PCI: 00:00.0 [8086/0104] enabled
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
PCI: 00:01.0 subordinate bus PCI Express
PCI: 00:01.0 [8086/0101] enabled
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/0116] enabled
PCI: 00:04.0 [8086/0103] enabled
PCI: 00:16.0 [8086/1c3a] ops
PCI: 00:16.0 [8086/1c3a] enabled
PCI: 00:16.1: Disabling device
PCI: 00:16.1 [8086/1c3b] disabled No operations
PCI: 00:16.2: Disabling device
PCI: 00:16.2 [8086/1c3c] disabled No operations
PCI: 00:16.3: Disabling device
PCI: 00:16.3 [8086/1c3d] disabled No operations
PCI: 00:19.0: Disabling device
PCI: 00:1a.0 [8086/0000] ops
PCI: 00:1a.0 [8086/1c2d] enabled
PCI: 00:1b.0 [8086/0000] ops
PCI: 00:1b.0 [8086/1c20] enabled
PCI: 00:1c.0 [8086/0000] bus ops
PCI: 00:1c.0 [8086/1c10] enabled
PCI: 00:1c.1: Disabling device
PCI: 00:1c.2: Disabling device
PCI: 00:1c.3 [8086/0000] bus ops
PCI: 00:1c.3 [8086/1c16] enabled
PCI: 00:1c.4: Disabling device
PCI: 00:1c.4: check set enabled
PCI: 00:1c.5: Disabling device
PCI: 00:1c.6: Disabling device
PCI: 00:1c.7: Disabling device
PCH: RPFN 0x76543210 -> 0xfedc3a90
PCI: 00:1d.0 [8086/0000] ops
PCI: 00:1d.0 [8086/1c26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1e.0 [8086/2448] bus ops
PCI: 00:1e.0 [8086/2448] disabled
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/1c49] enabled
PCI: 00:1f.2 [8086/0000] ops
PCI: 00:1f.2 [8086/1c01] enabled
PCI: 00:1f.3 [8086/0000] bus ops
PCI: 00:1f.3 [8086/1c22] enabled
PCI: 00:1f.5: Disabling device
PCI: 00:1f.6 [8086/1c24] enabled
PCI: 00:01.0 scanning...
do_pci_scan_bridge for PCI: 00:01.0
PCI: pci_scan_bus for bus 01
scan_bus: scanning of bus PCI: 00:01.0 took 64 usecs
PCI: 00:1c.0 scanning...
do_pci_scan_bridge for PCI: 00:1c.0
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 [8086/088e] enabled
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L1
scan_bus: scanning of bus PCI: 00:1c.0 took 393 usecs
PCI: 00:1c.3 scanning...
do_pci_scan_bridge for PCI: 00:1c.3
PCI: pci_scan_bus for bus 03
PCI: 03:00.0 [10ec/8168] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L1
scan_bus: scanning of bus PCI: 00:1c.3 took 354 usecs
PCI: 00:1f.0 scanning...
scan_lpc_bus for PCI: 00:1f.0
PNP: 002e.1 enabled
PNP: 002e.2 disabled
PNP: 002e.3 disabled
PNP: 002e.4 disabled
PNP: 002e.7 enabled
PNP: 002e.8 enabled
PNP: 002e.9 enabled
PNP: 00ff.1 disabled
IOAPIC: 04 enabled
scan_lpc_bus for PCI: 00:1f.0 done
scan_bus: scanning of bus PCI: 00:1f.0 took 269 usecs
PCI: 00:1f.3 scanning...
scan_smbus for PCI: 00:1f.3
scan_smbus for PCI: 00:1f.3 done
scan_bus: scanning of bus PCI: 00:1f.3 took 50 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 2509 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 2620 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 3795 exit 0
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
PCI: 00:01.0 read_resources bus 1 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0 done
PCI: 00:1c.0 read_resources bus 2 link: 0
PCI: 00:1c.0 read_resources bus 2 link: 0 done
PCI: 00:1c.3 read_resources bus 3 link: 0
PCI: 00:1c.3 read_resources bus 3 link: 0 done
PCI: 00:1f.0 read_resources bus 0 link: 0
PCI: 00:1f.0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: acac
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf
   PCI: 00:01.0
   PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:02.0
   PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
   PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
   PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
   PCI: 00:04.0
   PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
   PCI: 00:16.0
   PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10
   PCI: 00:16.1
   PCI: 00:16.2
   PCI: 00:16.3
   PCI: 00:19.0
   PCI: 00:1a.0
   PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.0 child on link 0 PCI: 02:00.0
   PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 02:00.0
    PCI: 02:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.1
   PCI: 00:1c.2
   PCI: 00:1c.3 child on link 0 PCI: 03:00.0
   PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 03:00.0
    PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
    PCI: 03:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18
    PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
   PCI: 00:1c.4
   PCI: 00:1c.5
   PCI: 00:1c.6
   PCI: 00:1c.7
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1e.0
   PCI: 00:1f.0 child on link 0 PNP: 002e.1
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 002e.1
    PNP: 002e.1 resource base b00 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
    PNP: 002e.2
    PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
    PNP: 002e.3
    PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
    PNP: 002e.4
    PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
    PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 002e.7
    PNP: 002e.7 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.8
    PNP: 002e.8 resource base 62 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
    PNP: 002e.9
    PNP: 002e.9 resource base a00 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
    PNP: 00ff.1
    IOAPIC: 04
    IOAPIC: 04 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 0
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
   PCI: 00:1f.3
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1f.5
   PCI: 00:1f.6
   PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 03:00.0 10 *  [0x0 - 0xff] io
PCI: 00:1c.3 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.3 1c *  [0x0 - 0xfff] io
PCI: 00:02.0 20 *  [0x1000 - 0x103f] io
PCI: 00:1f.2 20 *  [0x1040 - 0x105f] io
PCI: 00:1f.2 10 *  [0x1060 - 0x1067] io
PCI: 00:1f.2 18 *  [0x1068 - 0x106f] io
PCI: 00:1f.2 14 *  [0x1070 - 0x1073] io
PCI: 00:1f.2 1c *  [0x1074 - 0x1077] io
DOMAIN: 0000 io: base: 1078 size: 1078 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 10 *  [0x0 - 0x1fff] mem
PCI: 00:1c.0 mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 03:00.0 20 *  [0x0 - 0x3fff] prefmem
PCI: 03:00.0 18 *  [0x4000 - 0x4fff] prefmem
PCI: 00:1c.3 prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
PCI: 00:02.0 10 *  [0x10000000 - 0x103fffff] mem
PCI: 00:1c.0 20 *  [0x10400000 - 0x104fffff] mem
PCI: 00:1c.3 24 *  [0x10500000 - 0x105fffff] prefmem
PCI: 00:04.0 10 *  [0x10600000 - 0x10607fff] mem
PCI: 00:1b.0 10 *  [0x10608000 - 0x1060bfff] mem
PCI: 00:1f.6 10 *  [0x1060c000 - 0x1060cfff] mem
PCI: 00:1f.2 24 *  [0x1060d000 - 0x1060d7ff] mem
PCI: 00:1a.0 10 *  [0x1060e000 - 0x1060e3ff] mem
PCI: 00:1d.0 10 *  [0x1060f000 - 0x1060f3ff] mem
PCI: 00:1f.3 10 *  [0x10610000 - 0x106100ff] mem
PCI: 00:16.0 10 *  [0x10611000 - 0x1061100f] mem
DOMAIN: 0000 mem: base: 10611010 size: 10611010 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 cf base f0000000 limit f3ffffff mem (fixed)
constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base d0000000 limit efffffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:1078 align:12 gran:0 limit:ffff
PCI: 00:1c.3 1c *  [0x1000 - 0x1fff] io
PCI: 00:02.0 20 *  [0x2000 - 0x203f] io
PCI: 00:1f.2 20 *  [0x2040 - 0x205f] io
PCI: 00:1f.2 10 *  [0x2060 - 0x2067] io
PCI: 00:1f.2 18 *  [0x2068 - 0x206f] io
PCI: 00:1f.2 14 *  [0x2070 - 0x2073] io
PCI: 00:1f.2 1c *  [0x2074 - 0x2077] io
DOMAIN: 0000 io: next_base: 2078 size: 1078 align: 12 gran: 0 done
PCI: 00:01.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:01.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.3 io: base:1000 size:1000 align:12 gran:12 limit:1fff
PCI: 03:00.0 10 *  [0x1000 - 0x10ff] io
PCI: 00:1c.3 io: next_base: 1100 size: 1000 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:d0000000 size:10611010 align:28 gran:0 limit:efffffff
PCI: 00:02.0 18 *  [0xd0000000 - 0xdfffffff] prefmem
PCI: 00:02.0 10 *  [0xe0000000 - 0xe03fffff] mem
PCI: 00:1c.0 20 *  [0xe0400000 - 0xe04fffff] mem
PCI: 00:1c.3 24 *  [0xe0500000 - 0xe05fffff] prefmem
PCI: 00:04.0 10 *  [0xe0600000 - 0xe0607fff] mem
PCI: 00:1b.0 10 *  [0xe0608000 - 0xe060bfff] mem
PCI: 00:1f.6 10 *  [0xe060c000 - 0xe060cfff] mem
PCI: 00:1f.2 24 *  [0xe060d000 - 0xe060d7ff] mem
PCI: 00:1a.0 10 *  [0xe060e000 - 0xe060e3ff] mem
PCI: 00:1d.0 10 *  [0xe060f000 - 0xe060f3ff] mem
PCI: 00:1f.3 10 *  [0xe0610000 - 0xe06100ff] mem
PCI: 00:16.0 10 *  [0xe0611000 - 0xe061100f] mem
DOMAIN: 0000 mem: next_base: e0611010 size: 10611010 align: 28 gran: 0 done
PCI: 00:01.0 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:01.0 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
PCI: 00:01.0 mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:01.0 mem: next_base: efffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:1c.0 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 mem: base:e0400000 size:100000 align:20 gran:20 limit:e04fffff
PCI: 02:00.0 10 *  [0xe0400000 - 0xe0401fff] mem
PCI: 00:1c.0 mem: next_base: e0402000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.3 prefmem: base:e0500000 size:100000 align:20 gran:20 limit:e05fffff
PCI: 03:00.0 20 *  [0xe0500000 - 0xe0503fff] prefmem
PCI: 03:00.0 18 *  [0xe0504000 - 0xe0504fff] prefmem
PCI: 00:1c.3 prefmem: next_base: e0505000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.3 mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:1c.3 mem: next_base: efffffff size: 0 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
TOUUD 0x1cfe00000 TOLUD 0xafa00000 TOM 0x180000000
MEBASE 0x17f800000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0xad000000 size 8M
Available memory below 4GB: 2768M
Available memory above 4GB: 3326M
Adding PCIe config bar base=0xf0000000 size=0x4000000
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:00.0 cf <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem<mmconfig>
PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:02.0 10 <- [0x00e0000000 - 0x00e03fffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000002000 - 0x000000203f] size 0x00000040 gran 0x06 io
PCI: 00:04.0 10 <- [0x00e0600000 - 0x00e0607fff] size 0x00008000 gran 0x0f mem64
PCI: 00:16.0 10 <- [0x00e0611000 - 0x00e061100f] size 0x00000010 gran 0x04 mem64
PCI: 00:1a.0 10 <- [0x00e060e000 - 0x00e060e3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x00e0608000 - 0x00e060bfff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.0 20 <- [0x00e0400000 - 0x00e04fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:1c.0 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x00e0400000 - 0x00e0401fff] size 0x00002000 gran 0x0d mem64
PCI: 00:1c.0 assign_resources, bus 2 link: 0
PCI: 00:1c.3 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 03 io
PCI: 00:1c.3 24 <- [0x00e0500000 - 0x00e05fffff] size 0x00100000 gran 0x14 bus 03 prefmem
PCI: 00:1c.3 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 mem
PCI: 00:1c.3 assign_resources, bus 3 link: 0
PCI: 03:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 03:00.0 18 <- [0x00e0504000 - 0x00e0504fff] size 0x00001000 gran 0x0c prefmem64
PCI: 03:00.0 20 <- [0x00e0500000 - 0x00e0503fff] size 0x00004000 gran 0x0e prefmem64
PCI: 00:1c.3 assign_resources, bus 3 link: 0
PCI: 00:1d.0 10 <- [0x00e060f000 - 0x00e060f3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PNP: 002e.1 60 <- [0x0000000b00 - 0x0000000b00] size 0x00000001 gran 0x00 io
PNP: 002e.7 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 002e.8 60 <- [0x0000000062 - 0x0000000062] size 0x00000001 gran 0x00 io
PNP: 002e.9 60 <- [0x0000000a00 - 0x0000000a00] size 0x00000001 gran 0x00 io
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x0000002060 - 0x0000002067] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000002070 - 0x0000002073] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000002068 - 0x000000206f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000002074 - 0x0000002077] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000002040 - 0x000000205f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00e060d000 - 0x00e060d7ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x00e0610000 - 0x00e06100ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.6 10 <- [0x00e060c000 - 0x00e060cfff] size 0x00001000 gran 0x0c mem64
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: acac
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 1000 size 1078 align 12 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base d0000000 size 10611010 align 28 gran 0 limit efffffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
  DOMAIN: 0000 resource base 100000 size acf00000 align 0 gran 0 limit 0 flags e0004200 index 4
  DOMAIN: 0000 resource base 100000000 size cfe00000 align 0 gran 0 limit 0 flags e0004200 index 5
  DOMAIN: 0000 resource base ad000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
  DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7
  DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 8
  DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 9
  DOMAIN: 0000 resource base 20000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index a
  DOMAIN: 0000 resource base 40000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index b
   PCI: 00:00.0
   PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf
   PCI: 00:01.0
   PCI: 00:01.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:01.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
   PCI: 00:01.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20
   PCI: 00:02.0
   PCI: 00:02.0 resource base e0000000 size 400000 align 22 gran 22 limit e03fffff flags 60000201 index 10
   PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 18
   PCI: 00:02.0 resource base 2000 size 40 align 6 gran 6 limit 203f flags 60000100 index 20
   PCI: 00:04.0
   PCI: 00:04.0 resource base e0600000 size 8000 align 15 gran 15 limit e0607fff flags 60000201 index 10
   PCI: 00:16.0
   PCI: 00:16.0 resource base e0611000 size 10 align 12 gran 4 limit e061100f flags 60000201 index 10
   PCI: 00:16.1
   PCI: 00:16.2
   PCI: 00:16.3
   PCI: 00:19.0
   PCI: 00:1a.0
   PCI: 00:1a.0 resource base e060e000 size 400 align 12 gran 10 limit e060e3ff flags 60000200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base e0608000 size 4000 align 14 gran 14 limit e060bfff flags 60000201 index 10
   PCI: 00:1c.0 child on link 0 PCI: 02:00.0
   PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
   PCI: 00:1c.0 resource base e0400000 size 100000 align 20 gran 20 limit e04fffff flags 60080202 index 20
    PCI: 02:00.0
    PCI: 02:00.0 resource base e0400000 size 2000 align 13 gran 13 limit e0401fff flags 60000201 index 10
   PCI: 00:1c.1
   PCI: 00:1c.2
   PCI: 00:1c.3 child on link 0 PCI: 03:00.0
   PCI: 00:1c.3 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
   PCI: 00:1c.3 resource base e0500000 size 100000 align 20 gran 20 limit e05fffff flags 60081202 index 24
   PCI: 00:1c.3 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20
    PCI: 03:00.0
    PCI: 03:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10
    PCI: 03:00.0 resource base e0504000 size 1000 align 12 gran 12 limit e0504fff flags 60001201 index 18
    PCI: 03:00.0 resource base e0500000 size 4000 align 14 gran 14 limit e0503fff flags 60001201 index 20
   PCI: 00:1c.4
   PCI: 00:1c.5
   PCI: 00:1c.6
   PCI: 00:1c.7
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base e060f000 size 400 align 12 gran 10 limit e060f3ff flags 60000200 index 10
   PCI: 00:1e.0
   PCI: 00:1f.0 child on link 0 PNP: 002e.1
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 002e.1
    PNP: 002e.1 resource base b00 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
    PNP: 002e.2
    PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
    PNP: 002e.3
    PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
    PNP: 002e.4
    PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
    PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 002e.7
    PNP: 002e.7 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 002e.8
    PNP: 002e.8 resource base 62 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
    PNP: 002e.9
    PNP: 002e.9 resource base a00 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
    PNP: 00ff.1
    IOAPIC: 04
    IOAPIC: 04 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 0
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 2060 size 8 align 3 gran 3 limit 2067 flags 60000100 index 10
   PCI: 00:1f.2 resource base 2070 size 4 align 2 gran 2 limit 2073 flags 60000100 index 14
   PCI: 00:1f.2 resource base 2068 size 8 align 3 gran 3 limit 206f flags 60000100 index 18
   PCI: 00:1f.2 resource base 2074 size 4 align 2 gran 2 limit 2077 flags 60000100 index 1c
   PCI: 00:1f.2 resource base 2040 size 20 align 5 gran 5 limit 205f flags 60000100 index 20
   PCI: 00:1f.2 resource base e060d000 size 800 align 12 gran 11 limit e060d7ff flags 60000200 index 24
   PCI: 00:1f.3
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.3 resource base e0610000 size 100 align 12 gran 8 limit e06100ff flags 60000201 index 10
   PCI: 00:1f.5
   PCI: 00:1f.6
   PCI: 00:1f.6 resource base e060c000 size 1000 align 12 gran 12 limit e060cfff flags 60000201 index 10
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 13652 exit 0
Enabling resources...
PCI: 00:00.0 subsystem <- 1ae0/c000
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 0003
PCI: 00:01.0 cmd <- 00
PCI: 00:02.0 subsystem <- 1ae0/c000
PCI: 00:02.0 cmd <- 03
PCI: 00:04.0 cmd <- 02
PCI: 00:16.0 subsystem <- 1ae0/c000
PCI: 00:16.0 cmd <- 02
PCI: 00:1a.0 subsystem <- 1ae0/c000
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 1ae0/c000
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 1ae0/c000
PCI: 00:1c.0 cmd <- 106
PCI: 00:1c.3 bridge ctrl <- 0003
PCI: 00:1c.3 subsystem <- 1ae0/c000
PCI: 00:1c.3 cmd <- 107
PCI: 00:1d.0 subsystem <- 1ae0/c000
PCI: 00:1d.0 cmd <- 102
pch_decode_init
PCI: 00:1f.0 subsystem <- 1ae0/c000
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 1ae0/c000
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 1ae0/c000
PCI: 00:1f.3 cmd <- 103
PCI: 00:1f.6 subsystem <- 1ae0/c000
PCI: 00:1f.6 cmd <- 02
PCI: 02:00.0 cmd <- 02
PCI: 03:00.0 cmd <- 03
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 719 exit 0
Initializing devices...
Root Device init ...
lumpy_ec_init
..Root Device init finished in 9978 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Setting up SMI for CPU
Loading module at 00038000 with entry 00038000. filesize: 0x160 memsize: 0x160
Processing 10 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 00038000. Will call 001141f2(00133780)
Installing SMM handler to 0xad000000
Loading module at ad010000 with entry ad01010c. filesize: 0x1090 memsize: 0x50b0
Processing 60 relocs. Offset value of 0xad010000
Loading module at ad008000 with entry ad008000. filesize: 0x160 memsize: 0x160
Processing 10 relocs. Offset value of 0xad008000
SMM Module: placing jmp sequence at ad007c00 rel16 0x03fd
SMM Module: placing jmp sequence at ad007800 rel16 0x07fd
SMM Module: placing jmp sequence at ad007400 rel16 0x0bfd
SMM Module: stub loaded at ad008000. Will call ad01010c(00000000)
Initializing southbridge SMI... ... pmbase = 0x0500

SMI_STS: PM1 
PM1_STS: WAK BM 
GPE0_STS: GPIO15 GPIO14 GPIO13 GPIO11 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 SMB_WAK 
ALT_GP_SMI_STS: GPI15 GPI14 GPI13 GPI11 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 
TCO_STS: 
  ... raise SMI#
In relocation handler: cpu 0
New SMBASE=0xad000000 IEDBASE=0xad400000 @ 0003fc00
Writing SMRR. base = 0xad000006, mask=0xff800800
Relocation complete.
Locking SMM.
Initializing CPU #0
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 8740 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x29
CPU: Intel(R) Core(TM) i5-2467M CPU @ 1.60GHz.
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x00000000ad000000 size 0xacf40000 type 6
0x00000000ad000000 - 0x00000000d0000000 size 0x23000000 type 0
0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
0x0000000100000000 - 0x00000001cfe00000 size 0xcfe00000 type 6
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 6/7.
MTRR: WB selected as default type.
MTRR: 0 base 0x00000000ad000000 mask 0x0000000fff000000 type 0
MTRR: 1 base 0x00000000ae000000 mask 0x0000000ffe000000 type 0
MTRR: 2 base 0x00000000b0000000 mask 0x0000000ff0000000 type 0
MTRR: 3 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0
MTRR: 4 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
MTRR: 5 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local apic... apic_id: 0x00 done.
Disabling VMX
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 1600
Turbo is available but hidden
Turbo has been enabled
CPU: 0 has 2 cores, 2 threads per core
CPU: 0 has core 1
CPU1: stack_base 0012d000, stack_end 0012dff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
In relocation handler: cpu 1
New SMBASE=0xacfffc00 IEDBASE=0xad400000 @ 0003fc00
Writing SMRR. base = 0xad000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
CPU: 0 has core 2
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 8740 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x29
CPU: Intel(R) Core(TM) i5-2467M CPU @ 1.60GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local apic... apic_id: 0x01 done.
Disabling VMX
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 1600
CPU #1 initialized
CPU2: stack_base 0012c000, stack_end 0012cff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 2.
After apic_write.
In relocation handler: cpu 2
Startup point 1.
Waiting for send to finish...
+New SMBASE=0xacfff800 IEDBASE=0xad400000 @ 0003fc00
Sending STARTUP #2 to 2.
After apic_write.
Writing SMRR. base = 0xad000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU: 0 has core 3
Initializing CPU #2
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 8740 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x0
microcode: updated to revision 0x29 date=2013-06-12
CPU: Intel(R) Core(TM) i5-2467M CPU @ 1.60GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local apic... apic_id: 0x02 done.
Disabling VMX
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 1600
CPU #2 initialized
CPU3: stack_base 0012b000, stack_end 0012bff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 3.
After apic_write.
In relocation handler: cpu 3
New SMBASE=0xacfff400 IEDBASE=0xad400000 @ 0003fc00
Writing SMRR. base = 0xad000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU #0 initialized
Waiting for 1 CPUS to stop
Initializing CPU #3
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 8740 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x29
CPU: Intel(R) Core(TM) i5-2467M CPU @ 1.60GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local apic... apic_id: 0x03 done.
Disabling VMX
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 1600
CPU #3 initialized
All AP CPUs stopped (512 loops)
CPU0: stack: 0012e000 - 0012f000, lowest used address 0012eac0, stack used: 1344 bytes
CPU1: stack: 0012d000 - 0012e000, lowest used address 0012dca4, stack used: 860 bytes
CPU2: stack: 0012c000 - 0012d000, lowest used address 0012cca4, stack used: 860 bytes
CPU3: stack: 0012b000 - 0012c000, lowest used address 0012bca4, stack used: 860 bytes
CPU_CLUSTER: 0 init finished in 59325 usecs
PCI: 00:00.0 init ...
Disabling PEG12.
Disabling PEG11.
Disabling PEG60.
Set BIOS_RESET_CPL
CPU TDP: 17 Watts
PCI: 00:00.0 init finished in 1017 usecs
PCI: 00:02.0 init ...
GT Power Management Init
SNB GT2 Power Meter Weights
GT Power Management Init (post VBIOS)
PCI: 00:02.0 init finished in 353 usecs
PCI: 00:04.0 init ...
PCI: 00:04.0 init finished in 0 usecs
PCI: 00:16.0 init ...
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : YES
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Normal
ME: Current Operation State : M0 with UMA
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : Host Communication
ME: Power Management Event  : Clean Moff->Mx wake
ME: Progress Phase State    : Host communication established
ME: BIOS path: Normal
ME: Extend SHA-256: 5f466e1c69b5fe232b5bb547939edd493c81c66fa0394befb8b672426018f72a
ME: Firmware Version 7.1.1161.40 (code) 7.1.1161.40 (recovery)
ME Capability: Full Network manageability     : disabled
ME Capability: Regular Network manageability  : disabled
ME Capability: Manageability                  : disabled
ME Capability: Small business technology      : disabled
ME Capability: Level III manageability        : disabled
ME Capability: IntelR Anti-Theft (AT)         : disabled
ME Capability: IntelR Capability Licensing Service (CLS) : enabled
ME Capability: IntelR Power Sharing Technology (MPC) : enabled
ME Capability: ICC Over Clocking              : enabled
ME Capability: Protected Audio Video Path (PAVP) : disabled
ME Capability: IPV6                           : disabled
ME Capability: KVM Remote Control (KVM)       : disabled
ME Capability: Outbreak Containment Heuristic (OCH) : disabled
ME Capability: Virtual LAN (VLAN)             : disabled
ME Capability: TLS                            : disabled
ME Capability: Wireless LAN (WLAN)            : disabled
PCI: 00:16.0 init finished in 6027 usecs
PCI: 00:1a.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1a.0 init finished in 4 usecs
PCI: 00:1b.0 init ...
Azalia: base = e0608000
Azalia: codec_mask = 09
Azalia: Initializing codec #3
Azalia: codec viddid: 80862805
Azalia: No verb!
Azalia: Initializing codec #0
Azalia: codec viddid: 10134210
Azalia: verb_size: 28
Azalia: verb loaded.
PCI: 00:1b.0 init finished in 3476 usecs
PCI: 00:1c.0 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 8 usecs
PCI: 00:1c.3 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.3 init finished in 8 usecs
PCI: 00:1d.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 4 usecs
PCI: 00:1f.0 init ...
pch: lpc_init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
  reg 0x0000: 0x02000000
  reg 0x0001: 0x00170020
  reg 0x0002: 0x00170020
Set power off after power failure.
NMI sources disabled.
CougarPoint PM init
rtc_failed = 0x0
RTC Init
Enabling BIOS updates outside of SMM... Disabling ACPI via APMC:
done.
pch_spi_init
PCI: 00:1f.0 init finished in 6075 usecs
PCI: 00:1f.2 init ...
SATA: Initializing...
SATA: Controller in AHCI mode.
ABAR: e060d000
PCI: 00:1f.2 init finished in 74 usecs
PCI: 00:1f.3 init ...
PCI: 00:1f.3 init finished in 7 usecs
PCI: 00:1f.6 init ...
PCI: 00:1f.6 init finished in 0 usecs
PCI: 02:00.0 init ...
PCI: 02:00.0 init finished in 0 usecs
PCI: 03:00.0 init ...
PCI: 03:00.0 init finished in 0 usecs
PNP: 002e.1 init ...
PNP: 002e.1 init finished in 0 usecs
PNP: 002e.7 init ...
PNP: 002e.7 init finished in 0 usecs
PNP: 002e.8 init ...
PNP: 002e.8 init finished in 0 usecs
PNP: 002e.9 init ...
PNP: 002e.9 init finished in 0 usecs
IOAPIC: 04 init ...
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: 23 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: 04 init finished in 42 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 0
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 0
PCI: 00:1c.2: enabled 0
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 0
PNP: 002e.3: enabled 0
PNP: 002e.4: enabled 0
PNP: 002e.7: enabled 1
PNP: 002e.8: enabled 1
PNP: 002e.9: enabled 1
PNP: 00ff.1: enabled 0
IOAPIC: 04: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:04.0: enabled 1
PCI: 02:00.0: enabled 1
PCI: 03:00.0: enabled 1
APIC: 01: enabled 1
APIC: 02: enabled 1
APIC: 03: enabled 1
BS: BS_DEV_INIT times (us): entry 6 run 86595 exit 0
Finalize devices...
PCI: 00:1f.0 final
Devices finalized
BS: BS_POST_DEVICE times (us): entry 0 run 5 exit 0
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3 exit 0
Updating MRC cache data.
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'mrc.cache'
CBFS: Found @ offset fec0 size 10000
find_current_mrc_cache_local: picked entry 0 from cache block
MRC data in flash is up to date. No update.
Writing ISA IRQs
automatic IRQ entry for PCI: 00:00.0: INTA# -> IOAPIC 4 PIN 16
automatic IRQ entry for PCI: 00:02.0: INTA# -> IOAPIC 4 PIN 16
automatic IRQ entry for PCI: 00:16.0: INTA# -> IOAPIC 4 PIN 16
fixed IRQ entry for: PCI: 00:1a.0: INTA# -> IOAPIC 4 PIN 17
fixed IRQ entry for: PCI: 00:1b.0: INTA# -> IOAPIC 4 PIN 22
automatic IRQ entry for PCI: 00:1c.0: INTA# -> IOAPIC 4 PIN 16
automatic IRQ entry for PCI: 00:1c.3: INTD# -> IOAPIC 4 PIN 18
fixed IRQ entry for: PCI: 00:1d.0: INTA# -> IOAPIC 4 PIN 19
fixed IRQ entry for: PCI: 00:1f.0: INTA# -> IOAPIC 4 PIN 16
fixed IRQ entry for: PCI: 00:1f.2: INTA# -> IOAPIC 4 PIN 16
fixed IRQ entry for: PCI: 00:1f.3: INTC# -> IOAPIC 4 PIN 23
automatic IRQ entry for PCI: 00:1f.6: INTC# -> IOAPIC 4 PIN 18
automatic IRQ entry for PCI: 00:01.0: INTA# -> IOAPIC 4 PIN 18
automatic IRQ entry for PCI: 00:04.0: INTA# -> IOAPIC 4 PIN 16
automatic IRQ entry for PCI: 02:00.0: INTA# -> IOAPIC 4 PIN 16
automatic IRQ entry for PCI: 03:00.0: INTA# -> IOAPIC 4 PIN 19
Wrote the mp table end at: 000f0010 - 000f01c4
MPTABLE len: 452
Writing ISA IRQs
automatic IRQ entry for PCI: 00:00.0: INTA# -> IOAPIC 4 PIN 16
automatic IRQ entry for PCI: 00:02.0: INTA# -> IOAPIC 4 PIN 16
automatic IRQ entry for PCI: 00:16.0: INTA# -> IOAPIC 4 PIN 16
fixed IRQ entry for: PCI: 00:1a.0: INTA# -> IOAPIC 4 PIN 17
fixed IRQ entry for: PCI: 00:1b.0: INTA# -> IOAPIC 4 PIN 22
automatic IRQ entry for PCI: 00:1c.0: INTA# -> IOAPIC 4 PIN 16
automatic IRQ entry for PCI: 00:1c.3: INTD# -> IOAPIC 4 PIN 18
fixed IRQ entry for: PCI: 00:1d.0: INTA# -> IOAPIC 4 PIN 19
fixed IRQ entry for: PCI: 00:1f.0: INTA# -> IOAPIC 4 PIN 16
fixed IRQ entry for: PCI: 00:1f.2: INTA# -> IOAPIC 4 PIN 16
fixed IRQ entry for: PCI: 00:1f.3: INTC# -> IOAPIC 4 PIN 23
automatic IRQ entry for PCI: 00:1f.6: INTC# -> IOAPIC 4 PIN 18
automatic IRQ entry for PCI: 00:01.0: INTA# -> IOAPIC 4 PIN 18
automatic IRQ entry for PCI: 00:04.0: INTA# -> IOAPIC 4 PIN 16
automatic IRQ entry for PCI: 02:00.0: INTA# -> IOAPIC 4 PIN 16
automatic IRQ entry for PCI: 03:00.0: INTA# -> IOAPIC 4 PIN 19
Wrote the mp table end at: aced3010 - aced31c4
MPTABLE len: 452
MP table: 452 bytes.
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 41840 size 34f6
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at aceaf000.
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * IGD OpRegion
GET_VBIOS: cc53 f47b 0 14 3b
VBIOS not found.
.ACPI:    * FADT
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
Found 1 CPU(s) with 4 core(s) each.
PSS: 1601MHz power 17000 control 0x1700 status 0x1700
PSS: 1600MHz power 17000 control 0x1000 status 0x1000
PSS: 1400MHz power 14532 control 0xe00 status 0xe00
PSS: 1200MHz power 12163 control 0xc00 status 0xc00
PSS: 1000MHz power 9902 control 0xa00 status 0xa00
PSS: 800MHz power 7743 control 0x800 status 0x800
PSS: 1601MHz power 17000 control 0x1700 status 0x1700
PSS: 1600MHz power 17000 control 0x1000 status 0x1000
PSS: 1400MHz power 14532 control 0xe00 status 0xe00
PSS: 1200MHz power 12163 control 0xc00 status 0xc00
PSS: 1000MHz power 9902 control 0xa00 status 0xa00
PSS: 800MHz power 7743 control 0x800 status 0x800
PSS: 1601MHz power 17000 control 0x1700 status 0x1700
PSS: 1600MHz power 17000 control 0x1000 status 0x1000
PSS: 1400MHz power 14532 control 0xe00 status 0xe00
PSS: 1200MHz power 12163 control 0xc00 status 0xc00
PSS: 1000MHz power 9902 control 0xa00 status 0xa00
PSS: 800MHz power 7743 control 0x800 status 0x800
PSS: 1601MHz power 17000 control 0x1700 status 0x1700
PSS: 1600MHz power 17000 control 0x1000 status 0x1000
PSS: 1400MHz power 14532 control 0xe00 status 0xe00
PSS: 1200MHz power 12163 control 0xc00 status 0xc00
PSS: 1000MHz power 9902 control 0xa00 status 0xa00
PSS: 800MHz power 7743 control 0x800 status 0x800
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI: added table 3/32, length now 48
ACPI:    * TCPA
TCPA log created at ace9c000
ACPI: added table 4/32, length now 52
ACPI:    * MADT
ACPI: added table 5/32, length now 56
current = aceb3de0
ACPI:    * HPET
ACPI: added table 6/32, length now 60
ACPI: done.
ACPI tables: 20000 bytes.
smbios_write_tables: ace9b000
Root Device (SAMSUNG Lumpy)
CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge)
APIC: 00 (unknown)
APIC: acac (Intel SandyBridge/IvyBridge CPU)
DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PNP: 002e.1 (SMSC MEC1308 EC SuperIO Interface)
PNP: 002e.2 (SMSC MEC1308 EC SuperIO Interface)
PNP: 002e.3 (SMSC MEC1308 EC SuperIO Interface)
PNP: 002e.4 (SMSC MEC1308 EC SuperIO Interface)
PNP: 002e.7 (SMSC MEC1308 EC SuperIO Interface)
PNP: 002e.8 (SMSC MEC1308 EC SuperIO Interface)
PNP: 002e.9 (SMSC MEC1308 EC SuperIO Interface)
PNP: 00ff.1 (SMSC MEC1308 EC Mailbox Interface)
IOAPIC: 04 (IOAPIC)
PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:01.0 (unknown)
PCI: 00:04.0 (unknown)
PCI: 02:00.0 (unknown)
PCI: 03:00.0 (unknown)
APIC: 01 (unknown)
APIC: 02 (unknown)
APIC: 03 (unknown)
SMBIOS tables: 385 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 12f1
Writing coreboot table at 0xaced4000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000a0000-00000000000fffff: RESERVED
 3. 0000000000100000-000000001fffffff: RAM
 4. 0000000020000000-00000000201fffff: RESERVED
 5. 0000000020200000-000000003fffffff: RAM
 6. 0000000040000000-00000000401fffff: RESERVED
 7. 0000000040200000-00000000ace9afff: RAM
 8. 00000000ace9b000-00000000acffffff: CONFIGURATION TABLES
 9. 00000000ad000000-00000000af9fffff: RESERVED
10. 00000000f0000000-00000000f3ffffff: RESERVED
11. 0000000100000000-00000001cfdfffff: RAM
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
FMAP: Found "FLASH" version 1.1 at 700000.
FMAP: base = ff800000 size = 800000 #areas = 3
Wrote coreboot table at: aced4000, 0x340 bytes, checksum 72b5
coreboot table: 856 bytes.
IMD ROOT    0. acfff000 00001000
IMD SMALL   1. acffe000 00001000
CONSOLE     2. acfde000 00020000
TIME STAMP  3. acfdd000 00000400
MRC DATA    4. acfdc000 00000bc0
ACPI RESUME 5. acedc000 00100000
COREBOOT    6. aced4000 00008000
SMP TABLE   7. aced3000 00001000
ACPI        8. aceaf000 00024000
ACPI GNVS   9. aceae000 00001000
4f444749   10. aceac000 00002000
TCPA LOG   11. ace9c000 00010000
SMBIOS     12. ace9b000 00000800
IMD small region:
  IMD ROOT    0. acffec00 00000400
  CAR GLOBALS 1. acffeac0 00000140
  ROMSTAGE    2. acffeaa0 00000004
  GDT         3. acffe8a0 00000200
BS: BS_WRITE_TABLES times (us): entry 4499 run 8495 exit 0
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 44d80 size ebb9
Loading segment from rom address 0xfff44eb8
  code (compression=1)
  New segment dstaddr 0xe4660 memsize 0x1b9a0 srcaddr 0xfff44ef0 filesize 0xeb81
Loading segment from rom address 0xfff44ed4
  Entry Point 0x000ff06e
Payload being loaded below 1MiB without region being marked as RAM usable.
Bounce Buffer at ace2b000, 454688 bytes
Loading Segment: addr: 0x00000000000e4660 memsz: 0x000000000001b9a0 filesz: 0x000000000000eb81
lb: [0x0000000000100000, 0x0000000000137810)
Post relocation: addr: 0x00000000000e4660 memsz: 0x000000000001b9a0 filesz: 0x000000000000eb81
using LZMA
[ 0x000e4660, 00100000, 0x00100000) <- fff44ef0
dest 000e4660, end 00100000, bouncebuffer ace2b000
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 33506 exit 0
PCH watchdog disabled
Jumping to boot code at 000ff06e(aced4000)
CPU0: stack: 0012e000 - 0012f000, lowest used address 0012eac0, stack used: 1344 bytes
entry    = 0x000ff06e
lb_start = 0x00100000
lb_size  = 0x00037810
buffer   = 0xace2b000
SeaBIOS (version rel-1.9.1-0-gb3ef39f)
BUILD: gcc: (coreboot toolchain v1.38 April 3rd, 2016) 5.2.0 binutils: (GNU Binutils) 2.25
Found coreboot cbmem console @ acfde000
Found mainboard SAMSUNG Lumpy
Relocating init from 0x000e5a80 to 0xace4fb80 (size 45952)
Found CBFS header at 0xfff00138
multiboot: eax=0, ebx=0
Found 16 PCI devices (max PCI bus is 03)
Copying SMBIOS entry point from 0xace9b000 to 0x000f0de0
Copying ACPI RSDP from 0xaceaf000 to 0x000f0db0
Copying MPTABLE from 0xaced3000/aced3010 to 0x000f0be0
Using pmtimer, ioport 0x508
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.9.1-0-gb3ef39f)
EHCI init on dev 00:1a.0 (regs=0xe060e020)
EHCI init on dev 00:1d.0 (regs=0xe060f020)
Found 0 lpt ports
Found 0 serial ports
AHCI controller at 1f.2, iobase e060d000, irq 10
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
AHCI/0: registering: "AHCI/0: KINGSTON SMS200S360G ATA-8 Hard-Disk (57241 MiBytes)"
PS2 keyboard initialized
Searching bootorder for: /pci@i0cf8/usb@1d/hub@1/storage@1/*@0/*@0,0
Searching bootorder for: /pci@i0cf8/usb@1d/hub@1/usb-*@1
USB MSC vendor='JetFlash' product='TS4GJF2A/120' rev='0.00' type=0 removable=1
USB MSC blksize=512 sectors=8028160
Initialized USB HUB (1 ports used)
Initialized USB HUB (0 ports used)
All threads complete.
Scan for option roms

Press ESC for boot menu.

Select boot device:

1. AHCI/0: KINGSTON SMS200S360G ATA-8 Hard-Disk (57241 MiBytes
2. USB MSC Drive JetFlash TS4GJF2A/120 0.00

Searching bootorder for: HALT
drive 0x000f0b40: PCHS=0/0/0 translation=lba LCHS=995/128/63 s=8028160
drive 0x000f0b70: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=117231408
Space available for UMB: cf000-ee800, f0000-f0b40
Returned 249856 bytes of ZoneHigh
e820 map has 11 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 0000000020000000 = 1 RAM
  4: 0000000020000000 - 0000000020200000 = 2 RESERVED
  5: 0000000020200000 - 0000000040000000 = 1 RAM
  6: 0000000040000000 - 0000000040200000 = 2 RESERVED
  7: 0000000040200000 - 00000000ace98000 = 1 RAM
  8: 00000000ace98000 - 00000000afa00000 = 2 RESERVED
  9: 00000000f0000000 - 00000000f4000000 = 2 RESERVED
  10: 0000000100000000 - 00000001cfe00000 = 1 RAM
enter handle_19:
  NULL
Booting from Hard Disk...
Booting from 0000:7c00