supermicro/x11-lga1151-series/x11ssm-f/4.12-392-g11217de375-dirty/2020-05-30T17_44_12Z
diff --git a/supermicro/x11-lga1151-series/x11ssm-f/4.12-392-g11217de375-dirty/2020-05-30T17_44_12Z/coreboot_console.txt b/supermicro/x11-lga1151-series/x11ssm-f/4.12-392-g11217de375-dirty/2020-05-30T17_44_12Z/coreboot_console.txt
new file mode 100644
index 0000000..c3a402c
--- /dev/null
+++ b/supermicro/x11-lga1151-series/x11ssm-f/4.12-392-g11217de375-dirty/2020-05-30T17_44_12Z/coreboot_console.txt
@@ -0,0 +1,2822 @@
+coreboot-4.12-392-g11217de375-dirty Fri May 29 20:47:54 UTC 2020 bootblock starting (log level: 8)...
+CPU: Intel(R) Xeon(R) CPU E3-1230 v6 @ 3.50GHz
+CPU: ID 906e9, Kabylake H B0, ucode: 000000c9
+CPU: AES supported, TXT supported, VT supported
+MCH: device id 5918 (rev 05) is Kabylake DT 2
+PCH: device id a149 (rev 31) is Skylake PCH-H C236
+IGD: device id ffff (rev ff) is Unknown
+misccfg_mask:fff000ff misccfg_value:43600
+Timestamp - end of bootblock: 219009190
+FMAP: Found "FLASH" version 1.1 at 0x510000.
+FMAP: base = 0xff000000 size = 0x1000000 #areas = 4
+FMAP: area COREBOOT found @ 510200 (11468288 bytes)
+CBFS: Locating 'fallback/romstage'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size c93c
+CBFS: Found @ offset 80 size c93c
+Timestamp - starting to load romstage: 352073146
+Timestamp - finished loading romstage: 367549018
+BS: bootblock times (exec / console): total (unknown) / 85 ms
+
+
+coreboot-4.12-392-g11217de375-dirty Fri May 29 20:47:54 UTC 2020 romstage starting (log level: 8)...
+pm1_sts: 0100 pm1_en: 4000 pm1_cnt: 00001c00
+gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
+gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
+gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
+gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
+TCO_STS: 0000 0000
+GEN_PMCON: e0810200 00001808
+GBLRST_CAUSE: 00010100 00000000
+prev_sleep_state 0
+FMAP: area COREBOOT found @ 510200 (11468288 bytes)
+CBFS: Locating 'fspm.bin'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size c93c
+CBFS: Unmatched 'fallback/romstage' at 80
+CBFS: Checking offset ca40
+CBFS: File @ offset ca40 size 31400
+CBFS: Unmatched 'cpu_microcode_blob.bin' at ca40
+CBFS: Checking offset 3dec0
+CBFS: File @ offset 3dec0 size 1b719
+CBFS: Unmatched 'fallback/ramstage' at 3dec0
+CBFS: Checking offset 59640
+CBFS: File @ offset 59640 size 419
+CBFS: Unmatched 'config' at 59640
+CBFS: Checking offset 59ac0
+CBFS: File @ offset 59ac0 size 2a8
+CBFS: Unmatched 'revision' at 59ac0
+CBFS: Checking offset 59dc0
+CBFS: File @ offset 59dc0 size 293c
+CBFS: Unmatched 'fallback/dsdt.aml' at 59dc0
+CBFS: Checking offset 5c780
+CBFS: File @ offset 5c780 size 100
+CBFS: Unmatched 'cmos.default' at 5c780
+CBFS: Checking offset 5c8c0
+CBFS: File @ offset 5c8c0 size 80
+CBFS: Unmatched 'smcbiosinfo.bin' at 5c8c0
+CBFS: Checking offset 5c980
+CBFS: File @ offset 5c980 size 310
+CBFS: Unmatched 'cmos_layout.bin' at 5c980
+CBFS: Checking offset 5cd00
+CBFS: File @ offset 5cd00 size 85
+CBFS: Unmatched 'etc/grub.cfg' at 5cd00
+CBFS: Checking offset 5cdc0
+CBFS: File @ offset 5cdc0 size 63000
+CBFS: Found @ offset 5cdc0 size 63000
+Spec version: v2.0
+Revision: 3.7.6, Build Number 0
+Type: release/test
+image ID: $KBLFSP$, base 0xff56d000 + 0x63000
+ Config region 0x5f3c4 + 0x648
+ Memory init offset 0x1c8
+Spec version: v2.0
+Revision: 3.7.6, Build Number 0
+Type: release/test
+image ID: $KBLFSP$, base 0xff56d000 + 0x63000
+ Config region 0x5f3c4 + 0x648
+ Memory init offset 0x1c8
+Timestamp - before RAM initialization: 1125912958
+POST: 0x34
+FMAP: area RW_MRC_CACHE found @ 500000 (65536 bytes)
+MRC: no data in 'RW_MRC_CACHE'
+bootmode is set to: 0
+PRMRR disabled by config.
+block_cmd_loop: status = c2, len = 256 / 256, loops = 17117
+block_cmd_loop: status = c2, len = 256 / 256, loops = 17120
+block_cmd_loop: status = c2, len = 256 / 256, loops = 17112
+block_cmd_loop: status = c2, len = 256 / 256, loops = 17229
+block_cmd_loop: status = c2, len = 256 / 256, loops = 17132
+block_cmd_loop: status = c2, len = 256 / 256, loops = 17096
+block_cmd_loop: status = c2, len = 256 / 256, loops = 17102
+block_cmd_loop: status = c2, len = 256 / 256, loops = 17102
+POST: 0x36
+0x0000000000001d0a: IA32_MTRRCAP: SMRR, WC, FIX, 10 variable MTRRs
+0x0000000000000800: IA32_MTRR_DEF_TYPE: E, UC
+0x0000000000000000: IA32_MTRR_FIX64K_00000
+ 0x00000000 - 0x0007ffff: UC
+0x0000000000000000: IA32_MTRR_FIX16K_80000
+ 0x00080000 - 0x0009ffff: UC
+0x0000000000000000: IA32_MTRR_FIX16K_A0000
+ 0x000a0000 - 0x000bffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_C0000
+ 0x000c0000 - 0x000c7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_C8000
+ 0x000c8000 - 0x000cffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_D0000
+ 0x000d0000 - 0x000d7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_D8000
+ 0x000d8000 - 0x000dffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_E0000
+ 0x000e0000 - 0x000e7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_E8000
+ 0x000e8000 - 0x000effff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_F0000
+ 0x000f0000 - 0x000f7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_F8000
+ 0x000f8000 - 0x000fffff: UC
+0x00000000fef00006: PHYBASE0: Address = 0x00000000fef00000, WB
+0x0000007ffffc0800: PHYMASK0: Length = 0x0000000000040000, Valid
+0x00000000ff000005: PHYBASE1: Address = 0x00000000ff000000, WP
+0x0000007fff000800: PHYMASK1: Length = 0x0000000001000000, Valid
+0x0000000000000000: PHYBASE2
+0x0000000000000000: PHYMASK2: Disabled
+0x0000000000000000: PHYBASE3
+0x0000000000000000: PHYMASK3: Disabled
+0x0000000000000000: PHYBASE4
+0x0000000000000000: PHYMASK4: Disabled
+0x0000000000000000: PHYBASE5
+0x0000000000000000: PHYMASK5: Disabled
+0x0000000000000000: PHYBASE6
+0x0000000000000000: PHYMASK6: Disabled
+0x0000000000000000: PHYBASE7
+0x0000000000000000: PHYMASK7: Disabled
+0x0000000000000000: PHYBASE8
+0x0000000000000000: PHYMASK8: Disabled
+0x0000000000000000: PHYBASE9
+0x0000000000000000: PHYMASK9: Disabled
+Architectural UPD values for MemoryInit at: 0xfef03878
+ 0x01: Revision
+ 0x00000000: NvsBufferPtr
+ 0xfef17f00 --> 0xfef18000: StackBase
+ 0x00028000: StackSize
+ 0x00000000 --> 0x00002000: BootLoaderTolumSize
+ 0x00000000: BootMode
+UPD values for MemoryInit:
+0xfef03858: 4b 42 4c 55 50 44 5f 4d 00 00 00 00 00 00 00 00 KBLUPD_M........
+0xfef03868: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0xfef03878: 01 00 00 00 00 00 00 00 00 80 f1 fe 00 80 02 00 ................
+0xfef03888: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 . ..............
+0xfef03898: 00 00 44 00 00 00 00 00 00 50 f0 fe 00 52 f0 fe ..D......P...R..
+0xfef038a8: 00 54 f0 fe 00 56 f0 fe 00 02 0f f0 00 f0 0f f0 .T...V..........
+0xfef038b8: 0f 00 ff 00 ff 00 0f f0 00 f0 0f f0 0f 00 ff 00 ................
+0xfef038c8: ff 00 02 00 01 03 06 04 07 05 01 03 02 00 05 07 ................
+0xfef038d8: 06 04 c8 00 51 00 a2 00 64 00 28 00 28 00 17 00 ....Q...d.(.(...
+0xfef038e8: 28 00 01 00 00 01 00 00 00 00 40 00 00 00 80 00 (.........@.....
+0xfef038f8: 00 08 00 00 00 01 00 00 00 00 00 00 00 00 00 00 ................
+0xfef03908: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+...
+0xfef03938: 00 00 00 00 00 01 00 00 00 00 07 00 00 00 00 00 ................
+0xfef03948: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+...
+0xfef039c8: 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00 ................
+0xfef039d8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 02 ................
+0xfef039e8: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0xfef039f8: 00 a0 d1 fe 00 b0 d1 fe 00 c0 d1 fe 01 00 00 00 ................
+0xfef03a08: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+...
+0xfef03a78: 2c 01 64 00 00 00 01 01 01 00 00 00 00 00 00 00 ,.d.............
+0xfef03a88: 01 01 01 00 00 04 04 04 04 07 07 07 07 02 02 02 ................
+0xfef03a98: 02 03 03 01 0c 0c 0c 0c 0c 0c 0c 0c 00 00 00 00 ................
+0xfef03aa8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0xfef03ab8: 00 00 00 00 00 00 00 df 03 00 00 00 00 00 00 00 ................
+0xfef03ac8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+...
+0xfef03b28: 00 00 00 01 01 00 01 00 00 00 01 00 00 00 00 00 ................
+0xfef03b38: 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0xfef03b48: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0xfef03b58: 00 00 01 00 00 00 00 00 00 00 01 00 00 00 d0 fe ................
+0xfef03b68: f0 1f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0xfef03b78: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+...
+0xfef03d48: 00 00 00 01 00 18 00 00 a0 ef 00 00 00 00 00 00 ................
+0xfef03d58: 00 00 00 00 00 00 00 00 11 07 00 00 12 02 00 ff ................
+0xfef03d68: 01 00 07 03 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0xfef03d78: 54 45 53 54 01 00 01 01 01 01 00 02 00 02 02 02 TEST............
+0xfef03d88: 00 00 00 01 00 02 02 00 00 00 00 00 00 00 00 00 ................
+0xfef03d98: 00 00 00 01 07 07 07 07 07 07 07 07 07 07 07 07 ................
+0xfef03da8: 07 07 07 07 07 07 07 07 07 07 07 07 07 07 07 07 ................
+0xfef03db8: 07 07 07 07 02 02 02 02 02 02 02 02 02 02 02 02 ................
+0xfef03dc8: 02 02 02 02 b8 0b 02 00 10 27 02 00 00 00 00 00 .........'......
+0xfef03dd8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+...
+0xfef03df8: 00 00 00 20 00 01 00 00 01 01 00 01 00 01 00 00 ... ............
+0xfef03e08: 01 00 01 01 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0xfef03e18: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+...
+0xfef03e98: 00 00 00 00 00 00 aa 55 .......U
+Calling FspMemoryInit: 0xff56d1c8
+ 0xfef03858: raminit_upd
+ 0xfef04f68: &hob_list_ptr
+POST: 0x92
+Timestamp - calling FspMemoryInit: 3895179096
+POST: 0x98
+Timestamp - returning from FspMemoryInit: 218425505922
+CBMEM:
+IMD: root @ 0x7f7ff000 254 entries.
+IMD: root @ 0x7f7fec00 62 entries.
+FspMemoryInit returned 0x00000000
+
+=== FSP HOBs ===
+0x7f41e000: hob_list_ptr
+0x7f41e000, 0x00000038 bytes: HOB_TYPE_HANDOFF
+0x7f41e038, 0x00000108 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41e140, 0x000000b0 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41e1f0, 0x000000c8 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41e2b8, 0x00000308 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41e5c0, 0x000000f8 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41e6b8, 0x00000088 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41e740, 0x00000208 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41e948, 0x00000090 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41e9d8, 0x000000b8 bytes: HOB_TYPE_GUID_EXTENSION
+ ea296d92-0b69-423c-8c2833b4e0a91268: Unknown GUID
+0x7f41ea90, 0x000000d8 bytes: HOB_TYPE_GUID_EXTENSION
+ 9b3ada4f-ae56-4c24-8deaf03b7558ae50: Unknown GUID
+0x7f41eb68, 0x00000030 bytes: HOB_TYPE_RESOURCE_DESCRIPTOR
+Resource MMIO, attribute 403
+ 0xfd000000 + 0x01800000
+0x7f41eb98, 0x00000030 bytes: HOB_TYPE_MEMORY_ALLOCATION
+0x7f41ebc8, 0x00000018 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41ebe0, 0x00000010 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41ebf0, 0x00000018 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41ec08, 0x00000010 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41ec18, 0x00000070 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41ec88, 0x00000838 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41f4c0, 0x00000808 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41fcc8, 0x00000020 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41fce8, 0x00000018 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41fd00, 0x00000018 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41fd18, 0x00000018 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41fd30, 0x00000020 bytes: HOB_TYPE_GUID_EXTENSION
+ 0e3b622a-edbb-4e30-9360695cd4b320c9: Unknown GUID
+0x7f41fd50, 0x000001c8 bytes: HOB_TYPE_MEMORY_POOL
+0x7f41ff18, 0x00000030 bytes: HOB_TYPE_RESOURCE_DESCRIPTOR
+Resource MMIO, attribute 403
+ 0xfed00000 + 0x00001000
+0x7f41ff48, 0x00000030 bytes: HOB_TYPE_MEMORY_ALLOCATION
+0x7f41ff78, 0x00000020 bytes: HOB_TYPE_GUID_EXTENSION
+ e07d0bda-bf90-46a9-b00eb2c44a0ed6d0: Unknown GUID
+0x7f41ff98, 0x00000038 bytes: HOB_TYPE_GUID_EXTENSION
+ 440ab2e5-a3ea-466f-8496dfb13b752995: Unknown GUID
+0x7f41ffd0, 0x00000088 bytes: HOB_TYPE_GUID_EXTENSION
+ 762fa2e6-ea3b-41c8-8c5263766d7039e0: Unknown GUID
+0x7f420058, 0x00000020 bytes: HOB_TYPE_MEMORY_POOL
+0x7f420078, 0x00000040 bytes: HOB_TYPE_GUID_EXTENSION
+ 6210d62f-418d-4999-a24522100a5dea44: Unknown GUID
+0x7f4200b8, 0x00002390 bytes: HOB_TYPE_GUID_EXTENSION
+ ce3f6794-4883-492c-8dba2fc098447710: Unknown GUID
+0x7f422448, 0x000000c0 bytes: HOB_TYPE_GUID_EXTENSION
+ 3047c2ac-5e8e-4c55-a1cbeaad0a88861b: Unknown GUID
+0x7f422508, 0x00001880 bytes: HOB_TYPE_GUID_EXTENSION
+ 721acf02-4d77-4c2a-b3dc270b7ba9e4b0: FSP_NV_STORAGE
+0x7f423d88, 0x000002c8 bytes: HOB_TYPE_GUID_EXTENSION
+ 9b2071d4-b054-4e0c-8d0911cf8b9f0323: Unknown GUID
+0x7f424050, 0x00000030 bytes: HOB_TYPE_RESOURCE_DESCRIPTOR
+Resource MEMORY_RESERVED, attribute 3c07
+ 0x7f7fe000 + 0x00002000
+ Owner GUID: 73ff4f56-aa8e-4451-b31636353667ad44 (BOOTLOADER_TOLUM)
+0x7f424080, 0x00000030 bytes: HOB_TYPE_RESOURCE_DESCRIPTOR
+Resource MEMORY_RESERVED, attribute 3c07
+ 0x7f3fe000 + 0x00400000
+ Owner GUID: 69a79759-1373-4367-a6c4c7f59efd986e (FSP_RESERVED_MEMORY)
+0x7f4240b0, 0x00000030 bytes: HOB_TYPE_RESOURCE_DESCRIPTOR
+Resource SYSTEM_MEMORY, attribute 3c07
+ 0x00000000 + 0x000a0000
+0x7f4240e0, 0x00000030 bytes: HOB_TYPE_RESOURCE_DESCRIPTOR
+Resource MEMORY_RESERVED, attribute 0
+ 0x000a0000 + 0x00060000
+0x7f424110, 0x00000030 bytes: HOB_TYPE_RESOURCE_DESCRIPTOR
+Resource SYSTEM_MEMORY, attribute 3c07
+ 0x00100000 + 0x7f2fe000
+0x7f424140, 0x00000030 bytes: HOB_TYPE_RESOURCE_DESCRIPTOR
+Resource MEMORY_RESERVED, attribute 0
+ 0x7f800000 + 0x00800000
+ Owner GUID: d038747c-d00c-4980-b319490199a47d55 (TSEG)
+0x7f424170, 0x00000040 bytes: HOB_TYPE_GUID_EXTENSION
+ 00000000-0000-0000-0000000000000000: No GUID specified
+0x7f4241b0, 0x00000030 bytes: HOB_TYPE_RESOURCE_DESCRIPTOR
+Resource SYSTEM_MEMORY, attribute 3c03
+ 0x100000000 + 0x100000000
+0x7f4241e0, 0x00000030 bytes: HOB_TYPE_RESOURCE_DESCRIPTOR
+Resource SYSTEM_MEMORY, attribute 3c03
+ 0x200000000 + 0x100000000
+0x7f424210, 0x00000030 bytes: HOB_TYPE_RESOURCE_DESCRIPTOR
+Resource SYSTEM_MEMORY, attribute 3c03
+ 0x300000000 + 0x100000000
+0x7f424240, 0x00000030 bytes: HOB_TYPE_RESOURCE_DESCRIPTOR
+Resource SYSTEM_MEMORY, attribute 3c03
+ 0x400000000 + 0x80000000
+0x7f424270, 0x00000030 bytes: HOB_TYPE_RESOURCE_DESCRIPTOR
+Resource IO, attribute 403
+ 0x00002000 + 0x0000e000
+0x7f4242a0, 0x00000030 bytes: HOB_TYPE_RESOURCE_DESCRIPTOR
+Resource MMIO, attribute 403
+ 0x80000000 + 0x60000000
+0x7f4242d0, 0x00000060 bytes: HOB_TYPE_GUID_EXTENSION
+ 6dadf1d1-d4cc-4910-bb6e82b1fd80ff3d: Unknown GUID
+0x7f424330, 0x00000038 bytes: HOB_TYPE_GUID_EXTENSION
+ af9ffd67-ec10-488a-9dfc6cbf5ee22c2e: Unknown GUID
+0x7f424368, 0x00000030 bytes: HOB_TYPE_MEMORY_ALLOCATION
+0x7f424398, 0x00000030 bytes: HOB_TYPE_MEMORY_ALLOCATION
+0x7f4243c8, 0x00000030 bytes: HOB_TYPE_MEMORY_ALLOCATION
+0x7f4243f8, 0x00000010 bytes: HOB_TYPE_CPU
+0x7f424408, 0x00000030 bytes: HOB_TYPE_MEMORY_ALLOCATION
+0x7f424438, 0x00000030 bytes: HOB_TYPE_MEMORY_ALLOCATION
+0x7f424468, 0x00000008 bytes: HOB_TYPE_END_OF_HOB_LIST
+=== End of FSP HOBs ===
+
+0x0000000000001d0a: IA32_MTRRCAP: SMRR, WC, FIX, 10 variable MTRRs
+0x0000000000000800: IA32_MTRR_DEF_TYPE: E, UC
+0x0000000000000000: IA32_MTRR_FIX64K_00000
+ 0x00000000 - 0x0007ffff: UC
+0x0000000000000000: IA32_MTRR_FIX16K_80000
+ 0x00080000 - 0x0009ffff: UC
+0x0000000000000000: IA32_MTRR_FIX16K_A0000
+ 0x000a0000 - 0x000bffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_C0000
+ 0x000c0000 - 0x000c7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_C8000
+ 0x000c8000 - 0x000cffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_D0000
+ 0x000d0000 - 0x000d7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_D8000
+ 0x000d8000 - 0x000dffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_E0000
+ 0x000e0000 - 0x000e7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_E8000
+ 0x000e8000 - 0x000effff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_F0000
+ 0x000f0000 - 0x000f7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_F8000
+ 0x000f8000 - 0x000fffff: UC
+0x00000000fef00006: PHYBASE0: Address = 0x00000000fef00000, WB
+0x0000007ffffc0800: PHYMASK0: Length = 0x0000000000040000, Valid
+0x00000000ff000005: PHYBASE1: Address = 0x00000000ff000000, WP
+0x0000007fff000800: PHYMASK1: Length = 0x0000000001000000, Valid
+0x0000000000000000: PHYBASE2
+0x0000000000000000: PHYMASK2: Disabled
+0x0000000000000000: PHYBASE3
+0x0000000000000000: PHYMASK3: Disabled
+0x0000000000000000: PHYBASE4
+0x0000000000000000: PHYMASK4: Disabled
+0x0000000000000000: PHYBASE5
+0x0000000000000000: PHYMASK5: Disabled
+0x0000000000000000: PHYBASE6
+0x0000000000000000: PHYMASK6: Disabled
+0x0000000000000000: PHYBASE7
+0x0000000000000000: PHYMASK7: Disabled
+0x0000000000000000: PHYBASE8
+0x0000000000000000: PHYMASK8: Disabled
+0x0000000000000000: PHYBASE9
+0x0000000000000000: PHYMASK9: Disabled
+Timestamp - after RAM initialization: 220598203496
+2 DIMMs found
+SMM Memory Map
+SMRAM : 0x7f800000 0x800000
+ Subregion 0: 0x7f800000 0x200000
+ Subregion 1: 0x7fa00000 0x200000
+ Subregion 2: 0x7fc00000 0x400000
+top_of_ram = 0x7f800000
+MTRR Range: Start=7e800000 End=7f000000 (Size 800000)
+MTRR Range: Start=7f000000 End=7f800000 (Size 800000)
+MTRR Range: Start=7f800000 End=80000000 (Size 800000)
+MTRR Range: Start=ff000000 End=0 (Size 1000000)
+FMAP: area COREBOOT found @ 510200 (11468288 bytes)
+CBFS: Locating 'fallback/postcar'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size c93c
+CBFS: Unmatched 'fallback/romstage' at 80
+CBFS: Checking offset ca40
+CBFS: File @ offset ca40 size 31400
+CBFS: Unmatched 'cpu_microcode_blob.bin' at ca40
+CBFS: Checking offset 3dec0
+CBFS: File @ offset 3dec0 size 1b719
+CBFS: Unmatched 'fallback/ramstage' at 3dec0
+CBFS: Checking offset 59640
+CBFS: File @ offset 59640 size 419
+CBFS: Unmatched 'config' at 59640
+CBFS: Checking offset 59ac0
+CBFS: File @ offset 59ac0 size 2a8
+CBFS: Unmatched 'revision' at 59ac0
+CBFS: Checking offset 59dc0
+CBFS: File @ offset 59dc0 size 293c
+CBFS: Unmatched 'fallback/dsdt.aml' at 59dc0
+CBFS: Checking offset 5c780
+CBFS: File @ offset 5c780 size 100
+CBFS: Unmatched 'cmos.default' at 5c780
+CBFS: Checking offset 5c8c0
+CBFS: File @ offset 5c8c0 size 80
+CBFS: Unmatched 'smcbiosinfo.bin' at 5c8c0
+CBFS: Checking offset 5c980
+CBFS: File @ offset 5c980 size 310
+CBFS: Unmatched 'cmos_layout.bin' at 5c980
+CBFS: Checking offset 5cd00
+CBFS: File @ offset 5cd00 size 85
+CBFS: Unmatched 'etc/grub.cfg' at 5cd00
+CBFS: Checking offset 5cdc0
+CBFS: File @ offset 5cdc0 size 63000
+CBFS: Unmatched 'fspm.bin' at 5cdc0
+CBFS: Checking offset bfe00
+CBFS: File @ offset bfe00 size f98
+CBFS: Unmatched '' at bfe00
+CBFS: Checking offset c0dc0
+CBFS: File @ offset c0dc0 size 2e000
+CBFS: Unmatched 'fsps.bin' at c0dc0
+CBFS: Checking offset eee00
+CBFS: File @ offset eee00 size 599c
+CBFS: Found @ offset eee00 size 599c
+Decompressing stage fallback/postcar @ 0x7f3cffc0 (38928 bytes)
+Loading module at 0x7f3d0000 with entry 0x7f3d0000. filesize: 0x54d0 memsize: 0x97d0
+Processing 284 relocs. Offset value of 0x7d3d0000
+Timestamp - end of romstage: 221356605914
+BS: romstage times (exec / console): total (unknown) / 1607 ms
+
+
+coreboot-4.12-392-g11217de375-dirty Fri May 29 20:47:54 UTC 2020 postcar starting (log level: 7)...
+Timestamp - start of postcar: 221432820216
+0x0000000000001d0a: IA32_MTRRCAP: SMRR, WC, FIX, 10 variable MTRRs
+0x0000000000000800: IA32_MTRR_DEF_TYPE: E, UC
+0x0000000000000000: IA32_MTRR_FIX64K_00000
+ 0x00000000 - 0x0007ffff: UC
+0x0000000000000000: IA32_MTRR_FIX16K_80000
+ 0x00080000 - 0x0009ffff: UC
+0x0000000000000000: IA32_MTRR_FIX16K_A0000
+ 0x000a0000 - 0x000bffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_C0000
+ 0x000c0000 - 0x000c7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_C8000
+ 0x000c8000 - 0x000cffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_D0000
+ 0x000d0000 - 0x000d7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_D8000
+ 0x000d8000 - 0x000dffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_E0000
+ 0x000e0000 - 0x000e7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_E8000
+ 0x000e8000 - 0x000effff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_F0000
+ 0x000f0000 - 0x000f7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_F8000
+ 0x000f8000 - 0x000fffff: UC
+0x00000000ff000005: PHYBASE0: Address = 0x00000000ff000000, WP
+0x0000007fff000800: PHYMASK0: Length = 0x0000000001000000, Valid
+0x000000007f800006: PHYBASE1: Address = 0x000000007f800000, WB
+0x0000007fff800800: PHYMASK1: Length = 0x0000000000800000, Valid
+0x000000007f000006: PHYBASE2: Address = 0x000000007f000000, WB
+0x0000007fff800800: PHYMASK2: Length = 0x0000000000800000, Valid
+0x000000007e800006: PHYBASE3: Address = 0x000000007e800000, WB
+0x0000007fff800800: PHYMASK3: Length = 0x0000000000800000, Valid
+0x0000000000000000: PHYBASE4
+0x0000000000000000: PHYMASK4: Disabled
+0x0000000000000000: PHYBASE5
+0x0000000000000000: PHYMASK5: Disabled
+0x0000000000000000: PHYBASE6
+0x0000000000000000: PHYMASK6: Disabled
+0x0000000000000000: PHYBASE7
+0x0000000000000000: PHYMASK7: Disabled
+0x0000000000000000: PHYBASE8
+0x0000000000000000: PHYMASK8: Disabled
+0x0000000000000000: PHYBASE9
+0x0000000000000000: PHYMASK9: Disabled
+Timestamp - end of postcar: 222024766730
+FMAP: area COREBOOT found @ 510200 (11468288 bytes)
+CBFS: Locating 'fallback/ramstage'
+CBFS: Found @ offset 3dec0 size 1b719
+Timestamp - starting to load ramstage: 222076551798
+Decompressing stage fallback/ramstage @ 0x7f300fc0 (842064 bytes)
+Timestamp - starting LZMA decompress (ignore for x86): 222113085896
+Timestamp - finished LZMA decompress (ignore for x86): 222336835572
+Loading module at 0x7f301000 with entry 0x7f301000. filesize: 0x3c670 memsize: 0xcd910
+Processing 4026 relocs. Offset value of 0x7e501000
+Timestamp - finished loading ramstage: 222401227100
+BS: postcar times (exec / console): total (unknown) / 232 ms
+
+
+coreboot-4.12-392-g11217de375-dirty Fri May 29 20:47:54 UTC 2020 ramstage starting (log level: 7)...
+POST: 0x39
+Timestamp - start of ramstage: 222472601410
+POST: 0x80
+Normal boot
+BS: Entering BS_PRE_DEVICE state.
+POST: 0x70
+BS: Exiting BS_PRE_DEVICE state.
+BS: BS_PRE_DEVICE run times (exec / console): 0 / 4 ms
+----------------------------------------
+BS: BS_PRE_DEVICE exit times (exec / console): 0 / 4 ms
+BS: Entering BS_DEV_INIT_CHIPS state.
+BS: callback (0x7f33924c) @ src/soc/intel/common/block/cpu/mp_init.c:160.
+FMAP: area COREBOOT found @ 510200 (11468288 bytes)
+CBFS: Locating 'cpu_microcode_blob.bin'
+CBFS: Found @ offset ca40 size 31400
+microcode: sig=0x906e9 pf=0x2 revision=0xc9
+Skip microcode update
+FMAP: area COREBOOT found @ 510200 (11468288 bytes)
+CBFS: Locating 'fsps.bin'
+CBFS: Found @ offset c0dc0 size 2e000
+Detected 4 core, 8 thread CPU.
+Setting up SMI for CPU
+IED base = 0x7fc00000
+IED size = 0x00400000
+Will perform SMM setup.
+CPU: Intel(R) Xeon(R) CPU E3-1230 v6 @ 3.50GHz.
+Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
+Processing 16 relocs. Offset value of 0x00030000
+Attempting to start 7 APs
+Waiting for 10ms after sending INIT.
+Waiting for 1st SIPI to complete...AP: slot 6 apic_id 1.
+done.
+AP: slot 4 apic_id 5.
+AP: slot 7 apic_id 4.
+AP: slot 5 apic_id 7.
+AP: slot 2 apic_id 6.
+AP: slot 1 apic_id 2.
+AP: slot 3 apic_id 3.
+Waiting for 2nd SIPI to complete...done.
+Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
+Processing 13 relocs. Offset value of 0x00038000
+SMM Module: stub loaded at 0x00038000. Will call 0x7f31d81b(0x00000000)
+Installing SMM handler to 0x7f800000
+Loading module at 0x7f810000 with entry 0x7f8114ad. filesize: 0x34d0 memsize: 0x7528
+Processing 205 relocs. Offset value of 0x7f810000
+Loading module at 0x7f808000 with entry 0x7f808000. filesize: 0x1b8 memsize: 0x1b8
+Processing 13 relocs. Offset value of 0x7f808000
+SMM Module: placing jmp sequence at 0x7f807c00 rel16 0x03fd
+SMM Module: placing jmp sequence at 0x7f807800 rel16 0x07fd
+SMM Module: placing jmp sequence at 0x7f807400 rel16 0x0bfd
+SMM Module: placing jmp sequence at 0x7f807000 rel16 0x0ffd
+SMM Module: placing jmp sequence at 0x7f806c00 rel16 0x13fd
+SMM Module: placing jmp sequence at 0x7f806800 rel16 0x17fd
+SMM Module: placing jmp sequence at 0x7f806400 rel16 0x1bfd
+SMM Module: stub loaded at 0x7f808000. Will call 0x7f8114ad(0x00000000)
+Clearing SMI status registers
+SMI_STS: PM1
+PWRBTN TMROF New SMBASE 0x7f800000
+In relocation handler: CPU 0
+New SMBASE=0x7f800000 IEDBASE=0x7fc00000
+Writing SMRR. base = 0x7f800006, mask=0xff800800
+Relocation complete.
+New SMBASE 0x7f7fe800
+In relocation handler: CPU 6
+New SMBASE=0x7f7fe800 IEDBASE=0x7fc00000
+Writing SMRR. base = 0x7f800006, mask=0xff800800
+Relocation complete.
+New SMBASE 0x7f7fec00
+In relocation handler: CPU 5
+New SMBASE=0x7f7fec00 IEDBASE=0x7fc00000
+Writing SMRR. base = 0x7f800006, mask=0xff800800
+Relocation complete.
+New SMBASE 0x7f7ff800
+In relocation handler: CPU 2
+New SMBASE=0x7f7ff800 IEDBASE=0x7fc00000
+Writing SMRR. base = 0x7f800006, mask=0xff800800
+Relocation complete.
+New SMBASE 0x7f7ff400
+In relocation handler: CPU 3
+New SMBASE=0x7f7ff400 IEDBASE=0x7fc00000
+Writing SMRR. base = 0x7f800006, mask=0xff800800
+Relocation complete.
+New SMBASE 0x7f7ffc00
+In relocation handler: CPU 1
+New SMBASE=0x7f7ffc00 IEDBASE=0x7fc00000
+Writing SMRR. base = 0x7f800006, mask=0xff800800
+Relocation complete.
+New SMBASE 0x7f7fe400
+In relocation handler: CPU 7
+New SMBASE=0x7f7fe400 IEDBASE=0x7fc00000
+Writing SMRR. base = 0x7f800006, mask=0xff800800
+Relocation complete.
+New SMBASE 0x7f7ff000
+In relocation handler: CPU 4
+New SMBASE=0x7f7ff000 IEDBASE=0x7fc00000
+Writing SMRR. base = 0x7f800006, mask=0xff800800
+Relocation complete.
+Initializing CPU #0
+CPU: vendor Intel device 906e9
+CPU: family 06, model 9e, stepping 09
+Clearing out pending MCEs
+Setting up local APIC...
+ apic_id: 0x00 done.
+cpu: energy policy set to 6
+Turbo is available but hidden
+Turbo is available and visible
+Skip microcode update
+CPU #0 initialized
+Initializing CPU #6
+Initializing CPU #3
+Initializing CPU #1
+CPU: vendor Intel device 906e9
+CPU: family 06, model 9e, stepping 09
+CPU: vendor Intel device 906e9
+CPU: family 06, model 9e, stepping 09
+Clearing out pending MCEs
+Clearing out pending MCEs
+CPU: vendor Intel device 906e9
+CPU: family 06, model 9e, stepping 09
+Clearing out pending MCEs
+Initializing CPU #2
+Initializing CPU #5
+CPU: vendor Intel device 906e9
+CPU: family 06, model 9e, stepping 09
+CPU: vendor Intel device 906e9
+CPU: family 06, model 9e, stepping 09
+Clearing out pending MCEs
+Clearing out pending MCEs
+Setting up local APIC...
+Initializing CPU #7
+Initializing CPU #4
+CPU: vendor Intel device 906e9
+CPU: family 06, model 9e, stepping 09
+CPU: vendor Intel device 906e9
+CPU: family 06, model 9e, stepping 09
+Clearing out pending MCEs
+Clearing out pending MCEs
+Setting up local APIC...
+Setting up local APIC...
+Setting up local APIC...
+Setting up local APIC...
+ apic_id: 0x01 done.
+ apic_id: 0x04 done.
+ apic_id: 0x05 done.
+cpu: energy policy set to 6
+cpu: energy policy set to 6
+Skip microcode update
+CPU #7 initialized
+Skip microcode update
+CPU #4 initialized
+cpu: energy policy set to 6
+ apic_id: 0x07 done.
+Setting up local APIC...
+Skip microcode update
+CPU #6 initialized
+cpu: energy policy set to 6
+ apic_id: 0x06 done.
+Skip microcode update
+CPU #5 initialized
+cpu: energy policy set to 6
+ apic_id: 0x03 done.
+Setting up local APIC...
+Skip microcode update
+CPU #2 initialized
+cpu: energy policy set to 6
+ apic_id: 0x02 done.
+Skip microcode update
+CPU #3 initialized
+cpu: energy policy set to 6
+Skip microcode update
+CPU #1 initialized
+bsp_do_flight_plan done after 383 msecs.
+CPU: frequency set to 3900 MHz
+Enabling SMIs.
+Locking SMM.
+VMX status: enabled
+VMX status: enabled
+IA32_FEATURE_CONTROL status: locked
+VMX status: enabled
+VMX status: enabled
+IA32_FEATURE_CONTROL status: locked
+IA32_FEATURE_CONTROL status: locked
+VMX status: enabled
+VMX status: enabled
+IA32_FEATURE_CONTROL status: locked
+IA32_FEATURE_CONTROL status: locked
+IA32_FEATURE_CONTROL status: locked
+VMX status: enabled
+VMX status: enabled
+IA32_FEATURE_CONTROL status: locked
+IA32_FEATURE_CONTROL status: locked
+BS: BS_DEV_INIT_CHIPS entry times (exec / console): 394 / 223 ms
+POST: 0x71
+Timestamp - device enumeration: 224803666928
+gpio_padcfg [0xaf, 00] DW0 [0x44000702 : 0x44000700 : 0x44000702]
+gpio_padcfg [0xaf, 00] DW1 [0x00000018 : 0x00000010 : 0x00000018]
+gpio_padcfg [0xaf, 01] DW0 [0x44000702 : 0x44000700 : 0x44000702]
+gpio_padcfg [0xaf, 01] DW1 [0x00000019 : 0x00000010 : 0x00000019]
+gpio_padcfg [0xaf, 02] DW0 [0x44000702 : 0x44000700 : 0x44000702]
+gpio_padcfg [0xaf, 02] DW1 [0x0000001a : 0x00000010 : 0x0000001a]
+gpio_padcfg [0xaf, 03] DW0 [0x44000702 : 0x44000700 : 0x44000702]
+gpio_padcfg [0xaf, 03] DW1 [0x0000001b : 0x00000010 : 0x0000001b]
+gpio_padcfg [0xaf, 04] DW0 [0x44000702 : 0x44000700 : 0x44000702]
+gpio_padcfg [0xaf, 04] DW1 [0x0000001c : 0x00000010 : 0x0000001c]
+gpio_padcfg [0xaf, 05] DW0 [0x44000700 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xaf, 05] DW1 [0x0000001d : 0x00000010 : 0x0000001d]
+gpio_padcfg [0xaf, 06] DW0 [0x44000702 : 0x44000700 : 0x44000702]
+gpio_padcfg [0xaf, 06] DW1 [0x0000001e : 0x00000010 : 0x0000001e]
+gpio_padcfg [0xaf, 07] DW0 [0x44000702 : 0x44000700 : 0x44000702]
+gpio_padcfg [0xaf, 07] DW1 [0x0000001f : 0x00000010 : 0x0000001f]
+gpio_padcfg [0xaf, 08] DW0 [0x44000700 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xaf, 08] DW1 [0x00000020 : 0x00000010 : 0x00000020]
+gpio_padcfg [0xaf, 09] DW0 [0x44000700 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xaf, 09] DW1 [0x00000021 : 0x00000010 : 0x00000021]
+gpio_padcfg [0xaf, 10] DW0 [0x44000700 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xaf, 10] DW1 [0x00000022 : 0x00000010 : 0x00000022]
+gpio_padcfg [0xaf, 11] DW0 [0x44000702 : 0x44000700 : 0x44000702]
+gpio_padcfg [0xaf, 11] DW1 [0x00003023 : 0x00000010 : 0x00000023]
+gpio_padcfg [0xaf, 12] DW0 [0x84000300 : 0x84000300 : 0x84000300]
+gpio_padcfg [0xaf, 12] DW1 [0x00000024 : 0x00000010 : 0x00000024]
+gpio_padcfg [0xaf, 13] DW0 [0x44000700 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xaf, 13] DW1 [0x00000025 : 0x00000010 : 0x00000025]
+gpio_padcfg [0xaf, 14] DW0 [0x44000700 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xaf, 14] DW1 [0x00000026 : 0x00000010 : 0x00000026]
+gpio_padcfg [0xaf, 15] DW0 [0x44000702 : 0x44000700 : 0x44000702]
+gpio_padcfg [0xaf, 15] DW1 [0x00003027 : 0x00000010 : 0x00000027]
+gpio_padcfg [0xaf, 16] DW0 [0x44000700 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xaf, 16] DW1 [0x00001028 : 0x00000010 : 0x00000028]
+gpio_padcfg [0xaf, 17] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xaf, 17] DW1 [0x00000029 : 0x00000010 : 0x00000029]
+gpio_padcfg [0xaf, 18] DW0 [0x84000300 : 0x84000100 : 0x84000100]
+gpio_padcfg [0xaf, 18] DW1 [0x0000002a : 0x00000010 : 0x0000002a]
+gpio_padcfg [0xaf, 20] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xaf, 20] DW1 [0x0000002c : 0x00000010 : 0x0000002c]
+gpio_padcfg [0xaf, 21] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xaf, 21] DW1 [0x0000002d : 0x00000010 : 0x0000002d]
+gpio_padcfg [0xaf, 22] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xaf, 22] DW1 [0x0000002e : 0x00000010 : 0x0000002e]
+gpio_padcfg [0xaf, 23] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xaf, 23] DW1 [0x0000002f : 0x00000010 : 0x0000002f]
+gpio_padcfg [0xaf, 24] DW0 [0x44000200 : 0x44000201 : 0x44000201]
+gpio_padcfg [0xaf, 24] DW1 [0x00000030 : 0x00000010 : 0x00000030]
+gpio_padcfg [0xaf, 25] DW0 [0x44000200 : 0x44000201 : 0x44000201]
+gpio_padcfg [0xaf, 25] DW1 [0x00000031 : 0x00000010 : 0x00000031]
+gpio_padcfg [0xaf, 26] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xaf, 26] DW1 [0x00000032 : 0x00000010 : 0x00000032]
+gpio_padcfg [0xaf, 27] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xaf, 27] DW1 [0x00000033 : 0x00000010 : 0x00000033]
+gpio_padcfg [0xaf, 28] DW0 [0x44000300 : 0x44000301 : 0x44000301]
+gpio_padcfg [0xaf, 28] DW1 [0x00000034 : 0x00000010 : 0x00000034]
+gpio_padcfg [0xaf, 29] DW0 [0x44000300 : 0x44000301 : 0x44000301]
+gpio_padcfg [0xaf, 29] DW1 [0x00000035 : 0x00000010 : 0x00000035]
+gpio_padcfg [0xaf, 30] DW0 [0x84000300 : 0x84000301 : 0x84000301]
+gpio_padcfg [0xaf, 30] DW1 [0x00000036 : 0x00000010 : 0x00000036]
+gpio_padcfg [0xaf, 31] DW0 [0x44000300 : 0x44000301 : 0x44000301]
+gpio_padcfg [0xaf, 31] DW1 [0x00000037 : 0x00000010 : 0x00000037]
+gpio_padcfg [0xaf, 32] DW0 [0x44000300 : 0x44000301 : 0x44000301]
+gpio_padcfg [0xaf, 32] DW1 [0x00000038 : 0x00000010 : 0x00000038]
+gpio_padcfg [0xaf, 33] DW0 [0x44000300 : 0x44000301 : 0x44000301]
+gpio_padcfg [0xaf, 33] DW1 [0x00000039 : 0x00000010 : 0x00000039]
+gpio_padcfg [0xaf, 34] DW0 [0x44000300 : 0x44000301 : 0x44000301]
+gpio_padcfg [0xaf, 34] DW1 [0x0000003a : 0x00000010 : 0x0000003a]
+gpio_padcfg [0xaf, 35] DW0 [0x44000200 : 0x44000200 : 0x44000200]
+gpio_padcfg [0xaf, 35] DW1 [0x0000003b : 0x00000010 : 0x0000003b]
+gpio_padcfg [0xaf, 36] DW0 [0x44000700 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xaf, 36] DW1 [0x0000003c : 0x00000010 : 0x0000003c]
+gpio_padcfg [0xaf, 37] DW0 [0x44000700 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xaf, 37] DW1 [0x0000003d : 0x00000010 : 0x0000003d]
+gpio_padcfg [0xaf, 38] DW0 [0x84000200 : 0x84000700 : 0x84000700]
+gpio_padcfg [0xaf, 38] DW1 [0x0000003e : 0x00000010 : 0x0000003e]
+gpio_padcfg [0xaf, 39] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xaf, 39] DW1 [0x0000003f : 0x00000010 : 0x0000003f]
+gpio_padcfg [0xaf, 40] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xaf, 40] DW1 [0x00000040 : 0x00000010 : 0x00000040]
+gpio_padcfg [0xaf, 41] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xaf, 41] DW1 [0x00000041 : 0x00000010 : 0x00000041]
+gpio_padcfg [0xaf, 42] DW0 [0x44000200 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xaf, 42] DW1 [0x00000042 : 0x00000010 : 0x00000042]
+gpio_padcfg [0xaf, 43] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xaf, 43] DW1 [0x00000043 : 0x00000010 : 0x00000043]
+gpio_padcfg [0xaf, 44] DW0 [0x84000300 : 0x84000201 : 0x84000201]
+gpio_padcfg [0xaf, 44] DW1 [0x00000044 : 0x00000010 : 0x00000044]
+gpio_padcfg [0xaf, 45] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xaf, 45] DW1 [0x00000045 : 0x00000010 : 0x00000045]
+gpio_padcfg [0xaf, 46] DW0 [0x44000200 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xaf, 46] DW1 [0x00000046 : 0x00000010 : 0x00000046]
+gpio_padcfg [0xaf, 47] DW0 [0x00000800 : 0x40000b00 : 0x40000b00]
+gpio_padcfg [0xaf, 47] DW1 [0x00000047 : 0x00000010 : 0x00000047]
+gpio_padcfg [0xae, 02] DW0 [0x44000200 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 02] DW1 [0x0000004a : 0x00000010 : 0x0000004a]
+gpio_padcfg [0xae, 05] DW0 [0x44000200 : 0x44000201 : 0x44000201]
+gpio_padcfg [0xae, 05] DW1 [0x0000004d : 0x00000010 : 0x0000004d]
+gpio_padcfg [0xae, 08] DW0 [0x84000300 : 0x84000100 : 0x84000100]
+gpio_padcfg [0xae, 08] DW1 [0x00000050 : 0x00000010 : 0x00000050]
+gpio_padcfg [0xae, 09] DW0 [0x84000300 : 0x84000100 : 0x84000100]
+gpio_padcfg [0xae, 09] DW1 [0x00000051 : 0x00000010 : 0x00000051]
+gpio_padcfg [0xae, 10] DW0 [0x84000300 : 0x84000100 : 0x84000100]
+gpio_padcfg [0xae, 10] DW1 [0x00000052 : 0x00000010 : 0x00000052]
+gpio_padcfg [0xae, 11] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 11] DW1 [0x00000053 : 0x00000010 : 0x00000053]
+gpio_padcfg [0xae, 12] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 12] DW1 [0x00000054 : 0x00000010 : 0x00000054]
+gpio_padcfg [0xae, 13] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 13] DW1 [0x00000055 : 0x00000010 : 0x00000055]
+gpio_padcfg [0xae, 14] DW0 [0x84000300 : 0x84000300 : 0x84000300]
+gpio_padcfg [0xae, 14] DW1 [0x00000056 : 0x00000010 : 0x00000056]
+gpio_padcfg [0xae, 15] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 15] DW1 [0x00000057 : 0x00000010 : 0x00000057]
+gpio_padcfg [0xae, 16] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 16] DW1 [0x00000058 : 0x00000010 : 0x00000058]
+gpio_padcfg [0xae, 17] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 17] DW1 [0x00000059 : 0x00000010 : 0x00000059]
+gpio_padcfg [0xae, 18] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 18] DW1 [0x0000005a : 0x00000010 : 0x0000005a]
+gpio_padcfg [0xae, 19] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 19] DW1 [0x0000005b : 0x00000010 : 0x0000005b]
+gpio_padcfg [0xae, 20] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 20] DW1 [0x0000005c : 0x00000010 : 0x0000005c]
+gpio_padcfg [0xae, 21] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 21] DW1 [0x0000005d : 0x00000010 : 0x0000005d]
+gpio_padcfg [0xae, 22] DW0 [0x44000300 : 0x42040100 : 0x42040100]
+gpio_padcfg [0xae, 22] DW1 [0x0000005e : 0x00003010 : 0x0000305e]
+gpio_padcfg [0xae, 23] DW0 [0x84000300 : 0x84000300 : 0x84000300]
+gpio_padcfg [0xae, 23] DW1 [0x0000005f : 0x00000010 : 0x0000005f]
+gpio_padcfg [0xae, 24] DW0 [0x84000300 : 0x84000300 : 0x84000300]
+gpio_padcfg [0xae, 24] DW1 [0x00000060 : 0x00000010 : 0x00000060]
+gpio_padcfg [0xae, 25] DW0 [0x44000300 : 0x44000201 : 0x44000201]
+gpio_padcfg [0xae, 25] DW1 [0x00000061 : 0x00000010 : 0x00000061]
+gpio_padcfg [0xae, 26] DW0 [0x44000300 : 0x42020100 : 0x42020100]
+gpio_padcfg [0xae, 26] DW1 [0x00000062 : 0x00003000 : 0x00003062]
+gpio_padcfg [0xae, 27] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 27] DW1 [0x00000063 : 0x00000010 : 0x00000063]
+gpio_padcfg [0xae, 28] DW0 [0x84000300 : 0x84000200 : 0x84000200]
+gpio_padcfg [0xae, 28] DW1 [0x00000064 : 0x00000010 : 0x00000064]
+gpio_padcfg [0xae, 29] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 29] DW1 [0x00000065 : 0x00000010 : 0x00000065]
+gpio_padcfg [0xae, 30] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 30] DW1 [0x00000066 : 0x00000010 : 0x00000066]
+gpio_padcfg [0xae, 31] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 31] DW1 [0x00000067 : 0x00000010 : 0x00000067]
+gpio_padcfg [0xae, 32] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 32] DW1 [0x00000068 : 0x00000010 : 0x00000068]
+gpio_padcfg [0xae, 33] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 33] DW1 [0x00000069 : 0x00000010 : 0x00000069]
+gpio_padcfg [0xae, 34] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 34] DW1 [0x0000006a : 0x00000010 : 0x0000006a]
+gpio_padcfg [0xae, 35] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 35] DW1 [0x0000006b : 0x00000010 : 0x0000006b]
+gpio_padcfg [0xae, 36] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 36] DW1 [0x0000006c : 0x00000010 : 0x0000006c]
+gpio_padcfg [0xae, 37] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 37] DW1 [0x0000006d : 0x00000010 : 0x0000006d]
+gpio_padcfg [0xae, 38] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 38] DW1 [0x0000006e : 0x00000010 : 0x0000006e]
+gpio_padcfg [0xae, 39] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 39] DW1 [0x0000006f : 0x00000010 : 0x0000006f]
+gpio_padcfg [0xae, 40] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 40] DW1 [0x00000070 : 0x00000010 : 0x00000070]
+gpio_padcfg [0xae, 41] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 41] DW1 [0x00000071 : 0x00000010 : 0x00000071]
+gpio_padcfg [0xae, 42] DW0 [0x84000300 : 0x84000201 : 0x84000201]
+gpio_padcfg [0xae, 42] DW1 [0x00000072 : 0x00000010 : 0x00000072]
+gpio_padcfg [0xae, 43] DW0 [0x84000300 : 0x84000201 : 0x84000201]
+gpio_padcfg [0xae, 43] DW1 [0x00000073 : 0x00000010 : 0x00000073]
+gpio_padcfg [0xae, 44] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 44] DW1 [0x00000074 : 0x00000010 : 0x00000074]
+gpio_padcfg [0xae, 45] DW0 [0x44000300 : 0x44000200 : 0x44000200]
+gpio_padcfg [0xae, 45] DW1 [0x00000075 : 0x00000010 : 0x00000075]
+gpio_padcfg [0xae, 46] DW0 [0x04000102 : 0xc4000100 : 0x04000102]
+gpio_padcfg [0xae, 46] DW1 [0x00000076 : 0x00000010 : 0x00000076]
+gpio_padcfg [0xae, 47] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 47] DW1 [0x00000077 : 0x00000010 : 0x00000077]
+gpio_padcfg [0xae, 48] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 48] DW1 [0x00000018 : 0x00000010 : 0x00000018]
+gpio_padcfg [0xae, 49] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 49] DW1 [0x00000019 : 0x00000010 : 0x00000019]
+gpio_padcfg [0xae, 50] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 50] DW1 [0x0000001a : 0x00000010 : 0x0000001a]
+gpio_padcfg [0xae, 51] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 51] DW1 [0x0000001b : 0x00000010 : 0x0000001b]
+gpio_padcfg [0xae, 52] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 52] DW1 [0x0000001c : 0x00000010 : 0x0000001c]
+gpio_padcfg [0xae, 53] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 53] DW1 [0x0000001d : 0x00000010 : 0x0000001d]
+gpio_padcfg [0xae, 54] DW0 [0x84000300 : 0x82020100 : 0x82020100]
+gpio_padcfg [0xae, 54] DW1 [0x0000001e : 0x00003000 : 0x0000301e]
+gpio_padcfg [0xae, 55] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 55] DW1 [0x0000001f : 0x00000010 : 0x0000001f]
+gpio_padcfg [0xae, 56] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 56] DW1 [0x00000020 : 0x00000010 : 0x00000020]
+gpio_padcfg [0xae, 57] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 57] DW1 [0x00000021 : 0x00000010 : 0x00000021]
+gpio_padcfg [0xae, 58] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 58] DW1 [0x00000022 : 0x00000010 : 0x00000022]
+gpio_padcfg [0xae, 59] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 59] DW1 [0x00000023 : 0x00000010 : 0x00000023]
+gpio_padcfg [0xae, 60] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 60] DW1 [0x00000024 : 0x00000010 : 0x00000024]
+gpio_padcfg [0xae, 61] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 61] DW1 [0x00000025 : 0x00000010 : 0x00000025]
+gpio_padcfg [0xae, 62] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 62] DW1 [0x00000026 : 0x00000010 : 0x00000026]
+gpio_padcfg [0xae, 63] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 63] DW1 [0x00000027 : 0x00000010 : 0x00000027]
+gpio_padcfg [0xae, 64] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 64] DW1 [0x00000028 : 0x00000010 : 0x00000028]
+gpio_padcfg [0xae, 65] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 65] DW1 [0x00000029 : 0x00000010 : 0x00000029]
+gpio_padcfg [0xae, 66] DW0 [0x84000300 : 0x80100100 : 0x80100100]
+gpio_padcfg [0xae, 66] DW1 [0x0000002a : 0x00000010 : 0x0000002a]
+gpio_padcfg [0xae, 67] DW0 [0x84000300 : 0x84000201 : 0x84000201]
+gpio_padcfg [0xae, 67] DW1 [0x0000002b : 0x00000010 : 0x0000002b]
+gpio_padcfg [0xae, 68] DW0 [0x84000300 : 0x84000201 : 0x84000201]
+gpio_padcfg [0xae, 68] DW1 [0x0000002c : 0x00000010 : 0x0000002c]
+gpio_padcfg [0xae, 69] DW0 [0x84000300 : 0x84000201 : 0x84000201]
+gpio_padcfg [0xae, 69] DW1 [0x0000002d : 0x00000010 : 0x0000002d]
+gpio_padcfg [0xae, 70] DW0 [0x84000300 : 0x84000100 : 0x84000100]
+gpio_padcfg [0xae, 70] DW1 [0x0000002e : 0x00000010 : 0x0000002e]
+gpio_padcfg [0xae, 71] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 71] DW1 [0x0000002f : 0x00000010 : 0x0000002f]
+gpio_padcfg [0xae, 72] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 72] DW1 [0x00000030 : 0x00000010 : 0x00000030]
+gpio_padcfg [0xae, 73] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 73] DW1 [0x00000031 : 0x00000010 : 0x00000031]
+gpio_padcfg [0xae, 74] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 74] DW1 [0x00000032 : 0x00000010 : 0x00000032]
+gpio_padcfg [0xae, 75] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 75] DW1 [0x00000033 : 0x00000010 : 0x00000033]
+gpio_padcfg [0xae, 76] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 76] DW1 [0x00000034 : 0x00000010 : 0x00000034]
+gpio_padcfg [0xae, 77] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 77] DW1 [0x00000035 : 0x00000010 : 0x00000035]
+gpio_padcfg [0xae, 78] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 78] DW1 [0x00000036 : 0x00000010 : 0x00000036]
+gpio_padcfg [0xae, 79] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 79] DW1 [0x00000037 : 0x00000010 : 0x00000037]
+gpio_padcfg [0xae, 80] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 80] DW1 [0x00000038 : 0x00000010 : 0x00000038]
+gpio_padcfg [0xae, 81] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 81] DW1 [0x00000039 : 0x00000010 : 0x00000039]
+gpio_padcfg [0xae, 82] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 82] DW1 [0x0000003a : 0x00000010 : 0x0000003a]
+gpio_padcfg [0xae, 83] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 83] DW1 [0x0000003b : 0x00000010 : 0x0000003b]
+gpio_padcfg [0xae, 84] DW0 [0x04000200 : 0xc4000200 : 0x04000200]
+gpio_padcfg [0xae, 84] DW1 [0x0000003c : 0x00000010 : 0x0000003c]
+gpio_padcfg [0xae, 85] DW0 [0x44000300 : 0x44000100 : 0x44000100]
+gpio_padcfg [0xae, 85] DW1 [0x0000003d : 0x00000010 : 0x0000003d]
+gpio_padcfg [0xae, 86] DW0 [0x44000300 : 0x44000100 : 0x44000100]
+gpio_padcfg [0xae, 86] DW1 [0x0000003e : 0x00000010 : 0x0000003e]
+gpio_padcfg [0xae, 87] DW0 [0x44000300 : 0x44000100 : 0x44000100]
+gpio_padcfg [0xae, 87] DW1 [0x0000003f : 0x00000010 : 0x0000003f]
+gpio_padcfg [0xae, 88] DW0 [0x44000300 : 0x44000100 : 0x44000100]
+gpio_padcfg [0xae, 88] DW1 [0x00000040 : 0x00000010 : 0x00000040]
+gpio_padcfg [0xae, 89] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 89] DW1 [0x00000041 : 0x00000010 : 0x00000041]
+gpio_padcfg [0xae, 90] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 90] DW1 [0x00000042 : 0x00000010 : 0x00000042]
+gpio_padcfg [0xae, 91] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 91] DW1 [0x00000043 : 0x00000010 : 0x00000043]
+gpio_padcfg [0xae, 92] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 92] DW1 [0x00000044 : 0x00000010 : 0x00000044]
+gpio_padcfg [0xae, 93] DW0 [0x44000700 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 93] DW1 [0x00000045 : 0x00000010 : 0x00000045]
+gpio_padcfg [0xae, 94] DW0 [0x44000700 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 94] DW1 [0x00000046 : 0x00000010 : 0x00000046]
+gpio_padcfg [0xae, 95] DW0 [0x44000700 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 95] DW1 [0x00000047 : 0x00000010 : 0x00000047]
+gpio_padcfg [0xae, 96] DW0 [0x44000700 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 96] DW1 [0x00000048 : 0x00000010 : 0x00000048]
+gpio_padcfg [0xae, 97] DW0 [0x84000300 : 0x84000100 : 0x84000100]
+gpio_padcfg [0xae, 97] DW1 [0x00000049 : 0x00000010 : 0x00000049]
+gpio_padcfg [0xae, 98] DW0 [0x84000300 : 0x84000100 : 0x84000100]
+gpio_padcfg [0xae, 98] DW1 [0x0000004a : 0x00000010 : 0x0000004a]
+gpio_padcfg [0xae, 99] DW0 [0x84000300 : 0x84000100 : 0x84000100]
+gpio_padcfg [0xae, 99] DW1 [0x0000004b : 0x00000010 : 0x0000004b]
+gpio_padcfg [0xae, 100] DW0 [0x84000300 : 0x84000100 : 0x84000100]
+gpio_padcfg [0xae, 100] DW1 [0x0000004c : 0x00000010 : 0x0000004c]
+gpio_padcfg [0xae, 101] DW0 [0x84000300 : 0x84000100 : 0x84000100]
+gpio_padcfg [0xae, 101] DW1 [0x0000004d : 0x00000010 : 0x0000004d]
+gpio_padcfg [0xae, 102] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 102] DW1 [0x0000004e : 0x00000010 : 0x0000004e]
+gpio_padcfg [0xae, 103] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 103] DW1 [0x0000004f : 0x00000010 : 0x0000004f]
+gpio_padcfg [0xae, 104] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 104] DW1 [0x00000050 : 0x00000010 : 0x00000050]
+gpio_padcfg [0xae, 105] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 105] DW1 [0x00000051 : 0x00000000 : 0x00000051]
+gpio_padcfg [0xae, 106] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 106] DW1 [0x00000052 : 0x00000000 : 0x00000052]
+gpio_padcfg [0xae, 107] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 107] DW1 [0x00000053 : 0x00000000 : 0x00000053]
+gpio_padcfg [0xae, 108] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 108] DW1 [0x00000054 : 0x00000010 : 0x00000054]
+gpio_padcfg [0xae, 109] DW0 [0x44000300 : 0x44000201 : 0x44000201]
+gpio_padcfg [0xae, 109] DW1 [0x00000055 : 0x00000010 : 0x00000055]
+gpio_padcfg [0xae, 110] DW0 [0x84000300 : 0x84000101 : 0x84000101]
+gpio_padcfg [0xae, 110] DW1 [0x00000056 : 0x00000010 : 0x00000056]
+gpio_padcfg [0xae, 111] DW0 [0x44000300 : 0x44000201 : 0x44000201]
+gpio_padcfg [0xae, 111] DW1 [0x00000057 : 0x00000010 : 0x00000057]
+gpio_padcfg [0xae, 112] DW0 [0x44000300 : 0x44000201 : 0x44000201]
+gpio_padcfg [0xae, 112] DW1 [0x00000058 : 0x00000010 : 0x00000058]
+gpio_padcfg [0xae, 113] DW0 [0x84000300 : 0x84000101 : 0x84000101]
+gpio_padcfg [0xae, 113] DW1 [0x00000059 : 0x00000010 : 0x00000059]
+gpio_padcfg [0xae, 114] DW0 [0x84000300 : 0x84000201 : 0x84000201]
+gpio_padcfg [0xae, 114] DW1 [0x0000005a : 0x00000010 : 0x0000005a]
+gpio_padcfg [0xae, 115] DW0 [0x84000300 : 0x84000201 : 0x84000201]
+gpio_padcfg [0xae, 115] DW1 [0x0000005b : 0x00000010 : 0x0000005b]
+gpio_padcfg [0xae, 116] DW0 [0x84000300 : 0x84000201 : 0x84000201]
+gpio_padcfg [0xae, 116] DW1 [0x0000005c : 0x00000010 : 0x0000005c]
+gpio_padcfg [0xae, 117] DW0 [0x84000300 : 0x84000201 : 0x84000201]
+gpio_padcfg [0xae, 117] DW1 [0x0000005d : 0x00000010 : 0x0000005d]
+gpio_padcfg [0xae, 118] DW0 [0x84000300 : 0x84000201 : 0x84000201]
+gpio_padcfg [0xae, 118] DW1 [0x0000005e : 0x00000010 : 0x0000005e]
+gpio_padcfg [0xae, 119] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 119] DW1 [0x0000005f : 0x00000010 : 0x0000005f]
+gpio_padcfg [0xae, 120] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 120] DW1 [0x00000060 : 0x00000010 : 0x00000060]
+gpio_padcfg [0xae, 121] DW0 [0x44000200 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 121] DW1 [0x00000061 : 0x00000010 : 0x00000061]
+gpio_padcfg [0xae, 122] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 122] DW1 [0x00000062 : 0x00000010 : 0x00000062]
+gpio_padcfg [0xae, 123] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 123] DW1 [0x00000063 : 0x00000010 : 0x00000063]
+gpio_padcfg [0xae, 124] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 124] DW1 [0x00000064 : 0x00000010 : 0x00000064]
+gpio_padcfg [0xae, 125] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 125] DW1 [0x00000065 : 0x00000010 : 0x00000065]
+gpio_padcfg [0xae, 126] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xae, 126] DW1 [0x00000066 : 0x00000010 : 0x00000066]
+gpio_padcfg [0xae, 127] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xae, 127] DW1 [0x00000067 : 0x00000010 : 0x00000067]
+gpio_padcfg [0xae, 128] DW0 [0x84000300 : 0x84000201 : 0x84000201]
+gpio_padcfg [0xae, 128] DW1 [0x00000068 : 0x00000010 : 0x00000068]
+gpio_padcfg [0xae, 129] DW0 [0x84000300 : 0x84000201 : 0x84000201]
+gpio_padcfg [0xae, 129] DW1 [0x00000069 : 0x00000010 : 0x00000069]
+gpio_padcfg [0xae, 130] DW0 [0x84000300 : 0x84000201 : 0x84000201]
+gpio_padcfg [0xae, 130] DW1 [0x0000006a : 0x00000010 : 0x0000006a]
+gpio_padcfg [0xae, 131] DW0 [0x84000300 : 0x84000201 : 0x84000201]
+gpio_padcfg [0xae, 131] DW1 [0x0000006b : 0x00000010 : 0x0000006b]
+gpio_padcfg [0xae, 132] DW0 [0x84000300 : 0x84000201 : 0x84000201]
+gpio_padcfg [0xae, 132] DW1 [0x0000006c : 0x00000010 : 0x0000006c]
+gpio_padcfg [0xac, 00] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xac, 00] DW1 [0x0000006d : 0x00000010 : 0x0000006d]
+gpio_padcfg [0xac, 01] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xac, 01] DW1 [0x0000006e : 0x00000010 : 0x0000006e]
+gpio_padcfg [0xac, 02] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xac, 02] DW1 [0x0000006f : 0x00000010 : 0x0000006f]
+gpio_padcfg [0xac, 03] DW0 [0x84000300 : 0x84000700 : 0x84000700]
+gpio_padcfg [0xac, 03] DW1 [0x00000070 : 0x00000010 : 0x00000070]
+gpio_padcfg [0xac, 04] DW0 [0x44000300 : 0x44000300 : 0x44000300]
+gpio_padcfg [0xac, 04] DW1 [0x00000071 : 0x00000010 : 0x00000071]
+gpio_padcfg [0xac, 05] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xac, 05] DW1 [0x00000072 : 0x00000010 : 0x00000072]
+gpio_padcfg [0xac, 06] DW0 [0x44000200 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xac, 06] DW1 [0x00000073 : 0x00000010 : 0x00000073]
+gpio_padcfg [0xac, 07] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xac, 07] DW1 [0x00000074 : 0x00000010 : 0x00000074]
+gpio_padcfg [0xac, 08] DW0 [0x44000200 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xac, 08] DW1 [0x00000075 : 0x00000010 : 0x00000075]
+gpio_padcfg [0xac, 09] DW0 [0x44000300 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xac, 09] DW1 [0x00000076 : 0x00000010 : 0x00000076]
+gpio_padcfg [0xac, 10] DW0 [0x44000200 : 0x44000700 : 0x44000700]
+gpio_padcfg [0xac, 10] DW1 [0x00000077 : 0x00000010 : 0x00000077]
+gpio_padcfg [0xad, 00] DW0 [0x04000300 : 0x04000300 : 0x04000300]
+gpio_padcfg [0xad, 00] DW1 [0x00000018 : 0x00000010 : 0x00000018]
+gpio_padcfg [0xad, 01] DW0 [0x04000300 : 0x04000300 : 0x04000300]
+gpio_padcfg [0xad, 01] DW1 [0x00000019 : 0x00000010 : 0x00000019]
+gpio_padcfg [0xad, 02] DW0 [0x04000702 : 0x04000700 : 0x04000702]
+gpio_padcfg [0xad, 02] DW1 [0x0000001a : 0x00000010 : 0x0000001a]
+gpio_padcfg [0xad, 03] DW0 [0x04000702 : 0x04000700 : 0x04000702]
+gpio_padcfg [0xad, 03] DW1 [0x0000001b : 0x00000010 : 0x0000001b]
+gpio_padcfg [0xad, 04] DW0 [0x04000700 : 0x04000700 : 0x04000700]
+gpio_padcfg [0xad, 04] DW1 [0x0000001c : 0x00000010 : 0x0000001c]
+gpio_padcfg [0xad, 05] DW0 [0x04000700 : 0x04000700 : 0x04000700]
+gpio_padcfg [0xad, 05] DW1 [0x0000001d : 0x00000010 : 0x0000001d]
+gpio_padcfg [0xad, 06] DW0 [0x04000700 : 0x04000700 : 0x04000700]
+gpio_padcfg [0xad, 06] DW1 [0x0000001e : 0x00000010 : 0x0000001e]
+gpio_padcfg [0xad, 07] DW0 [0x04000301 : 0x04000301 : 0x04000301]
+gpio_padcfg [0xad, 07] DW1 [0x0000001f : 0x00000010 : 0x0000001f]
+gpio_padcfg [0xad, 08] DW0 [0x04000700 : 0x04000700 : 0x04000700]
+gpio_padcfg [0xad, 08] DW1 [0x00000020 : 0x00000010 : 0x00000020]
+gpio_padcfg [0xad, 09] DW0 [0x04000300 : 0x04000300 : 0x04000300]
+gpio_padcfg [0xad, 09] DW1 [0x00000021 : 0x00000010 : 0x00000021]
+gpio_padcfg [0xad, 10] DW0 [0x04000300 : 0x04000300 : 0x04000300]
+gpio_padcfg [0xad, 10] DW1 [0x00000022 : 0x00000010 : 0x00000022]
+gpio_padcfg [0xad, 11] DW0 [0x04000300 : 0x04000300 : 0x04000300]
+gpio_padcfg [0xad, 11] DW1 [0x00000023 : 0x00000010 : 0x00000023]
+0x0000000000001d0a: IA32_MTRRCAP: SMRR, WC, FIX, 10 variable MTRRs
+0x0000000000000800: IA32_MTRR_DEF_TYPE: E, UC
+0x0000000000000000: IA32_MTRR_FIX64K_00000
+ 0x00000000 - 0x0007ffff: UC
+0x0000000000000000: IA32_MTRR_FIX16K_80000
+ 0x00080000 - 0x0009ffff: UC
+0x0000000000000000: IA32_MTRR_FIX16K_A0000
+ 0x000a0000 - 0x000bffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_C0000
+ 0x000c0000 - 0x000c7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_C8000
+ 0x000c8000 - 0x000cffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_D0000
+ 0x000d0000 - 0x000d7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_D8000
+ 0x000d8000 - 0x000dffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_E0000
+ 0x000e0000 - 0x000e7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_E8000
+ 0x000e8000 - 0x000effff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_F0000
+ 0x000f0000 - 0x000f7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_F8000
+ 0x000f8000 - 0x000fffff: UC
+0x00000000ff000005: PHYBASE0: Address = 0x00000000ff000000, WP
+0x0000007fff000800: PHYMASK0: Length = 0x0000000001000000, Valid
+0x000000007f800006: PHYBASE1: Address = 0x000000007f800000, WB
+0x0000007fff800800: PHYMASK1: Length = 0x0000000000800000, Valid
+0x000000007f000006: PHYBASE2: Address = 0x000000007f000000, WB
+0x0000007fff800800: PHYMASK2: Length = 0x0000000000800000, Valid
+0x000000007e800006: PHYBASE3: Address = 0x000000007e800000, WB
+0x0000007fff800800: PHYMASK3: Length = 0x0000000000800000, Valid
+0x0000000000000000: PHYBASE4
+0x0000000000000000: PHYMASK4: Disabled
+0x0000000000000000: PHYBASE5
+0x0000000000000000: PHYMASK5: Disabled
+0x0000000000000000: PHYBASE6
+0x0000000000000000: PHYMASK6: Disabled
+0x0000000000000000: PHYBASE7
+0x0000000000000000: PHYMASK7: Disabled
+0x0000000000000000: PHYBASE8
+0x0000000000000000: PHYMASK8: Disabled
+0x0000000000000000: PHYBASE9
+0x0000000000000000: PHYMASK9: Disabled
+0x7f34ed70: 4b 42 4c 55 50 44 5f 53 00 00 00 00 00 00 00 00 KBLUPD_S........
+0x7f34ed80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0x7f34ed90: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 00 00 ................
+0x7f34eda0: 00 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 ................
+0x7f34edb0: 01 01 01 01 01 01 01 01 01 01 00 00 00 00 00 00 ................
+0x7f34edc0: 00 00 01 01 01 01 01 01 01 01 01 01 01 01 00 00 ................
+0x7f34edd0: 00 00 01 01 01 01 01 00 00 00 00 00 00 00 00 29 ...............)
+0x7f34ede0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0b ................
+0x7f34edf0: 0a 0b 0b 0b 0b 0b 0b 0e 09 09 00 00 00 00 00 00 ................
+0x7f34ee00: 00 01 00 07 07 07 07 07 07 07 07 07 07 07 07 00 ................
+0x7f34ee10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0x7f34ee20: 00 00 00 02 02 02 02 02 02 02 02 02 02 02 02 00 ................
+0x7f34ee30: 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 ................
+0x7f34ee40: 01 00 00 01 01 01 01 01 00 00 00 00 00 29 29 29 .............)))
+0x7f34ee50: 29 29 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ))..............
+0x7f34ee60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+...
+0x7f34eec0: 00 00 00 01 00 00 00 00 00 00 00 00 00 1f 1f 1f ................
+0x7f34eed0: 1f 1f 1f 1f 1f 1f 1f 1f 1f 1f 1f 1f 1f 1f 1f 1f ................
+0x7f34eee0: 1f 1f 1f 1f 1f 00 00 00 00 00 00 00 00 00 00 00 ................
+0x7f34eef0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+...
+0x7f34ef70: 86 80 15 20 00 02 01 00 01 00 01 00 01 01 01 4b ... ...........K
+0x7f34ef80: 4b 4b 00 00 00 01 03 00 00 00 00 00 00 00 d9 fe KK..............
+0x7f34ef90: 00 10 d9 fe 0e 00 00 00 00 00 00 00 00 00 00 00 ................
+0x7f34efa0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0x7f34efb0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 01 ................
+0x7f34efc0: 01 01 01 01 01 01 01 01 00 00 00 00 00 00 00 00 ................
+0x7f34efd0: 00 00 01 01 01 01 01 00 00 00 00 00 01 01 01 01 ................
+0x7f34efe0: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0x7f34eff0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0x7f34f000: 00 00 00 00 00 00 00 00 00 00 d2 00 36 01 36 01 ............6.6.
+0x7f34f010: 00 00 00 00 d2 00 36 01 36 01 00 00 50 00 50 00 ......6.6...P.P.
+0x7f34f020: 50 00 50 00 00 00 10 00 14 00 14 00 14 00 00 00 P.P.............
+0x7f34f030: 04 00 04 00 04 00 04 00 00 00 2c 00 90 01 b4 00 ..........,.....
+0x7f34f040: b4 00 00 00 f0 05 f0 05 f0 05 f0 05 00 00 00 00 ................
+0x7f34f050: 00 00 00 00 00 00 00 00 09 40 01 00 00 00 00 00 .........@......
+0x7f34f060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 ................
+0x7f34f070: 01 01 01 00 00 00 0e 0e 0e 0d 0d 0d 0a 0a 09 0a ................
+0x7f34f080: bb bb bb bb cc cc 01 00 00 00 00 00 00 00 00 00 ................
+0x7f34f090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0x7f34f0a0: 00 00 00 00 00 00 00 00 00 02 04 00 00 00 02 00 ................
+0x7f34f0b0: 00 00 00 00 00 00 00 00 00 00 f0 1f 00 01 02 00 ................
+0x7f34f0c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 ................
+0x7f34f0d0: 00 00 00 00 00 00 86 80 70 72 00 00 00 00 00 00 ........pr......
+0x7f34f0e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+...
+0x7f34f270: 00 00 00 00 00 00 00 00 00 01 02 03 04 05 06 07 ................
+0x7f34f280: 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 ................
+0x7f34f290: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+...
+0x7f34f300: 00 00 00 00 00 00 00 00 04 04 04 04 04 04 04 04 ................
+0x7f34f310: 04 04 04 04 04 04 04 04 04 04 04 04 04 04 04 04 ................
+0x7f34f320: 03 03 03 03 03 03 03 03 03 03 03 03 03 03 03 03 ................
+0x7f34f330: 03 03 03 03 03 03 03 03 00 00 00 00 00 00 00 00 ................
+0x7f34f340: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+...
+0x7f34f360: 00 00 00 00 00 00 00 00 06 06 06 06 06 06 06 06 ................
+0x7f34f370: 06 06 06 06 06 06 06 06 06 06 06 06 06 06 06 06 ................
+0x7f34f380: 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 ................
+0x7f34f390: 02 02 02 02 02 02 02 02 06 04 08 02 0a 02 02 02 ................
+0x7f34f3a0: 02 02 00 00 00 00 00 00 01 00 00 00 00 00 00 00 ................
+0x7f34f3b0: 00 00 00 00 00 00 02 04 03 03 00 00 00 00 00 00 ................
+0x7f34f3c0: 00 00 01 00 00 00 00 01 01 01 00 00 00 01 00 00 ................
+0x7f34f3d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+...
+0x7f34f400: 0f 0f 0f 0f 0f 0f 0f 0f 71 02 71 02 71 02 71 02 ........q.q.q.q.
+0x7f34f410: 71 02 71 02 71 02 71 02 00 00 00 00 00 00 00 00 q.q.q.q.........
+0x7f34f420: 00 01 01 01 01 01 01 00 01 01 01 01 00 00 00 00 ................
+0x7f34f430: 00 00 64 64 64 00 00 00 00 00 01 00 00 00 00 00 ..ddd...........
+0x7f34f440: 00 00 00 00 00 00 02 01 01 01 00 01 00 00 00 00 ................
+0x7f34f450: 00 00 01 00 00 00 01 01 00 01 00 00 00 00 01 02 ................
+0x7f34f460: 03 00 01 02 03 00 00 00 00 00 01 00 00 00 00 00 ................
+0x7f34f470: 00 00 00 00 00 03 03 01 01 02 02 00 00 08 05 04 ................
+0x7f34f480: 04 08 08 00 00 04 04 05 03 03 08 08 08 08 08 01 ................
+0x7f34f490: 01 01 00 00 00 00 00 00 01 ff ff 00 00 00 00 00 ................
+0x7f34f4a0: ff ff ff ff ff ff ff ff 00 00 00 00 00 00 00 00 ................
+0x7f34f4b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0x7f34f4c0: 00 00 00 00 00 00 00 00 ff ff ff ff ff ff ff ff ................
+0x7f34f4d0: ff ff ff ff ff 00 00 00 ff ff ff ff ff ff ff ff ................
+0x7f34f4e0: ff ff ff ff ff ff ff ff 01 01 00 00 00 00 00 00 ................
+0x7f34f4f0: 54 45 53 54 00 00 02 00 00 ff ff ff 01 01 01 00 TEST............
+0x7f34f500: ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+0x7f34f510: 00 01 01 00 01 00 00 00 01 00 00 01 00 00 1c 14 ................
+0x7f34f520: 00 1c 14 00 1c 14 00 00 00 00 00 00 00 00 01 01 ................
+0x7f34f530: 01 01 00 01 02 02 00 00 00 00 ff 00 01 00 01 01 ................
+0x7f34f540: 01 01 01 01 00 00 01 00 01 01 02 02 01 00 00 08 ................
+0x7f34f550: 02 02 02 02 02 02 04 00 00 01 00 00 00 00 00 00 ................
+0x7f34f560: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+...
+0x7f34f5a0: 00 00 00 00 00 00 00 00 00 00 00 00 4e 00 76 00 ............N.v.
+0x7f34f5b0: 94 00 fa 00 4c 01 f2 03 58 1b 00 00 98 3a 00 00 ....L...X....:..
+0x7f34f5c0: 98 3a 00 00 00 00 00 00 00 00 00 00 40 9c 00 00 .:..........@...
+0x7f34f5d0: 50 c3 00 00 40 9c 00 00 50 c3 00 00 40 9c 00 00 P...@...P...@...
+0x7f34f5e0: 50 c3 00 00 00 00 00 00 00 00 00 00 ac 00 00 00 P...............
+0x7f34f5f0: 00 00 00 00 00 00 00 00 00 00 ff 01 00 00 58 02 ..............X.
+0x7f34f600: 00 00 00 01 03 10 03 10 03 10 03 10 03 10 03 10 ................
+0x7f34f610: 03 10 03 10 03 10 03 10 03 10 03 10 03 10 03 10 ................
+0x7f34f620: 03 10 03 10 03 10 03 10 03 10 03 10 03 10 03 10 ................
+0x7f34f630: 03 10 03 10 03 10 03 10 03 10 03 10 03 10 03 10 ................
+0x7f34f640: 03 10 03 10 03 10 03 10 03 10 03 10 03 10 03 10 ................
+0x7f34f650: 03 10 03 10 03 10 03 10 03 10 03 10 03 10 03 10 ................
+0x7f34f660: 03 10 03 10 02 02 02 02 02 02 02 02 02 02 02 02 ................
+0x7f34f670: 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 ................
+0x7f34f680: 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 ................
+0x7f34f690: 02 02 02 02 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 ....<.<.<.<.<.<.
+0x7f34f6a0: 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 <.<.<.<.<.<.<.<.
+0x7f34f6b0: 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 <.<.<.<.<.<.<.<.
+0x7f34f6c0: 3c 00 3c 00 02 02 02 02 02 02 02 02 02 02 02 02 <.<.............
+0x7f34f6d0: 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 ................
+0x7f34f6e0: 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 ................
+0x7f34f6f0: 02 02 02 02 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 ....<.<.<.<.<.<.
+0x7f34f700: 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 <.<.<.<.<.<.<.<.
+0x7f34f710: 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 3c 00 <.<.<.<.<.<.<.<.
+0x7f34f720: 3c 00 3c 00 00 00 00 00 00 00 00 00 00 00 00 00 <.<.............
+0x7f34f730: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+...
+0x7f34f760: 00 00 00 00 00 00 00 00 00 00 00 00 05 05 05 05 ................
+0x7f34f770: 05 05 05 05 05 05 05 05 05 05 05 05 05 05 05 05 ................
+0x7f34f780: 05 05 05 05 07 07 07 07 07 07 07 07 07 07 07 07 ................
+0x7f34f790: 07 07 07 07 07 07 07 07 07 07 07 07 00 00 00 00 ................
+0x7f34f7a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+...
+0x7f34f980: 00 00 00 00 00 00 aa 55 .......U
+Timestamp - calling FspSiliconInit: 236428189564
+POST: 0x93
+Timestamp - returning from FspSiliconInit: 289112265272
+POST: 0x99
+0x0000000000001d0a: IA32_MTRRCAP: SMRR, WC, FIX, 10 variable MTRRs
+0x0000000000000800: IA32_MTRR_DEF_TYPE: E, UC
+0x0000000000000000: IA32_MTRR_FIX64K_00000
+ 0x00000000 - 0x0007ffff: UC
+0x0000000000000000: IA32_MTRR_FIX16K_80000
+ 0x00080000 - 0x0009ffff: UC
+0x0000000000000000: IA32_MTRR_FIX16K_A0000
+ 0x000a0000 - 0x000bffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_C0000
+ 0x000c0000 - 0x000c7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_C8000
+ 0x000c8000 - 0x000cffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_D0000
+ 0x000d0000 - 0x000d7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_D8000
+ 0x000d8000 - 0x000dffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_E0000
+ 0x000e0000 - 0x000e7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_E8000
+ 0x000e8000 - 0x000effff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_F0000
+ 0x000f0000 - 0x000f7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_F8000
+ 0x000f8000 - 0x000fffff: UC
+0x00000000ff000005: PHYBASE0: Address = 0x00000000ff000000, WP
+0x0000007fff000800: PHYMASK0: Length = 0x0000000001000000, Valid
+0x000000007f800006: PHYBASE1: Address = 0x000000007f800000, WB
+0x0000007fff800800: PHYMASK1: Length = 0x0000000000800000, Valid
+0x000000007f000006: PHYBASE2: Address = 0x000000007f000000, WB
+0x0000007fff800800: PHYMASK2: Length = 0x0000000000800000, Valid
+0x000000007e800006: PHYBASE3: Address = 0x000000007e800000, WB
+0x0000007fff800800: PHYMASK3: Length = 0x0000000000800000, Valid
+0x0000000000000000: PHYBASE4
+0x0000000000000000: PHYMASK4: Disabled
+0x0000000000000000: PHYBASE5
+0x0000000000000000: PHYMASK5: Disabled
+0x0000000000000000: PHYBASE6
+0x0000000000000000: PHYMASK6: Disabled
+0x0000000000000000: PHYBASE7
+0x0000000000000000: PHYMASK7: Disabled
+0x0000000000000000: PHYBASE8
+0x0000000000000000: PHYMASK8: Disabled
+0x0000000000000000: PHYBASE9
+0x0000000000000000: PHYMASK9: Disabled
+ITSS IRQ Polarities Before:
+IPC0: 0x00ff4000
+IPC1: 0x00000007
+IPC2: 0x00000000
+IPC3: 0x00000000
+ITSS IRQ Polarities After:
+IPC0: 0x00ff4000
+IPC1: 0x00000007
+IPC2: 0x00000000
+IPC3: 0x00000000
+Found PCIe Root Port #1 at PCI: 00:1c.0.
+Found PCIe Root Port #9 at PCI: 00:1d.0.
+Found PCIe Root Port #10 at PCI: 00:1d.1.
+Found PCIe Root Port #11 at PCI: 00:1d.2.
+pcie_rp_update_dev: Couldn't find PCIe Root Port #5 (originally PCI: 00:1c.4) which was enabled in devicetree, removing.
+BS: Exiting BS_DEV_INIT_CHIPS state.
+BS: BS_DEV_INIT_CHIPS run times (exec / console): 15051 / 3539 ms
+----------------------------------------
+BS: BS_DEV_INIT_CHIPS exit times (exec / console): 0 / 4 ms
+BS: Entering BS_DEV_ENUMERATE state.
+POST: 0x72
+Enumerating buses...
+Root Device scanning...
+CPU_CLUSTER: 0 enabled
+DOMAIN: 0000 enabled
+DOMAIN: 0000 scanning...
+PCI: pci_scan_bus for bus 00
+POST: 0x24
+PCI: 00:00.0 [8086/5918] enabled
+PCI: 00:01.0 subordinate bus PCI Express
+PCI: 00:01.0 [8086/1901] enabled
+PCI: 00:01.1 subordinate bus PCI Express
+PCI: 00:01.1 [8086/1905] enabled
+PCI: 00:04.0 [8086/1903] enabled
+PCI: 00:14.0 [8086/a12f] enabled
+PCI: 00:14.2 [8086/a131] enabled
+PCI: 00:16.0 [8086/a13a] enabled
+PCI: 00:17.0 [8086/a102] enabled
+PCI: 00:1c.0 [8086/a110] enabled
+PCI: 00:1d.0 [8086/a118] enabled
+PCI: 00:1d.1 [8086/a119] enabled
+PCI: 00:1d.2 [8086/a11a] enabled
+PCI: 00:1f.0 [8086/a149] enabled
+PCI: 00:1f.1 [8086/a120] enabled
+PCI: 00:1f.2 [8086/a121] enabled
+PCI: 00:1f.4 [8086/a123] enabled
+PCI: 00:1f.5 [8086/a124] enabled
+POST: 0x25
+PCI: Leftover static devices:
+PCI: 00:01.2
+PCI: 00:02.0
+PCI: 00:05.0
+PCI: 00:08.0
+PCI: 00:13.0
+PCI: 00:14.1
+PCI: 00:15.0
+PCI: 00:15.1
+PCI: 00:15.2
+PCI: 00:15.3
+PCI: 00:16.1
+PCI: 00:16.2
+PCI: 00:16.3
+PCI: 00:16.4
+PCI: 00:19.0
+PCI: 00:19.1
+PCI: 00:19.2
+PCI: 00:1e.0
+PCI: 00:1e.1
+PCI: 00:1e.2
+PCI: 00:1f.3
+PCI: 00:1f.6
+PCI: 00:1f.7
+PCI: Check your devicetree.cb.
+PCI: 00:01.0 scanning...
+PCI: pci_scan_bus for bus 01
+POST: 0x24
+POST: 0x25
+POST: 0x55
+scan_bus: bus PCI: 00:01.0 finished in 5 msecs
+PCI: 00:01.1 scanning...
+PCI: pci_scan_bus for bus 02
+POST: 0x24
+PCI: 02:00.0 [10ec/8812] enabled
+POST: 0x25
+POST: 0x55
+Enabling Common Clock Configuration
+ASPM: Enabled L0s and L1
+PCIe: Max_Payload_Size adjusted to 128
+scan_bus: bus PCI: 00:01.1 finished in 42 msecs
+PCI: 00:14.0 scanning...
+scan_bus: bus PCI: 00:14.0 finished in 0 msecs
+PCI: 00:1c.0 scanning...
+PCI: pci_scan_bus for bus 03
+POST: 0x24
+PCI: 03:00.0 [8086/150e] enabled
+PCI: 03:00.1 [8086/150e] enabled
+PCI: 03:00.2 [8086/150e] enabled
+PCI: 03:00.3 [8086/150e] enabled
+POST: 0x25
+POST: 0x55
+Enabling Common Clock Configuration
+PCIE CLK PM is not supported by endpoint
+ASPM: Enabled L1
+PCIe: Max_Payload_Size adjusted to 128
+Enabling Common Clock Configuration
+PCIE CLK PM is not supported by endpoint
+ASPM: Enabled L1
+PCIe: Max_Payload_Size adjusted to 128
+Enabling Common Clock Configuration
+PCIE CLK PM is not supported by endpoint
+ASPM: Enabled L1
+PCIe: Max_Payload_Size adjusted to 128
+Enabling Common Clock Configuration
+PCIE CLK PM is not supported by endpoint
+ASPM: Enabled L1
+PCIe: Max_Payload_Size adjusted to 128
+scan_bus: bus PCI: 00:1c.0 finished in 66 msecs
+PCI: 00:1d.0 scanning...
+PCI: pci_scan_bus for bus 04
+POST: 0x24
+PCI: 04:00.0 [8086/1533] enabled
+POST: 0x25
+POST: 0x55
+Enabling Common Clock Configuration
+PCIE CLK PM is not supported by endpoint
+ASPM: Enabled L1
+PCIe: Max_Payload_Size adjusted to 128
+Failed to enable LTR for dev = PCI: 04:00.0
+scan_bus: bus PCI: 00:1d.0 finished in 24 msecs
+PCI: 00:1d.1 scanning...
+PCI: pci_scan_bus for bus 05
+POST: 0x24
+PCI: 05:00.0 [8086/1533] enabled
+POST: 0x25
+PCI: Leftover static devices:
+PCI: 05:00.1
+PCI: Check your devicetree.cb.
+POST: 0x55
+Enabling Common Clock Configuration
+PCIE CLK PM is not supported by endpoint
+ASPM: Enabled L1
+PCIe: Max_Payload_Size adjusted to 128
+Failed to enable LTR for dev = PCI: 05:00.0
+scan_bus: bus PCI: 00:1d.1 finished in 31 msecs
+PCI: 00:1d.2 scanning...
+PCI: pci_scan_bus for bus 06
+POST: 0x24
+PCI: 06:00.0 subordinate PCI
+PCI: 06:00.0 [1a03/1150] enabled
+POST: 0x25
+PCI: 06:00.0 scanning...
+PCI: pci_scan_bus for bus 07
+POST: 0x24
+PCI: 07:00.0 [1a03/2000] enabled
+POST: 0x25
+POST: 0x55
+scan_bus: bus PCI: 06:00.0 finished in 8 msecs
+POST: 0x55
+Enabling Common Clock Configuration
+PCIE CLK PM is not supported by endpoint
+ASPM: Enabled None
+PCIe: Max_Payload_Size adjusted to 128
+Failed to enable LTR for dev = PCI: 06:00.0
+Failed to enable LTR for dev = PCI: 07:00.0
+scan_bus: bus PCI: 00:1d.2 finished in 46 msecs
+PCI: 00:1f.0 scanning...
+PNP: 002e.0 enabled
+PNP: 0c31.0 enabled
+PNP: 0ca2.0 enabled
+PNP: 002e.0 scanning...
+PNP: 002e.2 enabled
+PNP: 002e.3 enabled
+PNP: 002e.4 enabled
+PNP: 002e.5 disabled
+PNP: 002e.7 enabled
+PNP: 002e.b disabled
+PNP: 002e.c disabled
+PNP: 002e.d enabled
+PNP: 002e.e enabled
+scan_bus: bus PNP: 002e.0 finished in 16 msecs
+scan_bus: bus PCI: 00:1f.0 finished in 29 msecs
+PCI: 00:1f.2 scanning...
+scan_bus: bus PCI: 00:1f.2 finished in 0 msecs
+PCI: 00:1f.4 scanning...
+scan_bus: bus PCI: 00:1f.4 finished in 0 msecs
+POST: 0x55
+scan_bus: bus DOMAIN: 0000 finished in 409 msecs
+scan_bus: bus Root Device finished in 420 msecs
+done
+BS: Exiting BS_DEV_ENUMERATE state.
+BS: BS_DEV_ENUMERATE run times (exec / console): 27 / 407 ms
+BS: callback (0x7f33d08c) @ src/drivers/mrc_cache/mrc_cache.c:555.
+FMAP: area RW_MRC_CACHE found @ 500000 (65536 bytes)
+MRC: Checking cached data update for 'RW_MRC_CACHE'.
+SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
+MRC: no data in 'RW_MRC_CACHE'
+MRC: cache data 'RW_MRC_CACHE' needs update.
+MRC: Could not find region 'UNIFIED_MRC_CACHE'
+FMAP: area RW_MRC_CACHE found @ 500000 (65536 bytes)
+MRC: NOT enabling PRR for 'RW_MRC_CACHE'.
+----------------------------------------
+BS: BS_DEV_ENUMERATE exit times (exec / console): 7 / 44 ms
+BS: Entering BS_DEV_RESOURCES state.
+POST: 0x73
+Timestamp - device configuration: 291707490290
+found VGA at PCI: 07:00.0
+Setting up VGA for PCI: 07:00.0
+Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 06:00.0
+Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:1d.2
+Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
+Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
+Allocating resources...
+Reading resources...
+Done reading resources.
+==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
+ PCI: 00:01.1 io: size: 0 align: 12 gran: 12 limit: ffff
+ PCI: 02:00.0 10 * [0x0 - 0xff] io
+ PCI: 00:01.1 io: size: 1000 align: 12 gran: 12 limit: ffff done
+ PCI: 00:01.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
+ PCI: 02:00.0 18 * [0x0 - 0x3fff] mem
+ PCI: 00:01.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
+ PCI: 00:01.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+ PCI: 00:01.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+ PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
+ PCI: 03:00.0 18 * [0x0 - 0x1f] io
+ PCI: 03:00.1 18 * [0x20 - 0x3f] io
+ PCI: 03:00.2 18 * [0x40 - 0x5f] io
+ PCI: 03:00.3 18 * [0x60 - 0x7f] io
+ PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
+ PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
+ PCI: 03:00.0 10 * [0x0 - 0x7ffff] mem
+ PCI: 03:00.1 10 * [0x80000 - 0xfffff] mem
+ PCI: 03:00.2 10 * [0x100000 - 0x17ffff] mem
+ PCI: 03:00.3 10 * [0x180000 - 0x1fffff] mem
+ PCI: 03:00.0 1c * [0x200000 - 0x203fff] mem
+ PCI: 03:00.1 1c * [0x204000 - 0x207fff] mem
+ PCI: 03:00.2 1c * [0x208000 - 0x20bfff] mem
+ PCI: 03:00.3 1c * [0x20c000 - 0x20ffff] mem
+ PCI: 00:1c.0 mem: size: 300000 align: 20 gran: 20 limit: ffffffff done
+ PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+ PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+ PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
+ PCI: 04:00.0 18 * [0x0 - 0x1f] io
+ PCI: 00:1d.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
+ PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
+ PCI: 04:00.0 10 * [0x0 - 0x7ffff] mem
+ PCI: 04:00.0 1c * [0x80000 - 0x83fff] mem
+ PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
+ PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+ PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+ PCI: 00:1d.1 io: size: 0 align: 12 gran: 12 limit: ffff
+ PCI: 05:00.0 18 * [0x0 - 0x1f] io
+ PCI: 00:1d.1 io: size: 1000 align: 12 gran: 12 limit: ffff done
+ PCI: 00:1d.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
+ PCI: 05:00.0 10 * [0x0 - 0x7ffff] mem
+ PCI: 05:00.0 1c * [0x80000 - 0x83fff] mem
+ PCI: 00:1d.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
+ PCI: 00:1d.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+ PCI: 00:1d.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+ PCI: 06:00.0 io: size: 0 align: 12 gran: 12 limit: ffffffff
+ PCI: 07:00.0 18 * [0x0 - 0x7f] io
+ PCI: 06:00.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
+ PCI: 00:1d.2 io: size: 0 align: 12 gran: 12 limit: ffff
+ PCI: 06:00.0 1c * [0x0 - 0xfff] io
+ PCI: 00:1d.2 io: size: 1000 align: 12 gran: 12 limit: ffff done
+ PCI: 06:00.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
+ PCI: 07:00.0 10 * [0x0 - 0xffffff] mem
+ PCI: 07:00.0 14 * [0x1000000 - 0x101ffff] mem
+ PCI: 06:00.0 mem: size: 1100000 align: 24 gran: 20 limit: ffffffff done
+ PCI: 00:1d.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
+ PCI: 06:00.0 20 * [0x0 - 0x10fffff] mem
+ PCI: 00:1d.2 mem: size: 1100000 align: 24 gran: 20 limit: ffffffff done
+ PCI: 06:00.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+ PCI: 06:00.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+ PCI: 00:1d.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+ PCI: 00:1d.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+=== Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
+DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
+ update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
+ update_constraints: PNP: 002e.0 00 base 0000002e limit 0000002f io (fixed)
+ update_constraints: PNP: 002e.2 60 base 000003f8 limit 000003ff io (fixed)
+ update_constraints: PNP: 002e.3 60 base 000002f8 limit 000002ff io (fixed)
+ update_constraints: PNP: 002e.4 60 base 00000a00 limit 00000a07 io (fixed)
+ update_constraints: PNP: 002e.4 62 base 00000a10 limit 00000a17 io (fixed)
+ update_constraints: PNP: 002e.4 64 base 00000a20 limit 00000a27 io (fixed)
+ update_constraints: PNP: 002e.4 66 base 00000a30 limit 00000a37 io (fixed)
+ update_constraints: PNP: 002e.e 60 base 00000a40 limit 00000a41 io (fixed)
+ update_constraints: PNP: 0ca2.0 00 base 00000ca2 limit 00000ca3 io (fixed)
+ update_constraints: PCI: 00:1f.2 40 base 00001800 limit 000018ff io (fixed)
+ update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
+ DOMAIN: 0000: Resource ranges:
+ * Base: 1000, Size: 800, Tag: 100
+ * Base: 1900, Size: d6a0, Tag: 100
+ * Base: efc0, Size: 1040, Tag: 100
+ PCI: 00:01.1 1c * [0x2000 - 0x2fff] limit: 2fff io
+ PCI: 00:1c.0 1c * [0x3000 - 0x3fff] limit: 3fff io
+ PCI: 00:1d.0 1c * [0x4000 - 0x4fff] limit: 4fff io
+ PCI: 00:1d.1 1c * [0x5000 - 0x5fff] limit: 5fff io
+ PCI: 00:1d.2 1c * [0x6000 - 0x6fff] limit: 6fff io
+ PCI: 00:17.0 20 * [0x1000 - 0x101f] limit: 101f io
+ PCI: 00:17.0 18 * [0x1020 - 0x1027] limit: 1027 io
+ PCI: 00:17.0 1c * [0x1028 - 0x102b] limit: 102b io
+DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
+DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
+ update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
+ update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed)
+ update_constraints: PCI: 00:00.0 02 base fed18000 limit fed18fff mem (fixed)
+ update_constraints: PCI: 00:00.0 03 base fed19000 limit fed19fff mem (fixed)
+ update_constraints: PCI: 00:00.0 04 base fed84000 limit fed84fff mem (fixed)
+ update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
+ update_constraints: PCI: 00:00.0 06 base fed91000 limit fed91fff mem (fixed)
+ update_constraints: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
+ update_constraints: PCI: 00:00.0 08 base 000c0000 limit 7f7fffff mem (fixed)
+ update_constraints: PCI: 00:00.0 09 base 7f800000 limit 7fffffff mem (fixed)
+ update_constraints: PCI: 00:00.0 0b base 100000000 limit 47fffffff mem (fixed)
+ update_constraints: PCI: 00:00.0 0c base 000a0000 limit 000bffff mem (fixed)
+ update_constraints: PCI: 00:00.0 0d base 000c0000 limit 000fffff mem (fixed)
+ update_constraints: PCI: 07:00.0 03 base 000a0000 limit 000bfbff mem (fixed)
+ update_constraints: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
+ update_constraints: PCI: 00:1f.1 10 base fd000000 limit fdffffff mem (fixed)
+ update_constraints: PCI: 00:1f.2 48 base fe000000 limit fe00ffff mem (fixed)
+ DOMAIN: 0000: Resource ranges:
+ * Base: 80000000, Size: 60000000, Tag: 200
+ * Base: f0000000, Size: d000000, Tag: 200
+ * Base: fe010000, Size: d00000, Tag: 200
+ * Base: fed1a000, Size: 26000, Tag: 200
+ * Base: fed45000, Size: 3b000, Tag: 200
+ * Base: fed85000, Size: c000, Tag: 200
+ * Base: fed92000, Size: 126e000, Tag: 200
+ * Base: 480000000, Size: 7b80000000, Tag: 100200
+ PCI: 00:1d.2 20 * [0x80000000 - 0x810fffff] limit: 810fffff mem
+ PCI: 00:1c.0 20 * [0x81100000 - 0x813fffff] limit: 813fffff mem
+ PCI: 00:01.1 20 * [0x81400000 - 0x814fffff] limit: 814fffff mem
+ PCI: 00:1d.0 20 * [0x81500000 - 0x815fffff] limit: 815fffff mem
+ PCI: 00:1d.1 20 * [0x81600000 - 0x816fffff] limit: 816fffff mem
+ PCI: 00:14.0 10 * [0x81700000 - 0x8170ffff] limit: 8170ffff mem
+ PCI: 00:04.0 10 * [0x81710000 - 0x81717fff] limit: 81717fff mem
+ PCI: 00:1f.2 10 * [0x81718000 - 0x8171bfff] limit: 8171bfff mem
+ PCI: 00:17.0 10 * [0x8171c000 - 0x8171dfff] limit: 8171dfff mem
+ PCI: 00:14.2 10 * [0x8171e000 - 0x8171efff] limit: 8171efff mem
+ PCI: 00:16.0 10 * [0x8171f000 - 0x8171ffff] limit: 8171ffff mem
+ PCI: 00:1f.5 10 * [0x81720000 - 0x81720fff] limit: 81720fff mem
+ PCI: 00:17.0 24 * [0x81721000 - 0x817217ff] limit: 817217ff mem
+ PCI: 00:17.0 14 * [0x81722000 - 0x817220ff] limit: 817220ff mem
+ PCI: 00:1f.4 10 * [0x81723000 - 0x817230ff] limit: 817230ff mem
+DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
+PCI: 00:01.1 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff
+ PCI: 00:01.1: Resource ranges:
+ * Base: 2000, Size: 1000, Tag: 100
+ PCI: 02:00.0 10 * [0x2000 - 0x20ff] limit: 20ff io
+PCI: 00:01.1 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done
+PCI: 00:01.1 mem: base: 81400000 size: 100000 align: 20 gran: 20 limit: 814fffff
+ PCI: 00:01.1: Resource ranges:
+ * Base: 81400000, Size: 100000, Tag: 200
+ PCI: 02:00.0 18 * [0x81400000 - 0x81403fff] limit: 81403fff mem
+PCI: 00:01.1 mem: base: 81400000 size: 100000 align: 20 gran: 20 limit: 814fffff done
+PCI: 00:1c.0 io: base: 3000 size: 1000 align: 12 gran: 12 limit: 3fff
+ PCI: 00:1c.0: Resource ranges:
+ * Base: 3000, Size: 1000, Tag: 100
+ PCI: 03:00.0 18 * [0x3000 - 0x301f] limit: 301f io
+ PCI: 03:00.1 18 * [0x3020 - 0x303f] limit: 303f io
+ PCI: 03:00.2 18 * [0x3040 - 0x305f] limit: 305f io
+ PCI: 03:00.3 18 * [0x3060 - 0x307f] limit: 307f io
+PCI: 00:1c.0 io: base: 3000 size: 1000 align: 12 gran: 12 limit: 3fff done
+PCI: 00:1c.0 mem: base: 81100000 size: 300000 align: 20 gran: 20 limit: 813fffff
+ PCI: 00:1c.0: Resource ranges:
+ * Base: 81100000, Size: 300000, Tag: 200
+ PCI: 03:00.0 10 * [0x81100000 - 0x8117ffff] limit: 8117ffff mem
+ PCI: 03:00.1 10 * [0x81180000 - 0x811fffff] limit: 811fffff mem
+ PCI: 03:00.2 10 * [0x81200000 - 0x8127ffff] limit: 8127ffff mem
+ PCI: 03:00.3 10 * [0x81280000 - 0x812fffff] limit: 812fffff mem
+ PCI: 03:00.0 1c * [0x81300000 - 0x81303fff] limit: 81303fff mem
+ PCI: 03:00.1 1c * [0x81304000 - 0x81307fff] limit: 81307fff mem
+ PCI: 03:00.2 1c * [0x81308000 - 0x8130bfff] limit: 8130bfff mem
+ PCI: 03:00.3 1c * [0x8130c000 - 0x8130ffff] limit: 8130ffff mem
+PCI: 00:1c.0 mem: base: 81100000 size: 300000 align: 20 gran: 20 limit: 813fffff done
+PCI: 00:1d.0 io: base: 4000 size: 1000 align: 12 gran: 12 limit: 4fff
+ PCI: 00:1d.0: Resource ranges:
+ * Base: 4000, Size: 1000, Tag: 100
+ PCI: 04:00.0 18 * [0x4000 - 0x401f] limit: 401f io
+PCI: 00:1d.0 io: base: 4000 size: 1000 align: 12 gran: 12 limit: 4fff done
+PCI: 00:1d.0 mem: base: 81500000 size: 100000 align: 20 gran: 20 limit: 815fffff
+ PCI: 00:1d.0: Resource ranges:
+ * Base: 81500000, Size: 100000, Tag: 200
+ PCI: 04:00.0 10 * [0x81500000 - 0x8157ffff] limit: 8157ffff mem
+ PCI: 04:00.0 1c * [0x81580000 - 0x81583fff] limit: 81583fff mem
+PCI: 00:1d.0 mem: base: 81500000 size: 100000 align: 20 gran: 20 limit: 815fffff done
+PCI: 00:1d.1 io: base: 5000 size: 1000 align: 12 gran: 12 limit: 5fff
+ PCI: 00:1d.1: Resource ranges:
+ * Base: 5000, Size: 1000, Tag: 100
+ PCI: 05:00.0 18 * [0x5000 - 0x501f] limit: 501f io
+PCI: 00:1d.1 io: base: 5000 size: 1000 align: 12 gran: 12 limit: 5fff done
+PCI: 00:1d.1 mem: base: 81600000 size: 100000 align: 20 gran: 20 limit: 816fffff
+ PCI: 00:1d.1: Resource ranges:
+ * Base: 81600000, Size: 100000, Tag: 200
+ PCI: 05:00.0 10 * [0x81600000 - 0x8167ffff] limit: 8167ffff mem
+ PCI: 05:00.0 1c * [0x81680000 - 0x81683fff] limit: 81683fff mem
+PCI: 00:1d.1 mem: base: 81600000 size: 100000 align: 20 gran: 20 limit: 816fffff done
+PCI: 00:1d.2 io: base: 6000 size: 1000 align: 12 gran: 12 limit: 6fff
+ PCI: 00:1d.2: Resource ranges:
+ * Base: 6000, Size: 1000, Tag: 100
+ PCI: 06:00.0 1c * [0x6000 - 0x6fff] limit: 6fff io
+PCI: 00:1d.2 io: base: 6000 size: 1000 align: 12 gran: 12 limit: 6fff done
+PCI: 00:1d.2 mem: base: 80000000 size: 1100000 align: 24 gran: 20 limit: 810fffff
+ PCI: 00:1d.2: Resource ranges:
+ * Base: 80000000, Size: 1100000, Tag: 200
+ PCI: 06:00.0 20 * [0x80000000 - 0x810fffff] limit: 810fffff mem
+PCI: 00:1d.2 mem: base: 80000000 size: 1100000 align: 24 gran: 20 limit: 810fffff done
+PCI: 06:00.0 io: base: 6000 size: 1000 align: 12 gran: 12 limit: 6fff
+ PCI: 06:00.0: Resource ranges:
+ * Base: 6000, Size: 1000, Tag: 100
+ PCI: 07:00.0 18 * [0x6000 - 0x607f] limit: 607f io
+PCI: 06:00.0 io: base: 6000 size: 1000 align: 12 gran: 12 limit: 6fff done
+PCI: 06:00.0 mem: base: 80000000 size: 1100000 align: 24 gran: 20 limit: 810fffff
+ PCI: 06:00.0: Resource ranges:
+ * Base: 80000000, Size: 1100000, Tag: 200
+ PCI: 07:00.0 10 * [0x80000000 - 0x80ffffff] limit: 80ffffff mem
+ PCI: 07:00.0 14 * [0x81000000 - 0x8101ffff] limit: 8101ffff mem
+PCI: 06:00.0 mem: base: 80000000 size: 1100000 align: 24 gran: 20 limit: 810fffff done
+=== Resource allocator: DOMAIN: 0000 - resource allocation complete ===
+PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
+PCI: 00:01.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
+PCI: 00:01.0 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 01 mem
+PCI: 00:01.1 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 02 io
+PCI: 00:01.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
+PCI: 00:01.1 20 <- [0x0081400000 - 0x00814fffff] size 0x00100000 gran 0x14 bus 02 mem
+PCI: 02:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
+PCI: 02:00.0 18 <- [0x0081400000 - 0x0081403fff] size 0x00004000 gran 0x0e mem64
+PCI: 00:04.0 10 <- [0x0081710000 - 0x0081717fff] size 0x00008000 gran 0x0f mem64
+PCI: 00:14.0 10 <- [0x0081700000 - 0x008170ffff] size 0x00010000 gran 0x10 mem64
+PCI: 00:14.2 10 <- [0x008171e000 - 0x008171efff] size 0x00001000 gran 0x0c mem64
+PCI: 00:16.0 10 <- [0x008171f000 - 0x008171ffff] size 0x00001000 gran 0x0c mem64
+PCI: 00:17.0 10 <- [0x008171c000 - 0x008171dfff] size 0x00002000 gran 0x0d mem
+PCI: 00:17.0 14 <- [0x0081722000 - 0x00817220ff] size 0x00000100 gran 0x08 mem
+PCI: 00:17.0 18 <- [0x0000001020 - 0x0000001027] size 0x00000008 gran 0x03 io
+PCI: 00:17.0 1c <- [0x0000001028 - 0x000000102b] size 0x00000004 gran 0x02 io
+PCI: 00:17.0 20 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io
+PCI: 00:17.0 24 <- [0x0081721000 - 0x00817217ff] size 0x00000800 gran 0x0b mem
+PCI: 00:1c.0 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 03 io
+PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
+PCI: 00:1c.0 20 <- [0x0081100000 - 0x00813fffff] size 0x00300000 gran 0x14 bus 03 mem
+PCI: 03:00.0 10 <- [0x0081100000 - 0x008117ffff] size 0x00080000 gran 0x13 mem
+PCI: 03:00.0 18 <- [0x0000003000 - 0x000000301f] size 0x00000020 gran 0x05 io
+PCI: 03:00.0 1c <- [0x0081300000 - 0x0081303fff] size 0x00004000 gran 0x0e mem
+PCI: 03:00.1 10 <- [0x0081180000 - 0x00811fffff] size 0x00080000 gran 0x13 mem
+PCI: 03:00.1 18 <- [0x0000003020 - 0x000000303f] size 0x00000020 gran 0x05 io
+PCI: 03:00.1 1c <- [0x0081304000 - 0x0081307fff] size 0x00004000 gran 0x0e mem
+PCI: 03:00.2 10 <- [0x0081200000 - 0x008127ffff] size 0x00080000 gran 0x13 mem
+PCI: 03:00.2 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io
+PCI: 03:00.2 1c <- [0x0081308000 - 0x008130bfff] size 0x00004000 gran 0x0e mem
+PCI: 03:00.3 10 <- [0x0081280000 - 0x00812fffff] size 0x00080000 gran 0x13 mem
+PCI: 03:00.3 18 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io
+PCI: 03:00.3 1c <- [0x008130c000 - 0x008130ffff] size 0x00004000 gran 0x0e mem
+PCI: 00:1d.0 1c <- [0x0000004000 - 0x0000004fff] size 0x00001000 gran 0x0c bus 04 io
+PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 04 prefmem
+PCI: 00:1d.0 20 <- [0x0081500000 - 0x00815fffff] size 0x00100000 gran 0x14 bus 04 mem
+PCI: 04:00.0 10 <- [0x0081500000 - 0x008157ffff] size 0x00080000 gran 0x13 mem
+PCI: 04:00.0 18 <- [0x0000004000 - 0x000000401f] size 0x00000020 gran 0x05 io
+PCI: 04:00.0 1c <- [0x0081580000 - 0x0081583fff] size 0x00004000 gran 0x0e mem
+PCI: 00:1d.1 1c <- [0x0000005000 - 0x0000005fff] size 0x00001000 gran 0x0c bus 05 io
+PCI: 00:1d.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 05 prefmem
+PCI: 00:1d.1 20 <- [0x0081600000 - 0x00816fffff] size 0x00100000 gran 0x14 bus 05 mem
+PCI: 05:00.0 10 <- [0x0081600000 - 0x008167ffff] size 0x00080000 gran 0x13 mem
+PCI: 05:00.0 18 <- [0x0000005000 - 0x000000501f] size 0x00000020 gran 0x05 io
+PCI: 05:00.0 1c <- [0x0081680000 - 0x0081683fff] size 0x00004000 gran 0x0e mem
+PCI: 00:1d.2 1c <- [0x0000006000 - 0x0000006fff] size 0x00001000 gran 0x0c bus 06 io
+PCI: 00:1d.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 06 prefmem
+PCI: 00:1d.2 20 <- [0x0080000000 - 0x00810fffff] size 0x01100000 gran 0x14 bus 06 mem
+PCI: 06:00.0 1c <- [0x0000006000 - 0x0000006fff] size 0x00001000 gran 0x0c bus 07 io
+PCI: 06:00.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 07 prefmem
+PCI: 06:00.0 20 <- [0x0080000000 - 0x00810fffff] size 0x01100000 gran 0x14 bus 07 mem
+PCI: 07:00.0 10 <- [0x0080000000 - 0x0080ffffff] size 0x01000000 gran 0x18 mem
+PCI: 07:00.0 14 <- [0x0081000000 - 0x008101ffff] size 0x00020000 gran 0x11 mem
+PCI: 07:00.0 18 <- [0x0000006000 - 0x000000607f] size 0x00000080 gran 0x07 io
+PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
+PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
+PNP: 002e.2 f0 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 drq
+PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
+PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
+PNP: 002e.3 f0 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 drq
+PNP: 002e.4 60 <- [0x0000000a00 - 0x0000000a07] size 0x00000008 gran 0x03 io
+PNP: 002e.4 62 <- [0x0000000a10 - 0x0000000a17] size 0x00000008 gran 0x03 io
+PNP: 002e.4 64 <- [0x0000000a20 - 0x0000000a27] size 0x00000008 gran 0x03 io
+PNP: 002e.4 66 <- [0x0000000a30 - 0x0000000a37] size 0x00000008 gran 0x03 io
+PNP: 002e.4 70 <- [0x000000000b - 0x000000000b] size 0x00000001 gran 0x00 irq
+ERROR: PNP: 002e.7 70 irq size: 0x0000000001 not assigned in devicetree
+ERROR: PNP: 002e.d 70 irq size: 0x0000000001 not assigned in devicetree
+PNP: 002e.e 60 <- [0x0000000a40 - 0x0000000a41] size 0x00000002 gran 0x01 io
+PNP: 002e.e 70 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
+PNP: 002e.0 00 <- [0x000000002e - 0x000000002f] size 0x00000002 gran 0x00 io
+PNP: 0ca2.0 00 <- [0x0000000ca2 - 0x0000000ca3] size 0x00000002 gran 0x00 io
+LPC: Opened IO window LGIR3: base 2e size 2
+LPC: Cannot open IO window: 3f8 size 8
+No more IO windows
+LPC: Cannot open IO window: 2f8 size 8
+No more IO windows
+LPC: Cannot open IO window: a00 size 8
+No more IO windows
+LPC: Cannot open IO window: a10 size 8
+No more IO windows
+LPC: Cannot open IO window: a20 size 8
+No more IO windows
+LPC: Cannot open IO window: a30 size 8
+No more IO windows
+LPC: Cannot open IO window: 0 size 1
+No more IO windows
+LPC: Cannot open IO window: 0 size 1
+No more IO windows
+LPC: Cannot open IO window: 0 size 8
+No more IO windows
+LPC: Cannot open IO window: 0 size 8
+No more IO windows
+LPC: Cannot open IO window: a40 size 2
+No more IO windows
+LPC: Cannot open IO window: ca2 size 2
+No more IO windows
+PCI: 00:1f.2 10 <- [0x0081718000 - 0x008171bfff] size 0x00004000 gran 0x0e mem
+PCI: 00:1f.4 10 <- [0x0081723000 - 0x00817230ff] size 0x00000100 gran 0x08 mem64
+PCI: 00:1f.5 10 <- [0x0081720000 - 0x0081720fff] size 0x00001000 gran 0x0c mem
+Done setting resources.
+Done allocating resources.
+BS: Exiting BS_DEV_RESOURCES state.
+BS: BS_DEV_RESOURCES run times (exec / console): 3 / 1748 ms
+BS: callback (0x7f338be4) @ src/soc/intel/common/pch/lockdown/lockdown.c:91.
+----------------------------------------
+BS: BS_DEV_RESOURCES exit times (exec / console): 1 / 10 ms
+BS: Entering BS_DEV_ENABLE state.
+BS: callback (0x7f33d0ec) @ src/drivers/intel/fsp2_0/notify.c:70.
+0x0000000000001d0a: IA32_MTRRCAP: SMRR, WC, FIX, 10 variable MTRRs
+0x0000000000000800: IA32_MTRR_DEF_TYPE: E, UC
+0x0000000000000000: IA32_MTRR_FIX64K_00000
+ 0x00000000 - 0x0007ffff: UC
+0x0000000000000000: IA32_MTRR_FIX16K_80000
+ 0x00080000 - 0x0009ffff: UC
+0x0000000000000000: IA32_MTRR_FIX16K_A0000
+ 0x000a0000 - 0x000bffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_C0000
+ 0x000c0000 - 0x000c7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_C8000
+ 0x000c8000 - 0x000cffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_D0000
+ 0x000d0000 - 0x000d7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_D8000
+ 0x000d8000 - 0x000dffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_E0000
+ 0x000e0000 - 0x000e7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_E8000
+ 0x000e8000 - 0x000effff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_F0000
+ 0x000f0000 - 0x000f7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_F8000
+ 0x000f8000 - 0x000fffff: UC
+0x00000000ff000005: PHYBASE0: Address = 0x00000000ff000000, WP
+0x0000007fff000800: PHYMASK0: Length = 0x0000000001000000, Valid
+0x000000007f800006: PHYBASE1: Address = 0x000000007f800000, WB
+0x0000007fff800800: PHYMASK1: Length = 0x0000000000800000, Valid
+0x000000007f000006: PHYBASE2: Address = 0x000000007f000000, WB
+0x0000007fff800800: PHYMASK2: Length = 0x0000000000800000, Valid
+0x000000007e800006: PHYBASE3: Address = 0x000000007e800000, WB
+0x0000007fff800800: PHYMASK3: Length = 0x0000000000800000, Valid
+0x0000000000000000: PHYBASE4
+0x0000000000000000: PHYMASK4: Disabled
+0x0000000000000000: PHYBASE5
+0x0000000000000000: PHYMASK5: Disabled
+0x0000000000000000: PHYBASE6
+0x0000000000000000: PHYMASK6: Disabled
+0x0000000000000000: PHYBASE7
+0x0000000000000000: PHYMASK7: Disabled
+0x0000000000000000: PHYBASE8
+0x0000000000000000: PHYMASK8: Disabled
+0x0000000000000000: PHYBASE9
+0x0000000000000000: PHYMASK9: Disabled
+Timestamp - calling FspNotify(AfterPciEnumeration): 298517979284
+POST: 0x94
+Timestamp - returning from FspNotify(AfterPciEnumeration): 298542580516
+POST: 0x94
+0x0000000000001d0a: IA32_MTRRCAP: SMRR, WC, FIX, 10 variable MTRRs
+0x0000000000000800: IA32_MTRR_DEF_TYPE: E, UC
+0x0000000000000000: IA32_MTRR_FIX64K_00000
+ 0x00000000 - 0x0007ffff: UC
+0x0000000000000000: IA32_MTRR_FIX16K_80000
+ 0x00080000 - 0x0009ffff: UC
+0x0000000000000000: IA32_MTRR_FIX16K_A0000
+ 0x000a0000 - 0x000bffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_C0000
+ 0x000c0000 - 0x000c7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_C8000
+ 0x000c8000 - 0x000cffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_D0000
+ 0x000d0000 - 0x000d7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_D8000
+ 0x000d8000 - 0x000dffff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_E0000
+ 0x000e0000 - 0x000e7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_E8000
+ 0x000e8000 - 0x000effff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_F0000
+ 0x000f0000 - 0x000f7fff: UC
+0x0000000000000000: IA32_MTRR_FIX4K_F8000
+ 0x000f8000 - 0x000fffff: UC
+0x00000000ff000005: PHYBASE0: Address = 0x00000000ff000000, WP
+0x0000007fff000800: PHYMASK0: Length = 0x0000000001000000, Valid
+0x000000007f800006: PHYBASE1: Address = 0x000000007f800000, WB
+0x0000007fff800800: PHYMASK1: Length = 0x0000000000800000, Valid
+0x000000007f000006: PHYBASE2: Address = 0x000000007f000000, WB
+0x0000007fff800800: PHYMASK2: Length = 0x0000000000800000, Valid
+0x000000007e800006: PHYBASE3: Address = 0x000000007e800000, WB
+0x0000007fff800800: PHYMASK3: Length = 0x0000000000800000, Valid
+0x0000000000000000: PHYBASE4
+0x0000000000000000: PHYMASK4: Disabled
+0x0000000000000000: PHYBASE5
+0x0000000000000000: PHYMASK5: Disabled
+0x0000000000000000: PHYBASE6
+0x0000000000000000: PHYMASK6: Disabled
+0x0000000000000000: PHYBASE7
+0x0000000000000000: PHYMASK7: Disabled
+0x0000000000000000: PHYBASE8
+0x0000000000000000: PHYMASK8: Disabled
+0x0000000000000000: PHYBASE9
+0x0000000000000000: PHYMASK9: Disabled
+BS: BS_DEV_ENABLE entry times (exec / console): 0 / 351 ms
+POST: 0x74
+Timestamp - device enable: 299169615444
+Enabling resources...
+PCI: 00:00.0 subsystem <- 8086/5918
+PCI: 00:00.0 cmd <- 06
+PCI: 00:01.0 bridge ctrl <- 0013
+PCI: 00:01.0 cmd <- 00
+PCI: 00:01.1 bridge ctrl <- 0013
+PCI: 00:01.1 cmd <- 07
+PCI: 00:04.0 subsystem <- 8086/1903
+PCI: 00:04.0 cmd <- 02
+PCI: 00:14.0 subsystem <- 8086/a12f
+PCI: 00:14.0 cmd <- 02
+PCI: 00:14.2 subsystem <- 8086/a131
+PCI: 00:14.2 cmd <- 02
+PCI: 00:16.0 subsystem <- 8086/a13a
+PCI: 00:16.0 cmd <- 02
+PCI: 00:17.0 subsystem <- 8086/a102
+PCI: 00:17.0 cmd <- 03
+PCI: 00:1c.0 bridge ctrl <- 0013
+PCI: 00:1c.0 subsystem <- 8086/a110
+PCI: 00:1c.0 cmd <- 07
+PCI: 00:1d.0 bridge ctrl <- 0013
+PCI: 00:1d.0 subsystem <- 8086/a118
+PCI: 00:1d.0 cmd <- 07
+PCI: 00:1d.1 bridge ctrl <- 0013
+PCI: 00:1d.1 subsystem <- 8086/a119
+PCI: 00:1d.1 cmd <- 07
+PCI: 00:1d.2 bridge ctrl <- 001b
+PCI: 00:1d.2 subsystem <- 8086/a11a
+PCI: 00:1d.2 cmd <- 07
+PCI: 00:1f.0 subsystem <- 8086/a149
+PCI: 00:1f.0 cmd <- 07
+PCI: 00:1f.2 subsystem <- 8086/a121
+PCI: 00:1f.2 cmd <- 06
+PCI: 00:1f.4 subsystem <- 8086/a123
+PCI: 00:1f.4 cmd <- 03
+PCI: 00:1f.5 subsystem <- 8086/a124
+PCI: 00:1f.5 cmd <- 406
+PCI: 02:00.0 cmd <- 03
+PCI: 03:00.0 cmd <- 03
+PCI: 03:00.1 cmd <- 03
+PCI: 03:00.2 cmd <- 03
+PCI: 03:00.3 cmd <- 03
+PCI: 04:00.0 subsystem <- 8086/1533
+PCI: 04:00.0 cmd <- 03
+PCI: 05:00.0 cmd <- 03
+PCI: 06:00.0 bridge ctrl <- 001b
+PCI: 06:00.0 cmd <- 07
+PCI: 07:00.0 cmd <- 03
+done.
+BS: Exiting BS_DEV_ENABLE state.
+BS: BS_DEV_ENABLE run times (exec / console): 1 / 132 ms
+BS: callback (0x7f338b84) @ src/soc/intel/skylake/me.c:365.
+ME: Version: Unavailable
+----------------------------------------
+BS: BS_DEV_ENABLE exit times (exec / console): 0 / 11 ms
+BS: Entering BS_DEV_INIT state.
+BS: callback (0x7f33cfcc) @ src/drivers/tpm/tpm.c:24.
+Found TPM ST33ZP24 by ST Microelectronics
+TPM: Startup
+TPM: command 0x99 returned 0x0
+TPM: Asserting physical presence
+TPM: command 0x4000000a returned 0x0
+TPM: command 0x65 returned 0x0
+TPM: flags disable=0, deactivated=0, nvlocked=1
+TPM: setup succeeded
+BS: BS_DEV_INIT entry times (exec / console): 16 / 28 ms
+POST: 0x75
+Timestamp - device initialization: 299891245670
+Initializing devices...
+Root Device init
+Root Device init finished in 0 msecs
+POST: 0x75
+POST: 0x75
+POST: 0x75
+POST: 0x75
+POST: 0x75
+POST: 0x75
+POST: 0x75
+POST: 0x75
+POST: 0x75
+POST: 0x75
+POST: 0x75
+PCI: 00:00.0 init
+CPU TDP = 72 Watts
+CPU PL1 = 72 Watts
+CPU PL2 = 90 Watts
+PCI: 00:00.0 init finished in 6 msecs
+POST: 0x75
+POST: 0x75
+POST: 0x75
+PCI: 00:04.0 init
+PCI: 00:04.0 init finished in 0 msecs
+POST: 0x75
+PCI: 00:14.0 init
+PCI: 00:14.0 init finished in 0 msecs
+POST: 0x75
+PCI: 00:14.2 init
+PCI: 00:14.2 init finished in 0 msecs
+POST: 0x75
+PCI: 00:16.0 init
+PCI: 00:16.0 init finished in 0 msecs
+POST: 0x75
+PCI: 00:17.0 init
+PCI: 00:17.0 init finished in 0 msecs
+POST: 0x75
+PCI: 00:1c.0 init
+Initializing PCH PCIe bridge.
+PCI: 00:1c.0 init finished in 2 msecs
+POST: 0x75
+PCI: 00:1d.0 init
+Initializing PCH PCIe bridge.
+PCI: 00:1d.0 init finished in 2 msecs
+POST: 0x75
+PCI: 00:1d.1 init
+Initializing PCH PCIe bridge.
+PCI: 00:1d.1 init finished in 2 msecs
+POST: 0x75
+PCI: 00:1d.2 init
+Initializing PCH PCIe bridge.
+PCI: 00:1d.2 init finished in 2 msecs
+POST: 0x75
+PCI: 00:1f.0 init
+IOAPIC: Initializing IOAPIC at 0xfec00000
+IOAPIC: Bootstrap Processor Local APIC = 0x00
+IOAPIC: ID = 0x02
+PCI: 00:1f.0 init finished in 9 msecs
+POST: 0x75
+POST: 0x75
+PCI: 00:1f.2 init
+RTC Init
+Set power on after power failure.
+misccfg_mask:fff000ff misccfg_value:43600
+Disabling ACPI via APMC:
+done.
+Disabling Deep S3
+Disabling Deep S3
+Disabling Deep S4
+Disabling Deep S4
+Disabling Deep S5
+Disabling Deep S5
+PCI: 00:1f.2 init finished in 37 msecs
+POST: 0x75
+PCI: 00:1f.4 init
+PCI: 00:1f.4 init finished in 0 msecs
+POST: 0x75
+PCI: 00:1f.5 init
+PCI: 00:1f.5 init finished in 0 msecs
+POST: 0x75
+PCI: 02:00.0 init
+PCI: 02:00.0 init finished in 0 msecs
+POST: 0x75
+PCI: 03:00.0 init
+PCI: 03:00.0 init finished in 0 msecs
+POST: 0x75
+PCI: 03:00.1 init
+PCI: 03:00.1 init finished in 0 msecs
+POST: 0x75
+PCI: 03:00.2 init
+PCI: 03:00.2 init finished in 0 msecs
+POST: 0x75
+PCI: 03:00.3 init
+PCI: 03:00.3 init finished in 0 msecs
+POST: 0x75
+PCI: 04:00.0 init
+PCI: 04:00.0 init finished in 0 msecs
+POST: 0x75
+PCI: 05:00.0 init
+PCI: 05:00.0 init finished in 0 msecs
+POST: 0x75
+POST: 0x75
+PCI: 07:00.0 init
+ASpeed AST2050: initializing video device
+ast_detect_chip: AST 2400 detected
+ast_detect_chip: VGA not enabled on entry, requesting chip POST
+ast_detect_chip: Analog VGA only
+ast_driver_load: dram 1632000000 1 16 01000000
+PCI: 07:00.0 init finished in 19 msecs
+POST: 0x75
+POST: 0x75
+POST: 0x75
+PNP: 0ca2.0 init
+IPMI: PNP KCS 0xca2
+IPMI: Waiting for BMC...
+Get BMC self test result...ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_bmc_self_test_result response truncated
+BMC: Device Specific Error
+ipmi_kcs_send_data_byte: status c1
+IPMI NETFN failed
+ipmi_kcs_send_message failed
+IPMI: ipmi_get_device_id command failed (ret=-1 resp=0x55)
+PNP: 0ca2.0 init finished in 60777 msecs
+POST: 0x75
+PNP: 002e.2 init
+PNP: 002e.2 init finished in 0 msecs
+POST: 0x75
+PNP: 002e.3 init
+PNP: 002e.3 init finished in 0 msecs
+POST: 0x75
+PNP: 002e.4 init
+PNP: 002e.4 init finished in 0 msecs
+POST: 0x75
+POST: 0x75
+PNP: 002e.7 init
+PNP: 002e.7 init finished in 0 msecs
+POST: 0x75
+POST: 0x75
+POST: 0x75
+PNP: 002e.d init
+PNP: 002e.d init finished in 0 msecs
+POST: 0x75
+PNP: 002e.e init
+PNP: 002e.e init finished in 0 msecs
+Devices initialized
+BS: Exiting BS_DEV_INIT state.
+BS: BS_DEV_INIT run times (exec / console): 60037 / 1039 ms
+BS: callback (0x7f3392d4) @ src/security/memory/memory_clear.c:141.
+BS: callback (0x7f338b3c) @ src/soc/intel/skylake/elog.c:260.
+----------------------------------------
+BS: BS_DEV_INIT exit times (exec / console): 0 / 15 ms
+BS: Entering BS_POST_DEVICE state.
+POST: 0x76
+Finalize devices...
+Devices finalized
+Timestamp - device setup done: 513771940694
+BS: Exiting BS_POST_DEVICE state.
+BS: BS_POST_DEVICE run times (exec / console): 0 / 12 ms
+----------------------------------------
+BS: BS_POST_DEVICE exit times (exec / console): 0 / 4 ms
+BS: Entering BS_OS_RESUME_CHECK state.
+POST: 0x77
+Timestamp - cbmem post: 513860465202
+BS: Exiting BS_OS_RESUME_CHECK state.
+BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 8 ms
+----------------------------------------
+BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 4 ms
+BS: Entering BS_WRITE_TABLES state.
+POST: 0x79
+Timestamp - write tables: 513949290496
+POST: 0x9c
+FMAP: area COREBOOT found @ 510200 (11468288 bytes)
+CBFS: Locating 'fallback/dsdt.aml'
+CBFS: Found @ offset 59dc0 size 293c
+FMAP: area COREBOOT found @ 510200 (11468288 bytes)
+CBFS: Locating 'fallback/slic'
+CBFS: 'fallback/slic' not found.
+ACPI: Writing ACPI tables at 7f296000.
+ACPI: * FACS
+ACPI: * DSDT
+PCI space above 4GB MMIO is at 0x480000000, len = 0x7b80000000
+ACPI: * FADT
+SCI is IRQ9
+ACPI: added table 1/32, length now 40
+ACPI: * SSDT
+Found 1 CPU(s) with 8 core(s) each.
+\_SB.PCI0.LPCB.SIO0: PNP: 002e.0
+\_SB.PCI0.LPCB.TPM.TPM: LPC TPM PNP: 0c31.0
+\_SB.PCI0.LPCB.SIO0.L020: PNP: 002e.2
+\_SB.PCI0.LPCB.SIO0.L030: PNP: 002e.3
+\_SB.PCI0.LPCB.SIO0.L040: PNP: 002e.4
+\_SB.PCI0.LPCB.SIO0.L050: PNP: 002e.5
+\_SB.PCI0.LPCB.SIO0.L070: PNP: 002e.7
+\_SB.PCI0.LPCB.SIO0.L0B0: PNP: 002e.b
+\_SB.PCI0.LPCB.SIO0.L0C0: PNP: 002e.c
+\_SB.PCI0.LPCB.SIO0.L0D0: PNP: 002e.d
+\_SB.PCI0.LPCB.SIO0.L0E0: PNP: 002e.e
+ACPI: added table 2/32, length now 44
+ACPI: * MCFG
+ACPI: added table 3/32, length now 48
+ACPI: * TCPA
+TCPA log created at 0x7f285000
+ACPI: added table 4/32, length now 52
+ACPI: * MADT
+SCI is IRQ9
+ACPI: added table 5/32, length now 56
+current = 7f299fe0
+ACPI: * DMAR
+ACPI: added table 6/32, length now 60
+acpi_write_dbg2_pci_uart: Device not found
+ACPI: * HPET
+ACPI: added table 7/32, length now 64
+ACPI: * SPMI at 7f29a070
+ACPI: added table 8/32, length now 68
+ACPI: done.
+ACPI tables: 16576 bytes.
+smbios_write_tables: 7f284000
+Create SMBIOS type 17
+PCI: 00:00.0 (Intel 6th Gen)
+SMBIOS tables: 861 bytes.
+Writing table forward entry at 0x00000500
+Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum e0b2
+Writing coreboot table at 0x7f2ba000
+FMAP: area COREBOOT found @ 510200 (11468288 bytes)
+CBFS: Locating 'cmos_layout.bin'
+CBFS: Found @ offset 5c980 size 310
+ 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
+ 1. 0000000000001000-000000000009ffff: RAM
+ 2. 00000000000a0000-00000000000fffff: RESERVED
+ 3. 0000000000100000-000000007f283fff: RAM
+ 4. 000000007f284000-000000007f300fff: CONFIGURATION TABLES
+ 5. 000000007f301000-000000007f3cefff: RAMSTAGE
+ 6. 000000007f3cf000-000000007f7fffff: CONFIGURATION TABLES
+ 7. 000000007f800000-000000007fffffff: RESERVED
+ 8. 00000000e0000000-00000000efffffff: RESERVED
+ 9. 00000000fd000000-00000000fe00ffff: RESERVED
+10. 00000000fed10000-00000000fed19fff: RESERVED
+11. 00000000fed40000-00000000fed44fff: RESERVED
+12. 00000000fed80000-00000000fed84fff: RESERVED
+13. 00000000fed91000-00000000fed91fff: RESERVED
+14. 0000000100000000-000000047fffffff: RAM
+FMAP: area COREBOOT found @ 510200 (11468288 bytes)
+Wrote coreboot table at: 0x7f2ba000, 0x754 bytes, checksum 5de5
+coreboot table: 1900 bytes.
+IMD ROOT 0. 0x7f7ff000 0x00001000
+IMD SMALL 1. 0x7f7fe000 0x00001000
+FSP MEMORY 2. 0x7f3fe000 0x00400000
+CONSOLE 3. 0x7f3de000 0x00020000
+TIME STAMP 4. 0x7f3dd000 0x00000910
+MRC DATA 5. 0x7f3db000 0x00001878
+ROMSTG STCK 6. 0x7f3da000 0x00001000
+AFTER CAR 7. 0x7f3cf000 0x0000b000
+RAMSTAGE 8. 0x7f300000 0x000cf000
+REFCODE 9. 0x7f2d2000 0x0002e000
+SMM BACKUP 10. 0x7f2c2000 0x00010000
+COREBOOT 11. 0x7f2ba000 0x00008000
+ACPI 12. 0x7f296000 0x00024000
+ACPI GNVS 13. 0x7f295000 0x00001000
+TCPA TCGLOG14. 0x7f285000 0x00010000
+SMBIOS 15. 0x7f284000 0x00000800
+IMD small region:
+ IMD ROOT 0. 0x7f7fec00 0x00000400
+ FSP RUNTIME 1. 0x7f7febe0 0x00000004
+ FMAP 2. 0x7f7feb00 0x000000e0
+ POWER STATE 3. 0x7f7feac0 0x00000040
+ ROMSTAGE 4. 0x7f7feaa0 0x00000004
+ MEM INFO 5. 0x7f7fe8e0 0x000001b9
+Timestamp - finalize chips: 515157263148
+BS: Exiting BS_WRITE_TABLES state.
+BS: BS_WRITE_TABLES run times (exec / console): 22 / 331 ms
+BS: callback (0x7f339234) @ src/soc/intel/common/block/cpu/mp_init.c:161.
+MTRR: Physical address space:
+0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
+0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
+0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6
+0x0000000080000000 - 0x0000000100000000 size 0x80000000 type 0
+0x0000000100000000 - 0x0000000480000000 size 0x380000000 type 6
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+CPU physical address size: 39 bits
+MTRR: default type WB/UC MTRR counts: 1/4.
+MTRR: WB selected as default type.
+MTRR: 0 base 0x0000000080000000 mask 0x0000007f80000000 type 0
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+CPU physical address size: 39 bits
+POST: 0x93
+----------------------------------------
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+CPU physical address size: 39 bits
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+CPU physical address size: 39 bits
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+CPU physical address size: 39 bits
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+CPU physical address size: 39 bits
+CPU physical address size: 39 bits
+BS: BS_WRITE_TABLES exit times (exec / console): 44 / 104 ms
+CPU physical address size: 39 bits
+BS: Entering BS_PAYLOAD_LOAD state.
+POST: 0x7a
+Timestamp - load payload: 516666546348
+FMAP: area COREBOOT found @ 510200 (11468288 bytes)
+CBFS: Locating 'fallback/payload'
+CBFS: Found @ offset 105440 size a3705
+Checking segment from ROM address 0xff615678
+Checking segment from ROM address 0xff615694
+Checking segment from ROM address 0xff6156b0
+Loading segment from ROM address 0xff615678
+ code (compression=2)
+ New segment dstaddr 0x00009000 memsize 0x1b758 srcaddr 0xff6156cc filesize 0xcb0b
+Loading Segment: addr: 0x00009000 memsz: 0x000000000001b758 filesz: 0x000000000000cb0b
+using LZ4
+Timestamp - starting LZ4 decompress (ignore for x86): 516840434882
+Timestamp - finished LZ4 decompress (ignore for x86): 517224180026
+Clearing Segment: addr: 0x000000000001cd37 memsz: 0x0000000000007a21
+Loading segment from ROM address 0xff615694
+ code (compression=2)
+ New segment dstaddr 0x00100000 memsize 0x13f3d0 srcaddr 0xff6221d7 filesize 0x96ba6
+Loading Segment: addr: 0x00100000 memsz: 0x000000000013f3d0 filesz: 0x0000000000096ba6
+using LZ4
+Timestamp - starting LZ4 decompress (ignore for x86): 517344106036
+Timestamp - finished LZ4 decompress (ignore for x86): 522573039002
+Loading segment from ROM address 0xff6156b0
+ Entry Point 0x00009000
+BS: Exiting BS_PAYLOAD_LOAD state.
+BS: BS_PAYLOAD_LOAD run times (exec / console): 1593 / 111 ms
+BS: callback (0x7f33d45c) @ src/cpu/x86/mtrr/mtrr.c:878.
+BS: callback (0x7f33d0d4) @ src/drivers/intel/fsp2_0/notify.c:72.
+0x0000000000001d0a: IA32_MTRRCAP: SMRR, WC, FIX, 10 variable MTRRs
+0x0000000000000c06: IA32_MTRR_DEF_TYPE: E, FE, WB
+0x0606060606060606: IA32_MTRR_FIX64K_00000
+ 0x00000000 - 0x0007ffff: WB
+0x0606060606060606: IA32_MTRR_FIX16K_80000
+ 0x00080000 - 0x0009ffff: WB
+0x0000000000000000: IA32_MTRR_FIX16K_A0000
+ 0x000a0000 - 0x000bffff: UC
+0x0606060606060606: IA32_MTRR_FIX4K_C0000
+ 0x000c0000 - 0x000c7fff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_C8000
+ 0x000c8000 - 0x000cffff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_D0000
+ 0x000d0000 - 0x000d7fff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_D8000
+ 0x000d8000 - 0x000dffff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_E0000
+ 0x000e0000 - 0x000e7fff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_E8000
+ 0x000e8000 - 0x000effff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_F0000
+ 0x000f0000 - 0x000f7fff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_F8000
+ 0x000f8000 - 0x000fffff: WB
+0x0000000080000000: PHYBASE0: Address = 0x0000000080000000, UC
+0x0000007f80000800: PHYMASK0: Length = 0x0000000080000000, Valid
+0x0000000000000000: PHYBASE1
+0x0000000000000000: PHYMASK1: Disabled
+0x0000000000000000: PHYBASE2
+0x0000000000000000: PHYMASK2: Disabled
+0x0000000000000000: PHYBASE3
+0x0000000000000000: PHYMASK3: Disabled
+0x0000000000000000: PHYBASE4
+0x0000000000000000: PHYMASK4: Disabled
+0x0000000000000000: PHYBASE5
+0x0000000000000000: PHYMASK5: Disabled
+0x0000000000000000: PHYBASE6
+0x0000000000000000: PHYMASK6: Disabled
+0x0000000000000000: PHYBASE7
+0x0000000000000000: PHYMASK7: Disabled
+0x0000000000000000: PHYBASE8
+0x0000000000000000: PHYMASK8: Disabled
+0x0000000000000000: PHYBASE9
+0x0000000000000000: PHYMASK9: Disabled
+Timestamp - calling FspNotify(ReadyToBoot): 523208635964
+POST: 0x95
+Timestamp - returning from FspNotify(ReadyToBoot): 523255264366
+POST: 0x95
+0x0000000000001d0a: IA32_MTRRCAP: SMRR, WC, FIX, 10 variable MTRRs
+0x0000000000000c06: IA32_MTRR_DEF_TYPE: E, FE, WB
+0x0606060606060606: IA32_MTRR_FIX64K_00000
+ 0x00000000 - 0x0007ffff: WB
+0x0606060606060606: IA32_MTRR_FIX16K_80000
+ 0x00080000 - 0x0009ffff: WB
+0x0000000000000000: IA32_MTRR_FIX16K_A0000
+ 0x000a0000 - 0x000bffff: UC
+0x0606060606060606: IA32_MTRR_FIX4K_C0000
+ 0x000c0000 - 0x000c7fff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_C8000
+ 0x000c8000 - 0x000cffff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_D0000
+ 0x000d0000 - 0x000d7fff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_D8000
+ 0x000d8000 - 0x000dffff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_E0000
+ 0x000e0000 - 0x000e7fff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_E8000
+ 0x000e8000 - 0x000effff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_F0000
+ 0x000f0000 - 0x000f7fff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_F8000
+ 0x000f8000 - 0x000fffff: WB
+0x0000000080000000: PHYBASE0: Address = 0x0000000080000000, UC
+0x0000007f80000800: PHYMASK0: Length = 0x0000000080000000, Valid
+0x0000000000000000: PHYBASE1
+0x0000000000000000: PHYMASK1: Disabled
+0x0000000000000000: PHYBASE2
+0x0000000000000000: PHYMASK2: Disabled
+0x0000000000000000: PHYBASE3
+0x0000000000000000: PHYMASK3: Disabled
+0x0000000000000000: PHYBASE4
+0x0000000000000000: PHYMASK4: Disabled
+0x0000000000000000: PHYBASE5
+0x0000000000000000: PHYMASK5: Disabled
+0x0000000000000000: PHYBASE6
+0x0000000000000000: PHYMASK6: Disabled
+0x0000000000000000: PHYBASE7
+0x0000000000000000: PHYMASK7: Disabled
+0x0000000000000000: PHYBASE8
+0x0000000000000000: PHYMASK8: Disabled
+0x0000000000000000: PHYBASE9
+0x0000000000000000: PHYMASK9: Disabled
+Timestamp - calling FspNotify(EndOfFirmware): 523803498640
+POST: 0x88
+Timestamp - returning from FspNotify(EndOfFirmware): 523842643238
+POST: 0x89
+0x0000000000001d0a: IA32_MTRRCAP: SMRR, WC, FIX, 10 variable MTRRs
+0x0000000000000c06: IA32_MTRR_DEF_TYPE: E, FE, WB
+0x0606060606060606: IA32_MTRR_FIX64K_00000
+ 0x00000000 - 0x0007ffff: WB
+0x0606060606060606: IA32_MTRR_FIX16K_80000
+ 0x00080000 - 0x0009ffff: WB
+0x0000000000000000: IA32_MTRR_FIX16K_A0000
+ 0x000a0000 - 0x000bffff: UC
+0x0606060606060606: IA32_MTRR_FIX4K_C0000
+ 0x000c0000 - 0x000c7fff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_C8000
+ 0x000c8000 - 0x000cffff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_D0000
+ 0x000d0000 - 0x000d7fff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_D8000
+ 0x000d8000 - 0x000dffff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_E0000
+ 0x000e0000 - 0x000e7fff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_E8000
+ 0x000e8000 - 0x000effff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_F0000
+ 0x000f0000 - 0x000f7fff: WB
+0x0606060606060606: IA32_MTRR_FIX4K_F8000
+ 0x000f8000 - 0x000fffff: WB
+0x0000000080000000: PHYBASE0: Address = 0x0000000080000000, UC
+0x0000007f80000800: PHYMASK0: Length = 0x0000000080000000, Valid
+0x0000000000000000: PHYBASE1
+0x0000000000000000: PHYMASK1: Disabled
+0x0000000000000000: PHYBASE2
+0x0000000000000000: PHYMASK2: Disabled
+0x0000000000000000: PHYBASE3
+0x0000000000000000: PHYMASK3: Disabled
+0x0000000000000000: PHYBASE4
+0x0000000000000000: PHYMASK4: Disabled
+0x0000000000000000: PHYBASE5
+0x0000000000000000: PHYMASK5: Disabled
+0x0000000000000000: PHYBASE6
+0x0000000000000000: PHYMASK6: Disabled
+0x0000000000000000: PHYBASE7
+0x0000000000000000: PHYMASK7: Disabled
+0x0000000000000000: PHYBASE8
+0x0000000000000000: PHYMASK8: Disabled
+0x0000000000000000: PHYBASE9
+0x0000000000000000: PHYMASK9: Disabled
+BS: callback (0x7f338bcc) @ src/soc/intel/skylake/pmc.c:166.
+BS: callback (0x7f338bb4) @ src/soc/intel/skylake/pmc.c:185.
+BS: callback (0x7f338b54) @ src/soc/intel/skylake/finalize.c:141.
+Finalizing chipset.
+ME: Host Firmware Status Register 1 : 0x001F0345
+ME: Host Firmware Status Register 2 : 0x84118006
+ME: Host Firmware Status Register 3 : 0x00000000
+ME: Host Firmware Status Register 4 : 0x00000000
+ME: Host Firmware Status Register 5 : 0x00000000
+ME: Host Firmware Status Register 6 : 0x00000000
+ME: FW Partition Table : OK
+ME: Bringup Loader Failure : NO
+ME: Firmware Init Complete : YES
+ME: Manufacturing Mode : NO
+ME: Boot Options Present : NO
+ME: Update In Progress : NO
+ME: D3 Support : NO
+ME: D0i3 Support : NO
+ME: Low Power State Enabled : NO
+ME: CPU Replaced : NO
+ME: CPU Replacement Valid : NO
+ME: Current Working State : Normal
+ME: Current Operation State : M0 without UMA
+ME: Current Operation Mode : M0 without UMA
+ME: Error Code : No Error
+ME: Progress Phase : Unknown (8)
+ME: Power Management Event : Clean Intel ME reset
+ME: Progress Phase State : Unknown phase: 0x08 state: 0x11
+ME: Power Down Mitigation : NO
+ME: FPF status : unfused
+Finalizing SMM.
+POST: 0xfe
+----------------------------------------
+BS: BS_PAYLOAD_LOAD exit times (exec / console): 24 / 605 ms
+BS: Entering BS_PAYLOAD_BOOT state.
+POST: 0x7b
+mp_park_aps done after 0 msecs.
+Jumping to boot code at 0x00009000(0x7f2ba000)
+POST: 0xf8
+Timestamp - selfboot jump: 524908818424
+