getac/p470/4.1-937-g439a527/2015-10-29T23:36:07Z
diff --git a/getac/p470/4.1-937-g439a527/2015-10-29T23:36:07Z/coreboot_console.txt b/getac/p470/4.1-937-g439a527/2015-10-29T23:36:07Z/coreboot_console.txt
new file mode 100644
index 0000000..8441b35
--- /dev/null
+++ b/getac/p470/4.1-937-g439a527/2015-10-29T23:36:07Z/coreboot_console.txt
@@ -0,0 +1,1301 @@
+
+
+coreboot-4.1-937-g439a527 Thu Oct 29 23:36:07 UTC 2015 romstage starting...
+
+Mobile Intel(R) 82945GM/GME Express Chipset
+(G)MCH capable of up to FSB 800 MHz
+(G)MCH capable of up to DDR2-667
+Setting up static southbridge registers... GPIOS...
+ Initializing drive bay...
+
+ Initializing Ethernet NIC...
+ done.
+Disabling Watchdog reboot... done.
+Setting up static northbridge registers... done.
+Waiting for MCHBAR to come up...ok
+PM1_CNT: 00001c00
+SMBus controller enabled.
+Setting up RAM controller.
+This mainboard supports Dual Channel Operation.
+DDR II Channel 0 Socket 0: x8DDS
+DDR II Channel 0 Socket 1: N/A
+DDR II Channel 1 Socket 0: x8DDS
+DDR II Channel 1 Socket 1: N/A
+Memory will be driven at 667MHz with CAS=5 clocks
+tRAS = 15 cycles
+tRP = 5 cycles
+tRCD = 5 cycles
+Refresh: 7.8us
+tWR = 5 cycles
+DIMM 0 side 0 = 512 MB
+DIMM 0 side 1 = 512 MB
+DIMM 2 side 0 = 512 MB
+DIMM 2 side 1 = 512 MB
+tRFC = 35 cycles
+Setting Graphics Frequency...
+FSB: 667 MHz Voltage: 1.05V Render: 250MHz Display: 200MHz
+Setting Memory Frequency... CLKCFG=0x00010023, CLKCFG=0x00010043, ok
+Setting mode of operation for memory channels...Dual Channel Interleaved.
+Programming Clock Crossing...MEM=667 FSB=667... ok
+Setting RAM size...
+C0DRB = 0x20202010
+C1DRB = 0x20202010
+TOLUD = 0x0080
+Setting row attributes...
+C0DRA = 0x0033
+C1DRA = 0x0033
+one dimm per channel config..
+Initializing System Memory IO...
+Programming Dual Channel RCOMP
+Table Index: 18
+Programming DLL Timings...
+Enabling System Memory IO...
+jedec enable sequence: bank 0
+jedec enable sequence: bank 1
+bankaddr from bank size of rank 0
+jedec enable sequence: bank 4
+jedec enable sequence: bank 5
+bankaddr from bank size of rank 4
+receive_enable_autoconfig() for channel 0
+ find_strobes_low()
+ set_receive_enable() medium=0x3, coarse=0x5
+ set_receive_enable() medium=0x1, coarse=0x5
+ set_receive_enable() medium=0x1, coarse=0x5
+ find_strobes_edge()
+ set_receive_enable() medium=0x1, coarse=0x5
+ add_quarter_clock() mediumcoarse=15 fine=90
+ set_receive_enable() medium=0x3, coarse=0x5
+ find_preamble()
+ set_receive_enable() medium=0x3, coarse=0x4
+ set_receive_enable() medium=0x3, coarse=0x3
+ add_quarter_clock() mediumcoarse=0f fine=10
+ normalize()
+ set_receive_enable() medium=0x0, coarse=0x4
+receive_enable_autoconfig() for channel 1
+ find_strobes_low()
+ set_receive_enable() medium=0x3, coarse=0x5
+ set_receive_enable() medium=0x1, coarse=0x5
+ set_receive_enable() medium=0x1, coarse=0x5
+ find_strobes_edge()
+ set_receive_enable() medium=0x1, coarse=0x5
+ add_quarter_clock() mediumcoarse=15 fine=a0
+ set_receive_enable() medium=0x3, coarse=0x5
+ find_preamble()
+ set_receive_enable() medium=0x3, coarse=0x4
+ set_receive_enable() medium=0x3, coarse=0x3
+ add_quarter_clock() mediumcoarse=0f fine=20
+ normalize()
+ set_receive_enable() medium=0x0, coarse=0x4
+RAM initialization finished.
+Setting up Egress Port RCRB
+Loading port arbitration table ...ok
+Wait for VC1 negoti
+
+*** Log truncated, 348 characters dropped. ***
+
+CBFS provider active.
+CBFS @ 0 size 3ffc00
+CBFS: Locating 'fallback/ramstage'
+CBFS: Found @ offset 38d80 size cde1
+'fallback/ramstage' located at offset: 38db8 size: cde1
+
+
+coreboot-4.1-937-g439a527 Thu Oct 29 23:36:07 UTC 2015 ramstage starting...
+Moving GDT to 7f7fe8a0...ok
+Normal boot.
+BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0
+BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0
+Enumerating buses...
+Show all devs... Before device enumeration.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:01.0: enabled 0
+PCI: 00:02.0: enabled 1
+PCI: 00:02.1: enabled 1
+PCI: 00:1b.0: enabled 1
+PCI: 00:1c.0: enabled 1
+PCI: 00:1c.1: enabled 1
+PCI: 00:1c.2: enabled 1
+PCI: 00:1c.3: enabled 1
+PCI: 00:1d.0: enabled 1
+PCI: 00:1d.1: enabled 1
+PCI: 00:1d.2: enabled 1
+PCI: 00:1d.3: enabled 1
+PCI: 00:1d.7: enabled 1
+PCI: 00:1e.0: enabled 1
+PCI: 00:1f.0: enabled 1
+PNP: 002e.0: enabled 0
+PNP: 002e.1: enabled 0
+PNP: 002e.3: enabled 1
+PNP: 002e.4: enabled 1
+PNP: 002e.5: enabled 0
+PNP: 002e.7: enabled 0
+PNP: 002e.8: enabled 0
+PNP: 004e.0: enabled 0
+PNP: 004e.1: enabled 0
+PNP: 004e.5: enabled 1
+PNP: 004e.7: enabled 0
+PNP: 004e.8: enabled 0
+PNP: 004e.9: enabled 0
+PNP: 004e.a: enabled 0
+PNP: 004e.b: enabled 0
+PCI: 00:1f.1: enabled 1
+PCI: 00:1f.2: enabled 1
+PCI: 00:1f.3: enabled 1
+Compare with tree...
+Root Device: enabled 1
+ CPU_CLUSTER: 0: enabled 1
+ APIC: 00: enabled 1
+ DOMAIN: 0000: enabled 1
+ PCI: 00:00.0: enabled 1
+ PCI: 00:01.0: enabled 0
+ PCI: 00:02.0: enabled 1
+ PCI: 00:02.1: enabled 1
+ PCI: 00:1b.0: enabled 1
+ PCI: 00:1c.0: enabled 1
+ PCI: 00:1c.1: enabled 1
+ PCI: 00:1c.2: enabled 1
+ PCI: 00:1c.3: enabled 1
+ PCI: 00:1d.0: enabled 1
+ PCI: 00:1d.1: enabled 1
+ PCI: 00:1d.2: enabled 1
+ PCI: 00:1d.3: enabled 1
+ PCI: 00:1d.7: enabled 1
+ PCI: 00:1e.0: enabled 1
+ PCI: 00:1f.0: enabled 1
+ PNP: 002e.0: enabled 0
+ PNP: 002e.1: enabled 0
+ PNP: 002e.3: enabled 1
+ PNP: 002e.4: enabled 1
+ PNP: 002e.5: enabled 0
+ PNP: 002e.7: enabled 0
+ PNP: 002e.8: enabled 0
+ PNP: 004e.0: enabled 0
+ PNP: 004e.1: enabled 0
+ PNP: 004e.5: enabled 1
+ PNP: 004e.7: enabled 0
+ PNP: 004e.8: enabled 0
+ PNP: 004e.9: enabled 0
+ PNP: 004e.a: enabled 0
+ PNP: 004e.b: enabled 0
+ PCI: 00:1f.1: enabled 1
+ PCI: 00:1f.2: enabled 1
+ PCI: 00:1f.3: enabled 1
+Root Device scanning...
+root_dev_scan_bus for Root Device
+CPU_CLUSTER: 0 enabled
+DOMAIN: 0000 enabled
+DOMAIN: 0000 scanning...
+PCI: pci_scan_bus for bus 00
+PCI: 00:00.0 [8086/0000] ops
+PCI: 00:00.0 [8086/27a0] enabled
+PCI: 00:02.0 [8086/0000] ops
+PCI: 00:02.0 [8086/27a2] enabled
+PCI: 00:02.1 [8086/27a6] ops
+PCI: 00:02.1 [8086/27a6] enabled
+PCI: 00:1b.0 [8086/27d8] ops
+PCI: 00:1b.0 [8086/27d8] enabled
+PCI: 00:1c.0 [8086/0000] bus ops
+PCI: 00:1c.0 [8086/27d0] enabled
+PCI: 00:1c.1 [8086/0000] bus ops
+PCI: 00:1c.1 [8086/27d2] enabled
+PCI: 00:1c.2 [8086/0000] bus ops
+PCI: 00:1c.2 [8086/27d4] enabled
+PCI: 00:1c.3 [8086/0000] bus ops
+PCI: 00:1c.3 [8086/27d6] enabled
+PCI: 00:1d.0 [8086/27c8] ops
+PCI: 00:1d.0 [8086/27c8] enabled
+PCI: 00:1d.1 [8086/27c9] ops
+PCI: 00:1d.1 [8086/27c9] enabled
+PCI: 00:1d.2 [8086/27ca] ops
+PCI: 00:1d.2 [8086/27ca] enabled
+PCI: 00:1d.3 [8086/27cb] ops
+PCI: 00:1d.3 [8086/27cb] enabled
+PCI: 00:1d.7 [8086/27cc] ops
+PCI: 00:1d.7 [8086/27cc] enabled
+PCI: 00:1e.0 [8086/2448] bus ops
+PCI: 00:1e.0 [8086/2448] enabled
+PCI: 00:1f.0 [8086/27b9] bus ops
+PCI: 00:1f.0 [8086/27b9] enabled
+PCI: Static device PCI: 00:1f.1 not found, disabling it.
+PCI: 00:1f.2 [8086/0000] ops
+PCI: 00:1f.2 [8086/27c4] enabled
+PCI: 00:1f.3 [8086/27da] bus ops
+PCI: 00:1f.3 [8086/27da] enabled
+PCI: 00:1c.0 scanning...
+do_pci_scan_bridge for PCI: 00:1c.0
+PCI: pci_scan_bus for bus 01
+scan_bus: scanning of bus PCI: 00:1c.0 took 82 usecs
+PCI: 00:1c.1 scanning...
+do_pci_scan_bridge for PCI: 00:1c.1
+PCI: pci_scan_bus for bus 02
+PCI: 02:00.0 [8086/4222] enabled
+scan_bus: scanning of bus PCI: 00:1c.1 took 113 usecs
+PCI: 00:1c.2 scanning...
+do_pci_scan_bridge for PCI: 00:1c.2
+PCI: pci_scan_bus for bus 03
+scan_bus: scanning of bus PCI: 00:1c.2 took 83 usecs
+PCI: 00:1c.3 scanning...
+do_pci_scan_bridge for PCI: 00:1c.3
+PCI: pci_scan_bus for bus 04
+PCI: 04:00.0 [10ec/8168] enabled
+scan_bus: scanning of bus PCI: 00:1c.3 took 103 usecs
+PCI: 00:1e.0 scanning...
+do_pci_scan_bridge for PCI: 00:1e.0
+PCI: pci_scan_bus for bus 05
+PCI: 05:05.0 [104c/8039] bus ops
+PCI: 05:05.0 [104c/8039] enabled
+PCI: 05:05.1 [104c/803a] enabled
+PCI: 05:05.2 [104c/803b] enabled
+PCI: 05:05.3 [104c/803c] enabled
+PCI: 05:05.4 [104c/803d] enabled
+PCI: 05:05.0 scanning...
+do_pci_scan_bridge for PCI: 05:05.0
+PCI: pci_scan_bus for bus 06
+scan_bus: scanning of bus PCI: 05:05.0 took 97 usecs
+scan_bus: scanning of bus PCI: 00:1e.0 took 336 usecs
+PCI: 00:1f.0 scanning...
+scan_lpc_bus for PCI: 00:1f.0
+PNP: 002e.0 disabled
+PNP: 002e.1 disabled
+PNP: 002e.3 enabled
+PNP: 002e.4 enabled
+PNP: 002e.5 disabled
+PNP: 002e.7 disabled
+PNP: 002e.8 disabled
+PNP: 004e.0 disabled
+PNP: 004e.1 disabled
+PNP: 004e.5 enabled
+PNP: 004e.7 disabled
+PNP: 004e.8 disabled
+PNP: 004e.9 disabled
+PNP: 004e.a disabled
+PNP: 004e.b disabled
+scan_lpc_bus for PCI: 00:1f.0 done
+scan_bus: scanning of bus PCI: 00:1f.0 took 224 usecs
+PCI: 00:1f.3 scanning...
+scan_smbus for PCI: 00:1f.3
+scan_smbus for PCI: 00:1f.3 done
+scan_bus: scanning of bus PCI: 00:1f.3 took 40 usecs
+scan_bus: scanning of bus DOMAIN: 0000 took 1881 usecs
+root_dev_scan_bus for Root Device done
+scan_bus: scanning of bus Root Device took 1967 usecs
+done
+BS: BS_DEV_ENUMERATE times (us): entry 0 run 2907 exit 0
+found VGA at PCI: 00:02.0
+Setting up VGA for PCI: 00:02.0
+Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
+Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
+Allocating resources...
+Reading resources...
+Root Device read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0
+APIC: 00 missing read_resources
+CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0
+Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
+PCI: 00:1c.0 read_resources bus 1 link: 0
+PCI: 00:1c.0 read_resources bus 1 link: 0 done
+PCI: 00:1c.1 read_resources bus 2 link: 0
+PCI: 00:1c.1 read_resources bus 2 link: 0 done
+PCI: 00:1c.2 read_resources bus 3 link: 0
+PCI: 00:1c.2 read_resources bus 3 link: 0 done
+PCI: 00:1c.3 read_resources bus 4 link: 0
+PCI: 00:1c.3 read_resources bus 4 link: 0 done
+PCI: 00:1e.0 read_resources bus 5 link: 0
+PCI: 05:05.0 read_resources bus 6 link: 0
+PCI: 05:05.0 read_resources bus 6 link: 0 done
+PCI: 00:1e.0 read_resources bus 5 link: 0 done
+PCI: 00:1f.0 read_resources bus 0 link: 0
+PNP: 002e.3 missing read_resources
+PCI: 00:1f.0 read_resources bus 0 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0 done
+Root Device read_resources bus 0 link: 0 done
+Done reading resources.
+Show resources in subtree (Root Device)...After reading.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
+ PCI: 00:00.0
+ PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf
+ PCI: 00:01.0
+ PCI: 00:02.0
+ PCI: 00:02.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10
+ PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 14
+ PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 18
+ PCI: 00:02.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 1c
+ PCI: 00:02.1
+ PCI: 00:02.1 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10
+ PCI: 00:1b.0
+ PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:1c.0
+ PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 00:1c.1 child on link 0 PCI: 02:00.0
+ PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 02:00.0
+ PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+ PCI: 00:1c.2
+ PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 00:1c.3 child on link 0 PCI: 04:00.0
+ PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 04:00.0
+ PCI: 04:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
+ PCI: 04:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
+ PCI: 04:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
+ PCI: 00:1d.0
+ PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.1
+ PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.2
+ PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.3
+ PCI: 00:1d.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.7
+ PCI: 00:1d.7 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
+ PCI: 00:1e.0 child on link 0 PCI: 05:05.0
+ PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 05:05.0
+ PCI: 05:05.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+ PCI: 05:05.0 resource base 0 size 1000 align 2 gran 2 limit ffff flags 100 index 2c
+ PCI: 05:05.0 resource base 0 size 1000 align 2 gran 2 limit ffff flags 100 index 34
+ PCI: 05:05.0 resource base 0 size 2000000 align 12 gran 12 limit ffffffff flags 1200 index 1c
+ PCI: 05:05.0 resource base 0 size 2000000 align 12 gran 12 limit ffffffff flags 200 index 24
+ PCI: 05:05.1
+ PCI: 05:05.1 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 10
+ PCI: 05:05.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 14
+ PCI: 05:05.2
+ PCI: 05:05.2 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+ PCI: 05:05.3
+ PCI: 05:05.3 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
+ PCI: 05:05.4
+ PCI: 05:05.4 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+ PCI: 05:05.4 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
+ PCI: 00:1f.0 child on link 0 PNP: 002e.0
+ PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+ PNP: 002e.0
+ PNP: 002e.1
+ PNP: 002e.3
+ PNP: 002e.3 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
+ PNP: 002e.3 resource base 5 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.4
+ PNP: 002e.4 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.4 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.5
+ PNP: 002e.5 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
+ PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
+ PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75
+ PNP: 002e.7
+ PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
+ PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 62
+ PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 002e.8
+ PNP: 002e.8 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
+ PNP: 004e.0
+ PNP: 004e.1
+ PNP: 004e.5
+ PNP: 004e.5 resource base 60 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 004e.5 resource base 64 size 8 align 3 gran 3 limit 7ff flags c0000100 index 62
+ PNP: 004e.7
+ PNP: 004e.8
+ PNP: 004e.9
+ PNP: 004e.a
+ PNP: 004e.b
+ PCI: 00:1f.1
+ PCI: 00:1f.2
+ PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
+ PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
+ PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
+ PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
+ PCI: 00:1f.2 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
+ PCI: 00:1f.2 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24
+ PCI: 00:1f.3
+ PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
+DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
+PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 04:00.0 10 * [0x0 - 0xff] io
+PCI: 00:1c.3 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
+PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 05:05.0 2c * [0x0 - 0xfff] io
+PCI: 05:05.0 34 * [0x1000 - 0x1fff] io
+PCI: 00:1e.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: ffff done
+PCI: 00:1e.0 1c * [0x0 - 0x1fff] io
+PCI: 00:1c.3 1c * [0x2000 - 0x2fff] io
+PCI: 00:1d.0 20 * [0x3000 - 0x301f] io
+PCI: 00:1d.1 20 * [0x3020 - 0x303f] io
+PCI: 00:1d.2 20 * [0x3040 - 0x305f] io
+PCI: 00:1d.3 20 * [0x3060 - 0x307f] io
+PCI: 00:1f.2 20 * [0x3080 - 0x308f] io
+PCI: 00:02.0 14 * [0x3090 - 0x3097] io
+PCI: 00:1f.2 10 * [0x3098 - 0x309f] io
+PCI: 00:1f.2 18 * [0x30a0 - 0x30a7] io
+PCI: 00:1f.2 14 * [0x30a8 - 0x30ab] io
+PCI: 00:1f.2 1c * [0x30ac - 0x30af] io
+DOMAIN: 0000 io: base: 30b0 size: 30b0 align: 12 gran: 0 limit: ffff done
+DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
+PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 02:00.0 10 * [0x0 - 0xfff] mem
+PCI: 00:1c.1 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 04:00.0 30 * [0x0 - 0x1ffff] mem
+PCI: 04:00.0 18 * [0x20000 - 0x20fff] mem
+PCI: 00:1c.3 mem: base: 21000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 05:05.0 1c * [0x0 - 0x1ffffff] prefmem
+PCI: 00:1e.0 prefmem: base: 2000000 size: 2000000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 05:05.1 14 * [0x0 - 0x3fff] mem
+PCI: 05:05.0 24 * [0x4000 - 0x2003fff] mem
+PCI: 05:05.0 10 * [0x2004000 - 0x2004fff] mem
+PCI: 05:05.2 10 * [0x2005000 - 0x2005fff] mem
+PCI: 05:05.4 10 * [0x2006000 - 0x2006fff] mem
+PCI: 05:05.4 14 * [0x2007000 - 0x2007fff] mem
+PCI: 05:05.1 10 * [0x2008000 - 0x20087ff] mem
+PCI: 05:05.3 10 * [0x2009000 - 0x20090ff] mem
+PCI: 00:1e.0 mem: base: 2009100 size: 2100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
+PCI: 00:1e.0 20 * [0x10000000 - 0x120fffff] mem
+PCI: 00:1e.0 24 * [0x12100000 - 0x140fffff] prefmem
+PCI: 00:1c.1 20 * [0x14100000 - 0x141fffff] mem
+PCI: 00:1c.3 20 * [0x14200000 - 0x142fffff] mem
+PCI: 00:02.0 10 * [0x14300000 - 0x1437ffff] mem
+PCI: 00:02.1 10 * [0x14380000 - 0x143fffff] mem
+PCI: 00:02.0 1c * [0x14400000 - 0x1443ffff] mem
+PCI: 00:1b.0 10 * [0x14440000 - 0x14443fff] mem
+PCI: 00:1d.7 10 * [0x14444000 - 0x144443ff] mem
+PCI: 00:1f.2 24 * [0x14445000 - 0x144453ff] mem
+DOMAIN: 0000 mem: base: 14445400 size: 14445400 align: 28 gran: 0 limit: ffffffff done
+avoid_fixed_resources: DOMAIN: 0000
+avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
+constrain_resources: PCI: 00:00.0 cf base f0000000 limit f3ffffff mem (fixed)
+constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
+skipping PNP: 002e.3@60 fixed resource, size=0!
+skipping PNP: 002e.3@70 fixed resource, size=0!
+avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 base d0000000 limit efffffff
+Setting resources...
+DOMAIN: 0000 io: base:1000 size:30b0 align:12 gran:0 limit:ffff
+PCI: 00:1e.0 1c * [0x1000 - 0x2fff] io
+PCI: 00:1c.3 1c * [0x3000 - 0x3fff] io
+PCI: 00:1d.0 20 * [0x4000 - 0x401f] io
+PCI: 00:1d.1 20 * [0x4020 - 0x403f] io
+PCI: 00:1d.2 20 * [0x4040 - 0x405f] io
+PCI: 00:1d.3 20 * [0x4060 - 0x407f] io
+PCI: 00:1f.2 20 * [0x4080 - 0x408f] io
+PCI: 00:02.0 14 * [0x4090 - 0x4097] io
+PCI: 00:1f.2 10 * [0x4098 - 0x409f] io
+PCI: 00:1f.2 18 * [0x40a0 - 0x40a7] io
+PCI: 00:1f.2 14 * [0x40a8 - 0x40ab] io
+PCI: 00:1f.2 1c * [0x40ac - 0x40af] io
+DOMAIN: 0000 io: next_base: 40b0 size: 30b0 align: 12 gran: 0 done
+PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
+PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done
+PCI: 00:1c.2 io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:1c.2 io: next_base: ffff size: 0 align: 12 gran: 12 done
+PCI: 00:1c.3 io: base:3000 size:1000 align:12 gran:12 limit:3fff
+PCI: 04:00.0 10 * [0x3000 - 0x30ff] io
+PCI: 00:1c.3 io: next_base: 3100 size: 1000 align: 12 gran: 12 done
+PCI: 00:1e.0 io: base:1000 size:2000 align:12 gran:12 limit:2fff
+PCI: 05:05.0 2c * [0x1000 - 0x1fff] io
+PCI: 05:05.0 34 * [0x2000 - 0x2fff] io
+PCI: 00:1e.0 io: next_base: 3000 size: 2000 align: 12 gran: 12 done
+DOMAIN: 0000 mem: base:d0000000 size:14445400 align:28 gran:0 limit:efffffff
+PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem
+PCI: 00:1e.0 20 * [0xe0000000 - 0xe20fffff] mem
+PCI: 00:1e.0 24 * [0xe2100000 - 0xe40fffff] prefmem
+PCI: 00:1c.1 20 * [0xe4100000 - 0xe41fffff] mem
+PCI: 00:1c.3 20 * [0xe4200000 - 0xe42fffff] mem
+PCI: 00:02.0 10 * [0xe4300000 - 0xe437ffff] mem
+PCI: 00:02.1 10 * [0xe4380000 - 0xe43fffff] mem
+PCI: 00:02.0 1c * [0xe4400000 - 0xe443ffff] mem
+PCI: 00:1b.0 10 * [0xe4440000 - 0xe4443fff] mem
+PCI: 00:1d.7 10 * [0xe4444000 - 0xe44443ff] mem
+PCI: 00:1f.2 24 * [0xe4445000 - 0xe44453ff] mem
+DOMAIN: 0000 mem: next_base: e4445400 size: 14445400 align: 28 gran: 0 done
+PCI: 00:1c.0 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.0 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.0 mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.0 mem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.1 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.1 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.1 mem: base:e4100000 size:100000 align:20 gran:20 limit:e41fffff
+PCI: 02:00.0 10 * [0xe4100000 - 0xe4100fff] mem
+PCI: 00:1c.1 mem: next_base: e4101000 size: 100000 align: 20 gran: 20 done
+PCI: 00:1c.2 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.2 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.2 mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.2 mem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.3 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.3 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.3 mem: base:e4200000 size:100000 align:20 gran:20 limit:e42fffff
+PCI: 04:00.0 30 * [0xe4200000 - 0xe421ffff] mem
+PCI: 04:00.0 18 * [0xe4220000 - 0xe4220fff] mem
+PCI: 00:1c.3 mem: next_base: e4221000 size: 100000 align: 20 gran: 20 done
+PCI: 00:1e.0 prefmem: base:e2100000 size:2000000 align:20 gran:20 limit:e40fffff
+PCI: 05:05.0 1c * [0xe2100000 - 0xe40fffff] prefmem
+PCI: 00:1e.0 prefmem: next_base: e4100000 size: 2000000 align: 20 gran: 20 done
+PCI: 00:1e.0 mem: base:e0000000 size:2100000 align:20 gran:20 limit:e20fffff
+PCI: 05:05.1 14 * [0xe0000000 - 0xe0003fff] mem
+PCI: 05:05.0 24 * [0xe0004000 - 0xe2003fff] mem
+PCI: 05:05.0 10 * [0xe2004000 - 0xe2004fff] mem
+PCI: 05:05.2 10 * [0xe2005000 - 0xe2005fff] mem
+PCI: 05:05.4 10 * [0xe2006000 - 0xe2006fff] mem
+PCI: 05:05.4 14 * [0xe2007000 - 0xe2007fff] mem
+PCI: 05:05.1 10 * [0xe2008000 - 0xe20087ff] mem
+PCI: 05:05.3 10 * [0xe2009000 - 0xe20090ff] mem
+PCI: 00:1e.0 mem: next_base: e2009100 size: 2100000 align: 20 gran: 20 done
+Root Device assign_resources, bus 0 link: 0
+pci_tolm: 0xd0000000
+Base of stolen memory: 0x7f800000
+Top of Low Used DRAM: 0x80000000
+IGD decoded, subtracting 8M UMA
+Available memory: 2088960K (2040M)
+Adding PCIe config bar
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+PCI: 00:00.0 cf <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem<mmconfig>
+PCI: 00:02.0 10 <- [0x00e4300000 - 0x00e437ffff] size 0x00080000 gran 0x13 mem
+PCI: 00:02.0 14 <- [0x0000004090 - 0x0000004097] size 0x00000008 gran 0x03 io
+PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem
+PCI: 00:02.0 1c <- [0x00e4400000 - 0x00e443ffff] size 0x00040000 gran 0x12 mem
+PCI: 00:02.1 10 <- [0x00e4380000 - 0x00e43fffff] size 0x00080000 gran 0x13 mem
+PCI: 00:1b.0 10 <- [0x00e4440000 - 0x00e4443fff] size 0x00004000 gran 0x0e mem64
+PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
+PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
+PCI: 00:1c.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 mem
+PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
+PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem
+PCI: 00:1c.1 20 <- [0x00e4100000 - 0x00e41fffff] size 0x00100000 gran 0x14 bus 02 mem
+PCI: 00:1c.1 assign_resources, bus 2 link: 0
+PCI: 02:00.0 10 <- [0x00e4100000 - 0x00e4100fff] size 0x00001000 gran 0x0c mem
+PCI: 00:1c.1 assign_resources, bus 2 link: 0
+PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
+PCI: 00:1c.2 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem
+PCI: 00:1c.2 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 mem
+PCI: 00:1c.3 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 04 io
+PCI: 00:1c.3 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 04 prefmem
+PCI: 00:1c.3 20 <- [0x00e4200000 - 0x00e42fffff] size 0x00100000 gran 0x14 bus 04 mem
+PCI: 00:1c.3 assign_resources, bus 4 link: 0
+PCI: 04:00.0 10 <- [0x0000003000 - 0x00000030ff] size 0x00000100 gran 0x08 io
+PCI: 04:00.0 18 <- [0x00e4220000 - 0x00e4220fff] size 0x00001000 gran 0x0c mem64
+PCI: 04:00.0 30 <- [0x00e4200000 - 0x00e421ffff] size 0x00020000 gran 0x11 romem
+PCI: 00:1c.3 assign_resources, bus 4 link: 0
+PCI: 00:1d.0 20 <- [0x0000004000 - 0x000000401f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.1 20 <- [0x0000004020 - 0x000000403f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.2 20 <- [0x0000004040 - 0x000000405f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.3 20 <- [0x0000004060 - 0x000000407f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.7 10 <- [0x00e4444000 - 0x00e44443ff] size 0x00000400 gran 0x0a mem
+PCI: 00:1e.0 1c <- [0x0000001000 - 0x0000002fff] size 0x00002000 gran 0x0c bus 05 io
+PCI: 00:1e.0 24 <- [0x00e2100000 - 0x00e40fffff] size 0x02000000 gran 0x14 bus 05 prefmem
+PCI: 00:1e.0 20 <- [0x00e0000000 - 0x00e20fffff] size 0x02100000 gran 0x14 bus 05 mem
+PCI: 00:1e.0 assign_resources, bus 5 link: 0
+PCI: 05:05.0 In set resources
+PCI: 05:05.0 10 <- [0x00e2004000 - 0x00e2004fff] size 0x00001000 gran 0x0c mem
+PCI: 05:05.0 2c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x02 io
+PCI: 05:05.0 34 <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x02 io
+PCI: 05:05.0 1c <- [0x00e2100000 - 0x00e40fffff] size 0x02000000 gran 0x0c prefmem
+PCI: 05:05.0 24 <- [0x00e0004000 - 0x00e2003fff] size 0x02000000 gran 0x0c mem
+PCI: 05:05.0 done set resources
+PCI: 05:05.1 10 <- [0x00e2008000 - 0x00e20087ff] size 0x00000800 gran 0x0b mem
+PCI: 05:05.1 14 <- [0x00e0000000 - 0x00e0003fff] size 0x00004000 gran 0x0e mem
+PCI: 05:05.2 10 <- [0x00e2005000 - 0x00e2005fff] size 0x00001000 gran 0x0c mem
+PCI: 05:05.3 10 <- [0x00e2009000 - 0x00e20090ff] size 0x00000100 gran 0x08 mem
+PCI: 05:05.4 10 <- [0x00e2006000 - 0x00e2006fff] size 0x00001000 gran 0x0c mem
+PCI: 05:05.4 14 <- [0x00e2007000 - 0x00e2007fff] size 0x00001000 gran 0x0c mem
+PCI: 00:1e.0 assign_resources, bus 5 link: 0
+PCI: 00:1f.0 assign_resources, bus 0 link: 0
+PNP: 002e.3 missing set_resources
+PNP: 002e.4 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
+PNP: 002e.4 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
+PNP: 004e.5 60 <- [0x0000000060 - 0x0000000067] size 0x00000008 gran 0x03 io
+PNP: 004e.5 62 <- [0x0000000064 - 0x000000006b] size 0x00000008 gran 0x03 io
+PCI: 00:1f.0 assign_resources, bus 0 link: 0
+PCI: 00:1f.2 10 <- [0x0000004098 - 0x000000409f] size 0x00000008 gran 0x03 io
+PCI: 00:1f.2 14 <- [0x00000040a8 - 0x00000040ab] size 0x00000004 gran 0x02 io
+PCI: 00:1f.2 18 <- [0x00000040a0 - 0x00000040a7] size 0x00000008 gran 0x03 io
+PCI: 00:1f.2 1c <- [0x00000040ac - 0x00000040af] size 0x00000004 gran 0x02 io
+PCI: 00:1f.2 20 <- [0x0000004080 - 0x000000408f] size 0x00000010 gran 0x04 io
+PCI: 00:1f.2 24 <- [0x00e4445000 - 0x00e44453ff] size 0x00000400 gran 0x0a mem
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+Root Device assign_resources, bus 0 link: 0
+Done setting resources.
+Show resources in subtree (Root Device)...After assigning values.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 1000 size 30b0 align 12 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base d0000000 size 14445400 align 28 gran 0 limit efffffff flags 40040200 index 10000100
+ DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
+ DOMAIN: 0000 resource base c0000 size 7ff40000 align 0 gran 0 limit 0 flags e0004200 index 4
+ DOMAIN: 0000 resource base 7f800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 5
+ DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7
+ PCI: 00:00.0
+ PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf
+ PCI: 00:01.0
+ PCI: 00:02.0
+ PCI: 00:02.0 resource base e4300000 size 80000 align 19 gran 19 limit e437ffff flags 60000200 index 10
+ PCI: 00:02.0 resource base 4090 size 8 align 3 gran 3 limit 4097 flags 60000100 index 14
+ PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001200 index 18
+ PCI: 00:02.0 resource base e4400000 size 40000 align 18 gran 18 limit e443ffff flags 60000200 index 1c
+ PCI: 00:02.1
+ PCI: 00:02.1 resource base e4380000 size 80000 align 19 gran 19 limit e43fffff flags 60000200 index 10
+ PCI: 00:1b.0
+ PCI: 00:1b.0 resource base e4440000 size 4000 align 14 gran 14 limit e4443fff flags 60000201 index 10
+ PCI: 00:1c.0
+ PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20
+ PCI: 00:1c.1 child on link 0 PCI: 02:00.0
+ PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1c.1 resource base e4100000 size 100000 align 20 gran 20 limit e41fffff flags 60080202 index 20
+ PCI: 02:00.0
+ PCI: 02:00.0 resource base e4100000 size 1000 align 12 gran 12 limit e4100fff flags 60000200 index 10
+ PCI: 00:1c.2
+ PCI: 00:1c.2 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20
+ PCI: 00:1c.3 child on link 0 PCI: 04:00.0
+ PCI: 00:1c.3 resource base 3000 size 1000 align 12 gran 12 limit 3fff flags 60080102 index 1c
+ PCI: 00:1c.3 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1c.3 resource base e4200000 size 100000 align 20 gran 20 limit e42fffff flags 60080202 index 20
+ PCI: 04:00.0
+ PCI: 04:00.0 resource base 3000 size 100 align 8 gran 8 limit 30ff flags 60000100 index 10
+ PCI: 04:00.0 resource base e4220000 size 1000 align 12 gran 12 limit e4220fff flags 60000201 index 18
+ PCI: 04:00.0 resource base e4200000 size 20000 align 17 gran 17 limit e421ffff flags 60002200 index 30
+ PCI: 00:1d.0
+ PCI: 00:1d.0 resource base 4000 size 20 align 5 gran 5 limit 401f flags 60000100 index 20
+ PCI: 00:1d.1
+ PCI: 00:1d.1 resource base 4020 size 20 align 5 gran 5 limit 403f flags 60000100 index 20
+ PCI: 00:1d.2
+ PCI: 00:1d.2 resource base 4040 size 20 align 5 gran 5 limit 405f flags 60000100 index 20
+ PCI: 00:1d.3
+ PCI: 00:1d.3 resource base 4060 size 20 align 5 gran 5 limit 407f flags 60000100 index 20
+ PCI: 00:1d.7
+ PCI: 00:1d.7 resource base e4444000 size 400 align 12 gran 10 limit e44443ff flags 60000200 index 10
+ PCI: 00:1e.0 child on link 0 PCI: 05:05.0
+ PCI: 00:1e.0 resource base 1000 size 2000 align 12 gran 12 limit 2fff flags 60080102 index 1c
+ PCI: 00:1e.0 resource base e2100000 size 2000000 align 20 gran 20 limit e40fffff flags 60081202 index 24
+ PCI: 00:1e.0 resource base e0000000 size 2100000 align 20 gran 20 limit e20fffff flags 60080202 index 20
+ PCI: 05:05.0
+ PCI: 05:05.0 resource base e2004000 size 1000 align 12 gran 12 limit e2004fff flags 60000200 index 10
+ PCI: 05:05.0 resource base 1000 size 1000 align 2 gran 2 limit 1fff flags 60000100 index 2c
+ PCI: 05:05.0 resource base 2000 size 1000 align 2 gran 2 limit 2fff flags 60000100 index 34
+ PCI: 05:05.0 resource base e2100000 size 2000000 align 12 gran 12 limit e40fffff flags 60001200 index 1c
+ PCI: 05:05.0 resource base e0004000 size 2000000 align 12 gran 12 limit e2003fff flags 60000200 index 24
+ PCI: 05:05.1
+ PCI: 05:05.1 resource base e2008000 size 800 align 12 gran 11 limit e20087ff flags 60000200 index 10
+ PCI: 05:05.1 resource base e0000000 size 4000 align 14 gran 14 limit e0003fff flags 60000200 index 14
+ PCI: 05:05.2
+ PCI: 05:05.2 resource base e2005000 size 1000 align 12 gran 12 limit e2005fff flags 60000200 index 10
+ PCI: 05:05.3
+ PCI: 05:05.3 resource base e2009000 size 100 align 12 gran 8 limit e20090ff flags 60000200 index 10
+ PCI: 05:05.4
+ PCI: 05:05.4 resource base e2006000 size 1000 align 12 gran 12 limit e2006fff flags 60000200 index 10
+ PCI: 05:05.4 resource base e2007000 size 1000 align 12 gran 12 limit e2007fff flags 60000200 index 14
+ PCI: 00:1f.0 child on link 0 PNP: 002e.0
+ PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+ PNP: 002e.0
+ PNP: 002e.1
+ PNP: 002e.3
+ PNP: 002e.3 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
+ PNP: 002e.3 resource base 5 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.4
+ PNP: 002e.4 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 002e.4 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.5
+ PNP: 002e.5 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
+ PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
+ PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75
+ PNP: 002e.7
+ PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
+ PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 62
+ PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 002e.8
+ PNP: 002e.8 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
+ PNP: 004e.0
+ PNP: 004e.1
+ PNP: 004e.5
+ PNP: 004e.5 resource base 60 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 004e.5 resource base 64 size 8 align 3 gran 3 limit 7ff flags e0000100 index 62
+ PNP: 004e.7
+ PNP: 004e.8
+ PNP: 004e.9
+ PNP: 004e.a
+ PNP: 004e.b
+ PCI: 00:1f.1
+ PCI: 00:1f.2
+ PCI: 00:1f.2 resource base 4098 size 8 align 3 gran 3 limit 409f flags 60000100 index 10
+ PCI: 00:1f.2 resource base 40a8 size 4 align 2 gran 2 limit 40ab flags 60000100 index 14
+ PCI: 00:1f.2 resource base 40a0 size 8 align 3 gran 3 limit 40a7 flags 60000100 index 18
+ PCI: 00:1f.2 resource base 40ac size 4 align 2 gran 2 limit 40af flags 60000100 index 1c
+ PCI: 00:1f.2 resource base 4080 size 10 align 4 gran 4 limit 408f flags 60000100 index 20
+ PCI: 00:1f.2 resource base e4445000 size 400 align 12 gran 10 limit e44453ff flags 60000200 index 24
+ PCI: 00:1f.3
+ PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
+Done allocating resources.
+BS: BS_DEV_RESOURCES times (us): entry 0 run 15925 exit 0
+Enabling resources...
+PCI: 00:00.0 subsystem <- 0000/0000
+PCI: 00:00.0 cmd <- 06
+PCI: 00:02.0 subsystem <- 0000/0000
+PCI: 00:02.0 cmd <- 03
+PCI: 00:02.1 subsystem <- 0000/0000
+PCI: 00:02.1 cmd <- 02
+PCI: 00:1b.0 subsystem <- 0000/0000
+PCI: 00:1b.0 cmd <- 102
+PCI: 00:1c.0 bridge ctrl <- 0003
+PCI: 00:1c.0 subsystem <- 0000/0000
+PCI: 00:1c.0 cmd <- 100
+PCI: 00:1c.1 bridge ctrl <- 0003
+PCI: 00:1c.1 subsystem <- 0000/0000
+PCI: 00:1c.1 cmd <- 106
+PCI: 00:1c.2 bridge ctrl <- 0003
+PCI: 00:1c.2 subsystem <- 0000/0000
+PCI: 00:1c.2 cmd <- 100
+PCI: 00:1c.3 bridge ctrl <- 0003
+PCI: 00:1c.3 subsystem <- 0000/0000
+PCI: 00:1c.3 cmd <- 107
+PCI: 00:1d.0 subsystem <- 0000/0000
+PCI: 00:1d.0 cmd <- 01
+PCI: 00:1d.1 subsystem <- 0000/0000
+PCI: 00:1d.1 cmd <- 01
+PCI: 00:1d.2 subsystem <- 0000/0000
+PCI: 00:1d.2 cmd <- 01
+PCI: 00:1d.3 subsystem <- 0000/0000
+PCI: 00:1d.3 cmd <- 01
+PCI: 00:1d.7 subsystem <- 0000/0000
+PCI: 00:1d.7 cmd <- 102
+PCI: 00:1e.0 bridge ctrl <- 0003
+PCI: 00:1e.0 subsystem <- 0000/0000
+PCI: 00:1e.0 cmd <- 107 (NOT WRITTEN!)
+PCI: 00:1f.0 subsystem <- 0000/0000
+PCI: 00:1f.0 cmd <- 107
+PCI: 00:1f.2 subsystem <- 0000/0000
+PCI: 00:1f.2 cmd <- 03
+PCI: 00:1f.3 subsystem <- 0000/0000
+PCI: 00:1f.3 cmd <- 101
+PCI: 02:00.0 cmd <- 02
+PCI: 04:00.0 cmd <- 03
+PCI: 05:05.0 bridge ctrl <- 0143
+PCI: 05:05.0 cmd <- 07
+PCI: 05:05.1 cmd <- 02
+PCI: 05:05.2 cmd <- 02
+PCI: 05:05.3 cmd <- 06
+PCI: 05:05.4 cmd <- 02
+done.
+BS: BS_DEV_ENABLE times (us): entry 0 run 781 exit 0
+Initializing devices...
+Root Device init ...
+Root Device init finished in 409 usecs
+CPU_CLUSTER: 0 init ...
+start_eip=0x00001000, code_size=0x00000031
+Initializing SMM handler... ... pmbase = 0x0500
+
+SMI_STS: MCSMI GPI PM1
+PM1_STS: WAK PWRBTN
+GPE0_STS: GPIO11 GPIO8 GPIO7 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
+ALT_GP_SMI_STS: GPI11 GPI8 GPI7 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0
+TCO_STS:
+ ... raise SMI#
+Initializing CPU #0
+CPU: vendor Intel device 6f6
+CPU: family 06, model 0f, stepping 06
+Enabling cache
+CBFS @ 0 size 3ffc00
+CBFS: Locating 'cpu_microcode_blob.bin'
+CBFS: Found @ offset 0 size 17000
+microcode: sig=0x6f6 pf=0x20 revision=0x0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+microcode: updated to revision 0xd1 date=2010-10-01
+CPU: Intel(R) Core(TM)2 CPU T7200 @ 2.00GHz.
+MTRR: Physical address space:
+0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
+0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
+0x00000000000c0000 - 0x000000007f800000 size 0x7f740000 type 6
+0x000000007f800000 - 0x00000000d0000000 size 0x50800000 type 0
+0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
+0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+call enable_fixed_mtrr()
+CPU physical address size: 36 bits
+MTRR: default type WB/UC MTRR counts: 5/3.
+MTRR: UC selected as default type.
+MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
+MTRR: 1 base 0x000000007f800000 mask 0x0000000fff800000 type 0
+MTRR: 2 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+Setting up local apic... apic_id: 0x00 done.
+CPU: 0 2 siblings
+CPU: 0 has sibling 1
+CPU #0 initialized
+CPU1: stack_base 00127000, stack_end 00127ff8
+Asserting INIT.
+Waiting for send to finish...
++Deasserting INIT.
+Waiting for send to finish...
++#startup loops: 2.
+Sending STARTUP #1 to 1.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++Sending STARTUP #2 to 1.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++After Startup.
+Initializing CPU #1
+Waiting for 1 CPUS to stop
+CPU: vendor Intel device 6f6
+CPU: family 06, model 0f, stepping 06
+Enabling cache
+CBFS @ 0 size 3ffc00
+CBFS: Locating 'cpu_microcode_blob.bin'
+CBFS: Found @ offset 0 size 17000
+microcode: sig=0x6f6 pf=0x20 revision=0x0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+microcode: updated to revision 0xd1 date=2010-10-01
+CPU: Intel(R) Core(TM)2 CPU T7200 @ 2.00GHz.
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+call enable_fixed_mtrr()
+CPU physical address size: 36 bits
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+Setting up local apic... apic_id: 0x01 done.
+CPU: 1 2 siblings
+CPU #1 initialized
+CPU 1 going down...
+All AP CPUs stopped (1607 loops)
+CPU1: stack: 00127000 - 00128000, lowest used address 00127cb0, stack used: 848 bytes
+CPU_CLUSTER: 0 init finished in 35282 usecs
+PCI: 00:00.0 init ...
+Normal boot.
+PCI: 00:00.0 init finished in 2 usecs
+PCI: 00:02.0 init ...
+PCI: 00:02.0 init finished in 52 usecs
+PCI: 00:02.1 init ...
+PCI: 00:02.1 init finished in 1 usecs
+PCI: 00:1b.0 init ...
+Azalia: codec type: Azalia
+Azalia: base = e4440000
+Azalia: codec_mask = 03
+Azalia: Initializing codec #1
+Azalia: codec viddid: 14f12c06
+Azalia: No verb!
+Azalia: Initializing codec #0
+Azalia: codec viddid: 10ec0262
+Azalia: verb_size: 52
+Azalia: verb loaded.
+PCI: 00:1b.0 init finished in 5290 usecs
+PCI: 00:1c.0 init ...
+Initializing ICH7 PCIe bridge.
+PCI: 00:1c.0 init finished in 19 usecs
+PCI: 00:1c.1 init ...
+Initializing ICH7 PCIe bridge.
+PCI: 00:1c.1 init finished in 19 usecs
+PCI: 00:1c.2 init ...
+Initializing ICH7 PCIe bridge.
+PCI: 00:1c.2 init finished in 19 usecs
+PCI: 00:1c.3 init ...
+Initializing ICH7 PCIe bridge.
+PCI: 00:1c.3 init finished in 19 usecs
+PCI: 00:1d.0 init ...
+UHCI: Setting up controller.. done.
+PCI: 00:1d.0 init finished in 6 usecs
+PCI: 00:1d.1 init ...
+UHCI: Setting up controller.. done.
+PCI: 00:1d.1 init finished in 6 usecs
+PCI: 00:1d.2 init ...
+UHCI: Setting up controller.. done.
+PCI: 00:1d.2 init finished in 6 usecs
+PCI: 00:1d.3 init ...
+UHCI: Setting up controller.. done.
+PCI: 00:1d.3 init finished in 6 usecs
+PCI: 00:1d.7 init ...
+EHCI: Setting up controller.. done.
+PCI: 00:1d.7 init finished in 11 usecs
+PCI: 00:1e.0 init ...
+PCI: 00:1e.0 init finished in 12 usecs
+PCI: 00:1f.0 init ...
+i82801gx: lpc_init
+IOAPIC: Initializing IOAPIC at 0xfec00000
+IOAPIC: Bootstrap Processor Local APIC = 0x00
+IOAPIC: ID = 0x02
+IOAPIC: Dumping registers
+ reg 0x0000: 0x02000000
+ reg 0x0001: 0x00170020
+ reg 0x0002: 0x00170020
+Set power on after power failure.
+NMI sources disabled.
+rtc_failed = 0x0
+RTC Init
+Disabling ACPI via APMC:
+done.
+Locking SMM.
+PCI: 00:1f.0 init finished in 679 usecs
+PCI: 00:1f.2 init ...
+i82801gx_sata: initializing...
+SATA controller in combined mode.
+PCI: 00:1f.2 init finished in 27 usecs
+PCI: 02:00.0 init ...
+PCI: 02:00.0 init finished in 0 usecs
+PCI: 04:00.0 init ...
+PCI: 04:00.0 init finished in 0 usecs
+PCI: 05:05.0 init ...
+TI PCIxx12 init
+PCI: 05:05.0 init finished in 1 usecs
+PCI: 05:05.1 init ...
+PCI: 05:05.1 init finished in 0 usecs
+PCI: 05:05.2 init ...
+PCI: 05:05.2 init finished in 0 usecs
+PCI: 05:05.3 init ...
+PCI: 05:05.3 init finished in 0 usecs
+PCI: 05:05.4 init ...
+PCI: 05:05.4 init finished in 0 usecs
+PNP: 002e.4 init ...
+PNP: 002e.4 init finished in 0 usecs
+PNP: 004e.5 init ...
+Keyboard init...
+PNP: 004e.5 init finished in 177443 usecs
+Devices initialized
+Show all devs... After init.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:01.0: enabled 0
+PCI: 00:02.0: enabled 1
+PCI: 00:02.1: enabled 1
+PCI: 00:1b.0: enabled 1
+PCI: 00:1c.0: enabled 1
+PCI: 00:1c.1: enabled 1
+PCI: 00:1c.2: enabled 1
+PCI: 00:1c.3: enabled 1
+PCI: 00:1d.0: enabled 1
+PCI: 00:1d.1: enabled 1
+PCI: 00:1d.2: enabled 1
+PCI: 00:1d.3: enabled 1
+PCI: 00:1d.7: enabled 1
+PCI: 00:1e.0: enabled 1
+PCI: 00:1f.0: enabled 1
+PNP: 002e.0: enabled 0
+PNP: 002e.1: enabled 0
+PNP: 002e.3: enabled 1
+PNP: 002e.4: enabled 1
+PNP: 002e.5: enabled 0
+PNP: 002e.7: enabled 0
+PNP: 002e.8: enabled 0
+PNP: 004e.0: enabled 0
+PNP: 004e.1: enabled 0
+PNP: 004e.5: enabled 1
+PNP: 004e.7: enabled 0
+PNP: 004e.8: enabled 0
+PNP: 004e.9: enabled 0
+PNP: 004e.a: enabled 0
+PNP: 004e.b: enabled 0
+PCI: 00:1f.1: enabled 0
+PCI: 00:1f.2: enabled 1
+PCI: 00:1f.3: enabled 1
+PCI: 02:00.0: enabled 1
+PCI: 04:00.0: enabled 1
+PCI: 05:05.0: enabled 1
+PCI: 05:05.1: enabled 1
+PCI: 05:05.2: enabled 1
+PCI: 05:05.3: enabled 1
+PCI: 05:05.4: enabled 1
+APIC: 01: enabled 1
+BS: BS_DEV_INIT times (us): entry 0 run 219405 exit 0
+Finalize devices...
+Devices finalized
+BS: BS_POST_DEVICE times (us): entry 0 run 2 exit 0
+BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0
+Copying Interrupt Routing Table to 0x000f0000... done.
+Copying Interrupt Routing Table to 0x7f6dc000... done.
+PIRQ table: 320 bytes.
+Wrote the mp table end at: 000f0410 - 000f05a4
+Wrote the mp table end at: 7f6db010 - 7f6db1a4
+MP table: 420 bytes.
+CBFS @ 0 size 3ffc00
+CBFS: Locating 'fallback/dsdt.aml'
+CBFS: Found @ offset 17640 size 40ba
+CBFS @ 0 size 3ffc00
+CBFS: Locating 'fallback/slic'
+CBFS: 'fallback/slic' not found.
+ACPI: Writing ACPI tables at 7f6b7000.
+ACPI: * FACS
+ACPI: * DSDT
+ACPI: * FADT
+ACPI: added table 1/32, length now 40
+ACPI: * SSDT
+Found 1 CPU(s) with 2 core(s) each.
+clocks between 1000 and 2000 MHz.
+adding 4 P-States between busratio 6 and c, incl. P0
+PSS: 2000MHz power 35000 control 0xc24 status 0xc24
+PSS: 1666MHz power 31666 control 0xa1d status 0xa1d
+PSS: 1333MHz power 28333 control 0x818 status 0x818
+PSS: 1000MHz power 25000 control 0x613 status 0x613
+clocks between 1000 and 2000 MHz.
+adding 4 P-States between busratio 6 and c, incl. P0
+PSS: 2000MHz power 35000 control 0xc24 status 0xc24
+PSS: 1666MHz power 31666 control 0xa1d status 0xa1d
+PSS: 1333MHz power 28333 control 0x818 status 0x818
+PSS: 1000MHz power 25000 control 0x613 status 0x613
+ACPI: added table 2/32, length now 44
+ACPI: * MCFG
+ACPI: added table 3/32, length now 48
+ACPI: * TCPA
+TCPA log created at 7f6a7000
+ACPI: added table 4/32, length now 52
+ACPI: * MADT
+ACPI: added table 5/32, length now 56
+current = 7f6bb960
+ACPI: * ECDT
+ACPI: added table 6/32, length now 60
+current = 7f6bb9c0
+ACPI: * HPET
+ACPI: added table 7/32, length now 64
+ACPI: done.
+ACPI tables: 18944 bytes.
+smbios_write_tables: 7f6a6000
+Root Device (Getac P470)
+CPU_CLUSTER: 0 (Intel i945 Northbridge)
+APIC: 00 (unknown)
+DOMAIN: 0000 (Intel i945 Northbridge)
+PCI: 00:00.0 (Intel i945 Northbridge)
+PCI: 00:01.0 (Intel i945 Northbridge)
+PCI: 00:02.0 (Intel i945 Northbridge)
+PCI: 00:02.1 (Intel i945 Northbridge)
+PCI: 00:1b.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1c.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1c.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1c.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1c.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.7 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1e.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1f.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PNP: 002e.0 (SMSC FDC37N972 Super I/O)
+PNP: 002e.1 (SMSC FDC37N972 Super I/O)
+PNP: 002e.3 (SMSC FDC37N972 Super I/O)
+PNP: 002e.4 (SMSC FDC37N972 Super I/O)
+PNP: 002e.5 (SMSC FDC37N972 Super I/O)
+PNP: 002e.7 (SMSC FDC37N972 Super I/O)
+PNP: 002e.8 (SMSC FDC37N972 Super I/O)
+PNP: 004e.0 (SMSC SIO10N268 Super I/O)
+PNP: 004e.1 (SMSC SIO10N268 Super I/O)
+PNP: 004e.5 (SMSC SIO10N268 Super I/O)
+PNP: 004e.7 (SMSC SIO10N268 Super I/O)
+PNP: 004e.8 (SMSC SIO10N268 Super I/O)
+PNP: 004e.9 (SMSC SIO10N268 Super I/O)
+PNP: 004e.a (SMSC SIO10N268 Super I/O)
+PNP: 004e.b (SMSC SIO10N268 Super I/O)
+PCI: 00:1f.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1f.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1f.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 02:00.0 (unknown)
+PCI: 04:00.0 (unknown)
+PCI: 05:05.0 (unknown)
+PCI: 05:05.1 (unknown)
+PCI: 05:05.2 (unknown)
+PCI: 05:05.3 (unknown)
+PCI: 05:05.4 (unknown)
+APIC: 01 (unknown)
+SMBIOS tables: 332 bytes.
+Writing table forward entry at 0x00000500
+Wrote coreboot table at: 00000500, 0x10 bytes, checksum a074
+Table forward entry ends at 0x00000528.
+... aligned to 0x00001000
+Writing coreboot table at 0x7f69e000
+rom_table_end = 0x7f69e000
+... aligned to 0x7f6a0000
+ 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
+ 1. 0000000000001000-000000000009ffff: RAM
+ 2. 00000000000c0000-000000007f69dfff: RAM
+ 3. 000000007f69e000-000000007f7fffff: CONFIGURATION TABLES
+ 4. 000000007f800000-000000007fffffff: RESERVED
+ 5. 00000000f0000000-00000000f3ffffff: RESERVED
+CBFS @ 0 size 3ffc00
+No FMAP found at 0 offset.
+Wrote coreboot table at: 7f69e000, 0x160 bytes, checksum ca5b
+coreboot table: 376 bytes.
+IMD ROOT 0. 7f7ff000 00001000
+IMD SMALL 1. 7f7fe000 00001000
+CONSOLE 2. 7f7de000 00020000
+TIME STAMP 3. 7f7dd000 000002e0
+ACPI RESUME 4. 7f6dd000 00100000
+IRQ TABLE 5. 7f6dc000 00001000
+SMP TABLE 6. 7f6db000 00001000
+ACPI 7. 7f6b7000 00024000
+TCPA LOG 8. 7f6a7000 00010000
+SMBIOS 9. 7f6a6000 00000800
+COREBOOT 10. 7f69e000 00008000
+IMD small region:
+ IMD ROOT 0. 7f7fec00 00000400
+ CAR GLOBALS 1. 7f7feac0 00000140
+ ROMSTAGE 2. 7f7feaa0 00000004
+ GDT 3. 7f7fe8a0 00000200
+ ACPI GNVS 4. 7f7fe7a0 00000100
+BS: BS_WRITE_TABLES times (us): entry 0 run 9893 exit 0
+CBFS provider active.
+CBFS @ 0 size 3ffc00
+CBFS: Locating 'fallback/payload'
+CBFS: Found @ offset 45bc0 size d758
+'fallback/payload' located at offset: 45bf8 size: d758
+Loading segment from rom address 0xffc45bf8
+ code (compression=1)
+ New segment dstaddr 0xe6a84 memsize 0x1957c srcaddr 0xffc45c30 filesize 0xd720
+Loading segment from rom address 0xffc45c14
+ Entry Point 0x000fd55a
+Bounce Buffer at 7f63b000, 404448 bytes
+Loading Segment: addr: 0x00000000000e6a84 memsz: 0x000000000001957c filesz: 0x000000000000d720
+lb: [0x0000000000100000, 0x00000000001315f0)
+Post relocation: addr: 0x00000000000e6a84 memsz: 0x000000000001957c filesz: 0x000000000000d720
+using LZMA
+[ 0x000e6a84, 00100000, 0x00100000) <- ffc45c30
+dest 000e6a84, end 00100000, bouncebuffer 7f63b000
+Loaded segments
+BS: BS_PAYLOAD_LOAD times (us): entry 0 run 31774 exit 0
+ICH7 watchdog disabled
+Jumping to boot code at 000fd55a(7f69e000)
+CPU0: stack: 00128000 - 00129000, lowest used address 00128b4c, stack used: 1204 bytes
+entry = 0x000fd55a
+lb_start = 0x00100000
+lb_size = 0x000315f0
+buffer = 0x7f63b000
+SeaBIOS (version rel-1.8.2-0-g33fbe13)
+Found coreboot cbmem console @ 7f7de000
+Found mainboard Getac P470
+Relocating init from 0x000e7ca0 to 0x7f653ca0 (size 41632)
+Found CBFS header at 0xfffffc08
+CPU Mhz=1997
+Found 24 PCI devices (max PCI bus is 06)
+Copying SMBIOS entry point from 0x7f6a6000 to 0x000f1f20
+Copying ACPI RSDP from 0x7f6b7000 to 0x000f1ef0
+Copying MPTABLE from 0x7f6db000/7f6db010 to 0x000f1d40
+Copying PIR from 0x7f6dc000 to 0x000f1c00
+Using pmtimer, ioport 0x508
+Scan for VGA option rom
+Running option rom at c000:0003
+Turning on vga text mode console
+SeaBIOS (version rel-1.8.2-0-g33fbe13)
+EHCI init on dev 00:1d.7 (regs=0xe4444020)
+Found 0 lpt ports
+Found 3 serial ports
+ATA controller 1 at 1f0/3f4/0 (irq 14 dev fa)
+ATA controller 2 at 170/374/0 (irq 15 dev fa)
+UHCI init on dev 00:1d.0 (io=4000)
+UHCI init on dev 00:1d.1 (io=4020)
+UHCI init on dev 00:1d.2 (io=4040)
+UHCI init on dev 00:1d.3 (io=4060)
+DVD/CD [ata1-0: MATSHITADVD-RAM UJ-850S ATAPI-7 DVD/CD]
+Searching bootorder for: /pci@i0cf8/*@1f,2/drive@1/disk@0
+PS2 keyboard initialized
+Initialized USB HUB (0 ports used)
+ata0-0: FUJITSU MHW2120BH ATA-8 Hard-Disk (111 GiBytes)
+Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
+All threads complete.
+Scan for option roms
+
+Press F12 for boot menu.
+
+Searching bootorder for: HALT
+drive 0x000f1b80: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=234441648
+Space available for UMB: cf000-ee800, f0000-f1b50
+Returned 262144 bytes of ZoneHigh
+e820 map has 6 items:
+ 0: 0000000000000000 - 000000000009fc00 = 1 RAM
+ 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
+ 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
+ 3: 0000000000100000 - 000000007f69e000 = 1 RAM
+ 4: 000000007f69e000 - 0000000080000000 = 2 RESERVED
+ 5: 00000000f0000000 - 00000000f4000000 = 2 RESERVED
+enter handle_19:
+ NULL
+Booting from DVD/CD...
+Device reports MEDIUM NOT PRESENT
+scsi_is_ready returned -1
+Boot failed: Could not read from CDROM (code 0003)
+enter handle_18:
+ NULL
+Booting from Hard Disk...
+Booting from 0000:7c00
+