| |
| |
| coreboot-4.11-2657-gbc41ccf12c Mon May 11 06:23:33 UTC 2020 bootblock starting (log level: 8)... |
| FMAP: Found "FLASH" version 1.1 at 0x0. |
| FMAP: base = 0xff800000 size = 0x800000 #areas = 3 |
| FMAP: area COREBOOT found @ 200 (8388096 bytes) |
| CBFS: Locating 'fallback/romstage' |
| CBFS: Found @ offset 80 size 468c |
| BS: bootblock times (exec / console): total (unknown) / 14 ms |
| |
| |
| coreboot-4.11-2657-gbc41ccf12c Mon May 11 06:23:33 UTC 2020 romstage starting (log level: 8)... |
| APIC 00: CPU Family_Model = 00730f01 |
| |
| APIC 00: ** Enter AmdInitReset [00028000] |
| Fch OEM config in INIT RESET |
| Fch OEM config in INIT RESET Done |
| AmdInitReset() returned AGESA_SUCCESS |
| APIC 00: Heap in LocalCache (2) at 0x00400000 |
| APIC 00: ** Exit AmdInitReset [00028000] |
| |
| APIC 00: ** Enter AmdInitEarly [00023000] |
| AmdInitEarly() returned AGESA_SUCCESS |
| APIC 00: Heap in LocalCache (2) at 0x00400000 |
| APIC 00: ** Exit AmdInitEarly [00023000] |
| |
| APIC 00: ** Enter AmdInitPost [00027000] |
| FMAP: area COREBOOT found @ 200 (8388096 bytes) |
| CBFS: Locating 'spd.bin' |
| CBFS: Found @ offset 14ec0 size 100 |
| AmdInitPost() returned AGESA_WARNING |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = a020, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 4, EventInfo = 4012200. |
| Param1 = 0, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = 1240000, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = 1241000, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = 1242000, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = 1243000, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = 1244000, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = 1245000, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = 1246000, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = 1247000, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = 1248000, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = 1249000, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = 124a000, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = 124c000, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| APIC 00: Heap in TempMem (3) at 0x000b0000 |
| APIC 00: ** Exit AmdInitPost [00027000] |
| CBMEM: |
| IMD: root @ 0xcffff000 254 entries. |
| IMD: root @ 0xcfffec00 62 entries. |
| MTRR Range: Start=0 End=80000000 (Size 80000000) |
| MTRR Range: Start=80000000 End=c0000000 (Size 40000000) |
| MTRR Range: Start=c0000000 End=d0000000 (Size 10000000) |
| MTRR Range: Start=ff800000 End=0 (Size 800000) |
| FMAP: area COREBOOT found @ 200 (8388096 bytes) |
| CBFS: Locating 'fallback/postcar' |
| CBFS: Found @ offset 16840 size 3e10 |
| Decompressing stage fallback/postcar @ 0xcffbdfc0 (32560 bytes) |
| Loading module at 0xcffbe000 with entry 0xcffbe000. filesize: 0x3c10 memsize: 0x7ef0 |
| Processing 105 relocs. Offset value of 0xcdfbe000 |
| BS: romstage times (exec / console): total (unknown) / 18 ms |
| |
| |
| coreboot-4.11-2657-gbc41ccf12c Mon May 11 06:23:33 UTC 2020 postcar starting (log level: 8)... |
| FMAP: area COREBOOT found @ 200 (8388096 bytes) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Found @ offset 4780 size 10244 |
| Decompressing stage fallback/ramstage @ 0xcfed1fc0 (960752 bytes) |
| Loading module at 0xcfed2000 with entry 0xcfed2000. filesize: 0x20f08 memsize: 0xea8b0 |
| Processing 2387 relocs. Offset value of 0xcf0d2000 |
| BS: postcar times (exec / console): total (unknown) / 0 ms |
| |
| |
| coreboot-4.11-2657-gbc41ccf12c Mon May 11 06:23:33 UTC 2020 ramstage starting (log level: 8)... |
| FMAP: area COREBOOT found @ 200 (8388096 bytes) |
| CBFS: Locating 'AGESA' |
| CBFS: Found @ offset 5ffdc0 size 7b0e0 |
| |
| APIC 00: ** Enter AmdInitEnv [00024000] |
| Wiped HEAP at [10000000 - 1002ffff] |
| Fch OEM config in INIT ENV |
| Fch OEM config in INIT ENV Done |
| AmdInitEnv() returned AGESA_SUCCESS |
| APIC 00: Heap in SystemMem (4) at 0x10000014 |
| APIC 00: ** Exit AmdInitEnv [00024000] |
| BS: BS_PRE_DEVICE entry times (exec / console): 35 / 0 ms |
| Enumerating buses... |
| Show all devs... Before device enumeration. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| DOMAIN: 0000: enabled 1 |
| APIC: 00: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:00.2: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:01.1: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:02.1: enabled 1 |
| PCI: 00:02.2: enabled 1 |
| PCI: 00:02.3: enabled 1 |
| PCI: 00:02.4: enabled 1 |
| PCI: 00:02.5: enabled 1 |
| PCI: 00:08.0: enabled 1 |
| PCI: 00:10.0: enabled 1 |
| PCI: 00:11.0: enabled 1 |
| PCI: 00:12.0: enabled 0 |
| PCI: 00:13.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:14.3: enabled 1 |
| PCI: 00:14.7: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:18.0: enabled 1 |
| PCI: 00:18.1: enabled 1 |
| PCI: 00:18.2: enabled 1 |
| PCI: 00:18.3: enabled 1 |
| PCI: 00:18.4: enabled 1 |
| PCI: 00:18.5: enabled 1 |
| PNP: 002e.0: enabled 0 |
| PNP: 002e.2: enabled 1 |
| PNP: 002e.3: enabled 1 |
| PNP: 002e.10: enabled 1 |
| PNP: 002e.11: enabled 1 |
| PNP: 002e.8: enabled 0 |
| PNP: 002e.108: enabled 1 |
| PNP: 002e.7: enabled 1 |
| PNP: 002e.107: enabled 1 |
| PNP: 002e.607: enabled 0 |
| PNP: 002e.f: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| Compare with tree... |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| APIC: 00: enabled 1 |
| DOMAIN: 0000: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:00.2: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:01.1: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:02.1: enabled 1 |
| PCI: 00:02.2: enabled 1 |
| PCI: 00:02.3: enabled 1 |
| PCI: 00:02.4: enabled 1 |
| PCI: 00:02.5: enabled 1 |
| PCI: 00:08.0: enabled 1 |
| PCI: 00:10.0: enabled 1 |
| PCI: 00:11.0: enabled 1 |
| PCI: 00:12.0: enabled 0 |
| PCI: 00:13.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:14.3: enabled 1 |
| PNP: 002e.0: enabled 0 |
| PNP: 002e.2: enabled 1 |
| PNP: 002e.3: enabled 1 |
| PNP: 002e.10: enabled 1 |
| PNP: 002e.11: enabled 1 |
| PNP: 002e.8: enabled 0 |
| PNP: 002e.108: enabled 1 |
| PNP: 002e.7: enabled 1 |
| PNP: 002e.107: enabled 1 |
| PNP: 002e.607: enabled 0 |
| PNP: 002e.f: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| PCI: 00:14.7: enabled 1 |
| PCI: 00:16.0: enabled 1 |
| PCI: 00:18.0: enabled 1 |
| PCI: 00:18.1: enabled 1 |
| PCI: 00:18.2: enabled 1 |
| PCI: 00:18.3: enabled 1 |
| PCI: 00:18.4: enabled 1 |
| PCI: 00:18.5: enabled 1 |
| Mainboard apu2 Enable. |
| Root Device scanning... |
| scan_static_bus for Root Device |
| setup_bsp_ramtop, TOP MEM: msr.lo = 0xd0000000, msr.hi = 0x00000000 |
| setup_bsp_ramtop, TOP MEM2: msr.lo = 0x2f000000, msr.hi = 0x00000001 |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| CPU_CLUSTER: 0 scanning... |
| PCI: 00:18.5 family16h, core_max = 0x8, core_nums = 0x7, siblings = 0x3 |
| node 0x0 core 0x0 apicid = 0x0 |
| CPU: APIC: 00 enabled |
| node 0x0 core 0x1 apicid = 0x1 |
| CPU: APIC: 01 enabled |
| node 0x0 core 0x2 apicid = 0x2 |
| CPU: APIC: 02 enabled |
| node 0x0 core 0x3 apicid = 0x3 |
| CPU: APIC: 03 enabled |
| scan_bus: bus CPU_CLUSTER: 0 finished in 0 msecs |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [1022/1566] ops |
| PCI: 00:00.0 [1022/1566] enabled |
| PCI: 00:00.2 [1022/1567] ops |
| PCI: 00:00.2 [1022/1567] enabled |
| PCI: 00:02.0 [1022/156b] enabled |
| PCI: Static device PCI: 00:02.1 not found, disabling it. |
| PCI: 00:02.2 subordinate bus PCI Express |
| PCI: 00:02.2 [1022/1439] enabled |
| PCI: 00:02.3 subordinate bus PCI Express |
| PCI: 00:02.3 [1022/1439] enabled |
| PCI: 00:02.4 subordinate bus PCI Express |
| PCI: 00:02.4 [1022/1439] enabled |
| PCI: 00:02.5 subordinate bus PCI Express |
| PCI: 00:02.5 [1022/1439] enabled |
| PCI: 00:08.0 [1022/1537] enabled |
| hudson_enable() |
| PCI: 00:10.0 [1022/7814] enabled |
| hudson_enable() |
| PCI: 00:11.0 [1022/0000] ops |
| PCI: 00:11.0 [1022/7801] enabled |
| hudson_enable() |
| hudson_enable() |
| PCI: 00:13.0 [1022/0000] ops |
| PCI: 00:13.0 [1022/7808] enabled |
| hudson_enable() |
| PCI: 00:14.0 [1022/780b] bus ops |
| PCI: 00:14.0 [1022/780b] enabled |
| hudson_enable() |
| PCI: 00:14.3 [1022/0000] bus ops |
| PCI: 00:14.3 [1022/780e] enabled |
| hudson_enable() |
| PCI: 00:14.7 [1022/7813] ops |
| PCI: 00:14.7 [1022/7813] enabled |
| hudson_enable() |
| PCI: Static device PCI: 00:16.0 not found, disabling it. |
| PCI: 00:18.0 [1022/1580] enabled |
| PCI: 00:18.1 [1022/1581] enabled |
| PCI: 00:18.2 [1022/1582] enabled |
| PCI: 00:18.3 [1022/1583] enabled |
| PCI: 00:18.4 [1022/1584] enabled |
| PCI: 00:18.5 [1022/1585] enabled |
| PCI: Leftover static devices: |
| PCI: 00:01.0 |
| PCI: 00:01.1 |
| PCI: 00:02.1 |
| PCI: 00:12.0 |
| PCI: 00:16.0 |
| PCI: Check your devicetree.cb. |
| PCI: 00:02.2 scanning... |
| do_pci_scan_bridge for PCI: 00:02.2 |
| PCI: pci_scan_bus for bus 01 |
| PCI: 01:00.0 [8086/157b] enabled |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled L1 |
| PCIe: Max_Payload_Size adjusted to 512 |
| Failed to enable LTR for dev = PCI: 01:00.0 |
| scan_bus: bus PCI: 00:02.2 finished in 0 msecs |
| PCI: 00:02.3 scanning... |
| do_pci_scan_bridge for PCI: 00:02.3 |
| PCI: pci_scan_bus for bus 02 |
| PCI: 02:00.0 [8086/157b] enabled |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled L1 |
| PCIe: Max_Payload_Size adjusted to 512 |
| Failed to enable LTR for dev = PCI: 02:00.0 |
| scan_bus: bus PCI: 00:02.3 finished in 0 msecs |
| PCI: 00:02.4 scanning... |
| do_pci_scan_bridge for PCI: 00:02.4 |
| PCI: pci_scan_bus for bus 03 |
| PCI: 03:00.0 [8086/157b] enabled |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled L1 |
| PCIe: Max_Payload_Size adjusted to 512 |
| Failed to enable LTR for dev = PCI: 03:00.0 |
| scan_bus: bus PCI: 00:02.4 finished in 0 msecs |
| PCI: 00:02.5 scanning... |
| do_pci_scan_bridge for PCI: 00:02.5 |
| PCI: pci_scan_bus for bus 04 |
| PCI: 04:00.0 [168c/003c] enabled |
| Enabling Common Clock Configuration |
| PCIE CLK PM is not supported by endpoint |
| ASPM: Enabled L0s and L1 |
| PCIe: Max_Payload_Size adjusted to 256 |
| Failed to enable LTR for dev = PCI: 04:00.0 |
| scan_bus: bus PCI: 00:02.5 finished in 0 msecs |
| PCI: 00:14.0 scanning... |
| scan_generic_bus for PCI: 00:14.0 |
| scan_generic_bus for PCI: 00:14.0 done |
| scan_bus: bus PCI: 00:14.0 finished in 0 msecs |
| PCI: 00:14.3 scanning... |
| scan_static_bus for PCI: 00:14.3 |
| PNP: 002e.0 disabled |
| PNP: 002e.2 enabled |
| PNP: 002e.3 enabled |
| PNP: 002e.10 enabled |
| PNP: 002e.11 enabled |
| PNP: 002e.8 disabled |
| PNP: 002e.108 enabled |
| PNP: 002e.7 disabled |
| PNP: 002e.107 disabled |
| PNP: 002e.607 disabled |
| PNP: 002e.f enabled |
| PNP: 0c31.0 enabled |
| PNP: 002e.14 enabled |
| scan_static_bus for PCI: 00:14.3 done |
| scan_bus: bus PCI: 00:14.3 finished in 0 msecs |
| scan_bus: bus DOMAIN: 0000 finished in 3 msecs |
| scan_static_bus for Root Device done |
| scan_bus: bus Root Device finished in 4 msecs |
| done |
| BS: BS_DEV_ENUMERATE run times (exec / console): 1 / 5 ms |
| Allocating resources... |
| Reading resources... |
| Root Device read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| fx_devs = 0x1 |
| DOMAIN: 0000 read_resources bus 0 link: 0 |
| Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000. |
| PCI: 00:02.2 read_resources bus 1 link: 0 |
| PCI: 00:02.2 read_resources bus 1 link: 0 done |
| PCI: 00:02.3 read_resources bus 2 link: 0 |
| PCI: 00:02.3 read_resources bus 2 link: 0 done |
| PCI: 00:02.4 read_resources bus 3 link: 0 |
| PCI: 00:02.4 read_resources bus 3 link: 0 done |
| PCI: 00:02.5 read_resources bus 4 link: 0 |
| PCI: 00:02.5 read_resources bus 4 link: 0 done |
| PCI: 00:14.3 read_resources bus 0 link: 0 |
| PCI: 00:14.3 read_resources bus 0 link: 0 done |
| PCI: 00:18.0 read_resources bus 0 link: 0 |
| PCI: 00:18.0 read_resources bus 0 link: 0 done |
| PCI: 00:18.0 read_resources bus 0 link: 1 |
| PCI: 00:18.0 read_resources bus 0 link: 1 done |
| PCI: 00:18.0 read_resources bus 0 link: 2 |
| PCI: 00:18.0 read_resources bus 0 link: 2 done |
| PCI: 00:18.0 read_resources bus 0 link: 3 |
| PCI: 00:18.0 read_resources bus 0 link: 3 done |
| DOMAIN: 0000 read_resources bus 0 link: 0 done |
| Root Device read_resources bus 0 link: 0 done |
| Done reading resources. |
| Show resources in subtree (Root Device)...After reading. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: 01 |
| APIC: 02 |
| APIC: 03 |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 |
| PCI: 00:00.0 resource base fec20000 size 1000 align 0 gran 0 limit 0 flags c0000200 index fec20000 |
| PCI: 00:00.2 |
| PCI: 00:00.2 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 44 |
| PCI: 00:02.0 |
| PCI: 00:02.2 child on link 0 PCI: 01:00.0 |
| PCI: 00:02.2 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:02.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:02.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 01:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c |
| PCI: 00:02.3 child on link 0 PCI: 02:00.0 |
| PCI: 00:02.3 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:02.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:02.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 02:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c |
| PCI: 00:02.4 child on link 0 PCI: 03:00.0 |
| PCI: 00:02.4 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:02.4 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:02.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| PCI: 03:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c |
| PCI: 00:02.5 child on link 0 PCI: 04:00.0 |
| PCI: 00:02.5 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| PCI: 00:02.5 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| PCI: 00:02.5 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| PCI: 04:00.0 |
| PCI: 04:00.0 resource base 0 size 200000 align 21 gran 21 limit ffffffffffffffff flags 201 index 10 |
| PCI: 04:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 |
| PCI: 00:08.0 |
| PCI: 00:08.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 1201 index 10 |
| PCI: 00:08.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18 |
| PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c |
| PCI: 00:08.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 20 |
| PCI: 00:08.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 24 |
| PCI: 00:10.0 |
| PCI: 00:10.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:11.0 |
| PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 |
| PCI: 00:11.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24 |
| PCI: 00:13.0 |
| PCI: 00:13.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| PCI: 00:14.0 |
| PCI: 00:14.3 child on link 0 PNP: 002e.0 |
| PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2 |
| PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PNP: 002e.0 |
| PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 |
| PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 002e.2 |
| PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 |
| PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.3 |
| PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 |
| PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.10 |
| PNP: 002e.10 resource base 3e8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 |
| PNP: 002e.10 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.11 |
| PNP: 002e.11 resource base 2e8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 |
| PNP: 002e.11 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| PNP: 002e.8 |
| PNP: 002e.108 |
| PNP: 002e.108 resource base 220 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 |
| PNP: 002e.7 |
| PNP: 002e.107 |
| PNP: 002e.607 |
| PNP: 002e.f |
| PNP: 0c31.0 |
| PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 |
| PNP: 002e.14 |
| PCI: 00:14.7 |
| PCI: 00:14.7 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 |
| PCI: 00:18.0 |
| PCI: 00:18.1 |
| PCI: 00:18.2 |
| PCI: 00:18.3 |
| PCI: 00:18.4 |
| PCI: 00:18.5 |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| PCI: 00:02.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 01:00.0 18 * [0x0 - 0x1f] io |
| PCI: 00:02.2 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:02.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 02:00.0 18 * [0x0 - 0x1f] io |
| PCI: 00:02.3 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:02.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 03:00.0 18 * [0x0 - 0x1f] io |
| PCI: 00:02.4 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:02.5 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| PCI: 00:02.5 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done |
| PCI: 00:02.2 1c * [0x0 - 0xfff] io |
| PCI: 00:02.3 1c * [0x1000 - 0x1fff] io |
| PCI: 00:02.4 1c * [0x2000 - 0x2fff] io |
| PCI: 00:11.0 20 * [0x3000 - 0x300f] io |
| PCI: 00:11.0 10 * [0x3010 - 0x3017] io |
| PCI: 00:11.0 18 * [0x3018 - 0x301f] io |
| PCI: 00:11.0 14 * [0x3020 - 0x3023] io |
| PCI: 00:11.0 1c * [0x3024 - 0x3027] io |
| DOMAIN: 0000 io: base: 3028 size: 3028 align: 12 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| PCI: 00:02.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:02.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:02.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 01:00.0 10 * [0x0 - 0x1ffff] mem |
| PCI: 01:00.0 1c * [0x20000 - 0x23fff] mem |
| PCI: 00:02.2 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:02.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:02.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:02.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 02:00.0 10 * [0x0 - 0x1ffff] mem |
| PCI: 02:00.0 1c * [0x20000 - 0x23fff] mem |
| PCI: 00:02.3 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:02.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:02.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:02.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 03:00.0 10 * [0x0 - 0x1ffff] mem |
| PCI: 03:00.0 1c * [0x20000 - 0x23fff] mem |
| PCI: 00:02.4 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:02.5 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:02.5 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:02.5 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 04:00.0 10 * [0x0 - 0x1fffff] mem |
| PCI: 04:00.0 30 * [0x200000 - 0x20ffff] mem |
| PCI: 00:02.5 mem: base: 210000 size: 300000 align: 21 gran: 20 limit: ffffffff done |
| PCI: 00:02.5 20 * [0x0 - 0x2fffff] mem |
| PCI: 00:02.2 20 * [0x300000 - 0x3fffff] mem |
| PCI: 00:02.3 20 * [0x400000 - 0x4fffff] mem |
| PCI: 00:02.4 20 * [0x500000 - 0x5fffff] mem |
| PCI: 00:08.0 18 * [0x600000 - 0x6fffff] mem |
| PCI: 00:08.0 20 * [0x700000 - 0x7fffff] mem |
| PCI: 00:00.2 44 * [0x800000 - 0x87ffff] mem |
| PCI: 00:08.0 10 * [0x880000 - 0x89ffff] prefmem |
| PCI: 00:08.0 24 * [0x8a0000 - 0x8a1fff] mem |
| PCI: 00:10.0 10 * [0x8a2000 - 0x8a3fff] mem |
| PCI: 00:08.0 1c * [0x8a4000 - 0x8a4fff] mem |
| PCI: 00:11.0 24 * [0x8a5000 - 0x8a53ff] mem |
| PCI: 00:13.0 10 * [0x8a6000 - 0x8a60ff] mem |
| PCI: 00:14.7 10 * [0x8a7000 - 0x8a70ff] mem |
| DOMAIN: 0000 mem: base: 8a7100 size: 8a7100 align: 21 gran: 0 limit: ffffffff done |
| avoid_fixed_resources: DOMAIN: 0000 |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| constrain_resources: PCI: 00:00.0 c0010058 base f8000000 limit fbffffff mem (fixed) |
| constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed) |
| avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff |
| avoid_fixed_resources:@DOMAIN: 0000 10000100 base f7600000 limit f7ffffff |
| Setting resources... |
| DOMAIN: 0000 io: base:1000 size:3028 align:12 gran:0 limit:ffff |
| PCI: 00:02.2 1c * [0x1000 - 0x1fff] io |
| PCI: 00:02.3 1c * [0x2000 - 0x2fff] io |
| PCI: 00:02.4 1c * [0x3000 - 0x3fff] io |
| PCI: 00:11.0 20 * [0x4000 - 0x400f] io |
| PCI: 00:11.0 10 * [0x4010 - 0x4017] io |
| PCI: 00:11.0 18 * [0x4018 - 0x401f] io |
| PCI: 00:11.0 14 * [0x4020 - 0x4023] io |
| PCI: 00:11.0 1c * [0x4024 - 0x4027] io |
| DOMAIN: 0000 io: next_base: 4028 size: 3028 align: 12 gran: 0 done |
| PCI: 00:02.2 io: base:1000 size:1000 align:12 gran:12 limit:1fff |
| PCI: 01:00.0 18 * [0x1000 - 0x101f] io |
| PCI: 00:02.2 io: next_base: 1020 size: 1000 align: 12 gran: 12 done |
| PCI: 00:02.3 io: base:2000 size:1000 align:12 gran:12 limit:2fff |
| PCI: 02:00.0 18 * [0x2000 - 0x201f] io |
| PCI: 00:02.3 io: next_base: 2020 size: 1000 align: 12 gran: 12 done |
| PCI: 00:02.4 io: base:3000 size:1000 align:12 gran:12 limit:3fff |
| PCI: 03:00.0 18 * [0x3000 - 0x301f] io |
| PCI: 00:02.4 io: next_base: 3020 size: 1000 align: 12 gran: 12 done |
| PCI: 00:02.5 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| PCI: 00:02.5 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| DOMAIN: 0000 mem: base:f7600000 size:8a7100 align:21 gran:0 limit:f7ffffff |
| PCI: 00:02.5 20 * [0xf7600000 - 0xf78fffff] mem |
| PCI: 00:02.2 20 * [0xf7900000 - 0xf79fffff] mem |
| PCI: 00:02.3 20 * [0xf7a00000 - 0xf7afffff] mem |
| PCI: 00:02.4 20 * [0xf7b00000 - 0xf7bfffff] mem |
| PCI: 00:08.0 18 * [0xf7c00000 - 0xf7cfffff] mem |
| PCI: 00:08.0 20 * [0xf7d00000 - 0xf7dfffff] mem |
| PCI: 00:00.2 44 * [0xf7e00000 - 0xf7e7ffff] mem |
| PCI: 00:08.0 10 * [0xf7e80000 - 0xf7e9ffff] prefmem |
| PCI: 00:08.0 24 * [0xf7ea0000 - 0xf7ea1fff] mem |
| PCI: 00:10.0 10 * [0xf7ea2000 - 0xf7ea3fff] mem |
| PCI: 00:08.0 1c * [0xf7ea4000 - 0xf7ea4fff] mem |
| PCI: 00:11.0 24 * [0xf7ea5000 - 0xf7ea53ff] mem |
| PCI: 00:13.0 10 * [0xf7ea6000 - 0xf7ea60ff] mem |
| PCI: 00:14.7 10 * [0xf7ea7000 - 0xf7ea70ff] mem |
| DOMAIN: 0000 mem: next_base: f7ea7100 size: 8a7100 align: 21 gran: 0 done |
| PCI: 00:02.2 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:02.2 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:02.2 mem: base:f7900000 size:100000 align:20 gran:20 limit:f79fffff |
| PCI: 01:00.0 10 * [0xf7900000 - 0xf791ffff] mem |
| PCI: 01:00.0 1c * [0xf7920000 - 0xf7923fff] mem |
| PCI: 00:02.2 mem: next_base: f7924000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:02.3 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:02.3 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:02.3 mem: base:f7a00000 size:100000 align:20 gran:20 limit:f7afffff |
| PCI: 02:00.0 10 * [0xf7a00000 - 0xf7a1ffff] mem |
| PCI: 02:00.0 1c * [0xf7a20000 - 0xf7a23fff] mem |
| PCI: 00:02.3 mem: next_base: f7a24000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:02.4 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:02.4 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:02.4 mem: base:f7b00000 size:100000 align:20 gran:20 limit:f7bfffff |
| PCI: 03:00.0 10 * [0xf7b00000 - 0xf7b1ffff] mem |
| PCI: 03:00.0 1c * [0xf7b20000 - 0xf7b23fff] mem |
| PCI: 00:02.4 mem: next_base: f7b24000 size: 100000 align: 20 gran: 20 done |
| PCI: 00:02.5 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| PCI: 00:02.5 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| PCI: 00:02.5 mem: base:f7600000 size:300000 align:21 gran:20 limit:f78fffff |
| PCI: 04:00.0 10 * [0xf7600000 - 0xf77fffff] mem |
| PCI: 04:00.0 30 * [0xf7800000 - 0xf780ffff] mem |
| PCI: 00:02.5 mem: next_base: f7810000 size: 300000 align: 21 gran: 20 done |
| Root Device assign_resources, bus 0 link: 0 |
| node 0: mmio_basek=00340000, basek=00400000, limitk=004a0000 |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| PCI: 00:00.2 44 <- [0x00f7e00000 - 0x00f7e7ffff] size 0x00080000 gran 0x13 mem |
| PCI: 00:02.2 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io |
| PCI: 00:02.2 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:02.2 20 <- [0x00f7900000 - 0x00f79fffff] size 0x00100000 gran 0x14 bus 01 mem |
| PCI: 00:02.2 assign_resources, bus 1 link: 0 |
| PCI: 01:00.0 10 <- [0x00f7900000 - 0x00f791ffff] size 0x00020000 gran 0x11 mem |
| PCI: 01:00.0 18 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io |
| PCI: 01:00.0 1c <- [0x00f7920000 - 0x00f7923fff] size 0x00004000 gran 0x0e mem |
| PCI: 00:02.2 assign_resources, bus 1 link: 0 |
| PCI: 00:02.3 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 02 io |
| PCI: 00:02.3 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:02.3 20 <- [0x00f7a00000 - 0x00f7afffff] size 0x00100000 gran 0x14 bus 02 mem |
| PCI: 00:02.3 assign_resources, bus 2 link: 0 |
| PCI: 02:00.0 10 <- [0x00f7a00000 - 0x00f7a1ffff] size 0x00020000 gran 0x11 mem |
| PCI: 02:00.0 18 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io |
| PCI: 02:00.0 1c <- [0x00f7a20000 - 0x00f7a23fff] size 0x00004000 gran 0x0e mem |
| PCI: 00:02.3 assign_resources, bus 2 link: 0 |
| PCI: 00:02.4 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 03 io |
| PCI: 00:02.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 prefmem |
| PCI: 00:02.4 20 <- [0x00f7b00000 - 0x00f7bfffff] size 0x00100000 gran 0x14 bus 03 mem |
| PCI: 00:02.4 assign_resources, bus 3 link: 0 |
| PCI: 03:00.0 10 <- [0x00f7b00000 - 0x00f7b1ffff] size 0x00020000 gran 0x11 mem |
| PCI: 03:00.0 18 <- [0x0000003000 - 0x000000301f] size 0x00000020 gran 0x05 io |
| PCI: 03:00.0 1c <- [0x00f7b20000 - 0x00f7b23fff] size 0x00004000 gran 0x0e mem |
| PCI: 00:02.4 assign_resources, bus 3 link: 0 |
| PCI: 00:02.5 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io |
| PCI: 00:02.5 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 04 prefmem |
| PCI: 00:02.5 20 <- [0x00f7600000 - 0x00f78fffff] size 0x00300000 gran 0x14 bus 04 mem |
| PCI: 00:02.5 assign_resources, bus 4 link: 0 |
| PCI: 04:00.0 10 <- [0x00f7600000 - 0x00f77fffff] size 0x00200000 gran 0x15 mem64 |
| PCI: 04:00.0 30 <- [0x00f7800000 - 0x00f780ffff] size 0x00010000 gran 0x10 romem |
| PCI: 00:02.5 assign_resources, bus 4 link: 0 |
| PCI: 00:08.0 10 <- [0x00f7e80000 - 0x00f7e9ffff] size 0x00020000 gran 0x11 prefmem64 |
| PCI: 00:08.0 18 <- [0x00f7c00000 - 0x00f7cfffff] size 0x00100000 gran 0x14 mem |
| PCI: 00:08.0 1c <- [0x00f7ea4000 - 0x00f7ea4fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:08.0 20 <- [0x00f7d00000 - 0x00f7dfffff] size 0x00100000 gran 0x14 mem |
| PCI: 00:08.0 24 <- [0x00f7ea0000 - 0x00f7ea1fff] size 0x00002000 gran 0x0d mem |
| PCI: 00:10.0 10 <- [0x00f7ea2000 - 0x00f7ea3fff] size 0x00002000 gran 0x0d mem64 |
| PCI: 00:11.0 10 <- [0x0000004010 - 0x0000004017] size 0x00000008 gran 0x03 io |
| PCI: 00:11.0 14 <- [0x0000004020 - 0x0000004023] size 0x00000004 gran 0x02 io |
| PCI: 00:11.0 18 <- [0x0000004018 - 0x000000401f] size 0x00000008 gran 0x03 io |
| PCI: 00:11.0 1c <- [0x0000004024 - 0x0000004027] size 0x00000004 gran 0x02 io |
| PCI: 00:11.0 20 <- [0x0000004000 - 0x000000400f] size 0x00000010 gran 0x04 io |
| PCI: 00:11.0 24 <- [0x00f7ea5000 - 0x00f7ea53ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:13.0 10 <- [0x00f7ea6000 - 0x00f7ea60ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:14.3 assign_resources, bus 0 link: 0 |
| PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io |
| PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq |
| PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io |
| PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq |
| PNP: 002e.10 60 <- [0x00000003e8 - 0x00000003ef] size 0x00000008 gran 0x03 io |
| PNP: 002e.10 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq |
| PNP: 002e.11 60 <- [0x00000002e8 - 0x00000002ef] size 0x00000008 gran 0x03 io |
| PNP: 002e.11 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq |
| PNP: 002e.108 60 <- [0x0000000220 - 0x0000000227] size 0x00000008 gran 0x03 io |
| PCI: 00:14.3 assign_resources, bus 0 link: 0 |
| PCI: 00:14.7 10 <- [0x00f7ea7000 - 0x00f7ea70ff] size 0x00000100 gran 0x08 mem64 |
| DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| Root Device assign_resources, bus 0 link: 0 |
| Done setting resources. |
| Show resources in subtree (Root Device)...After assigning values. |
| Root Device child on link 0 CPU_CLUSTER: 0 |
| CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| APIC: 00 |
| APIC: 01 |
| APIC: 02 |
| APIC: 03 |
| DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| DOMAIN: 0000 resource base 1000 size 3028 align 12 gran 0 limit ffff flags 40040100 index 10000000 |
| DOMAIN: 0000 resource base f7600000 size 8a7100 align 21 gran 0 limit f7ffffff flags 40040200 index 10000100 |
| DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 |
| DOMAIN: 0000 resource base c0000 size cff40000 align 0 gran 0 limit 0 flags e0004200 index 20 |
| DOMAIN: 0000 resource base 100000000 size 2f000000 align 0 gran 0 limit 0 flags e0004200 index 30 |
| PCI: 00:00.0 |
| PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 |
| PCI: 00:00.0 resource base fec20000 size 1000 align 0 gran 0 limit 0 flags c0000200 index fec20000 |
| PCI: 00:00.2 |
| PCI: 00:00.2 resource base f7e00000 size 80000 align 19 gran 19 limit f7e7ffff flags 60000200 index 44 |
| PCI: 00:02.0 |
| PCI: 00:02.2 child on link 0 PCI: 01:00.0 |
| PCI: 00:02.2 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c |
| PCI: 00:02.2 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:02.2 resource base f7900000 size 100000 align 20 gran 20 limit f79fffff flags 60080202 index 20 |
| PCI: 01:00.0 |
| PCI: 01:00.0 resource base f7900000 size 20000 align 17 gran 17 limit f791ffff flags 60000200 index 10 |
| PCI: 01:00.0 resource base 1000 size 20 align 5 gran 5 limit 101f flags 60000100 index 18 |
| PCI: 01:00.0 resource base f7920000 size 4000 align 14 gran 14 limit f7923fff flags 60000200 index 1c |
| PCI: 00:02.3 child on link 0 PCI: 02:00.0 |
| PCI: 00:02.3 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c |
| PCI: 00:02.3 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:02.3 resource base f7a00000 size 100000 align 20 gran 20 limit f7afffff flags 60080202 index 20 |
| PCI: 02:00.0 |
| PCI: 02:00.0 resource base f7a00000 size 20000 align 17 gran 17 limit f7a1ffff flags 60000200 index 10 |
| PCI: 02:00.0 resource base 2000 size 20 align 5 gran 5 limit 201f flags 60000100 index 18 |
| PCI: 02:00.0 resource base f7a20000 size 4000 align 14 gran 14 limit f7a23fff flags 60000200 index 1c |
| PCI: 00:02.4 child on link 0 PCI: 03:00.0 |
| PCI: 00:02.4 resource base 3000 size 1000 align 12 gran 12 limit 3fff flags 60080102 index 1c |
| PCI: 00:02.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:02.4 resource base f7b00000 size 100000 align 20 gran 20 limit f7bfffff flags 60080202 index 20 |
| PCI: 03:00.0 |
| PCI: 03:00.0 resource base f7b00000 size 20000 align 17 gran 17 limit f7b1ffff flags 60000200 index 10 |
| PCI: 03:00.0 resource base 3000 size 20 align 5 gran 5 limit 301f flags 60000100 index 18 |
| PCI: 03:00.0 resource base f7b20000 size 4000 align 14 gran 14 limit f7b23fff flags 60000200 index 1c |
| PCI: 00:02.5 child on link 0 PCI: 04:00.0 |
| PCI: 00:02.5 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| PCI: 00:02.5 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| PCI: 00:02.5 resource base f7600000 size 300000 align 21 gran 20 limit f78fffff flags 60080202 index 20 |
| PCI: 04:00.0 |
| PCI: 04:00.0 resource base f7600000 size 200000 align 21 gran 21 limit f77fffff flags 60000201 index 10 |
| PCI: 04:00.0 resource base f7800000 size 10000 align 16 gran 16 limit f780ffff flags 60002200 index 30 |
| PCI: 00:08.0 |
| PCI: 00:08.0 resource base f7e80000 size 20000 align 17 gran 17 limit f7e9ffff flags 60001201 index 10 |
| PCI: 00:08.0 resource base f7c00000 size 100000 align 20 gran 20 limit f7cfffff flags 60000200 index 18 |
| PCI: 00:08.0 resource base f7ea4000 size 1000 align 12 gran 12 limit f7ea4fff flags 60000200 index 1c |
| PCI: 00:08.0 resource base f7d00000 size 100000 align 20 gran 20 limit f7dfffff flags 60000200 index 20 |
| PCI: 00:08.0 resource base f7ea0000 size 2000 align 13 gran 13 limit f7ea1fff flags 60000200 index 24 |
| PCI: 00:10.0 |
| PCI: 00:10.0 resource base f7ea2000 size 2000 align 13 gran 13 limit f7ea3fff flags 60000201 index 10 |
| PCI: 00:11.0 |
| PCI: 00:11.0 resource base 4010 size 8 align 3 gran 3 limit 4017 flags 60000100 index 10 |
| PCI: 00:11.0 resource base 4020 size 4 align 2 gran 2 limit 4023 flags 60000100 index 14 |
| PCI: 00:11.0 resource base 4018 size 8 align 3 gran 3 limit 401f flags 60000100 index 18 |
| PCI: 00:11.0 resource base 4024 size 4 align 2 gran 2 limit 4027 flags 60000100 index 1c |
| PCI: 00:11.0 resource base 4000 size 10 align 4 gran 4 limit 400f flags 60000100 index 20 |
| PCI: 00:11.0 resource base f7ea5000 size 400 align 12 gran 10 limit f7ea53ff flags 60000200 index 24 |
| PCI: 00:13.0 |
| PCI: 00:13.0 resource base f7ea6000 size 100 align 12 gran 8 limit f7ea60ff flags 60000200 index 10 |
| PCI: 00:14.0 |
| PCI: 00:14.3 child on link 0 PNP: 002e.0 |
| PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2 |
| PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| PNP: 002e.0 |
| PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 |
| PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 002e.2 |
| PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 |
| PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 002e.3 |
| PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 |
| PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 002e.10 |
| PNP: 002e.10 resource base 3e8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 |
| PNP: 002e.10 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 002e.11 |
| PNP: 002e.11 resource base 2e8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 |
| PNP: 002e.11 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| PNP: 002e.8 |
| PNP: 002e.108 |
| PNP: 002e.108 resource base 220 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 |
| PNP: 002e.7 |
| PNP: 002e.107 |
| PNP: 002e.607 |
| PNP: 002e.f |
| PNP: 0c31.0 |
| PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 |
| PNP: 002e.14 |
| PCI: 00:14.7 |
| PCI: 00:14.7 resource base f7ea7000 size 100 align 12 gran 8 limit f7ea70ff flags 60000201 index 10 |
| PCI: 00:18.0 |
| PCI: 00:18.1 |
| PCI: 00:18.2 |
| PCI: 00:18.3 |
| PCI: 00:18.4 |
| PCI: 00:18.5 |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES run times (exec / console): 0 / 23 ms |
| |
| APIC 00: ** Enter AmdInitMid [00026000] |
| AmdInitMid() returned AGESA_SUCCESS |
| APIC 00: Heap in SystemMem (4) at 0x10000014 |
| APIC 00: ** Exit AmdInitMid [00026000] |
| PCI_INTR tables: Writing registers C00/C01 for PIC mode PCI IRQ routing: |
| PCI_INTR_INDEX PCI_INTR_DATA |
| 0x00 INTA# : 0x03 |
| 0x01 INTB# : 0x03 |
| 0x02 INTC# : 0x05 |
| 0x03 INTD# : 0x07 |
| 0x04 INTE# : 0x0B |
| 0x05 INTF# : 0x0A |
| 0x06 INTG# : 0x1F |
| 0x07 INTH# : 0x1F |
| 0x08 Misc : 0xFA |
| 0x09 Misc0 : 0xF1 |
| 0x0A Misc1 : 0x00 |
| 0x0B Misc2 : 0x00 |
| 0x0C Ser IRQ INTA : 0x1F |
| 0x0D Ser IRQ INTB : 0x1F |
| 0x0E Ser IRQ INTC : 0x1F |
| 0x0F Ser IRQ INTD : 0x1F |
| 0x10 SCI : 0x1F |
| 0x11 SMBUS0 : 0x1F |
| 0x12 ASF : 0x1F |
| 0x13 HDA : 0x1F |
| 0x14 FC : 0x1F |
| 0x15 GEC : 0x1F |
| 0x16 PerMon : 0x1F |
| 0x17 SD : 0x1F |
| 0x20 IMC INT0 : 0x1F |
| 0x21 IMC INT1 : 0x1F |
| 0x22 IMC INT2 : 0x1F |
| 0x23 IMC INT3 : 0x1F |
| 0x24 IMC INT4 : 0x1F |
| 0x25 IMC INT5 : 0x1F |
| 0x30 Dev18.0 INTA : 0x05 |
| 0x31 Dev18.2 INTB : 0x1F |
| 0x32 Dev19.0 INTA : 0x05 |
| 0x33 Dev19.2 INTB : 0x1F |
| 0x34 Dev22.0 INTA : 0x04 |
| 0x35 Dev22.2 INTB : 0x1F |
| 0x36 Dev20.5 INTC : 0x1F |
| 0x40 RSVD : 0x1F |
| 0x41 SATA : 0x1F |
| 0x60 RSVD : 0x00 |
| 0x61 RSVD : 0x00 |
| 0x62 GPIO : 0x1F |
| PCI_INTR tables: Writing registers C00/C01 for APIC mode PCI IRQ routing: |
| PCI_INTR_INDEX PCI_INTR_DATA |
| 0x00 INTA# : 0x10 |
| 0x01 INTB# : 0x10 |
| 0x02 INTC# : 0x12 |
| 0x03 INTD# : 0x13 |
| 0x04 INTE# : 0x14 |
| 0x05 INTF# : 0x15 |
| 0x06 INTG# : 0x1F |
| 0x07 INTH# : 0x1F |
| 0x08 Misc : 0x00 |
| 0x09 Misc0 : 0x00 |
| 0x0A Misc1 : 0x00 |
| 0x0B Misc2 : 0x00 |
| 0x0C Ser IRQ INTA : 0x1F |
| 0x0D Ser IRQ INTB : 0x1F |
| 0x0E Ser IRQ INTC : 0x1F |
| 0x0F Ser IRQ INTD : 0x1F |
| 0x10 SCI : 0x09 |
| 0x11 SMBUS0 : 0x1F |
| 0x12 ASF : 0x1F |
| 0x13 HDA : 0x1F |
| 0x14 FC : 0x1F |
| 0x15 GEC : 0x1F |
| 0x16 PerMon : 0x1F |
| 0x17 SD : 0x10 |
| 0x20 IMC INT0 : 0x05 |
| 0x21 IMC INT1 : 0x1F |
| 0x22 IMC INT2 : 0x1F |
| 0x23 IMC INT3 : 0x1F |
| 0x24 IMC INT4 : 0x1F |
| 0x25 IMC INT5 : 0x1F |
| 0x30 Dev18.0 INTA : 0x12 |
| 0x31 Dev18.2 INTB : 0x1F |
| 0x32 Dev19.0 INTA : 0x12 |
| 0x33 Dev19.2 INTB : 0x1F |
| 0x34 Dev22.0 INTA : 0x12 |
| 0x35 Dev22.2 INTB : 0x1F |
| 0x36 Dev20.5 INTC : 0x1F |
| 0x40 RSVD : 0x1F |
| 0x41 SATA : 0x13 |
| 0x60 RSVD : 0x00 |
| 0x61 RSVD : 0x00 |
| 0x62 GPIO : 0x1F |
| PCI_CFG IRQ: Write PCI config space IRQ assignments |
| PCI IRQ: Found device 0:00.02 using PIN A |
| PCI Devfn (0x2) not found in pirq_data table |
| PCI IRQ: Found device 0:02.02 using PIN B |
| Found this device in pirq_data table entry 3 |
| Orig INT_PIN : 2 (PIN B) |
| PCI_INTR idx : 0x02 (INTC# ) |
| INT_LINE : 0x5 (IRQ 5) |
| PCI IRQ: Found device 0:02.03 using PIN C |
| Found this device in pirq_data table entry 4 |
| Orig INT_PIN : 3 (PIN C) |
| PCI_INTR idx : 0x00 (INTA# ) |
| INT_LINE : 0x3 (IRQ 3) |
| PCI IRQ: Found device 0:02.04 using PIN D |
| PCI Devfn (0x14) not found in pirq_data table |
| PCI IRQ: Found device 0:02.05 using PIN A |
| PCI Devfn (0x15) not found in pirq_data table |
| PCI IRQ: Found device 0:10.00 using PIN A |
| Found this device in pirq_data table entry 5 |
| Orig INT_PIN : 1 (PIN A) |
| PCI_INTR idx : 0x02 (INTC# ) |
| INT_LINE : 0x5 (IRQ 5) |
| PCI IRQ: Found device 0:11.00 using PIN A |
| Found this device in pirq_data table entry 6 |
| Got IRQ 0x1F (disabled), perhaps this device was defined wrong? |
| PCI IRQ: Found device 0:13.00 using PIN A |
| Found this device in pirq_data table entry 9 |
| Orig INT_PIN : 1 (PIN A) |
| PCI_INTR idx : 0x32 (Dev19.0 INTA) |
| INT_LINE : 0x5 (IRQ 5) |
| PCI IRQ: Found device 0:14.07 using PIN A |
| Found this device in pirq_data table entry 13 |
| Got IRQ 0x1F (disabled), perhaps this device was defined wrong? |
| PCI IRQ: Found device 1:00.00 using PIN A |
| With INT_PIN swizzled to PIN A |
| Attached to bridge device 0:02h.02h |
| Found this device in pirq_data table entry 3 |
| Orig INT_PIN : 1 (PIN A) |
| PCI_INTR idx : 0x01 (INTB# ) |
| INT_LINE : 0x3 (IRQ 3) |
| PCI IRQ: Found device 2:00.00 using PIN A |
| With INT_PIN swizzled to PIN A |
| Attached to bridge device 0:02h.03h |
| Found this device in pirq_data table entry 4 |
| Orig INT_PIN : 1 (PIN A) |
| PCI_INTR idx : 0x02 (INTC# ) |
| INT_LINE : 0x5 (IRQ 5) |
| PCI IRQ: Found device 3:00.00 using PIN A |
| With INT_PIN swizzled to PIN A |
| Attached to bridge device 0:02h.04h |
| PCI Devfn (0x14) not found in pirq_data table |
| PCI IRQ: Found device 4:00.00 using PIN A |
| With INT_PIN swizzled to PIN A |
| Attached to bridge device 0:02h.05h |
| PCI Devfn (0x15) not found in pirq_data table |
| PCI_CFG IRQ: Finished writing PCI config space IRQ assignments |
| BS: BS_DEV_ENABLE entry times (exec / console): 24 / 4 ms |
| Enabling resources... |
| PCI: 00:00.0 cmd <- 04 |
| PCI: 00:00.2 subsystem <- 1022/1410 |
| PCI: 00:00.2 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 1022/1410 |
| PCI: 00:02.0 cmd <- 00 |
| PCI: 00:02.2 bridge ctrl <- 0013 |
| PCI: 00:02.2 cmd <- 07 |
| PCI: 00:02.3 bridge ctrl <- 0013 |
| PCI: 00:02.3 cmd <- 07 |
| PCI: 00:02.4 bridge ctrl <- 0013 |
| PCI: 00:02.4 cmd <- 07 |
| PCI: 00:02.5 bridge ctrl <- 0013 |
| PCI: 00:02.5 cmd <- 06 |
| PCI: 00:08.0 subsystem <- 1022/1410 |
| PCI: 00:08.0 cmd <- 02 |
| PCI: 00:10.0 subsystem <- 1022/1410 |
| PCI: 00:10.0 cmd <- 02 |
| PCI: 00:11.0 cmd <- 07 |
| PCI: 00:13.0 subsystem <- 1022/1410 |
| PCI: 00:13.0 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 1022/1410 |
| PCI: 00:14.0 cmd <- 403 |
| PCI: 00:14.3 subsystem <- 1022/1410 |
| PCI: 00:14.3 cmd <- 0f |
| hudson lpc decode:PNP: 002e.2, base=0x000003f8, end=0x000003ff |
| hudson lpc decode:PNP: 002e.3, base=0x000002f8, end=0x000002ff |
| hudson lpc decode:PNP: 002e.10, base=0x000003e8, end=0x000003ef |
| hudson lpc decode:PNP: 002e.11, base=0x000002e8, end=0x000002ef |
| hudson lpc decode:PNP: 002e.108, base=0x00000220, end=0x00000227 |
| PCI: 00:14.7 cmd <- 06 |
| PCI: 00:18.0 subsystem <- 1022/1410 |
| PCI: 00:18.0 cmd <- 00 |
| PCI: 00:18.1 subsystem <- 1022/1410 |
| PCI: 00:18.1 cmd <- 00 |
| PCI: 00:18.2 subsystem <- 1022/1410 |
| PCI: 00:18.2 cmd <- 00 |
| PCI: 00:18.3 subsystem <- 1022/1410 |
| PCI: 00:18.3 cmd <- 00 |
| PCI: 00:18.4 subsystem <- 1022/1410 |
| PCI: 00:18.4 cmd <- 00 |
| PCI: 00:18.5 subsystem <- 1022/1410 |
| PCI: 00:18.5 cmd <- 00 |
| PCI: 01:00.0 cmd <- 03 |
| PCI: 02:00.0 cmd <- 03 |
| PCI: 03:00.0 cmd <- 03 |
| PCI: 04:00.0 cmd <- 02 |
| done. |
| BS: BS_DEV_ENABLE run times (exec / console): 0 / 23 ms |
| Found TPM SLB9665 TT 2.0 by Infineon |
| tlcl_send_startup: Startup return code is 0 |
| TPM: setup succeeded |
| BS: BS_DEV_INIT entry times (exec / console): 4 / 5 ms |
| Initializing devices... |
| CPU_CLUSTER: 0 init |
| start_eip=0x00001000, code_size=0x00000031 |
| Initializing CPU #0 |
| CPU: vendor AMD device 730f01 |
| CPU: family 16, model 30, stepping 01 |
| Model 16 Init. |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Enabling cache |
| Setting up local APIC... |
| apic_id: 0x00 done. |
| siblings = 03, FMAP: area COREBOOT found @ 200 (8388096 bytes) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: 'cpu_microcode_blob.bin' not found. |
| cpu_microcode_blob.bin not found. Skipping updates. |
| CPU #0 initialized |
| CPU1: stack_base 0xcfef6000, stack_top 0xcfef6ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 1. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #1 |
| CPU: vendor AMD device 730f01 |
| CPU: family 16, model 30, stepping 01 |
| Model 16 Init. |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Enabling cache |
| Setting up local APIC... |
| apic_id: 0x01 done. |
| siblings = 03, FMAP: area COREBOOT found @ 200 (8388096 bytes) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: 'cpu_microcode_blob.bin' not found. |
| cpu_microcode_blob.bin not found. Skipping updates. |
| CPU #1 initialized |
| CPU2: stack_base 0xcfef5000, stack_top 0xcfef5ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 2. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 2. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #2 |
| CPU: vendor AMD device 730f01 |
| CPU: family 16, model 30, stepping 01 |
| Model 16 Init. |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Enabling cache |
| Setting up local APIC... |
| apic_id: 0x02 done. |
| siblings = 03, FMAP: area COREBOOT found @ 200 (8388096 bytes) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: 'cpu_microcode_blob.bin' not found. |
| cpu_microcode_blob.bin not found. Skipping updates. |
| CPU #2 initialized |
| CPU3: stack_base 0xcfef4000, stack_top 0xcfef4ff8 |
| Asserting INIT. |
| Waiting for send to finish... |
| +Deasserting INIT. |
| Waiting for send to finish... |
| +#startup loops: 2. |
| Sending STARTUP #1 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +Sending STARTUP #2 to 3. |
| After apic_write. |
| Startup point 1. |
| Waiting for send to finish... |
| +After Startup. |
| Initializing CPU #3 |
| Waiting for 1 CPUS to stop |
| CPU: vendor AMD device 730f01 |
| CPU: family 16, model 30, stepping 01 |
| Model 16 Init. |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Enabling cache |
| Setting up local APIC... |
| apic_id: 0x03 done. |
| siblings = 03, FMAP: area COREBOOT found @ 200 (8388096 bytes) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: 'cpu_microcode_blob.bin' not found. |
| cpu_microcode_blob.bin not found. Skipping updates. |
| CPU #3 initialized |
| All AP CPUs stopped (1914 loops) |
| CPU0: stack: 0xcfef7000 - 0xcfef8000, lowest used address 0xcfef78d4, stack used: 1836 bytes |
| CPU1: stack: 0xcfef6000 - 0xcfef7000, lowest used address 0xcfef6cac, stack used: 852 bytes |
| CPU2: stack: 0xcfef5000 - 0xcfef6000, lowest used address 0xcfef5cac, stack used: 852 bytes |
| CPU3: stack: 0xcfef4000 - 0xcfef5000, lowest used address 0xcfef4cac, stack used: 852 bytes |
| CPU_CLUSTER: 0 init finished in 186 msecs |
| PCI: 00:00.0 init |
| IOAPIC: Initializing IOAPIC at 0xfec20000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x05 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x05000000 |
| reg 0x0001: 0x001f8021 |
| reg 0x0002: 0x00000000 |
| IOAPIC: 32 interrupts |
| IOAPIC: Enabling interrupts on FSB |
| IOAPIC: reg 0x00000000 value 0x00000000 0x00000700 |
| IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000018 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000019 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001a value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001b value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001c value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001d value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001e value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000001f value 0x00000000 0x00010000 |
| PCI: 00:00.0 init finished in 84 msecs |
| PCI: 00:02.0 init |
| PCI: 00:02.0 init finished in 0 msecs |
| PCI: 00:08.0 init |
| PCI: 00:08.0 init finished in 0 msecs |
| PCI: 00:10.0 init |
| PCI: 00:10.0 init finished in 0 msecs |
| PCI: 00:11.0 init |
| PCI: 00:11.0 init finished in 0 msecs |
| PCI: 00:13.0 init |
| PCI: 00:13.0 init finished in 0 msecs |
| PCI: 00:14.0 init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x04 |
| IOAPIC: Dumping registers |
| reg 0x0000: 0x04000000 |
| reg 0x0001: 0x00178021 |
| reg 0x0002: 0x04000000 |
| IOAPIC: 24 interrupts |
| IOAPIC: Enabling interrupts on FSB |
| IOAPIC: reg 0x00000000 value 0x00000000 0x00000700 |
| IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 |
| IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 |
| IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 |
| PCI: 00:14.0 init finished in 66 msecs |
| PCI: 00:14.3 init |
| RTC Init |
| PCI: 00:14.3 init finished in 0 msecs |
| PCI: 00:14.7 init |
| PCI: 00:14.7 init finished in 0 msecs |
| PCI: 00:18.0 init |
| PCI: 00:18.0 init finished in 0 msecs |
| PCI: 00:18.1 init |
| PCI: 00:18.1 init finished in 0 msecs |
| PCI: 00:18.2 init |
| PCI: 00:18.2 init finished in 0 msecs |
| PCI: 00:18.3 init |
| PCI: 00:18.3 init finished in 0 msecs |
| PCI: 00:18.4 init |
| PCI: 00:18.4 init finished in 0 msecs |
| PCI: 00:18.5 init |
| PCI: 00:18.5 init finished in 0 msecs |
| PCI: 01:00.0 init |
| PCI: 01:00.0 init finished in 0 msecs |
| PCI: 02:00.0 init |
| PCI: 02:00.0 init finished in 0 msecs |
| PCI: 03:00.0 init |
| PCI: 03:00.0 init finished in 0 msecs |
| PCI: 04:00.0 init |
| PCI: 04:00.0 init finished in 0 msecs |
| PNP: 002e.2 init |
| PNP: 002e.2 init finished in 0 msecs |
| PNP: 002e.3 init |
| PNP: 002e.3 init finished in 0 msecs |
| PNP: 002e.10 init |
| PNP: 002e.10 init finished in 0 msecs |
| PNP: 002e.11 init |
| PNP: 002e.11 init finished in 0 msecs |
| PNP: 002e.108 init |
| WARNING: GPIO IO port configured, but no GPIO enabled. Disabling...PNP: 002e.108 init finished in 2 msecs |
| PNP: 002e.f init |
| PNP: 002e.f init finished in 0 msecs |
| PNP: 002e.14 init |
| PNP: 002e.14 init finished in 0 msecs |
| Devices initialized |
| Show all devs... After init. |
| Root Device: enabled 1 |
| CPU_CLUSTER: 0: enabled 1 |
| DOMAIN: 0000: enabled 1 |
| APIC: 00: enabled 1 |
| PCI: 00:00.0: enabled 1 |
| PCI: 00:00.2: enabled 1 |
| PCI: 00:01.0: enabled 0 |
| PCI: 00:01.1: enabled 0 |
| PCI: 00:02.0: enabled 1 |
| PCI: 00:02.1: enabled 0 |
| PCI: 00:02.2: enabled 1 |
| PCI: 00:02.3: enabled 1 |
| PCI: 00:02.4: enabled 1 |
| PCI: 00:02.5: enabled 1 |
| PCI: 00:08.0: enabled 1 |
| PCI: 00:10.0: enabled 1 |
| PCI: 00:11.0: enabled 1 |
| PCI: 00:12.0: enabled 0 |
| PCI: 00:13.0: enabled 1 |
| PCI: 00:14.0: enabled 1 |
| PCI: 00:14.3: enabled 1 |
| PCI: 00:14.7: enabled 1 |
| PCI: 00:16.0: enabled 0 |
| PCI: 00:18.0: enabled 1 |
| PCI: 00:18.1: enabled 1 |
| PCI: 00:18.2: enabled 1 |
| PCI: 00:18.3: enabled 1 |
| PCI: 00:18.4: enabled 1 |
| PCI: 00:18.5: enabled 1 |
| PNP: 002e.0: enabled 0 |
| PNP: 002e.2: enabled 1 |
| PNP: 002e.3: enabled 1 |
| PNP: 002e.10: enabled 1 |
| PNP: 002e.11: enabled 1 |
| PNP: 002e.8: enabled 0 |
| PNP: 002e.108: enabled 0 |
| PNP: 002e.7: enabled 0 |
| PNP: 002e.107: enabled 0 |
| PNP: 002e.607: enabled 0 |
| PNP: 002e.f: enabled 1 |
| PNP: 0c31.0: enabled 1 |
| APIC: 01: enabled 1 |
| APIC: 02: enabled 1 |
| APIC: 03: enabled 1 |
| PCI: 01:00.0: enabled 1 |
| PCI: 02:00.0: enabled 1 |
| PCI: 03:00.0: enabled 1 |
| PCI: 04:00.0: enabled 1 |
| PNP: 002e.14: enabled 1 |
| BS: BS_DEV_INIT run times (exec / console): 97 / 368 ms |
| Finalize devices... |
| PCI: 00:14.3 final |
| Devices finalized |
| BS: BS_POST_DEVICE run times (exec / console): 0 / 3 ms |
| |
| APIC 00: ** Enter AmdInitLate [00025000] |
| AmdInitLate() returned AGESA_UNSUPPORTED |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = 1180000, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = 1080000, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = 1040000, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = a008, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = a00f, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = a00e, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| |
| EventLog: EventClass = 2, EventInfo = 8040100. |
| Param1 = a010, Param2 = 0. |
| Param3 = 0, Param4 = 0. |
| APIC 00: Heap in SystemMem (4) at 0x10000014 |
| APIC 00: ** Exit AmdInitLate [00025000] |
| BS: BS_POST_DEVICE exit times (exec / console): 9 / 41 ms |
| Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done. |
| Writing IRQ routing tables to 0xcfec8000...write_pirq_routing_table done. |
| PIRQ table: 48 bytes. |
| Wrote the mp table end at: 0x000f0410 - 0x000f05dc |
| Wrote the mp table end at: 0xcfec7010 - 0xcfec71dc |
| MP table: 476 bytes. |
| FMAP: area COREBOOT found @ 200 (8388096 bytes) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 15000 size 17ef |
| FMAP: area COREBOOT found @ 200 (8388096 bytes) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at cfea3000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| pm_base: 0x0800 |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| \_SB.PCI0.LIBR.TPM.TPM: LPC TPM PNP: 0c31.0 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TPM2 |
| TPM2 log created at 0xcfe93000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = cfea4e90 |
| ACPI: added table 6/32, length now 60 |
| ACPI: * IVRS at cfea5060 |
| ACPI: added table 7/32, length now 64 |
| ACPI: * SRAT at cfea5130 |
| AGESA SRAT table NULL. Skipping. |
| ACPI: * SLIT at cfea5130 |
| AGESA SLIT table NULL. Skipping. |
| ACPI: * AGESA ALIB SSDT at cfea5130 |
| ACPI: added table 8/32, length now 68 |
| ACPI: * SSDT at cfea99e0 |
| ACPI: added table 9/32, length now 72 |
| ACPI: * SSDT for PState at cfeaa1a8 |
| ACPI: * HPET |
| ACPI: added table 10/32, length now 76 |
| ACPI: done. |
| ACPI tables: 29168 bytes. |
| smbios_write_tables: cfe92000 |
| Root Device (PC Engines apu2) |
| SMBIOS tables: 587 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 9ff1 |
| Writing coreboot table at 0xcfec9000 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000c0000-00000000cfe91fff: RAM |
| 3. 00000000cfe92000-00000000cfed1fff: CONFIGURATION TABLES |
| 4. 00000000cfed2000-00000000cffbcfff: RAMSTAGE |
| 5. 00000000cffbd000-00000000cfffffff: CONFIGURATION TABLES |
| 6. 00000000f8000000-00000000fbffffff: RESERVED |
| 7. 00000000fed40000-00000000fed44fff: RESERVED |
| 8. 0000000100000000-000000012effffff: RAM |
| FMAP: area COREBOOT found @ 200 (8388096 bytes) |
| Wrote coreboot table at: 0xcfec9000, 0x2c4 bytes, checksum d710 |
| coreboot table: 732 bytes. |
| IMD ROOT 0. 0xcffff000 0x00001000 |
| IMD SMALL 1. 0xcfffe000 0x00001000 |
| CONSOLE 2. 0xcffde000 0x00020000 |
| ROMSTG STCK 3. 0xcffc6000 0x00018000 |
| AFTER CAR 4. 0xcffbd000 0x00009000 |
| RAMSTAGE 5. 0xcfed1000 0x000ec000 |
| COREBOOT 6. 0xcfec9000 0x00008000 |
| IRQ TABLE 7. 0xcfec8000 0x00001000 |
| SMP TABLE 8. 0xcfec7000 0x00001000 |
| ACPI 9. 0xcfea3000 0x00024000 |
| TPM2 TCGLOG10. 0xcfe93000 0x00010000 |
| SMBIOS 11. 0xcfe92000 0x00000800 |
| IMD small region: |
| IMD ROOT 0. 0xcfffec00 0x00000400 |
| FMAP 1. 0xcfffeb40 0x000000b6 |
| ROMSTAGE 2. 0xcfffeb20 0x00000004 |
| BS: BS_WRITE_TABLES run times (exec / console): 1 / 129 ms |
| FMAP: area COREBOOT found @ 200 (8388096 bytes) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset 1a6c0 size 10f7b |
| Checking segment from ROM address 0xff81a8f8 |
| Checking segment from ROM address 0xff81a914 |
| Loading segment from ROM address 0xff81a8f8 |
| code (compression=1) |
| New segment dstaddr 0x000dfc60 memsize 0x203a0 srcaddr 0xff81a930 filesize 0x10f43 |
| Loading Segment: addr: 0x000dfc60 memsz: 0x00000000000203a0 filesz: 0x0000000000010f43 |
| using LZMA |
| [ 0x000dfc60, 00100000, 0x00100000) <- ff81a930 |
| Loading segment from ROM address 0xff81a914 |
| Entry Point 0x000fd263 |
| Loaded segments |
| BS: BS_PAYLOAD_LOAD run times (exec / console): 22 / 26 ms |
| Jumping to boot code at 0x000fd263(0xcfec9000) |
| CPU0: stack: 0xcfef7000 - 0xcfef8000, lowest used address 0xcfef78d4, stack used: 1836 bytes |
| SeaBIOS (version rel-1.13.0-0-gf21b5a4) |
| BUILD: gcc: (coreboot toolchain v1.52 June 11th, 2018) 8.1.0 binutils: (GNU Binutils) 2.30 |
| Found coreboot cbmem console @ cffde000 |
| Found mainboard PC Engines apu2 |
| Relocating init from 0x000e1340 to 0xcfe44d40 (size 53792) |
| Found CBFS header at 0xff800238 |
| multiboot: eax=cfef2a00, ebx=cfef29c4 |
| Found 24 PCI devices (max PCI bus is 04) |
| Copying SMBIOS entry point from 0xcfe92000 to 0x000f6280 |
| Copying ACPI RSDP from 0xcfea3000 to 0x000f6250 |
| Copying MPTABLE from 0xcfec7000/cfec7010 to 0x000f6070 |
| Copying PIR from 0xcfec8000 to 0x000f6040 |
| Using pmtimer, ioport 0x818 |
| Scan for VGA option rom |
| No VGA found, scan for other display |
| sercon: using ioport 0x3f8 |
| sercon: configuring as primary display |
| Turning on vga text mode console |
| XHCI init on dev 00:10.0: regs @ 0xf7ea2000, 4 ports, 32 slots, 32 byte contexts |
| XHCI extcap 0x1 @ 0xf7ea2500 |
| XHCI protocol USB 3.00, 2 ports (offset 1), def 0 |
| XHCI protocol USB 2.00, 2 ports (offset 3), def 10 |
| XHCI extcap 0xa @ 0xf7ea2540 |
| EHCI init on dev 00:13.0 (regs=0xf7ea6020) |
| WARNING - Timeout at i8042_flush:71! |
| AHCI controller at 00:11.0, iobase 0xf7ea5000, irq 0 |
| Searching bootorder for: /pci@i0cf8/*@14,7 |
| Found 0 lpt ports |
| Found 4 serial ports |
| Searching bootorder for: /rom@img/memtest |
| Searching bootorder for: /pci@i0cf8/*@11/drive@0/disk@0 |
| AHCI/0: Set transfer mode to UDMA-6 |
| Searching bios-geometry for: /pci@i0cf8/*@11/drive@0/disk@0 |
| AHCI/0: registering: "AHCI/0: 30GB SATA Flash Drive ATA-11 Hard-Disk (28626 MiBytes)" |
| WARNING - Timeout at wait_bit:302! |
| Found sdcard at 0xf7ea7000: SD card SC16G 15193MiB |
| Initialized USB HUB (0 ports used) |
| All threads complete. |
| Scan for option roms |
| Running option rom at c000:0003 |
| pmm call arg1=1 |
| pmm call arg1=0 |
| pmm call arg1=1 |
| pmm call arg1=0 |
| Running option rom at c100:0003 |
| pmm call arg1=1 |
| pmm call arg1=1 |
| Running option rom at c200:0003 |
| pmm call arg1=1 |
| pmm call arg1=1 |
| Searching bootorder for: /pci@i0cf8/pci-bridge@2,2/*@0 |
| Searching bootorder for: /pci@i0cf8/pci-bridge@2,3/*@0 |
| Searching bootorder for: /pci@i0cf8/pci-bridge@2,4/*@0 |
| Searching bootorder for: HALT |
| drive 0x000f5fa0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=58626288 |
| drive 0x000f5ff0: PCHS=0/0/0 translation=lba LCHS=1024/255/63 s=31116288 |
| Space available for UMB: c3000-ed000, f5aa0-f5fa0 |
| Returned 258048 bytes of ZoneHigh |
| e820 map has 8 items: |
| 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 3: 0000000000100000 - 00000000cfe91000 = 1 RAM |
| 4: 00000000cfe91000 - 00000000d0000000 = 2 RESERVED |
| 5: 00000000f8000000 - 00000000fc000000 = 2 RESERVED |
| 6: 00000000fed40000 - 00000000fed45000 = 2 RESERVED |
| 7: 0000000100000000 - 000000012f000000 = 1 RAM |
| enter handle_19: |
| NULL |
| Booting from c000:0385 |
| |