

coreboot-4.1-657-g2f225b9-dirty Thu Oct  1 13:41:10 UTC 2015 romstage starting...
Setting up static southbridge registers... done.
Disabling Watchdog reboot... done.
Setting up static northbridge registers... done.
Initializing Graphics...
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
Back from sandybridge_early_initialization()
SMBus controller enabled.
CPU id(306a9): Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz
AES supported, TXT supported, VT supported
PCH type: QM67, device id: 1c4f, rev id 5
Intel ME early init
Intel ME firmware is ready
ME: Requested 32MB UMA
Starting native Platform init
  Row    addr bits  : 15
  Column addr bits  : 10
  Number of ranks   : 2
  DIMM Capacity     : 4096 MB
  CAS latencies     : 5 6 7 8 9
  tCKmin            :   1.500 ns
  tAAmin            :  13.125 ns
  tWRmin            :  15.000 ns
  tRCDmin           :  13.125 ns
  tRRDmin           :   6.000 ns
  tRPmin            :  13.125 ns
  tRASmin           :  36.000 ns
  tRCmin            :  49.125 ns
  tRFCmin           : 160.000 ns
  tWTRmin           :   7.500 ns
  tRTPmin           :   7.500 ns
  tFAWmin           :  30.000 ns
rankmap[0] = 0x3
 PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy...done
MCU frequency is set at : 666 MHz
Selected DRAM frequency: 666 MHz
Minimum  CAS latency   : 9T
Selected CAS latency   : 9T
Selected CWL latency   : 7T
Selected tRCD          : 9T
Selected tRP           : 9T
Selected tRAS          : 24T
Selected tWR           : 10T
Selected tFAW          : 20T
Selected tRRD          : 4T
Selected tRTP          : 5T
Selected tWTR          : 5T
Selected tRFC          : 107T
[c14] = 3000000
[320c] = 4024000
[d14] = 0
[330c] = 4000
[4000] = 187999
[4004] = ca145454
[400c] = a0690
[4298] = 5a6b1450
[42a4] = 41f97200
[4400] = 187999
[4404] = ca145454
[440c] = a0690
[4698] = 5a6b1450
[46a4] = 41f97200
Done dimm mapping
PCI:[a0] = 0
PCI:[a4] = 1
PCI:[bc] = c2a00000
PCI:[a8] = 3b600000
PCI:[ac] = 1
PCI:[b8] = c0000000
PCI:[b0] = c0a00000
PCI:[b4] = c0800000
PCI:[7c] = 7f
PCI:[70] = fe000000
PCI:[74] = 0
PCI:[78] = fe000c00
Done memory map
RCOMP...done
COMP2 done
COMP1 done
FORCE RCOMP and wait 20us...done
Done io registers
Done jedec reset
Done MRS commands
High adjust 0:0000ffffffffffff
High adjust 1:0000ffffffffffff
High adjust 2:0000ffffffffffff
High adjust 3:0000ffffffffffff
High adjust 4:00000000ffffffff
High adjust 5:0000ffffffffffff
High adjust 6:00000000ffffffff
High adjust 7:0000ffffffffffff
High adjust 0:0000ffffffffffff
High adjust 1:0000ffffffffffff
High adjust 2:0000ffffffffffff
High adjust 3:0000ffffffffffff
High adjust 4:00000000ffffffff
High adjust 5:0000ffffffffffff
High

*** Log truncated, 2487 characters dropped. ***

Relocate MRC DATA from feffa79c to bffdc000 (1040 bytes)
CBFS provider active.
CBFS @ 700000 size ff440
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 41e40 size 14720
'fallback/ramstage' located at offset: 741e78 size: 14720
Capability: type 0x01 @ 0x50
Capability: type 0x0a @ 0x58


coreboot-4.1-657-g2f225b9-dirty Thu Oct  1 13:41:10 UTC 2015 ramstage starting...
Moving GDT to bfffe7c0...ok
Normal boot.
BS: Entering BS_PRE_DEVICE state.
BS: Exiting BS_PRE_DEVICE state.
BS: BS_PRE_DEVICE times (us): entry 0 run 14 exit 0
BS: Entering BS_DEV_INIT_CHIPS state.
BS: Exiting BS_DEV_INIT_CHIPS state.
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 17 exit 0
BS: Entering BS_DEV_ENUMERATE state.
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:16.0: enabled 0
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 0
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 0
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 0c31.0: enabled 1
PNP: 00ff.2: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:5c: enabled 1
I2C: 00:5d: enabled 1
I2C: 00:5e: enabled 1
I2C: 00:5f: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
  APIC: acac: enabled 0
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:01.0: enabled 0
  PCI: 00:02.0: enabled 1
  PCI: 00:16.0: enabled 0
  PCI: 00:16.1: enabled 0
  PCI: 00:16.2: enabled 0
  PCI: 00:16.3: enabled 0
  PCI: 00:19.0: enabled 1
  PCI: 00:1a.0: enabled 1
  PCI: 00:1b.0: enabled 1
  PCI: 00:1c.0: enabled 0
  PCI: 00:1c.1: enabled 1
  PCI: 00:1c.2: enabled 0
  PCI: 00:1c.3: enabled 1
  PCI: 00:1c.4: enabled 1
   PCI: 00:00.0: enabled 1
  PCI: 00:1c.5: enabled 0
  PCI: 00:1c.6: enabled 0
  PCI: 00:1c.7: enabled 0
  PCI: 00:1d.0: enabled 1
  PCI: 00:1e.0: enabled 0
  PCI: 00:1f.0: enabled 1
   PNP: 00ff.1: enabled 1
   PNP: 0c31.0: enabled 1
   PNP: 00ff.2: enabled 1
  PCI: 00:1f.2: enabled 1
  PCI: 00:1f.3: enabled 1
   I2C: 00:54: enabled 1
   I2C: 00:55: enabled 1
   I2C: 00:56: enabled 1
   I2C: 00:57: enabled 1
   I2C: 00:5c: enabled 1
   I2C: 00:5d: enabled 1
   I2C: 00:5e: enabled 1
   I2C: 00:5f: enabled 1
  PCI: 00:1f.5: enabled 0
  PCI: 00:1f.6: enabled 1
Root Device scanning...
root_dev_scan_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0154] ops
Normal boot.
PCI: 00:00.0 [8086/0154] enabled
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/0166] enabled
PCI: 00:16.0: Disabling device
PCI: 00:16.0 [8086/1c3a] ops
PCI: 00:16.0 [8086/1c3a] disabled
PCI: 00:16.1: Disabling device
PCI: 00:16.2: Disabling device
PCI: 00:16.3: Disabling device
PCI: 00:19.0 [8086/1502] enabled
PCI: 00:1a.0 [8086/0000] ops
PCI: 00:1a.0 [8086/1c2d] enabled
PCI: 00:1b.0 [8086/0000] ops
PCI: 00:1b.0 [8086/1c20] enabled
PCH: PCIe Root Port coalescing is enabled
PCI: 00:1c.0: Disabling device
PCI: 00:1c.0: check set enabled
PCH: Remap PCIe function 1 to 0
PCI: 00:1c.1 [8086/0000] bus ops
PCI: 00:1c.1 [8086/1c12] enabled
PCI: 00:1c.2: Disabling device
PCH: Remap PCIe function 3 to 0
PCI: 00:1c.3 [8086/0000] bus ops
PCI: 00:1c.3 [8086/1c16] enabled
PCH: Remap PCIe function 4 to 0
PCI: 00:1c.4 [8086/0000] bus ops
PCI: 00:1c.4 [8086/1c18] enabled
PCI: 00:1c.5: Disabling device
PCI: 00:1c.6: Disabling device
PCI: 00:1c.6 [8086/0000] bus ops
PCI: 00:1c.6 [8086/1c1c] disabled
PCI: 00:1c.7: Disabling device
PCH: RPFN 0x76543210 -> 0xfed31a0c
PCH: PCIe map 1c.0 -> 1c.4
PCH: PCIe map 1c.1 -> 1c.0
PCH: PCIe map 1c.3 -> 1c.1
PCH: PCIe map 1c.4 -> 1c.3
PCI: 00:1d.0 [8086/0000] ops
PCI: 00:1d.0 [8086/1c26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/1c4f] enabled
PCI: 00:1f.2 [8086/0000] ops
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
PCI: 00:1f.2 [8086/1c01] enabled
PCI: 00:1f.3 [8086/0000] bus ops
PCI: 00:1f.3 [8086/1c22] enabled
PCI: 00:1f.5: Disabling device
PCI: 00:1f.6 [8086/1c24] enabled
PCI: 00:1c.0 scanning...
do_pci_scan_bridge for PCI: 00:1c.0
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [8086/0000] ops
PCI: 01:00.0 [8086/0085] enabled
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L1
PCI: 00:1c.1 scanning...
do_pci_scan_bridge for PCI: 00:1c.1
PCI: pci_scan_bus for bus 02
PCI: 00:1c.3 scanning...
do_pci_scan_bridge for PCI: 00:1c.3
PCI: pci_scan_bus for bus 03
PCI: 03:00.0 [1180/0000] ops
PCI: 03:00.0 [1180/e823] enabled
Capability: type 0x05 @ 0x50
Capability: type 0x01 @ 0x78
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
PCI: 00:1f.0 scanning...
scan_lpc_bus for PCI: 00:1f.0
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
PNP: 00ff.1 enabled
PNP: 0c31.0 enabled
recv_ec_data: 0x38
recv_ec_data: 0x33
recv_ec_data: 0x48
recv_ec_data: 0x54
recv_ec_data: 0x32
recv_ec_data: 0x37
recv_ec_data: 0x57
recv_ec_data: 0x57
recv_ec_data: 0x14
recv_ec_data: 0x03
recv_ec_data: 0x10
recv_ec_data: 0x11
EC Firmware ID 83HT27WW-3.20, Version 1.01B
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
WARNING: No CMOS option 'low_battery_beep'.
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
recv_ec_data: 0x00
recv_ec_data: 0x10
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
recv_ec_data: 0x20
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
recv_ec_data: 0x30
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
recv_ec_data: 0x00
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
recv_ec_data: 0xa7
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
recv_ec_data: 0xe2
recv_ec_data: 0x70
PNP: 00ff.2 enabled
scan_lpc_bus for PCI: 00:1f.0 done
PCI: 00:1f.3 scanning...
scan_smbus for PCI: 00:1f.3
smbus: PCI: 00:1f.3[0]->I2C: 01:54 enabled
smbus: PCI: 00:1f.3[0]->I2C: 01:55 enabled
smbus: PCI: 00:1f.3[0]->I2C: 01:56 enabled
smbus: PCI: 00:1f.3[0]->I2C: 01:57 enabled
smbus: PCI: 00:1f.3[0]->I2C: 01:5c enabled
smbus: PCI: 00:1f.3[0]->I2C: 01:5d enabled
smbus: PCI: 00:1f.3[0]->I2C: 01:5e enabled
smbus: PCI: 00:1f.3[0]->I2C: 01:5f enabled
scan_smbus for PCI: 00:1f.3 done
root_dev_scan_bus for Root Device done
done
BS: Exiting BS_DEV_ENUMERATE state.
BS: BS_DEV_ENUMERATE times (us): entry 0 run 8339 exit 0
BS: Entering BS_DEV_RESOURCES state.
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
PCI: 00:1a.0 EHCI BAR hook registered
PCI: 00:1c.0 read_resources bus 1 link: 0
PCI: 00:1c.0 read_resources bus 1 link: 0 done
PCI: 00:1c.1 read_resources bus 2 link: 0
PCI: 00:1c.1 read_resources bus 2 link: 0 done
PCI: 00:1c.3 read_resources bus 3 link: 0
PCI: 00:1c.3 read_resources bus 3 link: 0 done
More than one caller of pci_ehci_read_resources from PCI: 00:1d.0
PCI: 00:1f.0 read_resources bus 0 link: 0
PNP: 00ff.1 missing read_resources
PNP: 0c31.0 missing read_resources
PNP: 00ff.2 missing read_resources
PCI: 00:1f.0 read_resources bus 0 link: 0 done
PCI: 00:1f.3 read_resources bus 1 link: 0
PCI: 00:1f.3 read_resources bus 1 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: acac
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf
   PCI: 00:01.0
   PCI: 00:02.0
   PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
   PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
   PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
   PCI: 00:16.0
   PCI: 00:16.1
   PCI: 00:16.2
   PCI: 00:16.3
   PCI: 00:19.0
   PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
   PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
   PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
   PCI: 00:1a.0
   PCI: 00:1a.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.4
   PCI: 00:1c.0 child on link 0 PCI: 01:00.0
   PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.2
   PCI: 00:1c.1
   PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:1c.3 child on link 0 PCI: 03:00.0
   PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 03:00.0
    PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
Unknown device path type: 0
    
Unknown device path type: 0
     resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10
Unknown device path type: 0
     resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14
Unknown device path type: 0
     resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18
   PCI: 00:1c.5
   PCI: 00:1c.6
   PCI: 00:1c.7
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1e.0
   PCI: 00:1f.0 child on link 0 PNP: 00ff.1
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
   PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
   PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
    PNP: 00ff.1
    PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
    PNP: 0c31.0
    PNP: 00ff.2
    PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
    PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
    PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1f.2 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 24
   PCI: 00:1f.3 child on link 0 I2C: 01:54
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.3 resource base 0 size 100 align 8 gran 8 limit ffffffffffffffff flags 201 index 10
    I2C: 01:54
    I2C: 01:55
    I2C: 01:56
    I2C: 01:57
    I2C: 01:5c
    I2C: 01:5d
    I2C: 01:5e
    I2C: 01:5f
   PCI: 00:1f.5
   PCI: 00:1f.6
   PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
Unknown device path type: 0
 18 *  [0x0 - 0xfff] io
PCI: 00:1c.3 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.3 1c *  [0x0 - 0xfff] io
PCI: 00:02.0 20 *  [0x1000 - 0x103f] io
PCI: 00:19.0 18 *  [0x1040 - 0x105f] io
PCI: 00:1f.2 20 *  [0x1060 - 0x107f] io
PCI: 00:1f.2 10 *  [0x1080 - 0x1087] io
PCI: 00:1f.2 18 *  [0x1088 - 0x108f] io
PCI: 00:1f.2 14 *  [0x1090 - 0x1093] io
PCI: 00:1f.2 1c *  [0x1094 - 0x1097] io
DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 *  [0x0 - 0x1fff] mem
PCI: 00:1c.0 mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
Unknown device path type: 0
 14 *  [0x0 - 0x7fffff] prefmem
PCI: 00:1c.3 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
Unknown device path type: 0
 10 *  [0x0 - 0x7fffff] mem
PCI: 03:00.0 10 *  [0x800000 - 0x8000ff] mem
PCI: 00:1c.3 mem: base: 800100 size: 900000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
PCI: 00:1c.3 20 *  [0x10000000 - 0x108fffff] mem
PCI: 00:1c.3 24 *  [0x10c00000 - 0x113fffff] prefmem
PCI: 00:02.0 10 *  [0x11400000 - 0x117fffff] mem
PCI: 00:1c.0 20 *  [0x11800000 - 0x118fffff] mem
PCI: 00:19.0 10 *  [0x11900000 - 0x1191ffff] mem
PCI: 00:1b.0 10 *  [0x11920000 - 0x11923fff] mem
PCI: 00:19.0 14 *  [0x11924000 - 0x11924fff] mem
PCI: 00:1f.6 10 *  [0x11925000 - 0x11925fff] mem
PCI: 00:1f.2 24 *  [0x11926000 - 0x119267ff] mem
PCI: 00:1a.0 10 *  [0x11926800 - 0x11926bff] mem
PCI: 00:1d.0 10 *  [0x11926c00 - 0x11926fff] mem
PCI: 00:1f.3 10 *  [0x11927000 - 0x119270ff] mem
DOMAIN: 0000 mem: base: 11927100 size: 11927100 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 cf base f0000000 limit f3ffffff mem (fixed)
constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed)
skipping PNP: 00ff.2@60 fixed resource, size=0!
skipping PNP: 00ff.2@62 fixed resource, size=0!
skipping PNP: 00ff.2@64 fixed resource, size=0!
skipping PNP: 00ff.2@66 fixed resource, size=0!
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000167c limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base d0000000 limit efffffff
Setting resources...
DOMAIN: 0000 io: base:167c size:1098 align:12 gran:0 limit:ffff
PCI: 00:1c.3 1c *  [0x2000 - 0x2fff] io
PCI: 00:02.0 20 *  [0x3000 - 0x303f] io
PCI: 00:19.0 18 *  [0x3040 - 0x305f] io
PCI: 00:1f.2 20 *  [0x3060 - 0x307f] io
PCI: 00:1f.2 10 *  [0x3080 - 0x3087] io
PCI: 00:1f.2 18 *  [0x3088 - 0x308f] io
PCI: 00:1f.2 14 *  [0x3090 - 0x3093] io
PCI: 00:1f.2 1c *  [0x3094 - 0x3097] io
DOMAIN: 0000 io: next_base: 3098 size: 1098 align: 12 gran: 0 done
PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.3 io: base:2000 size:1000 align:12 gran:12 limit:2fff
Unknown device path type: 0
 18 *  [0x2000 - 0x2fff] io
PCI: 00:1c.3 io: next_base: 3000 size: 1000 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:d0000000 size:11927100 align:28 gran:0 limit:efffffff
PCI: 00:02.0 18 *  [0xd0000000 - 0xdfffffff] prefmem
PCI: 00:1c.3 20 *  [0xe0000000 - 0xe08fffff] mem
PCI: 00:1c.3 24 *  [0xe0c00000 - 0xe13fffff] prefmem
PCI: 00:02.0 10 *  [0xe1400000 - 0xe17fffff] mem
PCI: 00:1c.0 20 *  [0xe1800000 - 0xe18fffff] mem
PCI: 00:19.0 10 *  [0xe1900000 - 0xe191ffff] mem
PCI: 00:1b.0 10 *  [0xe1920000 - 0xe1923fff] mem
PCI: 00:19.0 14 *  [0xe1924000 - 0xe1924fff] mem
PCI: 00:1f.6 10 *  [0xe1925000 - 0xe1925fff] mem
PCI: 00:1f.2 24 *  [0xe1926000 - 0xe19267ff] mem
PCI: 00:1a.0 10 *  [0xe1926800 - 0xe1926bff] mem
PCI: 00:1d.0 10 *  [0xe1926c00 - 0xe1926fff] mem
PCI: 00:1f.3 10 *  [0xe1927000 - 0xe19270ff] mem
DOMAIN: 0000 mem: next_base: e1927100 size: 11927100 align: 28 gran: 0 done
PCI: 00:1c.0 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:1c.0 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 mem: base:e1800000 size:100000 align:20 gran:20 limit:e18fffff
PCI: 01:00.0 10 *  [0xe1800000 - 0xe1801fff] mem
PCI: 00:1c.0 mem: next_base: e1802000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.1 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:1c.1 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.1 mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:1c.1 mem: next_base: efffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.3 prefmem: base:e0c00000 size:800000 align:22 gran:20 limit:e13fffff
Unknown device path type: 0
 14 *  [0xe0c00000 - 0xe13fffff] prefmem
PCI: 00:1c.3 prefmem: next_base: e1400000 size: 800000 align: 22 gran: 20 done
PCI: 00:1c.3 mem: base:e0000000 size:900000 align:22 gran:20 limit:e08fffff
Unknown device path type: 0
 10 *  [0xe0000000 - 0xe07fffff] mem
PCI: 03:00.0 10 *  [0xe0800000 - 0xe08000ff] mem
PCI: 00:1c.3 mem: next_base: e0800100 size: 900000 align: 22 gran: 20 done
Root Device assign_resources, bus 0 link: 0
TOUUD 0x13b600000 TOLUD 0xc2a00000 TOM 0x100000000
MEBASE 0xfe000000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0xc0000000 size 8M
Available memory below 4GB: 3072M
Available memory above 4GB: 950M
Adding PCIe config bar base=0xf0000000 size=0x4000000
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:00.0 cf <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem<mmconfig>
PCI: 00:02.0 10 <- [0x00e1400000 - 0x00e17fffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io
PCI: 00:19.0 10 <- [0x00e1900000 - 0x00e191ffff] size 0x00020000 gran 0x11 mem
PCI: 00:19.0 14 <- [0x00e1924000 - 0x00e1924fff] size 0x00001000 gran 0x0c mem
PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io
PCI: 00:1a.0 EHCI Debug Port hook triggered
PCI: 00:1a.0 10 <- [0x00e1926800 - 0x00e1926bff] size 0x00000400 gran 0x0a mem
PCI: 00:1a.0 10 <- [0x00e1926800 - 0x00e1926bff] size 0x00000400 gran 0x0a mem
PCI: 00:1a.0 EHCI Debug Port relocated
PCI: 00:1b.0 10 <- [0x00e1920000 - 0x00e1923fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x00e1800000 - 0x00e18fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00e1800000 - 0x00e1801fff] size 0x00002000 gran 0x0d mem64
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.1 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:1c.3 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io
PCI: 00:1c.3 24 <- [0x00e0c00000 - 0x00e13fffff] size 0x00800000 gran 0x14 bus 03 prefmem
PCI: 00:1c.3 20 <- [0x00e0000000 - 0x00e08fffff] size 0x00900000 gran 0x14 bus 03 mem
PCI: 00:1c.3 assign_resources, bus 3 link: 0
PCI: 03:00.0 10 <- [0x00e0800000 - 0x00e08000ff] size 0x00000100 gran 0x08 mem
Unknown device path type: 0
 missing set_resources
PCI: 00:1c.3 assign_resources, bus 3 link: 0
PCI: 00:1d.0 10 <- [0x00e1926c00 - 0x00e1926fff] size 0x00000400 gran 0x0a mem
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PNP: 00ff.1 missing set_resources
PNP: 00ff.2 missing set_resources
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00e1926000 - 0x00e19267ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x00e1927000 - 0x00e19270ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.3 assign_resources, bus 1 link: 0
PCI: 00:1f.3 assign_resources, bus 1 link: 0
PCI: 00:1f.6 10 <- [0x00e1925000 - 0x00e1925fff] size 0x00001000 gran 0x0c mem64
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: acac
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 167c size 1098 align 12 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base d0000000 size 11927100 align 28 gran 0 limit efffffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
  DOMAIN: 0000 resource base 100000 size bff00000 align 0 gran 0 limit 0 flags e0004200 index 4
  DOMAIN: 0000 resource base 100000000 size 3b600000 align 0 gran 0 limit 0 flags e0004200 index 5
  DOMAIN: 0000 resource base c0000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
  DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7
  DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 8
  DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 9
  DOMAIN: 0000 resource base 20000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index a
  DOMAIN: 0000 resource base 40000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index b
   PCI: 00:00.0
   PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf
   PCI: 00:01.0
   PCI: 00:02.0
   PCI: 00:02.0 resource base e1400000 size 400000 align 22 gran 22 limit e17fffff flags 60000201 index 10
   PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 18
   PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20
   PCI: 00:16.0
   PCI: 00:16.1
   PCI: 00:16.2
   PCI: 00:16.3
   PCI: 00:19.0
   PCI: 00:19.0 resource base e1900000 size 20000 align 17 gran 17 limit e191ffff flags 60000200 index 10
   PCI: 00:19.0 resource base e1924000 size 1000 align 12 gran 12 limit e1924fff flags 60000200 index 14
   PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 18
   PCI: 00:1a.0
   PCI: 00:1a.0 resource base e1926800 size 400 align 10 gran 10 limit e1926bff flags 60000200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base e1920000 size 4000 align 14 gran 14 limit e1923fff flags 60000201 index 10
   PCI: 00:1c.4
   PCI: 00:1c.0 child on link 0 PCI: 01:00.0
   PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
   PCI: 00:1c.0 resource base e1800000 size 100000 align 20 gran 20 limit e18fffff flags 60080202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base e1800000 size 2000 align 13 gran 13 limit e1801fff flags 60000201 index 10
   PCI: 00:1c.2
   PCI: 00:1c.1
   PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
   PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20
   PCI: 00:1c.3 child on link 0 PCI: 03:00.0
   PCI: 00:1c.3 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
   PCI: 00:1c.3 resource base e0c00000 size 800000 align 22 gran 20 limit e13fffff flags 60081202 index 24
   PCI: 00:1c.3 resource base e0000000 size 900000 align 22 gran 20 limit e08fffff flags 60080202 index 20
    PCI: 03:00.0
    PCI: 03:00.0 resource base e0800000 size 100 align 8 gran 8 limit e08000ff flags 60000200 index 10
Unknown device path type: 0
    
Unknown device path type: 0
     resource base e0000000 size 800000 align 22 gran 22 limit e07fffff flags 40000200 index 10
Unknown device path type: 0
     resource base e0c00000 size 800000 align 22 gran 22 limit e13fffff flags 40001200 index 14
Unknown device path type: 0
     resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18
   PCI: 00:1c.5
   PCI: 00:1c.6
   PCI: 00:1c.7
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base e1926c00 size 400 align 10 gran 10 limit e1926fff flags 60000200 index 10
   PCI: 00:1e.0
   PCI: 00:1f.0 child on link 0 PNP: 00ff.1
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
   PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
   PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
    PNP: 00ff.1
    PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
    PNP: 0c31.0
    PNP: 00ff.2
    PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
    PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
    PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit 3087 flags 60000100 index 10
   PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit 3093 flags 60000100 index 14
   PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit 308f flags 60000100 index 18
   PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit 3097 flags 60000100 index 1c
   PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit 307f flags 60000100 index 20
   PCI: 00:1f.2 resource base e1926000 size 800 align 11 gran 11 limit e19267ff flags 60000200 index 24
   PCI: 00:1f.3 child on link 0 I2C: 01:54
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.3 resource base e1927000 size 100 align 8 gran 8 limit e19270ff flags 60000201 index 10
    I2C: 01:54
    I2C: 01:55
    I2C: 01:56
    I2C: 01:57
    I2C: 01:5c
    I2C: 01:5d
    I2C: 01:5e
    I2C: 01:5f
   PCI: 00:1f.5
   PCI: 00:1f.6
   PCI: 00:1f.6 resource base e1925000 size 1000 align 12 gran 12 limit e1925fff flags 60000201 index 10
Done allocating resources.
BS: Exiting BS_DEV_RESOURCES state.
BS: BS_DEV_RESOURCES times (us): entry 0 run 10072 exit 0
BS: Entering BS_DEV_ENABLE state.
Enabling resources...
PCI: 00:00.0 subsystem <- 17aa/21ce
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 17aa/21ce
PCI: 00:02.0 cmd <- 03
PCI: 00:19.0 subsystem <- 17aa/21ce
PCI: 00:19.0 cmd <- 103
PCI: 00:1a.0 subsystem <- 17aa/21ce
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 17aa/21ce
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 17aa/21ce
PCI: 00:1c.0 cmd <- 106
PCI: 00:1c.1 bridge ctrl <- 0003
PCI: 00:1c.1 subsystem <- 17aa/21ce
PCI: 00:1c.1 cmd <- 100
PCI: 00:1c.3 bridge ctrl <- 0003
PCI: 00:1c.3 subsystem <- 17aa/21ce
PCI: 00:1c.3 cmd <- 107
PCI: 00:1d.0 subsystem <- 17aa/21ce
PCI: 00:1d.0 cmd <- 102
pch_decode_init
PCI: 00:1f.0 subsystem <- 17aa/21ce
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 17aa/21ce
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 17aa/21ce
PCI: 00:1f.3 cmd <- 103
PCI: 00:1f.6 subsystem <- 17aa/21ce
PCI: 00:1f.6 cmd <- 02
PCI: 01:00.0 cmd <- 02
PCI: 03:00.0 subsystem <- 17aa/21ce
PCI: 03:00.0 cmd <- 06
done.
BS: Exiting BS_DEV_ENABLE state.
BS: BS_DEV_ENABLE times (us): entry 0 run 523 exit 0
BS: Entering BS_DEV_INIT state.
Initializing devices...
Root Device init ...
Root Device init finished in 8 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Setting up SMI for CPU
Loading module at 00038000 with entry 00038000. filesize: 0x160 memsize: 0x160
Processing 10 relocs. Offset value of 0x00038000
Adjusting 00038002: 0x00000024 -> 0x00038024
Adjusting 0003801d: 0x0000003c -> 0x0003803c
Adjusting 00038026: 0x00000024 -> 0x00038024
Adjusting 00038054: 0x000000d8 -> 0x000380d8
Adjusting 00038066: 0x00000160 -> 0x00038160
Adjusting 0003806d: 0x000000c0 -> 0x000380c0
Adjusting 00038075: 0x000000c4 -> 0x000380c4
Adjusting 0003807e: 0x000000d0 -> 0x000380d0
Adjusting 00038085: 0x000000cc -> 0x000380cc
Adjusting 0003808b: 0x000000c8 -> 0x000380c8
SMM Module: stub loaded at 00038000. Will call 00119784(0013aa60)
Installing SMM handler to 0xc0000000
Loading module at c0010000 with entry c001032f. filesize: 0x1718 memsize: 0x5738
Processing 69 relocs. Offset value of 0xc0010000
Adjusting c0010022: 0x000015bc -> 0xc00115bc
Adjusting c001003c: 0x000015bc -> 0xc00115bc
Adjusting c001005b: 0x000015bc -> 0xc00115bc
Adjusting c001027e: 0x00001718 -> 0xc0011718
Adjusting c0010298: 0x00001720 -> 0xc0011720
Adjusting c00102af: 0x00001720 -> 0xc0011720
Adjusting c00102fc: 0x00001710 -> 0xc0011710
Adjusting c0010312: 0x00001680 -> 0xc0011680
Adjusting c0010338: 0x00001718 -> 0xc0011718
Adjusting c0010346: 0x00001718 -> 0xc0011718
Adjusting c0010353: 0x00001700 -> 0xc0011700
Adjusting c001035e: 0x00001700 -> 0xc0011700
Adjusting c0010372: 0x00001704 -> 0xc0011704
Adjusting c0010378: 0x0000171c -> 0xc001171c
Adjusting c0010380: 0x00001704 -> 0xc0011704
Adjusting c001039d: 0x0000171c -> 0xc001171c
Adjusting c00103a6: 0x00001700 -> 0xc0011700
Adjusting c00104c2: 0x000015d8 -> 0xc00115d8
Adjusting c00105d0: 0x0000170c -> 0xc001170c
Adjusting c00105f9: 0x0000170c -> 0xc001170c
Adjusting c0010616: 0x0000170c -> 0xc001170c
Adjusting c001063f: 0x00001708 -> 0xc0011708
Adjusting c001065c: 0x0000170c -> 0xc001170c
Adjusting c0010682: 0x00001708 -> 0xc0011708
Adjusting c001073a: 0x0000170c -> 0xc001170c
Adjusting c001073f: 0x00001708 -> 0xc0011708
Adjusting c0010772: 0x000015e8 -> 0xc00115e8
Adjusting c0010b3b: 0x00001724 -> 0xc0011724
Adjusting c0010b6a: 0x00001728 -> 0xc0011728
Adjusting c0010b7d: 0x00001724 -> 0xc0011724
Adjusting c0010ba0: 0x00001728 -> 0xc0011728
Adjusting c0010c63: 0x00001724 -> 0xc0011724
Adjusting c0010e9e: 0x00001728 -> 0xc0011728
Adjusting c001108d: 0x00001728 -> 0xc0011728
Adjusting c001116f: 0x00001710 -> 0xc0011710
Adjusting c001117f: 0x00001710 -> 0xc0011710
Adjusting c0011194: 0x00001710 -> 0xc0011710
Adjusting c00111b5: 0x00001710 -> 0xc0011710
Adjusting c00111e4: 0x00001710 -> 0xc0011710
Adjusting c0011203: 0x00001710 -> 0xc0011710
Adjusting c0011216: 0x00001734 -> 0xc0011734
Adjusting c001125a: 0x0000172c -> 0xc001172c
Adjusting c0011277: 0x0000172c -> 0xc001172c
Adjusting c0011295: 0x00001734 -> 0xc0011734
Adjusting c001129b: 0x00001730 -> 0xc0011730
Adjusting c00112a8: 0x00001710 -> 0xc0011710
Adjusting c00112ce: 0x00001710 -> 0xc0011710
Adjusting c0011323: 0x00001730 -> 0xc0011730
Adjusting c001137a: 0x0000164d -> 0xc001164d
Adjusting c0011395: 0x00001710 -> 0xc0011710
Adjusting c00113ac: 0x00001730 -> 0xc0011730
Adjusting c001147c: 0x00001710 -> 0xc0011710
Adjusting c00114aa: 0x00001710 -> 0xc0011710
Adjusting c00114f3: 0x00001710 -> 0xc0011710
Adjusting c0011591: 0x00001730 -> 0xc0011730
Adjusting c00115a5: 0x00001710 -> 0xc0011710
Adjusting c00115c0: 0x000015cc -> 0xc00115cc
Adjusting c00115cc: 0x000000c0 -> 0xc00100c0
Adjusting c00115d0: 0x000000cc -> 0xc00100cc
Adjusting c00115d4: 0x000000cf -> 0xc00100cf
Adjusting c0011690: 0x00001364 -> 0xc0011364
Adjusting c0011694: 0x000011c5 -> 0xc00111c5
Adjusting c00116a0: 0x000012a5 -> 0xc00112a5
Adjusting c00116a4: 0x0000116c -> 0xc001116c
Adjusting c00116a8: 0x0000118d -> 0xc001118d
Adjusting c00116ac: 0x00001188 -> 0xc0011188
Adjusting c00116b4: 0x000012cb -> 0xc00112cb
Adjusting c00116b8: 0x0000117c -> 0xc001117c
Adjusting c00116d4: 0x0000130e -> 0xc001130e
Loading module at c0008000 with entry c0008000. filesize: 0x160 memsize: 0x160
Processing 10 relocs. Offset value of 0xc0008000
Adjusting c0008002: 0x00000024 -> 0xc0008024
Adjusting c000801d: 0x0000003c -> 0xc000803c
Adjusting c0008026: 0x00000024 -> 0xc0008024
Adjusting c0008054: 0x000000d8 -> 0xc00080d8
Adjusting c0008066: 0x00000160 -> 0xc0008160
Adjusting c000806d: 0x000000c0 -> 0xc00080c0
Adjusting c0008075: 0x000000c4 -> 0xc00080c4
Adjusting c000807e: 0x000000d0 -> 0xc00080d0
Adjusting c0008085: 0x000000cc -> 0xc00080cc
Adjusting c000808b: 0x000000c8 -> 0xc00080c8
SMM Module: placing jmp sequence at c0007c00 rel16 0x03fd
SMM Module: placing jmp sequence at c0007800 rel16 0x07fd
SMM Module: placing jmp sequence at c0007400 rel16 0x0bfd
SMM Module: placing jmp sequence at c0007000 rel16 0x0ffd
SMM Module: placing jmp sequence at c0006c00 rel16 0x13fd
SMM Module: placing jmp sequence at c0006800 rel16 0x17fd
SMM Module: placing jmp sequence at c0006400 rel16 0x1bfd
SMM Module: stub loaded at c0008000. Will call c001032f(00000000)
Initializing southbridge SMI... ... pmbase = 0x0500

SMI_STS: MCSMI PM1 
PM1_STS: WAK PWRBTN TMROF 
GPE0_STS: GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 GPIO0 
ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 
TCO_STS: 
  ... raise SMI#
In relocation handler: cpu 0
New SMBASE=0xc0000000 IEDBASE=0xc0400000 @ 0003fc00
Writing SMRR. base = 0xc0000006, mask=0xff800800
Relocation complete.
Locking SMM.
Initializing CPU #0
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
Enabling cache
CBFS @ 700000 size ff440
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 140 size 5800
microcode: sig=0x306a9 pf=0x10 revision=0x1b
CPU: Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz.
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6
0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 0
0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
0x0000000100000000 - 0x000000013b600000 size 0x3b600000 type 6
MTRR addr 0x0-0x10 set to 6 type @ 0
MTRR addr 0x10-0x20 set to 6 type @ 1
MTRR addr 0x20-0x30 set to 6 type @ 2
MTRR addr 0x30-0x40 set to 6 type @ 3
MTRR addr 0x40-0x50 set to 6 type @ 4
MTRR addr 0x50-0x60 set to 6 type @ 5
MTRR addr 0x60-0x70 set to 6 type @ 6
MTRR addr 0x70-0x80 set to 6 type @ 7
MTRR addr 0x80-0x84 set to 6 type @ 8
MTRR addr 0x84-0x88 set to 6 type @ 9
MTRR addr 0x88-0x8c set to 6 type @ 10
MTRR addr 0x8c-0x90 set to 6 type @ 11
MTRR addr 0x90-0x94 set to 6 type @ 12
MTRR addr 0x94-0x98 set to 6 type @ 13
MTRR addr 0x98-0x9c set to 6 type @ 14
MTRR addr 0x9c-0xa0 set to 6 type @ 15
MTRR addr 0xa0-0xa4 set to 0 type @ 16
MTRR addr 0xa4-0xa8 set to 0 type @ 17
MTRR addr 0xa8-0xac set to 0 type @ 18
MTRR addr 0xac-0xb0 set to 0 type @ 19
MTRR addr 0xb0-0xb4 set to 0 type @ 20
MTRR addr 0xb4-0xb8 set to 0 type @ 21
MTRR addr 0xb8-0xbc set to 0 type @ 22
MTRR addr 0xbc-0xc0 set to 0 type @ 23
MTRR addr 0xc0-0xc1 set to 6 type @ 24
MTRR addr 0xc1-0xc2 set to 6 type @ 25
MTRR addr 0xc2-0xc3 set to 6 type @ 26
MTRR addr 0xc3-0xc4 set to 6 type @ 27
MTRR addr 0xc4-0xc5 set to 6 type @ 28
MTRR addr 0xc5-0xc6 set to 6 type @ 29
MTRR addr 0xc6-0xc7 set to 6 type @ 30
MTRR addr 0xc7-0xc8 set to 6 type @ 31
MTRR addr 0xc8-0xc9 set to 6 type @ 32
MTRR addr 0xc9-0xca set to 6 type @ 33
MTRR addr 0xca-0xcb set to 6 type @ 34
MTRR addr 0xcb-0xcc set to 6 type @ 35
MTRR addr 0xcc-0xcd set to 6 type @ 36
MTRR addr 0xcd-0xce set to 6 type @ 37
MTRR addr 0xce-0xcf set to 6 type @ 38
MTRR addr 0xcf-0xd0 set to 6 type @ 39
MTRR addr 0xd0-0xd1 set to 6 type @ 40
MTRR addr 0xd1-0xd2 set to 6 type @ 41
MTRR addr 0xd2-0xd3 set to 6 type @ 42
MTRR addr 0xd3-0xd4 set to 6 type @ 43
MTRR addr 0xd4-0xd5 set to 6 type @ 44
MTRR addr 0xd5-0xd6 set to 6 type @ 45
MTRR addr 0xd6-0xd7 set to 6 type @ 46
MTRR addr 0xd7-0xd8 set to 6 type @ 47
MTRR addr 0xd8-0xd9 set to 6 type @ 48
MTRR addr 0xd9-0xda set to 6 type @ 49
MTRR addr 0xda-0xdb set to 6 type @ 50
MTRR addr 0xdb-0xdc set to 6 type @ 51
MTRR addr 0xdc-0xdd set to 6 type @ 52
MTRR addr 0xdd-0xde set to 6 type @ 53
MTRR addr 0xde-0xdf set to 6 type @ 54
MTRR addr 0xdf-0xe0 set to 6 type @ 55
MTRR addr 0xe0-0xe1 set to 6 type @ 56
MTRR addr 0xe1-0xe2 set to 6 type @ 57
MTRR addr 0xe2-0xe3 set to 6 type @ 58
MTRR addr 0xe3-0xe4 set to 6 type @ 59
MTRR addr 0xe4-0xe5 set to 6 type @ 60
MTRR addr 0xe5-0xe6 set to 6 type @ 61
MTRR addr 0xe6-0xe7 set to 6 type @ 62
MTRR addr 0xe7-0xe8 set to 6 type @ 63
MTRR addr 0xe8-0xe9 set to 6 type @ 64
MTRR addr 0xe9-0xea set to 6 type @ 65
MTRR addr 0xea-0xeb set to 6 type @ 66
MTRR addr 0xeb-0xec set to 6 type @ 67
MTRR addr 0xec-0xed set to 6 type @ 68
MTRR addr 0xed-0xee set to 6 type @ 69
MTRR addr 0xee-0xef set to 6 type @ 70
MTRR addr 0xef-0xf0 set to 6 type @ 71
MTRR addr 0xf0-0xf1 set to 6 type @ 72
MTRR addr 0xf1-0xf2 set to 6 type @ 73
MTRR addr 0xf2-0xf3 set to 6 type @ 74
MTRR addr 0xf3-0xf4 set to 6 type @ 75
MTRR addr 0xf4-0xf5 set to 6 type @ 76
MTRR addr 0xf5-0xf6 set to 6 type @ 77
MTRR addr 0xf6-0xf7 set to 6 type @ 78
MTRR addr 0xf7-0xf8 set to 6 type @ 79
MTRR addr 0xf8-0xf9 set to 6 type @ 80
MTRR addr 0xf9-0xfa set to 6 type @ 81
MTRR addr 0xfa-0xfb set to 6 type @ 82
MTRR addr 0xfb-0xfc set to 6 type @ 83
MTRR addr 0xfc-0xfd set to 6 type @ 84
MTRR addr 0xfd-0xfe set to 6 type @ 85
MTRR addr 0xfe-0xff set to 6 type @ 86
MTRR addr 0xff-0x100 set to 6 type @ 87
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
MTRR: default type WB/UC MTRR counts: 3/4.
MTRR: WB selected as default type.
MTRR: 0 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0
MTRR: 1 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
MTRR: 2 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local apic... apic_id: 0x00 done.
Enabling VMX
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2600
Turbo is available but hidden
Turbo has been enabled
CPU: 0 has 4 cores, 2 threads per core
CPU: 0 has core 1
CPU1: stack_base 00134000, stack_end 00134ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
In relocation handler: cpu 1
New SMBASE=0xbffffc00 IEDBASE=0xc0400000 @ 0003fc00
Writing SMRR. base = 0xc0000006, mask=0xff800800
Initializing CPU #1
Startup point 1.
CPU: vendor Intel device 306a9
Waiting for send to finish...
CPU: family 06, model 3a, stepping 09
+Enabling cache
Sending STARTUP #2 to 1.
After apic_write.
CBFS @ 700000 size ff440
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 140 size 5800
microcode: sig=0x306a9 pf=0x10 revision=0x1b
CPU: Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU: 0 has core 2
CPU2: stack_base 00133000, stack_end 00133ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
call enable_fixed_mtrr()
+#startup loops: 2.
Sending STARTUP #1 to 2.
After apic_write.
In relocation handler: cpu 2
New SMBASE=0xbffff800 IEDBASE=0xc0400000 @ 0003fc00

MTRR check
Startup point 1.
Fixed MTRRs   : Waiting for send to finish...
+Enabled
Variable MTRRs: Enabled

Writing SMRR. base = 0xc0000006, mask=0xff800800
Setting up local apic...Sending STARTUP #2 to 2.
After apic_write.
 apic_id: 0x01 done.
Enabling VMX
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2600
CPU #1 initialized
Initializing CPU #2
Startup point 1.
Waiting for send to finish...
+CPU: vendor Intel device 306a9
After Startup.
CPU: 0 has core 3
CPU3: stack_base 00132000, stack_end 00132ff8
CPU: family 06, model 3a, stepping 09
Asserting INIT.
Waiting for send to finish...
+Enabling cache
Deasserting INIT.
Waiting for send to finish...
+CBFS @ 700000 size ff440
#startup loops: 2.
Sending STARTUP #1 to 3.
After apic_write.
In relocation handler: cpu 3
Startup point 1.
Waiting for send to finish...
+CBFS: Locating 'cpu_microcode_blob.bin'
Sending STARTUP #2 to 3.
After apic_write.
New SMBASE=0xbffff400 IEDBASE=0xc0400000 @ 0003fc00
Startup point 1.
Waiting for send to finish...
+CBFS: Found @ offset 140 size 5800
After Startup.
Writing SMRR. base = 0xc0000006, mask=0xff800800
microcode: sig=0x306a9 pf=0x10 revision=0x0
CPU: 0 has core 4
CPU4: stack_base 00131000, stack_end 00131ff8
Initializing CPU #3
Asserting INIT.
Waiting for send to finish...
+microcode: updated to revision 0x1b date=2014-05-29
Deasserting INIT.
Waiting for send to finish...
+CPU: vendor Intel device 306a9
#startup loops: 2.
Sending STARTUP #1 to 4.
After apic_write.
CPU: Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz.
Startup point 1.
Waiting for send to finish...
+In relocation handler: cpu 4
Sending STARTUP #2 to 4.
After apic_write.
CPU: family 06, model 3a, stepping 09
Startup point 1.
Waiting for send to finish...
+New SMBASE=0xbffff000 IEDBASE=0xc0400000 @ 0003fc00
After Startup.
Enabling cache
Writing SMRR. base = 0xc0000006, mask=0xff800800
MTRR: Fixed MSR 0x250 0x0606060606060606
CPU: 0 has core 5
CPU5: stack_base 00130000, stack_end 00130ff8
Initializing CPU #4
Asserting INIT.
Waiting for send to finish...
+MTRR: Fixed MSR 0x258 0x0606060606060606
Deasserting INIT.
Waiting for send to finish...
+CPU: vendor Intel device 306a9
#startup loops: 2.
Sending STARTUP #1 to 5.
After apic_write.
CBFS @ 700000 size ff440
Startup point 1.
Waiting for send to finish...
+MTRR: Fixed MSR 0x259 0x0000000000000000
Sending STARTUP #2 to 5.
After apic_write.
In relocation handler: cpu 5
Startup point 1.
Waiting for send to finish...
+CPU: family 06, model 3a, stepping 09
After Startup.
CBFS: Locating 'cpu_microcode_blob.bin'
Enabling cache
New SMBASE=0xbfffec00 IEDBASE=0xc0400000 @ 0003fc00
CBFS @ 700000 size ff440
CBFS: Found @ offset 140 size 5800
Writing SMRR. base = 0xc0000006, mask=0xff800800
MTRR: Fixed MSR 0x268 0x0606060606060606
CPU: 0 has core 6
CPU6: stack_base 0012f000, stack_end 0012fff8
Initializing CPU #5
Asserting INIT.
Waiting for send to finish...
+CBFS: Locating 'cpu_microcode_blob.bin'
Deasserting INIT.
Waiting for send to finish...
+microcode: sig=0x306a9 pf=0x10 revision=0x1b
#startup loops: 2.
Sending STARTUP #1 to 6.
After apic_write.
MTRR: Fixed MSR 0x269 0x0606060606060606
Startup point 1.
Waiting for send to finish...
+CPU: Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz.
Sending STARTUP #2 to 6.
After apic_write.
CBFS: Found @ offset 140 size 5800
Startup point 1.
Waiting for send to finish...
+CPU: vendor Intel device 306a9
After Startup.
MTRR: Fixed MSR 0x250 0x0606060606060606
In relocation handler: cpu 6
microcode: sig=0x306a9 pf=0x10 revision=0x0
CPU: family 06, model 3a, stepping 09
microcode: updated to revision 0x1b date=2014-05-29
New SMBASE=0xbfffe800 IEDBASE=0xc0400000 @ 0003fc00
Enabling cache
Writing SMRR. base = 0xc0000006, mask=0xff800800
CBFS @ 700000 size ff440
CPU: 0 has core 7
CPU7: stack_base 0012e000, stack_end 0012eff8
Initializing CPU #6
Asserting INIT.
Waiting for send to finish...
+CPU: Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz.
Deasserting INIT.
Waiting for send to finish...
+CPU: vendor Intel device 306a9
#startup loops: 2.
Sending STARTUP #1 to 7.
After apic_write.
CBFS: Locating 'cpu_microcode_blob.bin'
Startup point 1.
Waiting for send to finish...
+CPU: family 06, model 3a, stepping 09
Sending STARTUP #2 to 7.
After apic_write.
In relocation handler: cpu 7
Startup point 1.
Waiting for send to finish...
+MTRR: Fixed MSR 0x26a 0x0606060606060606
After Startup.
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
New SMBASE=0xbfffe400 IEDBASE=0xc0400000 @ 0003fc00
Enabling cache
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
CBFS: Found @ offset 140 size 5800
MTRR: Fixed MSR 0x26d 0x0606060606060606
Writing SMRR. base = 0xc0000006, mask=0xff800800
CBFS @ 700000 size ff440
CPU #0 initialized
Waiting for 6 CPUS to stop
MTRR: Fixed MSR 0x268 0x0606060606060606
microcode: sig=0x306a9 pf=0x10 revision=0x1b
CBFS: Locating 'cpu_microcode_blob.bin'
Initializing CPU #7
MTRR: Fixed MSR 0x26e 0x0606060606060606
CBFS: Found @ offset 140 size 5800
CPU: vendor Intel device 306a9
MTRR: Fixed MSR 0x258 0x0606060606060606
microcode: sig=0x306a9 pf=0x10 revision=0x0
CPU: family 06, model 3a, stepping 09
MTRR: Fixed MSR 0x259 0x0000000000000000
CPU: Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz.
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
microcode: updated to revision 0x1b date=2014-05-29
Enabling cache
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x26c 0x0606060606060606
CPU: Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz.
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
CBFS @ 700000 size ff440
call enable_fixed_mtrr()
CBFS: Locating 'cpu_microcode_blob.bin'
MTRR: Fixed MSR 0x26b 0x0606060606060606

MTRR check
MTRR: Fixed MSR 0x26c 0x0606060606060606
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
Setting up local apic...call enable_fixed_mtrr()
 apic_id: 0x02 done.

MTRR check
Enabling VMX
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local apic...MTRR: Fixed MSR 0x268 0x0606060606060606
model_x06ax: energy policy set to 6
 apic_id: 0x03 done.
MTRR: Fixed MSR 0x269 0x0606060606060606
model_x06ax: frequency set to 2600
Enabling VMX
CPU #2 initialized
MTRR: Fixed MSR 0x26a 0x0606060606060606
Waiting for 5 CPUS to stop
model_x06ax: energy policy set to 6
MTRR: Fixed MSR 0x250 0x0606060606060606
model_x06ax: frequency set to 2600
CPU #3 initialized
MTRR: Fixed MSR 0x26e 0x0606060606060606
Waiting for 4 CPUS to stop
MTRR: Fixed MSR 0x26b 0x0606060606060606
CBFS: Found @ offset 140 size 5800
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
call enable_fixed_mtrr()
MTRR: Fixed MSR 0x26d 0x0606060606060606

MTRR check
Fixed MTRRs   : MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
Enabled
call enable_fixed_mtrr()
Variable MTRRs: 
MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabled
Setting up local apic...
MTRR: Fixed MSR 0x259 0x0000000000000000
Setting up local apic... apic_id: 0x05  apic_id: 0x04 done.
done.
Enabling VMX
microcode: sig=0x306a9 pf=0x10 revision=0x1b
Enabling VMX
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2600
CPU #4 initialized
model_x06ax: energy policy set to 6
Waiting for 3 CPUS to stop
model_x06ax: frequency set to 2600
CPU #5 initialized
MTRR: Fixed MSR 0x268 0x0606060606060606
Waiting for 2 CPUS to stop
CPU: Intel(R) Core(TM) i7-3720QM CPU @ 2.60GHz.
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
call enable_fixed_mtrr()
MTRR: Fixed MSR 0x26c 0x0606060606060606

MTRR check
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local apic... apic_id: 0x06 call enable_fixed_mtrr()
done.
Enabling VMX
model_x06ax: energy policy set to 6

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

model_x06ax: frequency set to 2600
Setting up local apic...CPU #6 initialized
 apic_id: 0x07 done.
Waiting for 1 CPUS to stop
Enabling VMX
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2600
CPU #7 initialized
All AP CPUs stopped (13224 loops)
CPU1: stack: 00134000 - 00135000, lowest used address 00134c64, stack used: 924 bytes
CPU2: stack: 00133000 - 00134000, lowest used address 00133c64, stack used: 924 bytes
CPU3: stack: 00132000 - 00133000, lowest used address 00132c64, stack used: 924 bytes
CPU4: stack: 00131000 - 00132000, lowest used address 00131c64, stack used: 924 bytes
CPU5: stack: 00130000 - 00131000, lowest used address 00130c64, stack used: 924 bytes
CPU6: stack: 0012f000 - 00130000, lowest used address 0012fc64, stack used: 924 bytes
CPU7: stack: 0012e000 - 0012f000, lowest used address 0012ec64, stack used: 924 bytes
CPU_CLUSTER: 0 init finished in 289744 usecs
PCI: 00:00.0 init ...
Set BIOS_RESET_CPL
CPU TDP: 45 Watts
PCI: 00:00.0 init finished in 1009 usecs
PCI: 00:02.0 init ...
GT Power Management Init
IVB GT2 35W Power Meter Weights
GT Power Management Init (post VBIOS)
Initializing VGA without OPROM.
EDID:
00 ff ff ff ff ff ff 00 06 af 3e 21 00 00 00 00 
21 14 01 04 90 1f 11 78 02 61 95 9c 59 52 8f 26 
21 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 
01 01 01 01 01 01 f8 2a 40 9a 61 84 0c 30 40 2a 
33 00 35 ae 10 00 00 18 a5 1c 40 9a 61 84 0c 30 
40 2a 33 00 35 ae 10 00 00 18 00 00 00 fe 00 41 
55 4f 0a 20 20 20 20 20 20 20 20 20 00 00 00 fe 
00 42 31 34 30 52 57 30 32 20 56 31 20 0a 00 d0 
Extracted contents:
header:          00 ff ff ff ff ff ff 00
serial number:   06 af 3e 21 00 00 00 00 21 14
version:         01 04
basic params:    90 1f 11 78 02
chroma info:     61 95 9c 59 52 8f 26 21 50 54
established:     00 00 00
standard:        01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
descriptor 1:    f8 2a 40 9a 61 84 0c 30 40 2a 33 00 35 ae 10 00 00 18
descriptor 2:    a5 1c 40 9a 61 84 0c 30 40 2a 33 00 35 ae 10 00 00 18
descriptor 3:    00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
descriptor 4:    00 00 00 fe 00 42 31 34 30 52 57 30 32 20 56 31 20 0a
extensions:      00
checksum:        d0

Manufacturer: AUO Model 213e Serial Number 0
Made week 33 of 2010
EDID version: 1.4
Digital display
6 bits per primary color channel
Digital interface is not defined
Maximum image size: 31 cm x 17 cm
Gamma: 220%
Check DPMS levels
Supported color formats: RGB 4:4:4
First detailed timing is preferred timing
Established timings supported:
Standard timings supported:
Detailed timings
Hex of detail: f82a409a61840c30402a330035ae10000018
Did detailed timing
Detailed mode (IN HEX): Clock 110000 KHz, 135 mm x ae mm
               0640 0680 06aa 07da hborder 0
               0384 0387 038a 0390 vborder 0
               -hsync -vsync 
Hex of detail: a51c409a61840c30402a330035ae10000018
Detailed mode (IN HEX): Clock 110000 KHz, 135 mm x ae mm
               0640 0680 06aa 07da hborder 0
               0384 0387 038a 0390 vborder 0
               -hsync -vsync 
Hex of detail: 000000fe0041554f0a202020202020202020
ASCII string: AUO
Hex of detail: 000000fe004231343052573032205631200a
ASCII string: B140RW02 V1 
Checksum
Checksum: 0xd0 (valid)
bringing up panel at resolution 1600 x 900
Borders 0 x 0
Blank 410 x 12
Sync 42 x 3
Front porch 64 x 3
Spread spectrum clock
Dual channel
Polarities 1, 1
Data M1=1922389, N1=8388608
Link frequency 270000 kHz
Link M1=213598, N1=524288
Pixel N=6, M1=14, M2=7, P1=2
Pixel clock 110000 kHz
waiting for panel powerup
panel powered up
PCI: 00:02.0 init finished in 42854 usecs
PCI: 00:19.0 init ...
PCI: 00:19.0 init finished in 0 usecs
PCI: 00:1a.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1a.0 init finished in 13 usecs
PCI: 00:1b.0 init ...
Azalia: base = e1920000
Azalia: codec_mask = 0b
Azalia: Initializing codec #3
Azalia: codec viddid: 80862805
Azalia: No verb!
Azalia: Initializing codec #1
Azalia: codec viddid: 14f12c06
Azalia: No verb!
Azalia: Initializing codec #0
Azalia: codec viddid: 14f1506e
Azalia: verb_size: 52
Azalia: verb loaded.
PCI: 00:1b.0 init finished in 4345 usecs
PCI: 00:1c.0 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 8 usecs
PCI: 00:1c.1 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.1 init finished in 8 usecs
PCI: 00:1c.3 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.3 init finished in 14 usecs
PCI: 00:1d.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 13 usecs
PCI: 00:1f.0 init ...
pch: lpc_init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
  reg 0x0000: 0x02000000
  reg 0x0001: 0x00170020
  reg 0x0002: 0x00170020
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
Set power off after power failure.
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
NMI sources enabled.
CougarPoint PM init
rtc_failed = 0x0
RTC Init
Enabling BIOS updates outside of SMM... Disabling ACPI via APMC:
done.
PCI: 00:1f.0 init finished in 734 usecs
PCI: 00:1f.2 init ...
SATA: Initializing...
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
SATA: Controller in AHCI mode.
ABAR: e1926000
PCI: 00:1f.2 init finished in 298 usecs
PCI: 00:1f.3 init ...
PCI: 00:1f.3 init finished in 7 usecs
PCI: 00:1f.6 init ...
PCI: 00:1f.6 init finished in 0 usecs
PCI: 01:00.0 init ...
PCI: 01:00.0 init finished in 0 usecs
PCI: 03:00.0 init ...
PCI: 03:00.0 init finished in 14 usecs
PNP: 00ff.2 init ...
PNP: 00ff.2 init finished in 0 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ...
I2C: 01:54 init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ...
I2C: 01:55 init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ...
I2C: 01:56 init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ...
I2C: 01:57 init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ...
Locking EEPROM RFID
init EEPROM done
I2C: 01:5c init finished in 12441 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ...
I2C: 01:5d init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ...
I2C: 01:5e init finished in 1 usecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ...
I2C: 01:5f init finished in 1 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:16.0: enabled 0
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.4: enabled 0
PCI: 00:1c.0: enabled 1
PCI: 00:1c.2: enabled 0
PCI: 00:1c.1: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 03:00.0: enabled 1
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 0c31.0: enabled 1
PNP: 00ff.2: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
I2C: 01:54: enabled 1
I2C: 01:55: enabled 1
I2C: 01:56: enabled 1
I2C: 01:57: enabled 1
I2C: 01:5c: enabled 1
I2C: 01:5d: enabled 1
I2C: 01:5e: enabled 1
I2C: 01:5f: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 1
PCI: 01:00.0: enabled 1
Unknown device path type: 0
: enabled 1
APIC: 01: enabled 1
APIC: 02: enabled 1
APIC: 03: enabled 1
APIC: 04: enabled 1
APIC: 05: enabled 1
APIC: 06: enabled 1
APIC: 07: enabled 1
BS: Exiting BS_DEV_INIT state.
BS: BS_DEV_INIT times (us): entry 5 run 351716 exit 0
BS: Entering BS_POST_DEVICE state.
Finalize devices...
PCI: 00:1f.0 final
Devices finalized
BS: Exiting BS_POST_DEVICE state.
BS: BS_POST_DEVICE times (us): entry 0 run 6 exit 0
BS: Entering BS_OS_RESUME_CHECK state.
BS: Exiting BS_OS_RESUME_CHECK state.
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3 exit 0
BS: Entering BS_WRITE_TABLES state.
Updating MRC cache data.
CBFS @ 700000 size ff440
CBFS: Locating 'mrc.cache'
CBFS: Found @ offset ffc0 size 10000
find_current_mrc_cache_local: picked entry 2 from cache block
SF: Detected W25Q64 with sector size 0x1000, total 0x800000
find_next_mrc_cache: picked next entry from cache block at fff13000
Finally: write MRC cache update to flash at fff13000
CBFS @ 700000 size ff440
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 6200 size 346c
CBFS @ 700000 size ff440
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at bfeb8000.
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * IGD OpRegion
GET_VBIOS: aa55 8086 0 3 0
VBIOS not found.
ACPI:    * FADT
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
Found 1 CPU(s) with 8 core(s) each.
PSS: 2601MHz power 45000 control 0x2400 status 0x2400
PSS: 2600MHz power 45000 control 0x1a00 status 0x1a00
PSS: 2400MHz power 40579 control 0x1800 status 0x1800
PSS: 2200MHz power 36318 control 0x1600 status 0x1600
PSS: 2000MHz power 32251 control 0x1400 status 0x1400
PSS: 1800MHz power 28368 control 0x1200 status 0x1200
PSS: 1600MHz power 24603 control 0x1000 status 0x1000
PSS: 1400MHz power 21014 control 0xe00 status 0xe00
PSS: 1200MHz power 17571 control 0xc00 status 0xc00
PSS: 2601MHz power 45000 control 0x2400 status 0x2400
PSS: 2600MHz power 45000 control 0x1a00 status 0x1a00
PSS: 2400MHz power 40579 control 0x1800 status 0x1800
PSS: 2200MHz power 36318 control 0x1600 status 0x1600
PSS: 2000MHz power 32251 control 0x1400 status 0x1400
PSS: 1800MHz power 28368 control 0x1200 status 0x1200
PSS: 1600MHz power 24603 control 0x1000 status 0x1000
PSS: 1400MHz power 21014 control 0xe00 status 0xe00
PSS: 1200MHz power 17571 control 0xc00 status 0xc00
PSS: 2601MHz power 45000 control 0x2400 status 0x2400
PSS: 2600MHz power 45000 control 0x1a00 status 0x1a00
PSS: 2400MHz power 40579 control 0x1800 status 0x1800
PSS: 2200MHz power 36318 control 0x1600 status 0x1600
PSS: 2000MHz power 32251 control 0x1400 status 0x1400
PSS: 1800MHz power 28368 control 0x1200 status 0x1200
PSS: 1600MHz power 24603 control 0x1000 status 0x1000
PSS: 1400MHz power 21014 control 0xe00 status 0xe00
PSS: 1200MHz power 17571 control 0xc00 status 0xc00
PSS: 2601MHz power 45000 control 0x2400 status 0x2400
PSS: 2600MHz power 45000 control 0x1a00 status 0x1a00
PSS: 2400MHz power 40579 control 0x1800 status 0x1800
PSS: 2200MHz power 36318 control 0x1600 status 0x1600
PSS: 2000MHz power 32251 control 0x1400 status 0x1400
PSS: 1800MHz power 28368 control 0x1200 status 0x1200
PSS: 1600MHz power 24603 control 0x1000 status 0x1000
PSS: 1400MHz power 21014 control 0xe00 status 0xe00
PSS: 1200MHz power 17571 control 0xc00 status 0xc00
PSS: 2601MHz power 45000 control 0x2400 status 0x2400
PSS: 2600MHz power 45000 control 0x1a00 status 0x1a00
PSS: 2400MHz power 40579 control 0x1800 status 0x1800
PSS: 2200MHz power 36318 control 0x1600 status 0x1600
PSS: 2000MHz power 32251 control 0x1400 status 0x1400
PSS: 1800MHz power 28368 control 0x1200 status 0x1200
PSS: 1600MHz power 24603 control 0x1000 status 0x1000
PSS: 1400MHz power 21014 control 0xe00 status 0xe00
PSS: 1200MHz power 17571 control 0xc00 status 0xc00
PSS: 2601MHz power 45000 control 0x2400 status 0x2400
PSS: 2600MHz power 45000 control 0x1a00 status 0x1a00
PSS: 2400MHz power 40579 control 0x1800 status 0x1800
PSS: 2200MHz power 36318 control 0x1600 status 0x1600
PSS: 2000MHz power 32251 control 0x1400 status 0x1400
PSS: 1800MHz power 28368 control 0x1200 status 0x1200
PSS: 1600MHz power 24603 control 0x1000 status 0x1000
PSS: 1400MHz power 21014 control 0xe00 status 0xe00
PSS: 1200MHz power 17571 control 0xc00 status 0xc00
PSS: 2601MHz power 45000 control 0x2400 status 0x2400
PSS: 2600MHz power 45000 control 0x1a00 status 0x1a00
PSS: 2400MHz power 40579 control 0x1800 status 0x1800
PSS: 2200MHz power 36318 control 0x1600 status 0x1600
PSS: 2000MHz power 32251 control 0x1400 status 0x1400
PSS: 1800MHz power 28368 control 0x1200 status 0x1200
PSS: 1600MHz power 24603 control 0x1000 status 0x1000
PSS: 1400MHz power 21014 control 0xe00 status 0xe00
PSS: 1200MHz power 17571 control 0xc00 status 0xc00
PSS: 2601MHz power 45000 control 0x2400 status 0x2400
PSS: 2600MHz power 45000 control 0x1a00 status 0x1a00
PSS: 2400MHz power 40579 control 0x1800 status 0x1800
PSS: 2200MHz power 36318 control 0x1600 status 0x1600
PSS: 2000MHz power 32251 control 0x1400 status 0x1400
PSS: 1800MHz power 28368 control 0x1200 status 0x1200
PSS: 1600MHz power 24603 control 0x1000 status 0x1000
PSS: 1400MHz power 21014 control 0xe00 status 0xe00
PSS: 1200MHz power 17571 control 0xc00 status 0xc00
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI: added table 3/32, length now 48
ACPI:    * TCPA
TCPA log created at bfea5000
ACPI: added table 4/32, length now 52
ACPI:    * MADT
ACPI: added table 5/32, length now 56
current = bfebe2b0
ACPI:    * HPET
ACPI: added table 6/32, length now 60
ACPI: done.
ACPI tables: 25328 bytes.
smbios_write_tables: bfea4000
recv_ec_data: 0x38
recv_ec_data: 0x33
recv_ec_data: 0x48
recv_ec_data: 0x54
recv_ec_data: 0x32
recv_ec_data: 0x37
recv_ec_data: 0x57
recv_ec_data: 0x57
recv_ec_data: 0x14
recv_ec_data: 0x03
Root Device (LENOVO ThinkPad T420)
CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge)
APIC: 00 (unknown)
APIC: acac (Intel SandyBridge/IvyBridge CPU)
DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 03:00.0 (unknown)
PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7)
PNP: 0c31.0 (unknown)
PNP: 00ff.2 (Lenovo H8 EC)
PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
I2C: 01:54 (AT24RF08C)
I2C: 01:55 (AT24RF08C)
I2C: 01:56 (AT24RF08C)
I2C: 01:57 (AT24RF08C)
I2C: 01:5c (AT24RF08C)
I2C: 01:5d (AT24RF08C)
I2C: 01:5e (AT24RF08C)
I2C: 01:5f (AT24RF08C)
PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 01:00.0 (unknown)
Unknown device path type: 0
 (unknown)
APIC: 01 (unknown)
APIC: 02 (unknown)
APIC: 03 (unknown)
APIC: 04 (unknown)
APIC: 05 (unknown)
APIC: 06 (unknown)
APIC: 07 (unknown)
SMBIOS tables: 454 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 7ff4
Table forward entry ends at 0x00000528.
... aligned to 0x00001000
Writing coreboot table at 0xbfe9c000
rom_table_end = 0xbfe9c000
... aligned to 0xbfea0000
CBFS @ 700000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 59c0 size 7cc
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000a0000-00000000000fffff: RESERVED
 3. 0000000000100000-000000001fffffff: RAM
 4. 0000000020000000-00000000201fffff: RESERVED
 5. 0000000020200000-000000003fffffff: RAM
 6. 0000000040000000-00000000401fffff: RESERVED
 7. 0000000040200000-00000000bfe9bfff: RAM
 8. 00000000bfe9c000-00000000bfffffff: CONFIGURATION TABLES
 9. 00000000c0000000-00000000c29fffff: RESERVED
10. 00000000f0000000-00000000f3ffffff: RESERVED
11. 0000000100000000-000000013b5fffff: RAM
CBFS @ 700000 size ff440
No FMAP found at 0 offset.
Wrote coreboot table at: bfe9c000, 0x9fc bytes, checksum df03
coreboot table: 2580 bytes.
IMD ROOT    0. bffff000 00001000
IMD SMALL   1. bfffe000 00001000
CONSOLE     2. bffde000 00020000
TIME STAMP  3. bffdd000 000002e0
MRC DATA    4. bffdc000 00000420
ACPI RESUME 5. bfedc000 00100000
ACPI        6. bfeb8000 00024000
ACPI GNVS   7. bfeb7000 00001000
4f444749    8. bfeb5000 00002000
TCPA LOG    9. bfea5000 00010000
SMBIOS     10. bfea4000 00000800
COREBOOT   11. bfe9c000 00008000
IMD small region:
  IMD ROOT    0. bfffec00 00000400
  CAR GLOBALS 1. bfffea40 000001c0
  USBDEBUG    2. bfffe9e0 00000058
  ROMSTAGE    3. bfffe9c0 00000004
  GDT         4. bfffe7c0 00000200
BS: Exiting BS_WRITE_TABLES state.
BS: BS_WRITE_TABLES times (us): entry 4503 run 25455 exit 0
BS: Entering BS_PAYLOAD_LOAD state.
CBFS provider active.
CBFS @ 700000 size ff440
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 565c0 size 92e77
'fallback/payload' located at offset: 7565f8 size: 92e77
Loading segment from rom address 0xfff565f8
  code (compression=1)
  New segment dstaddr 0x8200 memsize 0x1aec4 srcaddr 0xfff5664c filesize 0x94a4
Loading segment from rom address 0xfff56614
  code (compression=1)
  New segment dstaddr 0x100000 memsize 0x24fac0 srcaddr 0xfff5faf0 filesize 0x8997f
Loading segment from rom address 0xfff56630
  Entry Point 0x00008200
Bounce Buffer at bfc0d000, 2680208 bytes
Loading Segment: addr: 0x0000000000008200 memsz: 0x000000000001aec4 filesz: 0x00000000000094a4
lb: [0x0000000000100000, 0x000000000013ead0)
Post relocation: addr: 0x0000000000008200 memsz: 0x000000000001aec4 filesz: 0x00000000000094a4
using LZMA
[ 0x00008200, 0001b69b, 0x000230c4) <- fff5664c
Clearing Segment: addr: 0x000000000001b69b memsz: 0x0000000000007a29
dest 00008200, end 000230c4, bouncebuffer bfc0d000
Loading Segment: addr: 0x0000000000100000 memsz: 0x000000000024fac0 filesz: 0x000000000008997f
lb: [0x0000000000100000, 0x000000000013ead0)
segment: [0x0000000000100000, 0x000000000018997f, 0x000000000034fac0)
 bounce: [0x00000000bfc0d000, 0x00000000bfc9697f, 0x00000000bfe5cac0)
Post relocation: addr: 0x00000000bfc0d000 memsz: 0x000000000024fac0 filesz: 0x000000000008997f
using LZMA
[ 0xbfc0d000, bfe5cac0, 0xbfe5cac0) <- fff5faf0
dest bfc0d000, end bfe5cac0, bouncebuffer bfc0d000
move suffix around: from bfc4bad0, to 13ead0, amount: 210ff0
Loaded segments
BS: Exiting BS_PAYLOAD_LOAD state.
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 213882 exit 0
BS: Entering BS_PAYLOAD_BOOT state.
PCH watchdog disabled
Jumping to boot code at 00008200(bfe9c000)
CPU0: stack: 00135000 - 00136000, lowest used address 00135a30, stack used: 1488 bytes
entry    = 0x00008200
lb_start = 0x00100000
lb_size  = 0x0003ead0
buffer   = 0xbfc0d000