

coreboot-4.9-1213-gb80ae90b6e Wed Apr  3 21:52:35 UTC 2019 romstage starting (log level: 8)...
APIC 00: CPU Family_Model = 00500f20

APIC 00: ** Enter AmdInitReset [00020007]
AmdInitReset() returned AGESA_SUCCESS
APIC 00: Heap in LocalCache (2) at 0x00400000
APIC 00: ** Exit  AmdInitReset [00020007]

APIC 00: ** Enter AmdInitEarly [00020002]
AmdInitEarly() returned AGESA_SUCCESS
APIC 00: Heap in LocalCache (2) at 0x00400000
APIC 00: ** Exit  AmdInitEarly [00020002]

APIC 00: ** Enter AmdInitPost [00020006]
AmdInitPost() returned AGESA_SUCCESS
APIC 00: Heap in TempMem (3) at 0x000b0000
APIC 00: ** Exit  AmdInitPost [00020006]
CBMEM:
IMD: root @ c7fff000 254 entries.
IMD: root @ c7ffec00 62 entries.
MTRR Range: Start=0 End=80000000 (Size 80000000)
MTRR Range: Start=80000000 End=c0000000 (Size 40000000)
MTRR Range: Start=c0000000 End=c8000000 (Size 8000000)
MTRR Range: Start=ffc00000 End=0 (Size 400000)
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'fallback/postcar'
CBFS: Found @ offset 5b900 size 3190
Decompressing stage fallback/postcar @ 0xc7fbdfc0 (28528 bytes)
Loading module at c7fbe000 with entry c7fbe000. filesize: 0x3090 memsize: 0x6f30
Processing 41 relocs. Offset value of 0xc5fbe000


coreboot-4.9-1213-gb80ae90b6e Wed Apr  3 21:52:35 UTC 2019 ramstage starting (log level: 8)...
Normal boot.

APIC 00: ** Enter AmdInitEnv [00020003]
Wiped HEAP at [10000000 - 1002ffff]
AmdInitEnv() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit  AmdInitEnv [00020003]
BS: BS_PRE_DEVICE times (us): entry 3927 run 0 exit 0
SB800: sb800_init
SB800 - Smbus.c - alink_ab_indx - Start.
SB800 - Smbus.c - alink_ab_indx - End.
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 18 exit 0
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
DOMAIN: 0000: enabled 1
APIC: 00: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 1
PCI: 00:15.2: enabled 1
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:18.6: enabled 1
PCI: 00:18.7: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 0
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 0
PNP: 002e.107: enabled 0
PNP: 002e.207: enabled 0
PNP: 002e.307: enabled 1
PNP: 002e.407: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.9: enabled 1
PNP: 002e.109: enabled 0
PNP: 002e.209: enabled 0
PNP: 002e.309: enabled 0
PNP: 002e.a: enabled 1
PNP: 002e.b: enabled 1
PNP: 002e.c: enabled 0
PNP: 002e.d: enabled 1
PNP: 002e.e: enabled 0
PNP: 002e.f: enabled 0
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:01.0: enabled 1
  PCI: 00:01.1: enabled 1
  PCI: 00:04.0: enabled 1
  PCI: 00:05.0: enabled 0
  PCI: 00:06.0: enabled 0
  PCI: 00:07.0: enabled 0
  PCI: 00:08.0: enabled 0
  PCI: 00:11.0: enabled 1
  PCI: 00:12.0: enabled 1
  PCI: 00:12.2: enabled 1
  PCI: 00:13.0: enabled 1
  PCI: 00:13.2: enabled 1
  PCI: 00:14.0: enabled 1
   I2C: 00:50: enabled 1
   I2C: 00:51: enabled 1
  PCI: 00:14.1: enabled 1
  PCI: 00:14.2: enabled 1
  PCI: 00:14.3: enabled 1
   PNP: 002e.0: enabled 0
   PNP: 002e.1: enabled 0
   PNP: 002e.2: enabled 1
   PNP: 002e.3: enabled 0
   PNP: 002e.5: enabled 1
   PNP: 002e.6: enabled 0
   PNP: 002e.107: enabled 0
   PNP: 002e.207: enabled 0
   PNP: 002e.307: enabled 1
   PNP: 002e.407: enabled 0
   PNP: 002e.8: enabled 0
   PNP: 002e.9: enabled 1
   PNP: 002e.109: enabled 0
   PNP: 002e.209: enabled 0
   PNP: 002e.309: enabled 0
   PNP: 002e.a: enabled 1
   PNP: 002e.b: enabled 1
   PNP: 002e.c: enabled 0
   PNP: 002e.d: enabled 1
   PNP: 002e.e: enabled 0
   PNP: 002e.f: enabled 0
  PCI: 00:14.4: enabled 1
  PCI: 00:14.5: enabled 1
  PCI: 00:15.0: enabled 1
  PCI: 00:15.1: enabled 1
  PCI: 00:15.2: enabled 1
  PCI: 00:15.3: enabled 0
  PCI: 00:16.0: enabled 0
  PCI: 00:16.2: enabled 0
  PCI: 00:18.0: enabled 1
  PCI: 00:18.1: enabled 1
  PCI: 00:18.2: enabled 1
  PCI: 00:18.3: enabled 1
  PCI: 00:18.4: enabled 1
  PCI: 00:18.5: enabled 1
  PCI: 00:18.6: enabled 1
  PCI: 00:18.7: enabled 1
Mainboard E350M1 Enable.
Root Device scanning...
root_dev_scan_bus for Root Device
setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000
setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000001
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
CPU_CLUSTER: 0 scanning...
  AP siblings=1
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
scan_bus: scanning of bus CPU_CLUSTER: 0 took 8 usecs
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [1022/1510] ops
PCI: 00:00.0 [1022/1510] enabled
PCI: 00:01.0 [1002/9802] enabled
PCI: 00:01.1 [1002/1314] enabled
PCI: Static device PCI: 00:04.0 not found, disabling it.
PCI: 00:11.0 [1002/4390] enabled
PCI: 00:12.0 [1002/4397] ops
PCI: 00:12.0 [1002/4397] enabled
PCI: 00:12.2 [1002/4396] ops
PCI: 00:12.2 [1002/4396] enabled
PCI: 00:13.0 [1002/4397] ops
PCI: 00:13.0 [1002/4397] enabled
PCI: 00:13.2 [1002/4396] ops
PCI: 00:13.2 [1002/4396] enabled
IOAPIC: Clearing IOAPIC at fec00000
IOAPIC: 24 interrupts
IOAPIC: reg 0x00000000 value 0x00000000 0x00010000
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
  reg 0x0000: 0x02000000
  reg 0x0001: 0x00178021
  reg 0x0002: 0x02000000
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
PCI: 00:14.0 [1002/4385] enabled
PCI: Static device PCI: 00:14.1 not found, disabling it.
PCI: 00:14.2 [1002/4383] ops
PCI: 00:14.2 [1002/4383] enabled
PCI: 00:14.3 [1002/439d] bus ops
PCI: 00:14.3 [1002/439d] enabled
PCI: 00:14.4 [1002/4384] enabled
PCI: 00:14.5 [1002/4399] ops
PCI: 00:14.5 [1002/4399] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:15.0 subordinate bus PCI Express
PCI: 00:15.0 [1002/43a0] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:15.1 subordinate bus PCI Express
PCI: 00:15.1 [1002/43a1] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:15.2 subordinate bus PCI Express
PCI: 00:15.2 [1002/43a2] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:15.3 subordinate bus PCI Express
PCI: 00:15.3 [1002/43a3] disabled
SB800: sb_Before_Pci_Init
PCI: 00:18.0 [1022/1700] enabled
PCI: 00:18.1 [1022/1701] enabled
PCI: 00:18.2 [1022/1702] enabled
PCI: 00:18.3 [1022/1703] enabled
PCI: 00:18.4 [1022/1704] enabled
PCI: 00:18.5 [1022/1718] enabled
PCI: 00:18.6 [1022/1716] enabled
PCI: 00:18.7 [1022/1719] enabled
PCI: Leftover static devices:
PCI: 00:04.0
PCI: 00:05.0
PCI: 00:06.0
PCI: 00:07.0
PCI: 00:08.0
PCI: 00:14.1
PCI: 00:16.0
PCI: 00:16.2
PCI: Check your devicetree.cb.
PCI: 00:14.3 scanning...
scan_lpc_bus for PCI: 00:14.3
PNP: 002e.0 disabled
PNP: 002e.1 disabled
PNP: 002e.2 enabled
PNP: 002e.3 disabled
PNP: 002e.5 enabled
PNP: 002e.6 disabled
PNP: 002e.107 disabled
PNP: 002e.207 disabled
PNP: 002e.307 enabled
PNP: 002e.407 disabled
PNP: 002e.8 disabled
PNP: 002e.9 enabled
PNP: 002e.109 disabled
PNP: 002e.209 disabled
PNP: 002e.309 disabled
PNP: 002e.a enabled
PNP: 002e.b enabled
PNP: 002e.c disabled
PNP: 002e.d enabled
PNP: 002e.e disabled
PNP: 002e.f disabled
scan_lpc_bus for PCI: 00:14.3 done
scan_bus: scanning of bus PCI: 00:14.3 took 494 usecs
PCI: 00:14.4 scanning...
do_pci_scan_bridge for PCI: 00:14.4
PCI: pci_scan_bus for bus 01
scan_bus: scanning of bus PCI: 00:14.4 took 74 usecs
PCI: 00:15.0 scanning...
do_pci_scan_bridge for PCI: 00:15.0
PCI: pci_scan_bus for bus 02
scan_bus: scanning of bus PCI: 00:15.0 took 60 usecs
PCI: 00:15.1 scanning...
do_pci_scan_bridge for PCI: 00:15.1
PCI: pci_scan_bus for bus 03
PCI: 03:00.0 [10ec/8168] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
ASPM: Enabled L0s and L1
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Failed to enable LTR for dev = PCI: 03:00.0
scan_bus: scanning of bus PCI: 00:15.1 took 136 usecs
PCI: 00:15.2 scanning...
do_pci_scan_bridge for PCI: 00:15.2
PCI: pci_scan_bus for bus 04
scan_bus: scanning of bus PCI: 00:15.2 took 62 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 139576 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 139602 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 139818 exit 0
found VGA at PCI: 00:01.0
Setting up VGA for PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

Fam14h - domain_read_resources
DOMAIN: 0000 read_resources bus 0 link: 0

Fam14h - nb_read_resources
Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
PCI: 00:14.0 read_resources bus 0 link: 0
I2C: 00:50 missing read_resources
I2C: 00:51 missing read_resources
PCI: 00:14.0 read_resources bus 0 link: 0 done
SB800 - Lpc.c - lpc_read_resources - Start.
SB800 - Lpc.c - lpc_read_resources - End.
PCI: 00:14.3 read_resources bus 0 link: 0
PCI: 00:14.3 read_resources bus 0 link: 0 done
PCI: 00:14.4 read_resources bus 1 link: 0
PCI: 00:14.4 read_resources bus 1 link: 0 done
PCI: 00:15.0 read_resources bus 2 link: 0
PCI: 00:15.0 read_resources bus 2 link: 0 done
PCI: 00:15.1 read_resources bus 3 link: 0
PCI: 00:15.1 read_resources bus 3 link: 0 done
PCI: 00:15.2 register 10(ffffffff), read-only ignoring it
PCI: 00:15.2 register 14(ffffffff), read-only ignoring it
PCI: 00:15.2 register 38(ffffffff), read-only ignoring it
PCI: 00:15.2 read_resources bus 4 link: 0
PCI: 00:15.2 read_resources bus 4 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: 01
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
   PCI: 00:01.0
   PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
   PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14
   PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18
   PCI: 00:01.1
   PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10
   PCI: 00:11.0
   PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
   PCI: 00:11.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24
   PCI: 00:12.0
   PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:12.2
   PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
   PCI: 00:13.0
   PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:13.2
   PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
   PCI: 00:14.0 child on link 0 I2C: 00:50
    I2C: 00:50
    I2C: 00:51
   PCI: 00:14.2
   PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:14.3 child on link 0 PNP: 002e.0
   PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
   PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 002e.0
    PNP: 002e.1
    PNP: 002e.2
    PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
    PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.3
    PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
    PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.5
    PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit fff flags c0000100 index 60
    PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit fff flags c0000100 index 62
    PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
    PNP: 002e.6
    PNP: 002e.6 resource base 100 size 8 align 3 gran 3 limit fff flags c0000100 index 60
    PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.107
    PNP: 002e.207
    PNP: 002e.307
    PNP: 002e.307 resource base 28 size 0 align 0 gran 0 limit 0 flags c0000400 index 23
    PNP: 002e.307 resource base bf size 0 align 0 gran 0 limit 0 flags c0000400 index e4
    PNP: 002e.307 resource base 27 size 0 align 0 gran 0 limit 0 flags c0000400 index ed
    PNP: 002e.407
    PNP: 002e.8
    PNP: 002e.9
    PNP: 002e.9 resource base 42 size 0 align 0 gran 0 limit 0 flags c0000400 index 2a
    PNP: 002e.9 resource base e3 size 0 align 0 gran 0 limit 0 flags c0000400 index e0
    PNP: 002e.109
    PNP: 002e.209
    PNP: 002e.309
    PNP: 002e.a
    PNP: 002e.a resource base 10 size 0 align 0 gran 0 limit 0 flags c0000400 index e7
    PNP: 002e.b
    PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags c0000100 index 60
    PNP: 002e.b resource base 0 size 2 align 1 gran 1 limit fff flags c0000100 index 62
    PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.c
    PNP: 002e.d
    PNP: 002e.d resource base 90 size 0 align 0 gran 0 limit 0 flags c0000400 index ec
    PNP: 002e.e
    PNP: 002e.e resource base 0 size 8 align 3 gran 3 limit fff flags c0000100 index 60
    PNP: 002e.e resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.f
   PCI: 00:14.4
   PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
   PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:14.5
   PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:15.0
   PCI: 00:15.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
   PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:15.1 child on link 0 PCI: 03:00.0
   PCI: 00:15.1 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
   PCI: 00:15.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:15.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 03:00.0
    PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
    PCI: 03:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18
    PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
   PCI: 00:15.2
   PCI: 00:15.3
   PCI: 00:18.0
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.4
   PCI: 00:18.5
   PCI: 00:18.6
   PCI: 00:18.7
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:15.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:15.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:15.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 03:00.0 10 *  [0x0 - 0xff] io
PCI: 00:15.1 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:15.1 1c *  [0x0 - 0xfff] io
PCI: 00:01.0 14 *  [0x1000 - 0x10ff] io
PCI: 00:11.0 20 *  [0x1400 - 0x140f] io
PCI: 00:11.0 10 *  [0x1410 - 0x1417] io
PCI: 00:11.0 18 *  [0x1418 - 0x141f] io
PCI: 00:11.0 14 *  [0x1420 - 0x1423] io
PCI: 00:11.0 1c *  [0x1424 - 0x1427] io
DOMAIN: 0000 io: base: 1428 size: 1428 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:15.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:15.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:15.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:15.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:15.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 03:00.0 20 *  [0x0 - 0x3fff] prefmem
PCI: 03:00.0 18 *  [0x4000 - 0x4fff] prefmem
PCI: 00:15.1 prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:15.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:15.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:01.0 10 *  [0x0 - 0xfffffff] prefmem
PCI: 00:15.1 24 *  [0x10000000 - 0x100fffff] prefmem
PCI: 00:01.0 18 *  [0x10100000 - 0x1013ffff] mem
PCI: 00:01.1 10 *  [0x10140000 - 0x10143fff] mem
PCI: 00:14.2 10 *  [0x10144000 - 0x10147fff] mem
PCI: 00:12.0 10 *  [0x10148000 - 0x10148fff] mem
PCI: 00:13.0 10 *  [0x10149000 - 0x10149fff] mem
PCI: 00:14.5 10 *  [0x1014a000 - 0x1014afff] mem
PCI: 00:11.0 24 *  [0x1014b000 - 0x1014b3ff] mem
PCI: 00:12.2 10 *  [0x1014c000 - 0x1014c0ff] mem
PCI: 00:13.2 10 *  [0x1014d000 - 0x1014d0ff] mem
DOMAIN: 0000 mem: base: 1014d100 size: 1014d100 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 c0010058 base f8000000 limit fbffffff mem (fixed)
constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
skipping PNP: 002e.307@23 fixed resource, size=0!
skipping PNP: 002e.307@e4 fixed resource, size=0!
skipping PNP: 002e.307@ed fixed resource, size=0!
skipping PNP: 002e.9@2a fixed resource, size=0!
skipping PNP: 002e.9@e0 fixed resource, size=0!
skipping PNP: 002e.a@e7 fixed resource, size=0!
skipping PNP: 002e.d@ec fixed resource, size=0!
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:1428 align:12 gran:0 limit:ffff
PCI: 00:15.1 1c *  [0x1000 - 0x1fff] io
PCI: 00:01.0 14 *  [0x2000 - 0x20ff] io
PCI: 00:11.0 20 *  [0x2400 - 0x240f] io
PCI: 00:11.0 10 *  [0x2410 - 0x2417] io
PCI: 00:11.0 18 *  [0x2418 - 0x241f] io
PCI: 00:11.0 14 *  [0x2420 - 0x2423] io
PCI: 00:11.0 1c *  [0x2424 - 0x2427] io
DOMAIN: 0000 io: next_base: 2428 size: 1428 align: 12 gran: 0 done
PCI: 00:14.4 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:14.4 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:15.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:15.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:15.1 io: base:1000 size:1000 align:12 gran:12 limit:1fff
PCI: 03:00.0 10 *  [0x1000 - 0x10ff] io
PCI: 00:15.1 io: next_base: 1100 size: 1000 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:e0000000 size:1014d100 align:28 gran:0 limit:f7ffffff
PCI: 00:01.0 10 *  [0xe0000000 - 0xefffffff] prefmem
PCI: 00:15.1 24 *  [0xf0000000 - 0xf00fffff] prefmem
PCI: 00:01.0 18 *  [0xf0100000 - 0xf013ffff] mem
PCI: 00:01.1 10 *  [0xf0140000 - 0xf0143fff] mem
PCI: 00:14.2 10 *  [0xf0144000 - 0xf0147fff] mem
PCI: 00:12.0 10 *  [0xf0148000 - 0xf0148fff] mem
PCI: 00:13.0 10 *  [0xf0149000 - 0xf0149fff] mem
PCI: 00:14.5 10 *  [0xf014a000 - 0xf014afff] mem
PCI: 00:11.0 24 *  [0xf014b000 - 0xf014b3ff] mem
PCI: 00:12.2 10 *  [0xf014c000 - 0xf014c0ff] mem
PCI: 00:13.2 10 *  [0xf014d000 - 0xf014d0ff] mem
DOMAIN: 0000 mem: next_base: f014d100 size: 1014d100 align: 28 gran: 0 done
PCI: 00:14.4 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:14.4 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:14.4 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:15.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:15.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:15.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:15.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:15.1 prefmem: base:f0000000 size:100000 align:20 gran:20 limit:f00fffff
PCI: 03:00.0 20 *  [0xf0000000 - 0xf0003fff] prefmem
PCI: 03:00.0 18 *  [0xf0004000 - 0xf0004fff] prefmem
PCI: 00:15.1 prefmem: next_base: f0005000 size: 100000 align: 20 gran: 20 done
PCI: 00:15.1 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:15.1 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0

Fam14h - domain_set_resources
  amsr - incoming dev = c7ee9340
adsr: (before) basek = 0, limitk = 11effffff.
adsr: (after) basek = 0, limitk = 47bfff, sizek = 47c000.
adsr - 0xa0000 to 0xbffff resource.
adsr: mmio_basek=00380000, basek=00000300, limitk=0047bfff
0: mmio_basek=00380000, basek=00400000, limitk=0047bfff
  adsr - mmio_basek = 380000.
add_uma_resource_below_tolm: uma size 0x18000000, memory start 0xc8000000
DOMAIN: 0000 assign_resources, bus 0 link: 0

Fam14h - nb_set_resources

Fam14h - create_vga_resource

Fam14h - set_resource
PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:01.0 14 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
PCI: 00:01.0 18 <- [0x00f0100000 - 0x00f013ffff] size 0x00040000 gran 0x12 mem
PCI: 00:01.1 10 <- [0x00f0140000 - 0x00f0143fff] size 0x00004000 gran 0x0e mem
PCI: 00:11.0 10 <- [0x0000002410 - 0x0000002417] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x0000002420 - 0x0000002423] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x0000002418 - 0x000000241f] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x0000002424 - 0x0000002427] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000002400 - 0x000000240f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f014b000 - 0x00f014b3ff] size 0x00000400 gran 0x0a mem
PCI: 00:12.0 10 <- [0x00f0148000 - 0x00f0148fff] size 0x00001000 gran 0x0c mem
PCI: 00:12.2 10 <- [0x00f014c000 - 0x00f014c0ff] size 0x00000100 gran 0x08 mem
PCI: 00:13.0 10 <- [0x00f0149000 - 0x00f0149fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00f014d000 - 0x00f014d0ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.2 10 <- [0x00f0144000 - 0x00f0147fff] size 0x00004000 gran 0x0e mem64
SB800 - Lpc.c - lpc_set_resources - Start.
PCI: 00:14.3 assign_resources, bus 0 link: 0
PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PNP: 002e.307 23 <- [0x0000000028 - 0x0000000027] size 0x00000000 gran 0x00 irq
PNP: 002e.307 e4 <- [0x00000000bf - 0x00000000be] size 0x00000000 gran 0x00 irq
PNP: 002e.307 ed <- [0x0000000027 - 0x0000000026] size 0x00000000 gran 0x00 irq
PNP: 002e.9 2a <- [0x0000000042 - 0x0000000041] size 0x00000000 gran 0x00 irq
PNP: 002e.9 e0 <- [0x00000000e3 - 0x00000000e2] size 0x00000000 gran 0x00 irq
PNP: 002e.a e7 <- [0x0000000010 - 0x000000000f] size 0x00000000 gran 0x00 irq
PNP: 002e.b 60 <- [0x0000000290 - 0x0000000291] size 0x00000002 gran 0x01 io
PNP: 002e.b 62 <- [0x0000000000 - 0x0000000001] size 0x00000002 gran 0x01 io
PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq
PNP: 002e.d ec <- [0x0000000090 - 0x000000008f] size 0x00000000 gran 0x00 irq
PCI: 00:14.3 assign_resources, bus 0 link: 0
SB800 - Lpc.c - lpc_set_resources - End.
PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:14.5 10 <- [0x00f014a000 - 0x00f014afff] size 0x00001000 gran 0x0c mem
PCI: 00:15.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:15.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:15.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:15.1 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 03 io
PCI: 00:15.1 24 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14 bus 03 prefmem
PCI: 00:15.1 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 mem
PCI: 00:15.1 assign_resources, bus 3 link: 0
PCI: 03:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 03:00.0 18 <- [0x00f0004000 - 0x00f0004fff] size 0x00001000 gran 0x0c prefmem64
PCI: 03:00.0 20 <- [0x00f0000000 - 0x00f0003fff] size 0x00004000 gran 0x0e prefmem64
PCI: 00:15.1 assign_resources, bus 3 link: 0
DOMAIN: 0000 assign_resources, bus 0 link: 0
  adsr - leaving this lovely routine.
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: 01
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 1000 size 1428 align 12 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base e0000000 size 1014d100 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
  DOMAIN: 0000 resource base c0000 size dff40000 align 0 gran 0 limit 0 flags e0004200 index 20
  DOMAIN: 0000 resource base 100000000 size 1efffc00 align 0 gran 0 limit 0 flags e0004200 index 30
  DOMAIN: 0000 resource base c8000000 size 18000000 align 0 gran 0 limit 0 flags f0000200 index 7
   PCI: 00:00.0
   PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
   PCI: 00:01.0
   PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001200 index 10
   PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 14
   PCI: 00:01.0 resource base f0100000 size 40000 align 18 gran 18 limit f013ffff flags 60000200 index 18
   PCI: 00:01.1
   PCI: 00:01.1 resource base f0140000 size 4000 align 14 gran 14 limit f0143fff flags 60000200 index 10
   PCI: 00:11.0
   PCI: 00:11.0 resource base 2410 size 8 align 3 gran 3 limit 2417 flags 60000100 index 10
   PCI: 00:11.0 resource base 2420 size 4 align 2 gran 2 limit 2423 flags 60000100 index 14
   PCI: 00:11.0 resource base 2418 size 8 align 3 gran 3 limit 241f flags 60000100 index 18
   PCI: 00:11.0 resource base 2424 size 4 align 2 gran 2 limit 2427 flags 60000100 index 1c
   PCI: 00:11.0 resource base 2400 size 10 align 4 gran 4 limit 240f flags 60000100 index 20
   PCI: 00:11.0 resource base f014b000 size 400 align 12 gran 10 limit f014b3ff flags 60000200 index 24
   PCI: 00:12.0
   PCI: 00:12.0 resource base f0148000 size 1000 align 12 gran 12 limit f0148fff flags 60000200 index 10
   PCI: 00:12.2
   PCI: 00:12.2 resource base f014c000 size 100 align 12 gran 8 limit f014c0ff flags 60000200 index 10
   PCI: 00:13.0
   PCI: 00:13.0 resource base f0149000 size 1000 align 12 gran 12 limit f0149fff flags 60000200 index 10
   PCI: 00:13.2
   PCI: 00:13.2 resource base f014d000 size 100 align 12 gran 8 limit f014d0ff flags 60000200 index 10
   PCI: 00:14.0 child on link 0 I2C: 00:50
    I2C: 00:50
    I2C: 00:51
   PCI: 00:14.2
   PCI: 00:14.2 resource base f0144000 size 4000 align 14 gran 14 limit f0147fff flags 60000201 index 10
   PCI: 00:14.3 child on link 0 PNP: 002e.0
   PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
   PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 002e.0
    PNP: 002e.1
    PNP: 002e.2
    PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60
    PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 002e.3
    PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
    PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.5
    PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit fff flags e0000100 index 60
    PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit fff flags e0000100 index 62
    PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72
    PNP: 002e.6
    PNP: 002e.6 resource base 100 size 8 align 3 gran 3 limit fff flags c0000100 index 60
    PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.107
    PNP: 002e.207
    PNP: 002e.307
    PNP: 002e.307 resource base 28 size 0 align 0 gran 0 limit 0 flags e0000400 index 23
    PNP: 002e.307 resource base bf size 0 align 0 gran 0 limit 0 flags e0000400 index e4
    PNP: 002e.307 resource base 27 size 0 align 0 gran 0 limit 0 flags e0000400 index ed
    PNP: 002e.407
    PNP: 002e.8
    PNP: 002e.9
    PNP: 002e.9 resource base 42 size 0 align 0 gran 0 limit 0 flags e0000400 index 2a
    PNP: 002e.9 resource base e3 size 0 align 0 gran 0 limit 0 flags e0000400 index e0
    PNP: 002e.109
    PNP: 002e.209
    PNP: 002e.309
    PNP: 002e.a
    PNP: 002e.a resource base 10 size 0 align 0 gran 0 limit 0 flags e0000400 index e7
    PNP: 002e.b
    PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags e0000100 index 60
    PNP: 002e.b resource base 0 size 2 align 1 gran 1 limit fff flags e0000100 index 62
    PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 002e.c
    PNP: 002e.d
    PNP: 002e.d resource base 90 size 0 align 0 gran 0 limit 0 flags e0000400 index ec
    PNP: 002e.e
    PNP: 002e.e resource base 0 size 8 align 3 gran 3 limit fff flags c0000100 index 60
    PNP: 002e.e resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.f
   PCI: 00:14.4
   PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
   PCI: 00:14.5
   PCI: 00:14.5 resource base f014a000 size 1000 align 12 gran 12 limit f014afff flags 60000200 index 10
   PCI: 00:15.0
   PCI: 00:15.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:15.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:15.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
   PCI: 00:15.1 child on link 0 PCI: 03:00.0
   PCI: 00:15.1 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
   PCI: 00:15.1 resource base f0000000 size 100000 align 20 gran 20 limit f00fffff flags 60081202 index 24
   PCI: 00:15.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
    PCI: 03:00.0
    PCI: 03:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10
    PCI: 03:00.0 resource base f0004000 size 1000 align 12 gran 12 limit f0004fff flags 60001201 index 18
    PCI: 03:00.0 resource base f0000000 size 4000 align 14 gran 14 limit f0003fff flags 60001201 index 20
   PCI: 00:15.2
   PCI: 00:15.3
   PCI: 00:18.0
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.4
   PCI: 00:18.5
   PCI: 00:18.6
   PCI: 00:18.7
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 3269 exit 0

APIC 00: ** Enter AmdInitMid [00020005]
SB800: sb_After_Pci_Init
SB800: sb_Mid_Post_Init
AmdInitMid() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit  AmdInitMid [00020005]
Warning: Can't write PCI_INTR 0xC00/0xC01 registers because
'mainboard_picr_data' or 'mainboard_intr_data' tables are NULL
Warning: Can't write PCI IRQ assignments because 'mainboard_pirq_data' structure does not exist
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 subsystem <- 1022/1510
PCI: 00:01.0 cmd <- 07
PCI: 00:01.1 subsystem <- 1022/1510
PCI: 00:01.1 cmd <- 02
PCI: 00:11.0 subsystem <- 1022/1510
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 subsystem <- 1022/1510
PCI: 00:12.0 cmd <- 02
PCI: 00:12.2 subsystem <- 1022/1510
PCI: 00:12.2 cmd <- 02
PCI: 00:13.0 subsystem <- 1022/1510
PCI: 00:13.0 cmd <- 02
PCI: 00:13.2 subsystem <- 1022/1510
PCI: 00:13.2 cmd <- 02
PCI: 00:14.0 subsystem <- 1022/1510
PCI: 00:14.0 cmd <- 403
PCI: 00:14.2 subsystem <- 1022/1510
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1022/1510
PCI: 00:14.3 cmd <- 0f
PCI: 00:14.4 bridge ctrl <- 0003
PCI: 00:14.4 cmd <- 21
PCI: 00:14.5 subsystem <- 1022/1510
PCI: 00:14.5 cmd <- 02
PCI: 00:15.0 bridge ctrl <- 0003
PCI: 00:15.0 cmd <- 00
PCI: 00:15.1 bridge ctrl <- 0003
PCI: 00:15.1 cmd <- 07
PCI: 00:15.2 bridge ctrl <- ffff
PCI: 00:15.2 cmd <- ffff
PCI: 00:18.0 subsystem <- 1022/1510
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1022/1510
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1022/1510
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 subsystem <- 1022/1510
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 subsystem <- 1022/1510
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 subsystem <- 1022/1510
PCI: 00:18.5 cmd <- 00
PCI: 00:18.6 subsystem <- 1022/1510
PCI: 00:18.6 cmd <- 00
PCI: 00:18.7 subsystem <- 1022/1510
PCI: 00:18.7 cmd <- 00
PCI: 03:00.0 cmd <- 03
done.
BS: BS_DEV_ENABLE times (us): entry 9435 run 378 exit 0
Initializing devices...
Root Device init ...
Root Device init finished in 1 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Initializing CPU #0
CPU: vendor AMD device 500f20
CPU: family 14, model 02, stepping 00
Model 14 Init.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local APIC... apic_id: 0x00 done.
siblings = 01, CPU #0 initialized
CPU1: stack_base c7eee000, stack_top c7eeeff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
Waiting for 1 CPUS to stop
CPU: vendor AMD device 500f20
CPU: family 14, model 02, stepping 00
Model 14 Init.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local APIC... apic_id: 0x01 done.
siblings = 01, CPU #1 initialized
All AP CPUs stopped (95 loops)
CPU0: stack: c7eef000 - c7ef0000, lowest used address c7eef6bc, stack used: 2372 bytes
CPU1: stack: c7eee000 - c7eef000, lowest used address c7eeedac, stack used: 596 bytes
CPU_CLUSTER: 0 init finished in 12990 usecs
DOMAIN: 0000 init ...
DOMAIN: 0000 init finished in 1 usecs
PCI: 00:00.0 init ...
Northbridge init
PCI: 00:00.0 init finished in 2 usecs
PCI: 00:01.0 init ...
PCI: 00:01.0 init finished in 1 usecs
PCI: 00:01.1 init ...
PCI: 00:01.1 init finished in 1 usecs
PCI: 00:11.0 init ...
PCI: 00:11.0 init finished in 1 usecs
PCI: 00:14.0 init ...
PCI: 00:14.0 init finished in 1 usecs
PCI: 00:14.3 init ...
SB800 - Late.c - lpc_init - Start.
RTC Init
SB800 - Late.c - lpc_init - End.
PCI: 00:14.3 init finished in 119 usecs
PCI: 00:18.0 init ...
PCI: 00:18.0 init finished in 1 usecs
PCI: 00:18.1 init ...
PCI: 00:18.1 init finished in 1 usecs
PCI: 00:18.2 init ...
PCI: 00:18.2 init finished in 1 usecs
PCI: 00:18.3 init ...
PCI: 00:18.3 init finished in 1 usecs
PCI: 00:18.4 init ...
PCI: 00:18.4 init finished in 1 usecs
PCI: 00:18.5 init ...
PCI: 00:18.5 init finished in 1 usecs
PCI: 00:18.6 init ...
PCI: 00:18.6 init finished in 1 usecs
PCI: 00:18.7 init ...
PCI: 00:18.7 init finished in 1 usecs
PNP: 002e.2 init ...
PNP: 002e.2 init finished in 1 usecs
PNP: 002e.5 init ...
nct5572d_init: Disable mouse controller.PNP: 002e.5 init finished in 25 usecs
PNP: 002e.307 init ...
PNP: 002e.307 init finished in 1 usecs
PNP: 002e.9 init ...
PNP: 002e.9 init finished in 1 usecs
PNP: 002e.a init ...
set power off after power fail
PNP: 002e.a init finished in 16 usecs
PNP: 002e.b init ...
PNP: 002e.b init finished in 1 usecs
PNP: 002e.d init ...
PNP: 002e.d init finished in 1 usecs
PCI: 03:00.0 init ...
PCI: 03:00.0 init finished in 1 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
DOMAIN: 0000: enabled 1
APIC: 00: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:04.0: enabled 0
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 1
PCI: 00:15.2: enabled 1
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:18.6: enabled 1
PCI: 00:18.7: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 0
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 0
PNP: 002e.107: enabled 0
PNP: 002e.207: enabled 0
PNP: 002e.307: enabled 1
PNP: 002e.407: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.9: enabled 1
PNP: 002e.109: enabled 0
PNP: 002e.209: enabled 0
PNP: 002e.309: enabled 0
PNP: 002e.a: enabled 1
PNP: 002e.b: enabled 1
PNP: 002e.c: enabled 0
PNP: 002e.d: enabled 1
PNP: 002e.e: enabled 0
PNP: 002e.f: enabled 0
APIC: 01: enabled 1
PCI: 03:00.0: enabled 1
BS: BS_DEV_INIT times (us): entry 0 run 14269 exit 0
Finalize devices...
Devices finalized

APIC 00: ** Enter AmdInitLate [00020004]
SB800: sb_Late_Post
AmdInitLate() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit  AmdInitLate [00020004]

APIC 00: ** Enter AmdS3Save [0002000b]
Manufacturer: ef
SF: Detected W25Q32_V with sector size 0x1000, total 0x400000
SF: Successfully erased 4096 bytes @ 0xffff1000
Manufacturer: ef
SF: Detected W25Q32_V with sector size 0x1000, total 0x400000
SF: Successfully erased 4096 bytes @ 0xffff0000
AmdS3Save() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit  AmdS3Save [0002000b]
BS: BS_POST_DEVICE times (us): entry 0 run 4 exit 221286
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 0 exit 0
Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
Writing IRQ routing tables to 0xc7d72000...write_pirq_routing_table done.
PIRQ table: 48 bytes.
Wrote the mp table end at: 000f0410 - 000f05fc
Wrote the mp table end at: c7d71010 - c7d711fc
MP table: 508 bytes.
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 5eb00 size 25b6
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at c7d4d000.
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * FADT
ACPI_BLK_BASE: 0x0800
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'pci1002,9802.rom'
CBFS: Found @ offset 4b880 size 10000
In CBFS, ROM address for PCI: 00:01.0 = ffc4bac8
PCI expansion ROM, signature 0xaa55, INIT size 0xe200, data ptr 0x01b4
PCI ROM image, vendor ID 1002, device ID 9802,
PCI ROM image, Class Code 030000, Code Type 00
PCI: 00:01.0: Missing ACPI scope
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI:    * MADT
ACPI: added table 3/32, length now 48
current = c7d4fa30
ACPI: added table 4/32, length now 52
ACPI:  * SRAT at c7d4fa58
  AGESA SRAT table NULL. Skipping.
ACPI:  * SLIT at c7d4fa58
  AGESA SLIT table NULL. Skipping.
ACPI:  * AGESA ALIB SSDT at c7d4fa60
ACPI: added table 5/32, length now 56
ACPI:  * AGESA SSDT Pstate at c7d510f0
ACPI: added table 6/32, length now 60
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'pci1002,9802.rom'
CBFS: Found @ offset 4b880 size 10000
In CBFS, ROM address for PCI: 00:01.0 = ffc4bac8
PCI expansion ROM, signature 0xaa55, INIT size 0xe200, data ptr 0x01b4
PCI ROM image, vendor ID 1002, device ID 9802,
PCI ROM image, Class Code 030000, Code Type 00
ACPI:    * VFCT at c7d514d0
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'pci1002,9802.rom'
CBFS: Found @ offset 4b880 size 10000
In CBFS, ROM address for PCI: 00:01.0 = ffc4bac8
PCI expansion ROM, signature 0xaa55, INIT size 0xe200, data ptr 0x01b4
PCI ROM image, vendor ID 1002, device ID 9802,
PCI ROM image, Class Code 030000, Code Type 00
           Copying VBIOS image from ffc4bac8
ACPI: added table 7/32, length now 64
ACPI:    * HPET
ACPI: added table 8/32, length now 68
ACPI: done.
ACPI tables: 75648 bytes.
smbios_write_tables: c7d4c000
SMBIOS tables: 347 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 807
Writing coreboot table at 0xc7d73000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-00000000c7d4bfff: RAM
 3. 00000000c7d4c000-00000000c7eb0fff: CONFIGURATION TABLES
 4. 00000000c7eb1000-00000000c7fb5fff: RAMSTAGE
 5. 00000000c7fb6000-00000000c7ffffff: CONFIGURATION TABLES
 6. 00000000c8000000-00000000dfffffff: RESERVED
 7. 00000000f8000000-00000000fbffffff: RESERVED
 8. 0000000100000000-000000011effffff: RAM
Manufacturer: ef
SF: Detected W25Q32_V with sector size 0x1000, total 0x400000
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
FMAP: Found "FLASH" version 1.1 at 0.
FMAP: base = ffc00000 size = 400000 #areas = 3
Wrote coreboot table at: c7d73000, 0x324 bytes, checksum 5b1e
coreboot table: 828 bytes.
IMD ROOT    0. c7fff000 00001000
IMD SMALL   1. c7ffe000 00001000
CONSOLE     2. c7fde000 00020000
TIME STAMP  3. c7fdd000 00000910
ROMSTG STCK 4. c7fc5000 00018000
AFTER CAR   5. c7fbd000 00008000
57a9e102    6. c7fb6000 00006f30
RAMSTAGE    7. c7eb0000 00106000
57a9e100    8. c7dab000 001047f8
ACPISCRATCH 9. c7d7b000 00030000
COREBOOT   10. c7d73000 00008000
IRQ TABLE  11. c7d72000 00001000
SMP TABLE  12. c7d71000 00001000
ACPI       13. c7d4d000 00024000
SMBIOS     14. c7d4c000 00000800
IMD small region:
  IMD ROOT    0. c7ffec00 00000400
  ROMSTAGE    1. c7ffebe0 00000004
  57a9e002    2. c7ffebc0 00000018
  57a9e000    3. c7ffeba0 00000018
  COREBOOTFWD 4. c7ffeb60 00000028
BS: BS_WRITE_TABLES times (us): entry 0 run 21210 exit 0
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 61100 size 225e8
Checking segment from ROM address 0xffc61338
Checking segment from ROM address 0xffc61354
Checking segment from ROM address 0xffc61370
Loading segment from ROM address 0xffc61338
  code (compression=1)
  New segment dstaddr 0x00009000 memsize 0x17a18 srcaddr 0xffc6138c filesize 0x84e6
Loading Segment: addr: 0x00009000 memsz: 0x0000000000017a18 filesz: 0x00000000000084e6
using LZMA
[ 0x00009000, 00018ff7, 0x00020a18) <- ffc6138c
Clearing Segment: addr: 0x0000000000018ff7 memsz: 0x0000000000007a21
Loading segment from ROM address 0xffc61354
  code (compression=1)
  New segment dstaddr 0x00100000 memsize 0x4e088 srcaddr 0xffc69872 filesize 0x1a0ae
Loading Segment: addr: 0x00100000 memsz: 0x000000000004e088 filesz: 0x000000000001a0ae
using LZMA
[ 0x00100000, 0014e088, 0x0014e088) <- ffc69872
Loading segment from ROM address 0xffc61370
  Entry Point 0x00009000
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 71316 exit 0
Jumping to boot code at 00009000(c7d73000)
CPU0: stack: c7eef000 - c7ef0000, lowest used address c7eef6bc, stack used: 2372 bytes