

coreboot-4.0-6474-g16e3abf Sun Aug 10 15:34:15 CEST 2014 starting...

Intel(R) 82945GC Chipset
(G)MCH capable of unknown max. RAM clock (02).
Setting up static southbridge registers... GPIOS... done.
Disabling Watchdog reboot... done.
Setting up static northbridge registers... done.
Waiting for MCHBAR to come up...ok
PM1_CNT: 00000000
SMBus controller enabled.
Setting up RAM controller.
This mainboard supports Dual Channel Operation.
DDR II Channel 0 Socket 0: x8DS
DDR II Channel 0 Socket 1: N/A
DDR II Channel 1 Socket 0: N/A
DDR II Channel 1 Socket 1: N/A
Memory will be driven at 533MHz with CAS=4 clocks
tRAS = 12 cycles
tRP = 4 cycles
tRCD = 4 cycles
Refresh: 7.8us
tWR = 4 cycles
DIMM 0 side 0 = 512 MB
tRFC = 28 cycles
Setting Graphics Frequency...
FSB: 533 MHz Voltage: 1.05V Render: 250Mhz Display: 200MHz
Setting Memory Frequency... CLKCFG=0x20000001, second VCO, CLKCFG=0x20000031, ok
Setting mode of operation for memory channels...Single Channel 0 only.
Programming Clock Crossing...MEM=667 FSB=533... ok
Setting RAM size... 
C0DRB = 0x10101010
C1DRB = 0x10101010
TOLUD = 0x0020
Setting row attributes... 
C0DRA = 0x0003
C1DRA = 0x0000
one dimm per channel config.. 
Initializing System Memory IO... 
Programming Dual Channel RCOMP
Table Index: 9
Programming DLL Timings... 
Enabling System Memory IO... 
jedec enable sequence: bank 0
receive_enable_autoconfig() for channel 0
  find_strobes_low()
    set_receive_enable() medium=0x3, coarse=0x4
    set_receive_enable() medium=0x1, coarse=0x4
    set_receive_enable() medium=0x1, coarse=0x4
  find_strobes_edge()
    set_receive_enable() medium=0x1, coarse=0x4
  add_quarter_clock() mediumcoarse=11 fine=71
  find_preamble()
    set_receive_enable() medium=0x1, coarse=0x3
    set_receive_enable() medium=0x1, coarse=0x2
  add_quarter_clock() mediumcoarse=09 fine=f1
    set_receive_enable() medium=0x3, coarse=0x2
  normalize()
RAM initialization finished.
Setting up Egress Port RCRB
Loading port arbitration table ...ok
Wait for VC1 negotiation ...ok
Setting up DMI RCRB
Wait for VC1 negotiation ...done..
Internal graphics: enabled
Waiting for DMI hardware...ok
Enabling PCI Express x16 Link
SLOTSTS: 0000
Disabling PCI Express x16 Link
Wait for link to enter detect state... ok
Setting up Root Complex Topology
CBMEM: root @ 1f7ff000 254 entries.
Trying CBFS ramstage loader.
CBFS: loading stage fallback/ramstage @ 0x100000 (249916 bytes), entry @ 0x100000
coreboot-4.0-6474-g16e3abf Sun Aug 10 15:34:15 CEST 2014 booting...
CBMEM: recovering 5/254 entries from root @ 1f7ff000
Moving GDT to 1f7eb000...ok
BS: BS_PRE_DEVICE times (us): entry 7238 run 0 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0
Enumerating buses...
Show all devs...Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:02.1: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1d.0: enabled 1
PCI: 00:1d.1: enabled 1
PCI: 00:1d.2: enabled 1
PCI: 00:1d.3: enabled 1
PCI: 00:1d.7: enabled 1
PCI: 00:1e.0: enabled 1
PCI: 00:1f.0: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.3: enabled 0
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.7: enabled 1
PNP: 002e.8: enabled 1
PNP: 002e.a: enabled 1
PNP: 002e.b: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:01.0: enabled 0
  PCI: 00:02.0: enabled 1
  PCI: 00:02.1: enabled 1
  PCI: 00:1b.0: enabled 1
  PCI: 00:1c.0: enabled 1
  PCI: 00:1c.1: enabled 1
  PCI: 00:1c.2: enabled 1
  PCI: 00:1d.0: enabled 1
  PCI: 00:1d.1: enabled 1
  PCI: 00:1d.2: enabled 1
  PCI: 00:1d.3: enabled 1
  PCI: 00:1d.7: enabled 1
  PCI: 00:1e.0: enabled 1
  PCI: 00:1f.0: enabled 1
   PNP: 002e.0: enabled 0
   PNP: 002e.3: enabled 0
   PNP: 002e.4: enabled 1
   PNP: 002e.5: enabled 1
   PNP: 002e.7: enabled 1
   PNP: 002e.8: enabled 1
   PNP: 002e.a: enabled 1
   PNP: 002e.b: enabled 1
  PCI: 00:1f.2: enabled 1
  PCI: 00:1f.3: enabled 1
scan_static_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/2770] enabled
PCI: 00:02.0 [8086/2772] enabled
PCI: 00:1b.0 [8086/27d8] ops
PCI: 00:1b.0 [8086/27d8] enabled
PCI: 00:1c.0 [8086/0000] bus ops
PCI: 00:1c.0 [8086/27d0] enabled
PCI: Static device PCI: 00:1c.1 not found, disabling it.
PCI: 00:1c.2 [8086/0000] bus ops
PCI: 00:1c.2 [8086/27d4] enabled
PCI: 00:1c.3 [8086/0000] bus ops
PCI: 00:1c.3 [8086/27d6] enabled
PCI: 00:1d.0 [8086/27c8] ops
PCI: 00:1d.0 [8086/27c8] enabled
PCI: 00:1d.1 [8086/27c9] ops
PCI: 00:1d.1 [8086/27c9] enabled
PCI: Static device PCI: 00:1d.2 not found, disabling it.
PCI: 00:1d.3 [8086/27cb] ops
PCI: 00:1d.3 [8086/27cb] enabled
PCI: 00:1d.7 [8086/27cc] ops
PCI: 00:1d.7 [8086/27cc] enabled
PCI: 00:1e.0 [8086/244e] bus ops
PCI: 00:1e.0 [8086/244e] enabled
PCI: 00:1f.0 [8086/27b8] bus ops
PCI: 00:1f.0 [8086/27b8] enabled
PCI: 00:1f.1 [8086/27df] ops
PCI: 00:1f.1 [8086/27df] enabled
PCI: 00:1f.2 [8086/0000] ops
PCI: 00:1f.2 [8086/27c0] enabled
PCI: 00:1f.3 [8086/27da] bus ops
PCI: 00:1f.3 [8086/27da] enabled
PCI: Left over static devices:
PCI: 00:02.1
PCI: Check your devicetree.cb.
do_pci_scan_bridge for PCI: 00:1c.0
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [10ec/8136] enabled
PCI: pci_scan_bus returning with max=001
do_pci_scan_bridge returns max 1
do_pci_scan_bridge for PCI: 00:1c.2
PCI: pci_scan_bus for bus 02
PCI: pci_scan_bus returning with max=002
do_pci_scan_bridge returns max 2
do_pci_scan_bridge for PCI: 00:1c.3
PCI: pci_scan_bus for bus 03
PCI: pci_scan_bus returning with max=003
do_pci_scan_bridge returns max 3
do_pci_scan_bridge for PCI: 00:1e.0
PCI: pci_scan_bus for bus 04
PCI: pci_scan_bus returning with max=004
do_pci_scan_bridge returns max 4
scan_static_bus for PCI: 00:1f.0
PNP: 002e.0 disabled
PNP: 002e.3 disabled
PNP: 002e.4 enabled
PNP: 002e.5 enabled
PNP: 002e.7 enabled
PNP: 002e.8 enabled
PNP: 002e.a enabled
PNP: 002e.b enabled
scan_static_bus for PCI: 00:1f.0 done
scan_static_bus for PCI: 00:1f.3
scan_static_bus for PCI: 00:1f.3 done
PCI: pci_scan_bus returning with max=004
scan_static_bus for Root Device done
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 334807 exit 0
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:1c.0 read_resources bus 1 link: 0
PCI: 00:1c.0 read_resources bus 1 link: 0 done
PCI: 00:1c.2 read_resources bus 2 link: 0
PCI: 00:1c.2 read_resources bus 2 link: 0 done
PCI: 00:1c.3 read_resources bus 3 link: 0
PCI: 00:1c.3 read_resources bus 3 link: 0 done
PCI: 00:1e.0 read_resources bus 4 link: 0
PCI: 00:1e.0 read_resources bus 4 link: 0 done
PCI: 00:1f.0 read_resources bus 0 link: 0
PNP: 002e.8 missing read_resources
PNP: 002e.a missing read_resources
PNP: 002e.b missing read_resources
PCI: 00:1f.0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:01.0
   PCI: 00:02.0
   PCI: 00:02.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10
   PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 14
   PCI: 00:02.0 resource base 0 size 20000000 align 29 gran 29 limit ffffffff flags 1200 index 18
   PCI: 00:02.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 1c
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.0 child on link 0 PCI: 01:00.0
   PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
    PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
    PCI: 01:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 1201 index 20
    PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
   PCI: 00:1c.1
   PCI: 00:1c.2
   PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:1c.3
   PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1d.1
   PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1d.2
   PCI: 00:1d.3
   PCI: 00:1d.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1d.7
   PCI: 00:1d.7 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1e.0
   PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:1f.0 child on link 0 PNP: 002e.0
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 002e.0
    PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 002e.3
    PNP: 002e.3 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 002e.4
    PNP: 002e.4 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 002e.4 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.5
    PNP: 002e.5 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 002e.5 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.5 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index f1
    PNP: 002e.7
    PNP: 002e.7 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
    PNP: 002e.7 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
    PNP: 002e.7 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.7 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
    PNP: 002e.7 resource base 82 size 0 align 0 gran 0 limit 0 flags c0000400 index f0
    PNP: 002e.8
    PNP: 002e.a
    PNP: 002e.b
   PCI: 00:1f.1
   PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:1f.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:1f.2 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
   PCI: 00:1f.3
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 01:00.0 10 *  [0x0 - 0xff] io
PCI: 00:1c.0 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.0 1c *  [0x0 - 0xfff] io
PCI: 00:1d.0 20 *  [0x1000 - 0x101f] io
PCI: 00:1d.1 20 *  [0x1020 - 0x103f] io
PCI: 00:1d.3 20 *  [0x1040 - 0x105f] io
PCI: 00:1f.1 20 *  [0x1060 - 0x106f] io
PCI: 00:1f.2 20 *  [0x1070 - 0x107f] io
PCI: 00:02.0 14 *  [0x1080 - 0x1087] io
PCI: 00:1f.1 10 *  [0x1088 - 0x108f] io
PCI: 00:1f.1 18 *  [0x1090 - 0x1097] io
PCI: 00:1f.2 10 *  [0x1098 - 0x109f] io
PCI: 00:1f.2 18 *  [0x10a0 - 0x10a7] io
PCI: 00:1f.1 14 *  [0x10a8 - 0x10ab] io
PCI: 00:1f.1 1c *  [0x10ac - 0x10af] io
PCI: 00:1f.2 14 *  [0x10b0 - 0x10b3] io
PCI: 00:1f.2 1c *  [0x10b4 - 0x10b7] io
DOMAIN: 0000 compute_resources_io: base: 10b8 size: 10b8 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 01:00.0 20 *  [0x0 - 0xffff] prefmem
PCI: 00:1c.0 compute_resources_prefmem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 30 *  [0x0 - 0x1ffff] mem
PCI: 01:00.0 18 *  [0x20000 - 0x20fff] mem
PCI: 00:1c.0 compute_resources_mem: base: 21000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 18 *  [0x0 - 0x1fffffff] prefmem
PCI: 00:1c.0 24 *  [0x20000000 - 0x200fffff] prefmem
PCI: 00:1c.0 20 *  [0x20100000 - 0x201fffff] mem
PCI: 00:02.0 10 *  [0x20200000 - 0x2027ffff] mem
PCI: 00:02.0 1c *  [0x20280000 - 0x202fffff] mem
PCI: 00:1b.0 10 *  [0x20300000 - 0x20303fff] mem
PCI: 00:1d.7 10 *  [0x20304000 - 0x203043ff] mem
DOMAIN: 0000 compute_resources_mem: base: 20304400 size: 20304400 align: 29 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: DOMAIN: 0000
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:02.0
constrain_resources: PCI: 00:1b.0
constrain_resources: PCI: 00:1c.0
constrain_resources: PCI: 01:00.0
constrain_resources: PCI: 00:1c.2
constrain_resources: PCI: 00:1c.3
constrain_resources: PCI: 00:1d.0
constrain_resources: PCI: 00:1d.1
constrain_resources: PCI: 00:1d.3
constrain_resources: PCI: 00:1d.7
constrain_resources: PCI: 00:1e.0
constrain_resources: PCI: 00:1f.0
constrain_resources: PNP: 002e.4
constrain_resources: PNP: 002e.5
skipping PNP: 002e.5@f1 fixed resource, size=0!
constrain_resources: PNP: 002e.7
skipping PNP: 002e.7@f0 fixed resource, size=0!
constrain_resources: PNP: 002e.8
constrain_resources: PNP: 002e.a
constrain_resources: PNP: 002e.b
constrain_resources: PCI: 00:1f.1
constrain_resources: PCI: 00:1f.2
constrain_resources: PCI: 00:1f.3
avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff
	lim->base 00001000 lim->limit 0000ffff
avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff
	lim->base 00000000 lim->limit febfffff
Setting resources...
DOMAIN: 0000 allocate_resources_io: base:1000 size:10b8 align:12 gran:0 limit:ffff
Assigned: PCI: 00:1c.0 1c *  [0x1000 - 0x1fff] io
Assigned: PCI: 00:1d.0 20 *  [0x2000 - 0x201f] io
Assigned: PCI: 00:1d.1 20 *  [0x2020 - 0x203f] io
Assigned: PCI: 00:1d.3 20 *  [0x2040 - 0x205f] io
Assigned: PCI: 00:1f.1 20 *  [0x2060 - 0x206f] io
Assigned: PCI: 00:1f.2 20 *  [0x2070 - 0x207f] io
Assigned: PCI: 00:02.0 14 *  [0x2080 - 0x2087] io
Assigned: PCI: 00:1f.1 10 *  [0x2088 - 0x208f] io
Assigned: PCI: 00:1f.1 18 *  [0x2090 - 0x2097] io
Assigned: PCI: 00:1f.2 10 *  [0x2098 - 0x209f] io
Assigned: PCI: 00:1f.2 18 *  [0x20a0 - 0x20a7] io
Assigned: PCI: 00:1f.1 14 *  [0x20a8 - 0x20ab] io
Assigned: PCI: 00:1f.1 1c *  [0x20ac - 0x20af] io
Assigned: PCI: 00:1f.2 14 *  [0x20b0 - 0x20b3] io
Assigned: PCI: 00:1f.2 1c *  [0x20b4 - 0x20b7] io
DOMAIN: 0000 allocate_resources_io: next_base: 20b8 size: 10b8 align: 12 gran: 0 done
PCI: 00:1c.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff
Assigned: PCI: 01:00.0 10 *  [0x1000 - 0x10ff] io
PCI: 00:1c.0 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 12 done
PCI: 00:1c.2 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.2 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.3 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.3 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1e.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1e.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 allocate_resources_mem: base:c0000000 size:20304400 align:29 gran:0 limit:febfffff
Assigned: PCI: 00:02.0 18 *  [0xc0000000 - 0xdfffffff] prefmem
Assigned: PCI: 00:1c.0 24 *  [0xe0000000 - 0xe00fffff] prefmem
Assigned: PCI: 00:1c.0 20 *  [0xe0100000 - 0xe01fffff] mem
Assigned: PCI: 00:02.0 10 *  [0xe0200000 - 0xe027ffff] mem
Assigned: PCI: 00:02.0 1c *  [0xe0280000 - 0xe02fffff] mem
Assigned: PCI: 00:1b.0 10 *  [0xe0300000 - 0xe0303fff] mem
Assigned: PCI: 00:1d.7 10 *  [0xe0304000 - 0xe03043ff] mem
DOMAIN: 0000 allocate_resources_mem: next_base: e0304400 size: 20304400 align: 29 gran: 0 done
PCI: 00:1c.0 allocate_resources_prefmem: base:e0000000 size:100000 align:20 gran:20 limit:febfffff
Assigned: PCI: 01:00.0 20 *  [0xe0000000 - 0xe000ffff] prefmem
PCI: 00:1c.0 allocate_resources_prefmem: next_base: e0010000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.0 allocate_resources_mem: base:e0100000 size:100000 align:20 gran:20 limit:febfffff
Assigned: PCI: 01:00.0 30 *  [0xe0100000 - 0xe011ffff] mem
Assigned: PCI: 01:00.0 18 *  [0xe0120000 - 0xe0120fff] mem
PCI: 00:1c.0 allocate_resources_mem: next_base: e0121000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.2 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:1c.2 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.2 allocate_resources_mem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:1c.2 allocate_resources_mem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.3 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:1c.3 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.3 allocate_resources_mem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:1c.3 allocate_resources_mem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:1e.0 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:1e.0 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:1e.0 allocate_resources_mem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:1e.0 allocate_resources_mem: next_base: febfffff size: 0 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
pci_tolm: 0xc0000000
Base of stolen memory: 0x1f800000
Top of Low Used DRAM: 0x20000000
IGD decoded, subtracting 8M UMA
Available memory: 516096K (504M)
Adding PCIe config bar
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:02.0 10 <- [0x00e0200000 - 0x00e027ffff] size 0x00080000 gran 0x13 mem
PCI: 00:02.0 14 <- [0x0000002080 - 0x0000002087] size 0x00000008 gran 0x03 io
PCI: 00:02.0 18 <- [0x00c0000000 - 0x00dfffffff] size 0x20000000 gran 0x1d prefmem
PCI: 00:02.0 1c <- [0x00e0280000 - 0x00e02fffff] size 0x00080000 gran 0x13 mem
PCI: 00:1b.0 10 <- [0x00e0300000 - 0x00e0303fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0x00e0000000 - 0x00e00fffff] size 0x00100000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x00e0100000 - 0x00e01fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 01:00.0 18 <- [0x00e0120000 - 0x00e0120fff] size 0x00001000 gran 0x0c mem64
PCI: 01:00.0 20 <- [0x00e0000000 - 0x00e000ffff] size 0x00010000 gran 0x10 prefmem64
PCI: 01:00.0 30 <- [0x00e0100000 - 0x00e011ffff] size 0x00020000 gran 0x11 romem
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.2 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.2 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:1c.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:1c.3 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:1c.3 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 03 mem
PCI: 00:1d.0 20 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io
PCI: 00:1d.1 20 <- [0x0000002020 - 0x000000203f] size 0x00000020 gran 0x05 io
PCI: 00:1d.3 20 <- [0x0000002040 - 0x000000205f] size 0x00000020 gran 0x05 io
PCI: 00:1d.7 10 <- [0x00e0304000 - 0x00e03043ff] size 0x00000400 gran 0x0a mem
PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
PCI: 00:1e.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:1e.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 04 mem
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PNP: 002e.4 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.4 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.5 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 002e.5 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
PNP: 002e.5 f1 <- [0x0000000004 - 0x0000000003] size 0x00000000 gran 0x00 irq
PNP: 002e.7 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 002e.7 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 002e.7 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 002e.7 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PNP: 002e.7 f0 <- [0x0000000082 - 0x0000000081] size 0x00000000 gran 0x00 irq
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.1 10 <- [0x0000002088 - 0x000000208f] size 0x00000008 gran 0x03 io
PCI: 00:1f.1 14 <- [0x00000020a8 - 0x00000020ab] size 0x00000004 gran 0x02 io
PCI: 00:1f.1 18 <- [0x0000002090 - 0x0000002097] size 0x00000008 gran 0x03 io
PCI: 00:1f.1 1c <- [0x00000020ac - 0x00000020af] size 0x00000004 gran 0x02 io
PCI: 00:1f.1 20 <- [0x0000002060 - 0x000000206f] size 0x00000010 gran 0x04 io
PCI: 00:1f.2 10 <- [0x0000002098 - 0x000000209f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x00000020b0 - 0x00000020b3] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x00000020a0 - 0x00000020a7] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x00000020b4 - 0x00000020b7] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000002070 - 0x000000207f] size 0x00000010 gran 0x04 io
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 1000 size 10b8 align 12 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base c0000000 size 20304400 align 29 gran 0 limit febfffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
  DOMAIN: 0000 resource base c0000 size 1ff40000 align 0 gran 0 limit 0 flags e0004200 index 4
  DOMAIN: 0000 resource base 1f800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 5
  DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7
   PCI: 00:00.0
   PCI: 00:01.0
   PCI: 00:02.0
   PCI: 00:02.0 resource base e0200000 size 80000 align 19 gran 19 limit febfffff flags 60000200 index 10
   PCI: 00:02.0 resource base 2080 size 8 align 3 gran 3 limit ffff flags 60000100 index 14
   PCI: 00:02.0 resource base c0000000 size 20000000 align 29 gran 29 limit febfffff flags 60001200 index 18
   PCI: 00:02.0 resource base e0280000 size 80000 align 19 gran 19 limit febfffff flags 60000200 index 1c
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base e0300000 size 4000 align 14 gran 14 limit febfffff flags 60000201 index 10
   PCI: 00:1c.0 child on link 0 PCI: 01:00.0
   PCI: 00:1c.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.0 resource base e0000000 size 100000 align 20 gran 20 limit febfffff flags 60081202 index 24
   PCI: 00:1c.0 resource base e0100000 size 100000 align 20 gran 20 limit febfffff flags 60080202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 10
    PCI: 01:00.0 resource base e0120000 size 1000 align 12 gran 12 limit febfffff flags 60000201 index 18
    PCI: 01:00.0 resource base e0000000 size 10000 align 16 gran 16 limit febfffff flags 60001201 index 20
    PCI: 01:00.0 resource base e0100000 size 20000 align 17 gran 17 limit febfffff flags 60002200 index 30
   PCI: 00:1c.1
   PCI: 00:1c.2
   PCI: 00:1c.2 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.2 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
   PCI: 00:1c.2 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20
   PCI: 00:1c.3
   PCI: 00:1c.3 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.3 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
   PCI: 00:1c.3 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base 2000 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
   PCI: 00:1d.1
   PCI: 00:1d.1 resource base 2020 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
   PCI: 00:1d.2
   PCI: 00:1d.3
   PCI: 00:1d.3 resource base 2040 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
   PCI: 00:1d.7
   PCI: 00:1d.7 resource base e0304000 size 400 align 10 gran 10 limit febfffff flags 60000200 index 10
   PCI: 00:1e.0
   PCI: 00:1e.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1e.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
   PCI: 00:1e.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20
   PCI: 00:1f.0 child on link 0 PNP: 002e.0
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 002e.0
    PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 002e.3
    PNP: 002e.3 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 002e.4
    PNP: 002e.4 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
    PNP: 002e.4 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 002e.5
    PNP: 002e.5 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
    PNP: 002e.5 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 002e.5 resource base 4 size 0 align 0 gran 0 limit 0 flags e0000400 index f1
    PNP: 002e.7
    PNP: 002e.7 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
    PNP: 002e.7 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62
    PNP: 002e.7 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 002e.7 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72
    PNP: 002e.7 resource base 82 size 0 align 0 gran 0 limit 0 flags e0000400 index f0
    PNP: 002e.8
    PNP: 002e.a
    PNP: 002e.b
   PCI: 00:1f.1
   PCI: 00:1f.1 resource base 2088 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
   PCI: 00:1f.1 resource base 20a8 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
   PCI: 00:1f.1 resource base 2090 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
   PCI: 00:1f.1 resource base 20ac size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
   PCI: 00:1f.1 resource base 2060 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 2098 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
   PCI: 00:1f.2 resource base 20b0 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
   PCI: 00:1f.2 resource base 20a0 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
   PCI: 00:1f.2 resource base 20b4 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
   PCI: 00:1f.2 resource base 2070 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
   PCI: 00:1f.3
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 2338442 exit 0
Enabling resources...
PCI: 00:00.0 subsystem <- 8086/464c
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 8086/464c
PCI: 00:02.0 cmd <- 03
PCI: 00:1b.0 subsystem <- 8086/464c
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 8086/464c
PCI: 00:1c.0 cmd <- 107
PCI: 00:1c.2 bridge ctrl <- 0003
PCI: 00:1c.2 subsystem <- 8086/464c
PCI: 00:1c.2 cmd <- 100
PCI: 00:1c.3 bridge ctrl <- 0003
PCI: 00:1c.3 cmd <- 00
PCI: 00:1d.0 subsystem <- 8086/464c
PCI: 00:1d.0 cmd <- 01
PCI: 00:1d.1 subsystem <- 8086/464c
PCI: 00:1d.1 cmd <- 01
PCI: 00:1d.3 subsystem <- 8086/464c
PCI: 00:1d.3 cmd <- 01
PCI: 00:1d.7 subsystem <- 8086/464c
PCI: 00:1d.7 cmd <- 102
PCI: 00:1e.0 bridge ctrl <- 0003
PCI: 00:1e.0 subsystem <- 8086/464c
PCI: 00:1e.0 cmd <- 100 (NOT WRITTEN!)
PCI: 00:1f.0 subsystem <- 8086/464c
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.1 cmd <- 01
PCI: 00:1f.2 subsystem <- 8086/464c
PCI: 00:1f.2 cmd <- 01
PCI: 00:1f.3 subsystem <- 8086/464c
PCI: 00:1f.3 cmd <- 101
PCI: 01:00.0 cmd <- 03
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 91814 exit 0
Initializing devices...
Root Device init
Root Device init 1569 usecs
CPU_CLUSTER: 0 init
start_eip=0x00001000, code_size=0x00000031
Initializing CPU #0
CPU: vendor Intel device 106c2
CPU: family 06, model 1c, stepping 02
Using generic cpu ops (good)
Enabling cache
microcode: sig=0x106c2 pf=0x4 revision=0x0
microcode: updated to revision 0x218 date=2009-04-10
CPU: Intel(R) Atom(TM) CPU  230   @ 1.60GHz.
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x000000001f800000 size 0x1f740000 type 6
0x000000001f800000 - 0x00000000c0000000 size 0xa0800000 type 0
0x00000000c0000000 - 0x00000000e0000000 size 0x20000000 type 1
0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 32 bits
MTRR: default type WB/UC MTRR counts: 6/3.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x00000000e0000000 type 6
MTRR: 1 base 0x000000001f800000 mask 0x00000000ff800000 type 0
MTRR: 2 base 0x00000000c0000000 mask 0x00000000e0000000 type 1

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local apic... apic_id: 0x00 done.
CPU: 0 2 siblings
CPU: 0 has sibling 1
CPU #0 initialized
CPU1: stack_base 00137000, stack_end 00137ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
Waiting for 1 CPUS to stop
CPU: vendor Intel device 106c2
CPU: family 06, model 1c, stepping 02
Using generic cpu ops (good)
Enabling cache
microcode: sig=0x106c2 pf=0x4 revision=0x218
CPU: Intel(R) Atom(TM) CPU  230   @ 1.60GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 32 bits
MTRR: 0 base 0x0000000000000000 mask 0x00000000e0000000 type 6
MTRR: 1 base 0x000000001f800000 mask 0x00000000ff800000 type 0
MTRR: 2 base 0x00000000c0000000 mask 0x00000000e0000000 type 1

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local apic... apic_id: 0x01 done.
CPU: 1 2 siblings
CPU #1 initialized
CPU 1 going down...
All AP CPUs stopped (7352 loops)
CPU1: stack: 00137000 - 00138000, lowest used address 00137c68, stack used: 920 bytes
Initializing SMM handler... ... pmbase = 0x0500

SMI_STS: PM1 
PM1_STS: TMROF 
GPE0_STS: GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 
ALT_GP_SMI_STS: GPI15 GPI14 GPI13 GPI12 GPI11 GPI10 GPI8 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 
TCO_STS: INTRD_DET 
  ... raise SMI#
considering CPU 0x00 for SMM init
considering CPU 0x01 for SMM init
CPU1: stack_base 00137000, stack_end 00137ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
CPU: vendor Intel device 106c2
CPU: family 06, model 1c, stepping 02
Using generic cpu ops (good)
Enabling cache
microcode: sig=0x106c2 pf=0x4 revision=0x218
CPU: Intel(R) Atom(TM) CPU  230   @ 1.60GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 32 bits
MTRR: 0 base 0x0000000000000000 mask 0x00000000e0000000 type 6
MTRR: 1 base 0x000000001f800000 mask 0x00000000ff800000 type 0
MTRR: 2 base 0x00000000c0000000 mask 0x00000000e0000000 type 1

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local apic... apic_id: 0x01 done.
CPU: 1 2 siblings
CPU #1 initialized
CPU 1 going down...
CPU_CLUSTER: 0 init 490858 usecs
PCI: 00:00.0 init
PCI: 00:00.0 init 1657 usecs
PCI: 00:02.0 init
PCI: 00:02.0 init 1657 usecs
PCI: 00:1b.0 init
Azalia: codec type: Azalia
Azalia: base = e0300000
Azalia: codec_mask = 04
Azalia: Initializing codec #2
Azalia: codec viddid: 10ec0662
Azalia: No verb!
PCI: 00:1b.0 init 18578 usecs
PCI: 00:1c.0 init
Initializing ICH7 PCIe bridge.
PCI: 00:1c.0 init 4462 usecs
PCI: 00:1c.2 init
Initializing ICH7 PCIe bridge.
PCI: 00:1c.2 init 4461 usecs
PCI: 00:1c.3 init
Initializing ICH7 PCIe bridge.
PCI: 00:1c.3 init 4463 usecs
PCI: 00:1d.0 init
UHCI: Setting up controller.. done.
PCI: 00:1d.0 init 4887 usecs
PCI: 00:1d.1 init
UHCI: Setting up controller.. done.
PCI: 00:1d.1 init 4887 usecs
PCI: 00:1d.3 init
UHCI: Setting up controller.. done.
PCI: 00:1d.3 init 4886 usecs
PCI: 00:1d.7 init
EHCI: Setting up controller.. done.
PCI: 00:1d.7 init 4892 usecs
PCI: 00:1e.0 init
PCI: 00:1e.0 init 1669 usecs
PCI: 00:1f.0 init
i82801gx: lpc_init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
  reg 0x0000: 0x02000000
  reg 0x0001: 0x00170020
  reg 0x0002: 0x00170020
Set power on after power failure.
NMI sources disabled.
rtc_failed = 0x0
RTC Init
Disabling ACPI via APMC:
done.
Locking SMM.
PCI: 00:1f.0 init 36807 usecs
PCI: 00:1f.1 init
i82801gx_ide: initializing... 
i82801gx_ide: Not mentioned in devicetree.cb!
IDE0 IDE1 
PCI: 00:1f.1 init 9597 usecs
PCI: 00:1f.2 init
i82801gx_sata: initializing...
SATA controller in combined mode.
PCI: 00:1f.2 init 7515 usecs
PCI: 01:00.0 init
PCI: 01:00.0 init 1657 usecs
PNP: 002e.4 init
PNP: 002e.4 init 1570 usecs
PNP: 002e.5 init
PNP: 002e.5 init 1569 usecs
PNP: 002e.7 init
Keyboard init...
PNP: 002e.7 init 400058 usecs
Devices initialized
Show all devs...After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:02.1: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 0
PCI: 00:1c.2: enabled 1
PCI: 00:1d.0: enabled 1
PCI: 00:1d.1: enabled 1
PCI: 00:1d.2: enabled 0
PCI: 00:1d.3: enabled 1
PCI: 00:1d.7: enabled 1
PCI: 00:1e.0: enabled 1
PCI: 00:1f.0: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.3: enabled 0
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.7: enabled 1
PNP: 002e.8: enabled 1
PNP: 002e.a: enabled 1
PNP: 002e.b: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 00:1f.1: enabled 1
PCI: 01:00.0: enabled 1
APIC: 01: enabled 1
BS: BS_DEV_INIT times (us): entry 0 run 1139221 exit 0
Finalize devices...
Devices finalized
BS: BS_POST_DEVICE times (us): entry 0 run 3489 exit 0
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 0 exit 0
Copying Interrupt Routing Table to 0x000f0000... done.
Copying Interrupt Routing Table to 0x1f7ea000... done.
PIRQ table: 320 bytes.
Wrote the mp table end at: 000f0410 - 000f05ac
Wrote the mp table end at: 1f7e9010 - 1f7e91ac
MP table: 428 bytes.
ACPI: Writing ACPI tables at 1f7dd000.
ACPI:    * HPET
ACPI: added table 1/32, length now 40
ACPI:    * MADT
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI: added table 3/32, length now 48
ACPI:     * FACS
ACPI: Patching up global NVS in DSDT at offset 0x00b1 -> 0x1f7df8a0
ACPI:     * DSDT @ 1f7dd1f0 Length 26af
ACPI:     * FADT
ACPI: added table 4/32, length now 52
ACPI:     * SSDT
Found 1 CPU(s) with 2 core(s) each.
clocks between 800 and 1600 MHz.
adding 4 P-States between busratio 6 and c, incl. P0
PSS: 1600MHz power 35000 control 0xc1b status 0xc1b
PSS: 1333MHz power 31666 control 0xa1b status 0xa1b
PSS: 1066MHz power 28333 control 0x81b status 0x81b
PSS: 800MHz power 25000 control 0x61b status 0x61b
clocks between 800 and 1600 MHz.
adding 4 P-States between busratio 6 and c, incl. P0
PSS: 1600MHz power 35000 control 0xc1b status 0xc1b
PSS: 1333MHz power 31666 control 0xa1b status 0xa1b
PSS: 1066MHz power 28333 control 0x81b status 0x81b
PSS: 800MHz power 25000 control 0x61b status 0x61b
ACPI: added table 5/32, length now 56
current = 1f7dfcc8
ACPI: done.
ACPI tables: 11464 bytes.
smbios_write_tables: 1f7dc000
Root Device (Intel D945GCLF)
CPU_CLUSTER: 0 (Intel i945 Northbridge)
APIC: 00 (Socket 441 CPU)
DOMAIN: 0000 (Intel i945 Northbridge)
PCI: 00:00.0 (Intel i945 Northbridge)
PCI: 00:01.0 (Intel i945 Northbridge)
PCI: 00:02.0 (Intel i945 Northbridge)
PCI: 00:02.1 (Intel i945 Northbridge)
PCI: 00:1b.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1c.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1c.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1c.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1d.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1d.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1d.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1d.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1d.7 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1e.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1f.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PNP: 002e.0 (SMSC LPC47M15x/192/997 Super I/O)
PNP: 002e.3 (SMSC LPC47M15x/192/997 Super I/O)
PNP: 002e.4 (SMSC LPC47M15x/192/997 Super I/O)
PNP: 002e.5 (SMSC LPC47M15x/192/997 Super I/O)
PNP: 002e.7 (SMSC LPC47M15x/192/997 Super I/O)
PNP: 002e.8 (SMSC LPC47M15x/192/997 Super I/O)
PNP: 002e.a (SMSC LPC47M15x/192/997 Super I/O)
PNP: 002e.b (SMSC LPC47M15x/192/997 Super I/O)
PCI: 00:1f.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1f.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
PCI: 00:1c.3 (unknown)
PCI: 00:1f.1 (unknown)
PCI: 01:00.0 (unknown)
APIC: 01 (unknown)
SMBIOS tables: 341 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum a071
Table forward entry ends at 0x00000528.
... aligned to 0x00001000
Writing coreboot table at 0x1f6d4000
rom_table_end = 0x1f6d4000
... aligned to 0x1f6e0000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-000000001f6d3fff: RAM
 3. 000000001f6d4000-000000001f7fffff: CONFIGURATION TABLES
 4. 000000001f800000-000000001fffffff: RESERVED
 5. 00000000f0000000-00000000f3ffffff: RESERVED
Wrote coreboot table at: 1f6d4000, 0x16c bytes, checksum a551
coreboot table: 388 bytes.
CBMEM ROOT  0. 1f7ff000 00001000
CAR GLOBALS 1. 1f7fe000 00001000
CONSOLE     2. 1f7ee000 00010000
TIME STAMP  3. 1f7ed000 00001000
ROMSTAGE    4. 1f7ec000 00001000
GDT         5. 1f7eb000 00001000
IRQ TABLE   6. 1f7ea000 00001000
SMP TABLE   7. 1f7e9000 00001000
ACPI        8. 1f7dd000 0000c000
SMBIOS      9. 1f7dc000 00001000
ACPI RESUME10. 1f6dc000 00100000
COREBOOT   11. 1f6d4000 00008000
BS: BS_WRITE_TABLES times (us): entry 0 run 365134 exit 0
CBFS: located payload @ fffba238, 59948 bytes.
Loading segment from rom address 0xfffba238
  code (compression=1)
  New segment dstaddr 0xe3180 memsize 0x1ce80 srcaddr 0xfffba270 filesize 0xe9f4
  (cleaned up) New segment addr 0xe3180 size 0x1ce80 offset 0xfffba270 filesize 0xe9f4
Loading segment from rom address 0xfffba254
  Entry Point 0x000fd412
Bounce Buffer at 1f659000, 499832 bytes
Loading Segment: addr: 0x00000000000e3180 memsz: 0x000000000001ce80 filesz: 0x000000000000e9f4
lb: [0x0000000000100000, 0x000000000013d03c)
Post relocation: addr: 0x00000000000e3180 memsz: 0x000000000001ce80 filesz: 0x000000000000e9f4
using LZMA
[ 0x000e3180, 00100000, 0x00100000) <- fffba270
dest 000e3180, end 00100000, bouncebuffer 1f659000
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 108689 exit 0
ICH7 watchdog disabled
Jumping to boot code at 000fd412
CPU0: stack: 00138000 - 00139000, lowest used address 00138a7c, stack used: 1412 bytes
entry    = 0x000fd412
lb_start = 0x00100000
lb_size  = 0x0003d03c
buffer   = 0x1f659000
----- [ SeaBIOS rel-1.7.4-0-g96917a8-20140810_153421-office ] -----
Found coreboot cbmem console @ 1f7ee000
Found mainboard Intel D945GCLF
Relocating init from 0x000e4369 to 0x1f6b8550 (size 47591)
Found CBFS header at 0xffffefe0
CPU Mhz=1601
Found 16 PCI devices (max PCI bus is 04)
Copying SMBIOS entry point from 0x1f7dc000 to 0x000f5a20
Copying ACPI RSDP from 0x1f7dd000 to 0x000f5a00
Copying MPTABLE from 0x1f7e9000/1f7e9010 to 0x000f5850
Copying PIR from 0x1f7ea000 to 0x000f5710
Using pmtimer, ioport 0x508
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.7.4-0-g96917a8-20140810_153421-office)
EHCI init on dev 00:1d.7 (regs=0xe0304020)
Found 0 lpt ports
Found 1 serial ports
ATA controller 1 at 1f0/3f4/0 (irq 14 dev f9)
ATA controller 2 at 170/374/0 (irq 15 dev f9)
ATA controller 3 at 1f0/3f4/0 (irq 14 dev fa)
ATA controller 4 at 170/374/0 (irq 15 dev fa)
Searching bootorder for: /pci@i0cf8/usb@1d,7/storage@3/*@0/*@0,0
Searching bootorder for: /pci@i0cf8/usb@1d,7/usb-*@3
USB MSC vendor='Lexar' product='USB Flash Drive' rev='8.07' type=0 removable=1
USB MSC blksize=512 sectors=31285248
PS2 keyboard initialized
All threads complete.
Scan for option roms

Press F12 for boot menu.

Searching bootorder for: HALT
drive 0x000f56a0: PCHS=0/0/0 translation=lba LCHS=1024/255/63 s=31285248
Space available for UMB: d0000-ef000, f5240-f56a0
Returned 57344 bytes of ZoneHigh
e820 map has 6 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 000000001f6d2000 = 1 RAM
  4: 000000001f6d2000 - 0000000020000000 = 2 RESERVED
  5: 00000000f0000000 - 00000000f4000000 = 2 RESERVED
enter handle_19:
  NULL
Booting from Hard Disk...
Booting from 0000:7c00