jetway/nf81-t56n-lf/4.0-5682-gfccfee3-dirty/2014-03-29T03:40:24Z
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
diff --git a/jetway/nf81-t56n-lf/4.0-5682-gfccfee3-dirty/2014-03-29T03:40:24Z/config.txt b/jetway/nf81-t56n-lf/4.0-5682-gfccfee3-dirty/2014-03-29T03:40:24Z/config.txt
new file mode 100644
index 0000000..a788f8b
--- /dev/null
+++ b/jetway/nf81-t56n-lf/4.0-5682-gfccfee3-dirty/2014-03-29T03:40:24Z/config.txt
@@ -0,0 +1,160 @@
+# This image was built using git revision c91aeec4417db462891309191c6bc6b0352aa7cf
+CONFIG_LOCALVERSION="ap-jupiter-alpha"
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+CONFIG_VENDOR_JETWAY=y
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_DIR="jetway/nf81-t56n-lf"
+CONFIG_MAINBOARD_PART_NUMBER="NF81-T56N-LF"
+CONFIG_IRQ_SLOT_COUNT=11
+CONFIG_MAINBOARD_VENDOR="Jetway"
+CONFIG_APIC_ID_OFFSET=0x0
+CONFIG_HW_MEM_HOLE_SIZEK=0x200000
+CONFIG_MAX_CPUS=2
+CONFIG_MAX_PHYSICAL_CPUS=1
+CONFIG_RAMTOP=0x1000000
+CONFIG_HEAP_SIZE=0xc0000
+CONFIG_RAMBASE=0x200000
+CONFIG_VGA_BIOS_ID="1002,9806"
+CONFIG_SIO_PORT=0x4e
+CONFIG_DRIVERS_PS2_KEYBOARD=y
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
+CONFIG_VGA_BIOS=y
+CONFIG_DCACHE_RAM_BASE=0x30000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_SERIAL_CPU_INIT=y
+CONFIG_ACPI_SSDTX_NUM=0
+CONFIG_VGA_BIOS_FILE="3rdparty/mainboard/jetway/nf81-t56n-lf/csm_20_1002_9807.rom"
+CONFIG_MMCONF_BASE_ADDRESS=0xf8000000
+CONFIG_ID_SECTION_OFFSET=0x80
+CONFIG_STACK_SIZE=0x1000
+CONFIG_XIP_ROM_SIZE=0x100000
+CONFIG_UDELAY_LAPIC_FIXED_FSB=200
+CONFIG_BOARD_JETWAY_NF81_T56N_LF=y
+CONFIG_DRIVERS_SUPERIO_HWM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Jetway"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_CPU_ADDR_BITS=36
+CONFIG_CACHE_ROM_SIZE_OVERRIDE=0
+CONFIG_LOGICAL_CPUS=y
+CONFIG_IOAPIC=y
+CONFIG_SMP=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
+CONFIG_BOARD_ROMSIZE_KB_2048=y
+CONFIG_COREBOOT_ROMSIZE_KB_2048=y
+CONFIG_COREBOOT_ROMSIZE_KB=2048
+CONFIG_ROM_SIZE=0x200000
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="NF81-T56N-LF"
+CONFIG_ARCH_X86=y
+CONFIG_X86_ARCH_OPTIONS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_NUM_IPI_STARTS=2
+CONFIG_X86_BOOTBLOCK_SIMPLE=y
+CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
+CONFIG_PC80_SYSTEM=y
+CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/cimx/sb800/bootblock.c"
+CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
+CONFIG_HPET_ADDRESS=0xfed00000
+CONFIG_HAVE_ARCH_MEMSET=y
+CONFIG_HAVE_ARCH_MEMCPY=y
+CONFIG_HAVE_ARCH_MEMMOVE=y
+CONFIG_CPU_SOCKET_TYPE=0x10
+CONFIG_CBB=0x0
+CONFIG_CDB=0x18
+CONFIG_DIMM_SUPPORT=0x0104
+CONFIG_LIFT_BSP_APIC_ID=y
+CONFIG_CPU_AMD_AGESA=y
+CONFIG_HAVE_INIT_TIMER=y
+CONFIG_CPU_AMD_AGESA_FAMILY14=y
+CONFIG_HIGH_SCRATCH_MEMORY_SIZE=0x71000
+CONFIG_SMM_TSEG_SIZE=0
+CONFIG_UDELAY_LAPIC=y
+CONFIG_LAPIC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_LFENCE=y
+CONFIG_X86_AMD_FIXED_MTRRS=y
+CONFIG_CACHE_AS_RAM=y
+CONFIG_AP_SIPI_VECTOR=0xfffff000
+CONFIG_CPU_MICROCODE_CBFS_NONE=y
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y
+CONFIG_VIDEO_MB=0
+CONFIG_AMDMCT=y
+CONFIG_MMCONF_BUS_NUMBER=16
+CONFIG_NORTHBRIDGE_AMD_AGESA=y
+CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY14=y
+CONFIG_CBFS_SIZE=0x200000
+CONFIG_MAX_PIRQ_LINKS=4
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_AMD_SB_CIMX=y
+CONFIG_S3_DATA_POS=0xFFFF0000
+CONFIG_S3_DATA_SIZE=32768
+CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800=y
+CONFIG_IDE_COMBINED_MODE=0x1
+CONFIG_SB800_SATA_AHCI=y
+CONFIG_SB800_SATA_MODE=0x2
+CONFIG_AHCI_ROM_ID="1002,4391"
+CONFIG_SB800_NO_FAN_CONTROL=y
+CONFIG_AMD_SB_SPI_TX_LEN=4
+CONFIG_SPI_FLASH=y
+CONFIG_SUPERIO_FINTEK_F71869AD=y
+CONFIG_PCI=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_AGP_PLUGIN_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCI_BUS_SEGN_BITS=0
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_HAVE_UART_IO_MAPPED=y
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+CONFIG_MMCONF_SUPPORT=y
+CONFIG_EARLY_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_CONSOLE_SERIAL8250=y
+CONFIG_CONSOLE_SERIAL_COM1=y
+CONFIG_TTYS0_BASE=0x3f8
+CONFIG_CONSOLE_SERIAL_115200=y
+CONFIG_TTYS0_BAUD=115200
+CONFIG_TTYS0_LCS=3
+CONFIG_CONSOLE_CBMEM=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x1536
+CONFIG_CONSOLE_CAR_BUFFER_SIZE=0xc00
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
+CONFIG_NO_POST=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_HAVE_HARD_RESET=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_PCI_IO_CFG_EXT=y
+CONFIG_GFXUMA=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_HAVE_MP_TABLE=y
+CONFIG_HAVE_PIRQ_TABLE=y
+CONFIG_GENERATE_ACPI_TABLES=y
+CONFIG_GENERATE_MP_TABLE=y
+CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_PAYLOAD_SEABIOS=y
+CONFIG_SEABIOS_MASTER=y
+CONFIG_PAYLOAD_FILE="$(obj)/seabios/out/bios.bin.elf"
+CONFIG_COMPRESSED_PAYLOAD_LZMA=y
+CONFIG_DEBUG_PIRQ=y
+CONFIG_DEBUG_ACPI=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_REG_SCRIPT=y