asus/kfsn4-dre/4.0-9735-g54e6aa7/2015-05-21T05:57:48Z
diff --git a/asus/kfsn4-dre/4.0-9735-g54e6aa7/2015-05-21T05:57:48Z/coreboot_console.txt b/asus/kfsn4-dre/4.0-9735-g54e6aa7/2015-05-21T05:57:48Z/coreboot_console.txt
index f0de72c..aa69205 100644
--- a/asus/kfsn4-dre/4.0-9735-g54e6aa7/2015-05-21T05:57:48Z/coreboot_console.txt
+++ b/asus/kfsn4-dre/4.0-9735-g54e6aa7/2015-05-21T05:57:48Z/coreboot_console.txt
@@ -395,7 +395,7 @@
DOMAIN: 0000 passpw: enabled
scan_static_bus for Root Device done
done
-BS: BS_DEV_ENUMERATE times (us): entry 0 run 989 exit 0
+BS: BS_DEV_ENUMERATE times (us): entry 0 run 993 exit 0
POST: 0x73
found VGA at PCI: 01:04.0
Setting up VGA for PCI: 01:04.0
@@ -1014,7 +1014,7 @@
PCI: 00:19.3
PCI: 00:19.4
Done allocating resources.
-BS: BS_DEV_RESOURCES times (us): entry 0 run 2576 exit 0
+BS: BS_DEV_RESOURCES times (us): entry 0 run 2572 exit 0
POST: 0x74
Enabling resources...
PCI: 00:18.0 cmd <- 00
@@ -1072,7 +1072,7 @@
PCI: 03:00.0 subsystem <- 1043/8162
PCI: 03:00.0 cmd <- 02
done.
-BS: BS_DEV_ENABLE times (us): entry 0 run 194 exit 0
+BS: BS_DEV_ENABLE times (us): entry 0 run 197 exit 0
POST: 0x75
Initializing devices...
Root Device init
@@ -1128,63 +1128,63 @@
POST: 0x93
Sending STARTUP #2 to 3.
After apic_write.
-Startup point 1.
-Waiting for send to finish...
-+Setting up local apic... apic_id: 0x01 done.
+Setting up local apic... apic_id: 0x01 done.
POST: 0x9b
CPU model: Quad-Core AMD Opteron(tm) Processor 8347
+Startup point 1.
+Waiting for send to finish...
++siblings = 03, CPU #1 initialized
After Startup.
-siblings = 03, CPU4: stack_base 0012c000, stack_end 0012cff8
-CPU #1 initialized
+CPU4: stack_base 0012c000, stack_end 0012cff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
-
+Waiting for send to finish...
++
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
-Waiting for send to finish...
-+#startup loops: 2.
+#startup loops: 2.
Sending STARTUP #1 to 4.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Setting up local apic... apic_id: 0x02 done.
POST: 0x9b
+CPU model: Quad-Core AMD Opteron(tm) Processor 8347
Sending STARTUP #2 to 4.
After apic_write.
-CPU model: Quad-Core AMD Opteron(tm) Processor 8347
siblings = 03, CPU #2 initialized
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU5: stack_base 0012b000, stack_end 0012bff8
Asserting INIT.
-Waiting for send to finish...
-+Deasserting INIT.
-Waiting for send to finish...
-+#startup loops: 2.
-Sending STARTUP #1 to 5.
-After apic_write.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
-Startup point 1.
Waiting for send to finish...
-+Setting up local apic...Sending STARTUP #2 to 5.
++Deasserting INIT.
+Waiting for send to finish...
++#startup loops: 2.
+Sending STARTUP #1 to 5.
After apic_write.
- apic_id: 0x03 done.
+Setting up local apic...Startup point 1.
+Waiting for send to finish...
++ apic_id: 0x03 done.
POST: 0x9b
CPU model: Quad-Core AMD Opteron(tm) Processor 8347
+Sending STARTUP #2 to 5.
+After apic_write.
+siblings = 03, CPU #3 initialized
Startup point 1.
Waiting for send to finish...
-+siblings = 03, CPU #3 initialized
-After Startup.
++After Startup.
CPU6: stack_base 0012a000, stack_end 0012aff8
Asserting INIT.
Waiting for send to finish...
@@ -1220,29 +1220,29 @@
After apic_write.
Startup point 1.
Waiting for send to finish...
-+
++Sending STARTUP #2 to 7.
+After apic_write.
+
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
-Sending STARTUP #2 to 7.
-After apic_write.
-Setting up local apic...Startup point 1.
+Startup point 1.
Waiting for send to finish...
-+ apic_id: 0x05 done.
-POST: 0x9b
-After Startup.
-CPU model: Quad-Core AMD Opteron(tm) Processor 8347
++After Startup.
Initializing CPU #0
-siblings = 03, CPU: vendor AMD device 100f21
+Setting up local apic...CPU: vendor AMD device 100f21
CPU: family 10, model 02, stepping 01
-CPU #5 initialized
+ apic_id: 0x05 done.
+POST: 0x9b
nodeid = 00, coreid = 00
POST: 0x60
Enabling cache
+CPU model: Quad-Core AMD Opteron(tm) Processor 8347
CPU ID 0x80000001: 100f21
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
+siblings = 03, CPU #5 initialized
MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
@@ -1260,15 +1260,15 @@
Variable MTRRs: Enabled
POST: 0x93
-Setting up local apic... apic_id: 0x06 done.
-POST: 0x9b
-
+Setting up local apic...
MTRR check
Fixed MTRRs : Enabled
-CPU model: Quad-Core AMD Opteron(tm) Processor 8347
Variable MTRRs: Enabled
POST: 0x93
+ apic_id: 0x06 done.
+POST: 0x9b
+CPU model: Quad-Core AMD Opteron(tm) Processor 8347
siblings = 03, CPU #6 initialized
Setting up local apic... apic_id: 0x00 done.
POST: 0x9b
@@ -1293,7 +1293,7 @@
CPU5: stack: 0012b000 - 0012c000, lowest used address 0012bd10, stack used: 752 bytes
CPU6: stack: 0012a000 - 0012b000, lowest used address 0012ad10, stack used: 752 bytes
CPU7: stack: 00129000 - 0012a000, lowest used address 00129d10, stack used: 752 bytes
-CPU_CLUSTER: 0 init 45974 usecs
+CPU_CLUSTER: 0 init 46167 usecs
POST: 0x75
POST: 0x75
POST: 0x75
@@ -1315,7 +1315,7 @@
POST: 0x75
PCI: 00:18.3 init
NB: Function 3 Misc Control.. done.
-PCI: 00:18.3 init 3 usecs
+PCI: 00:18.3 init 2 usecs
POST: 0x75
PCI: 00:18.4 init
PCI: 00:18.4 init 0 usecs
@@ -1390,7 +1390,7 @@
CBFS: - load entry 0x0 file name (16 bytes)...
CBFS: Found file (offset=0x28, len=2704).
RTC Init
-PCI: 00:01.0 init 1717 usecs
+PCI: 00:01.0 init 1713 usecs
POST: 0x75
POST: 0x75
PCI: 00:02.0 init
@@ -1444,7 +1444,7 @@
POST: 0x75
PNP: 002e.5 init
Keyboard init...
-PNP: 002e.5 init 348508 usecs
+PNP: 002e.5 init 348515 usecs
POST: 0x75
POST: 0x75
POST: 0x75
@@ -1465,7 +1465,7 @@
POST: 0x75
smbus: PCI: 00:01.1[0]->I2C: 01:2f init
ID: 5ca3
-I2C: 01:2f init 96248 usecs
+I2C: 01:2f init 96260 usecs
POST: 0x75
PCI: 01:04.0 init
XGI Z9s: initializing video device
@@ -1547,7 +1547,7 @@
APIC: 05: enabled 1
APIC: 06: enabled 1
APIC: 07: enabled 1
-BS: BS_DEV_INIT times (us): entry 0 run 508153 exit 0
+BS: BS_DEV_INIT times (us): entry 0 run 508359 exit 0
POST: 0x76
Finalize devices...
Devices finalized
@@ -1758,7 +1758,7 @@
TIME STAMP 1. dfffe920 000002e0
ROMSTAGE 2. dfffe900 00000004
GDT 3. dfffe700 00000200
-BS: BS_WRITE_TABLES times (us): entry 0 run 3367 exit 0
+BS: BS_WRITE_TABLES times (us): entry 0 run 3368 exit 0
POST: 0x7a
CBFS: CBFS header offset: 0xfffff468/0x100000
CBFS: CBFS location: 0x0~0xff480, align: 64
@@ -1807,7 +1807,7 @@
[ 0x000e6a0c, 00100000, 0x00100000) <- fff72660
dest 000e6a0c, end 00100000, bouncebuffer dfdbf000
Loaded segments
-BS: BS_PAYLOAD_LOAD times (us): entry 0 run 59141 exit 0
+BS: BS_PAYLOAD_LOAD times (us): entry 0 run 59153 exit 0
POST: 0x7b
Jumping to boot code at 000fd55a(dffab000)
POST: 0xf8
@@ -1816,12 +1816,12 @@
lb_start = 0x00100000
lb_size = 0x000f5dac
buffer = 0xdfdbf000
-SeaBIOS (version rel-1.8.0-10-g5ae3dd6-20150523_003359-cb-test-tgt)
+SeaBIOS (version rel-1.8.0-10-g5ae3dd6-20150523_103402-cb-test-tgt)
Found coreboot cbmem console @ dffdb000
Found mainboard ASUS KFSN4-DRE
Relocating init from 0x000e7c30 to 0xdff60c60 (size 41696)
Found CBFS header at 0xfffff468
-CPU Mhz=1910
+CPU Mhz=1911
Found 26 PCI devices (max PCI bus is 05)
Copying SMBIOS entry point from 0xdffb3000 to 0x000f1ef0
Copying ACPI RSDP from 0xdffb4000 to 0x000f1ec0
@@ -1831,7 +1831,7 @@
Running option rom at c000:0003
pmm call arg1=0
Turning on vga text mode console
-SeaBIOS (version rel-1.8.0-10-g5ae3dd6-20150523_003359-cb-test-tgt)
+SeaBIOS (version rel-1.8.0-10-g5ae3dd6-20150523_103402-cb-test-tgt)
EHCI init on dev 00:02.1 (regs=0xfc303020)
OHCI init on dev 00:02.0 (regs=0xfc300000)
Found 0 lpt ports