

coreboot-4.6-1437-ga097fb8fff Wed Sep 13 17:26:27 UTC 2017 romstage starting...
CBMEM:
IMD: root @ 1ffff000 254 entries.
IMD: root @ 1fffec00 62 entries.
CBFS: 'Master Header Locator' located CBFS at [100:3ffc0)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 19a80 size 9974


coreboot-4.6-1437-ga097fb8fff Wed Sep 13 17:26:27 UTC 2017 ramstage starting...
Moving GDT to 1fffe8c0...ok
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:04.0: enabled 1
PNP: 03f0.0: enabled 1
PNP: 03f0.1: enabled 1
PNP: 03f0.2: enabled 1
PNP: 03f0.3: enabled 1
PNP: 03f0.5: enabled 1
PNP: 03f0.6: enabled 1
PNP: 03f0.7: enabled 1
PNP: 03f0.8: enabled 1
PNP: 03f0.a: enabled 1
PCI: 00:04.1: enabled 1
PCI: 00:04.2: enabled 1
PCI: 00:04.3: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:01.0: enabled 1
  PCI: 00:04.0: enabled 1
   PNP: 03f0.0: enabled 1
   PNP: 03f0.1: enabled 1
   PNP: 03f0.2: enabled 1
   PNP: 03f0.3: enabled 1
   PNP: 03f0.5: enabled 1
   PNP: 03f0.6: enabled 1
   PNP: 03f0.7: enabled 1
   PNP: 03f0.8: enabled 1
   PNP: 03f0.a: enabled 1
  PCI: 00:04.1: enabled 1
  PCI: 00:04.2: enabled 1
  PCI: 00:04.3: enabled 1
Root Device scanning...
root_dev_scan_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/7190] ops
PCI: 00:00.0 [8086/7190] enabled
PCI: 00:01.0 [8086/7191] enabled
PCI: 00:04.0 [8086/7110] bus ops
PCI: 00:04.0 [8086/7110] enabled
PCI: 00:04.1 [8086/7111] ops
PCI: 00:04.1 [8086/7111] enabled
PCI: 00:04.2 [8086/7112] ops
PCI: 00:04.2 [8086/7112] enabled
PCI: 00:04.3 [8086/7113] bus ops
pwrmgt_enable: gpo default missing in devicetree.cb!
PCI: 00:04.3 [8086/7113] enabled
PCI: 00:0b.0 [1186/1300] enabled
PCI: 00:0c.0 [102b/051a] enabled
PCI: 00:01.0 scanning...
do_pci_scan_bridge for PCI: 00:01.0
PCI: pci_scan_bus for bus 01
scan_bus: scanning of bus PCI: 00:01.0 took 0 usecs
PCI: 00:04.0 scanning...
scan_lpc_bus for PCI: 00:04.0
PNP: 03f0.0 enabled
PNP: 03f0.1 enabled
PNP: 03f0.2 enabled
PNP: 03f0.3 enabled
PNP: 03f0.5 enabled
PNP: 03f0.6 enabled
PNP: 03f0.7 enabled
PNP: 03f0.8 enabled
PNP: 03f0.a enabled
scan_lpc_bus for PCI: 00:04.0 done
scan_bus: scanning of bus PCI: 00:04.0 took 0 usecs
PCI: 00:04.3 scanning...
scan_generic_bus for PCI: 00:04.3
scan_generic_bus for PCI: 00:04.3 done
scan_bus: scanning of bus PCI: 00:04.3 took 0 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 0 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 0 usecs
done
found VGA at PCI: 00:0c.0
Setting up VGA for PCI: 00:0c.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0 done
PCI: 00:04.0 read_resources bus 0 link: 0
PNP: 03f0.8 missing read_resources
PCI: 00:04.0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
   PCI: 00:01.0
   PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
   PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:04.0 child on link 0 PNP: 03f0.0
   PCI: 00:04.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
   PCI: 00:04.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2
    PNP: 03f0.0
    PNP: 03f0.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 03f0.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
    PNP: 03f0.1
    PNP: 03f0.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 03f0.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 03f0.2
    PNP: 03f0.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 03f0.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.3
    PNP: 03f0.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 03f0.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.5
    PNP: 03f0.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
    PNP: 03f0.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
    PNP: 03f0.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 03f0.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
    PNP: 03f0.6
    PNP: 03f0.6 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 03f0.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 03f0.7
    PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
    PNP: 03f0.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62
    PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 03f0.8
    PNP: 03f0.a
    PNP: 03f0.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
   PCI: 00:04.1
   PCI: 00:04.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
   PCI: 00:04.2
   PCI: 00:04.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:04.3
   PCI: 00:04.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1
   PCI: 00:04.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2
   PCI: 00:0b.0
   PCI: 00:0b.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
   PCI: 00:0b.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
   PCI: 00:0c.0
   PCI: 00:0c.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10
   PCI: 00:0c.0 resource base 0 size 800000 align 23 gran 23 limit ffffffff flags 1200 index 14
   PCI: 00:0c.0 resource base 0 size 800000 align 23 gran 23 limit ffffffff flags 200 index 18
   PCI: 00:0c.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:0b.0 10 *  [0x0 - 0xff] io
PCI: 00:04.2 20 *  [0x400 - 0x41f] io
PCI: 00:04.1 20 *  [0x420 - 0x42f] io
DOMAIN: 0000 io: base: 430 size: 430 align: 8 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:00.0 10 *  [0x0 - 0xfffffff] prefmem
PCI: 00:0c.0 14 *  [0x10000000 - 0x107fffff] prefmem
PCI: 00:0c.0 18 *  [0x10800000 - 0x10ffffff] mem
PCI: 00:0c.0 30 *  [0x11000000 - 0x1100ffff] mem
PCI: 00:0c.0 10 *  [0x11010000 - 0x11013fff] mem
PCI: 00:0b.0 14 *  [0x11014000 - 0x110140ff] mem
DOMAIN: 0000 mem: base: 11014100 size: 11014100 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:04.0 01 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:04.0 02 base ff800000 limit ffffffff mem (fixed)
constrain_resources: PCI: 00:04.3 01 base 0000e400 limit 0000e43f io (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000e3ff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit ff7fffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:430 align:8 gran:0 limit:e3ff
PCI: 00:0b.0 10 *  [0x1000 - 0x10ff] io
PCI: 00:04.2 20 *  [0x1400 - 0x141f] io
PCI: 00:04.1 20 *  [0x1420 - 0x142f] io
DOMAIN: 0000 io: next_base: 1430 size: 430 align: 8 gran: 0 done
PCI: 00:01.0 io: base:e3ff size:0 align:12 gran:12 limit:e3ff
PCI: 00:01.0 io: next_base: e3ff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:e0000000 size:11014100 align:28 gran:0 limit:ff7fffff
PCI: 00:00.0 10 *  [0xe0000000 - 0xefffffff] prefmem
PCI: 00:0c.0 14 *  [0xf0000000 - 0xf07fffff] prefmem
PCI: 00:0c.0 18 *  [0xf0800000 - 0xf0ffffff] mem
PCI: 00:0c.0 30 *  [0xf1000000 - 0xf100ffff] mem
PCI: 00:0c.0 10 *  [0xf1010000 - 0xf1013fff] mem
PCI: 00:0b.0 14 *  [0xf1014000 - 0xf10140ff] mem
DOMAIN: 0000 mem: next_base: f1014100 size: 11014100 align: 28 gran: 0 done
PCI: 00:01.0 prefmem: base:ff7fffff size:0 align:20 gran:20 limit:ff7fffff
PCI: 00:01.0 prefmem: next_base: ff7fffff size: 0 align: 20 gran: 20 done
PCI: 00:01.0 mem: base:ff7fffff size:0 align:20 gran:20 limit:ff7fffff
PCI: 00:01.0 mem: next_base: ff7fffff size: 0 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
Setting RAM size to 512 MB
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:00.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:01.0 1c <- [0x000000e3ff - 0x000000e3fe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00ff7fffff - 0x00ff7ffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00ff7fffff - 0x00ff7ffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:04.0 assign_resources, bus 0 link: 0
PNP: 03f0.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io
PNP: 03f0.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq
PNP: 03f0.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq
PNP: 03f0.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io
PNP: 03f0.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
ERROR: PNP: 03f0.1 74 drq size: 0x0000000001 not assigned
PNP: 03f0.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 03f0.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 03f0.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 03f0.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
PNP: 03f0.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 03f0.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 03f0.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 03f0.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
ERROR: PNP: 03f0.6 60 io size: 0x0000000008 not assigned
ERROR: PNP: 03f0.6 70 irq size: 0x0000000001 not assigned
ERROR: PNP: 03f0.7 60 io size: 0x0000000001 not assigned
ERROR: PNP: 03f0.7 62 io size: 0x0000000002 not assigned
ERROR: PNP: 03f0.7 70 irq size: 0x0000000001 not assigned
ERROR: PNP: 03f0.a 70 irq size: 0x0000000001 not assigned
PCI: 00:04.0 assign_resources, bus 0 link: 0
PCI: 00:04.1 20 <- [0x0000001420 - 0x000000142f] size 0x00000010 gran 0x04 io
PCI: 00:04.2 20 <- [0x0000001400 - 0x000000141f] size 0x00000020 gran 0x05 io
PCI: 00:0b.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 00:0b.0 14 <- [0x00f1014000 - 0x00f10140ff] size 0x00000100 gran 0x08 mem
PCI: 00:0c.0 10 <- [0x00f1010000 - 0x00f1013fff] size 0x00004000 gran 0x0e mem
PCI: 00:0c.0 14 <- [0x00f0000000 - 0x00f07fffff] size 0x00800000 gran 0x17 prefmem
PCI: 00:0c.0 18 <- [0x00f0800000 - 0x00f0ffffff] size 0x00800000 gran 0x17 mem
PCI: 00:0c.0 30 <- [0x00f1000000 - 0x00f100ffff] size 0x00010000 gran 0x10 romem
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 1000 size 430 align 8 gran 0 limit e3ff flags 40040100 index 10000000
  DOMAIN: 0000 resource base e0000000 size 11014100 align 28 gran 0 limit ff7fffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index a
  DOMAIN: 0000 resource base c0000 size 1ff40000 align 0 gran 0 limit 0 flags e0004200 index b
   PCI: 00:00.0
   PCI: 00:00.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001200 index 10
   PCI: 00:01.0
   PCI: 00:01.0 resource base e3ff size 0 align 12 gran 12 limit e3ff flags 60080102 index 1c
   PCI: 00:01.0 resource base ff7fffff size 0 align 20 gran 20 limit ff7fffff flags 60081202 index 24
   PCI: 00:01.0 resource base ff7fffff size 0 align 20 gran 20 limit ff7fffff flags 60080202 index 20
   PCI: 00:04.0 child on link 0 PNP: 03f0.0
   PCI: 00:04.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
   PCI: 00:04.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2
    PNP: 03f0.0
    PNP: 03f0.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
    PNP: 03f0.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 03f0.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
    PNP: 03f0.1
    PNP: 03f0.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
    PNP: 03f0.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 03f0.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 03f0.2
    PNP: 03f0.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
    PNP: 03f0.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 03f0.3
    PNP: 03f0.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
    PNP: 03f0.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 03f0.5
    PNP: 03f0.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
    PNP: 03f0.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62
    PNP: 03f0.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 03f0.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72
    PNP: 03f0.6
    PNP: 03f0.6 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
    PNP: 03f0.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 03f0.7
    PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
    PNP: 03f0.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62
    PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 03f0.8
    PNP: 03f0.a
    PNP: 03f0.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
   PCI: 00:04.1
   PCI: 00:04.1 resource base 1420 size 10 align 4 gran 4 limit 142f flags 60000100 index 20
   PCI: 00:04.2
   PCI: 00:04.2 resource base 1400 size 20 align 5 gran 5 limit 141f flags 60000100 index 20
   PCI: 00:04.3
   PCI: 00:04.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1
   PCI: 00:04.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2
   PCI: 00:0b.0
   PCI: 00:0b.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10
   PCI: 00:0b.0 resource base f1014000 size 100 align 12 gran 8 limit f10140ff flags 60000200 index 14
   PCI: 00:0c.0
   PCI: 00:0c.0 resource base f1010000 size 4000 align 14 gran 14 limit f1013fff flags 60000200 index 10
   PCI: 00:0c.0 resource base f0000000 size 800000 align 23 gran 23 limit f07fffff flags 60001200 index 14
   PCI: 00:0c.0 resource base f0800000 size 800000 align 23 gran 23 limit f0ffffff flags 60000200 index 18
   PCI: 00:0c.0 resource base f1000000 size 10000 align 16 gran 16 limit f100ffff flags 60002200 index 30
Done allocating resources.
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 0083
PCI: 00:01.0 cmd <- 00
PCI: 00:04.0 cmd <- 07
PCI: 00:04.1 cmd <- 01
PCI: 00:04.2 cmd <- 01
PCI: 00:04.3 cmd <- 01
PCI: 00:0b.0 cmd <- 03
PCI: 00:0c.0 cmd <- 83
done.
Initializing devices...
Root Device init ...
CPU_CLUSTER: 0 init ...
Initializing CPU #0
CPU: vendor Intel device 6b1
CPU: family 06, model 0b, stepping 01
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [100:3ffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 4200 size 15800
microcode: sig=0x6b1 pf=0x10 revision=0x0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
Microcode size field is 0
microcode: updated to revision 0x1c date=2001-02-15
CPU: Intel(R) Celeron(TM) CPU                1400MHz.
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x0000000020000000 size 0x1ff40000 type 6
0x0000000020000000 - 0x00000000f0000000 size 0xd0000000 type 0
0x00000000f0000000 - 0x00000000f0800000 size 0x00800000 type 1
0x00000000f0800000 - 0x0000000100000000 size 0x0f800000 type 0
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 11/2.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000fe0000000 type 6
MTRR: 1 base 0x00000000f0000000 mask 0x0000000fff800000 type 1

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local APIC... apic_id: 0x00 done.
CPU #0 initialized
PCI: 00:00.0 init ...
Northbridge Init
PCI: 00:04.0 init ...
RTC Init
PCI: 00:04.1 init ...
IDE: Primary IDE interface: on
IDE: Secondary IDE interface: on
IDE: Access to legacy IDE ports: on
IDE: Primary IDE interface, drive 0: UDMA/33: off
IDE: Primary IDE interface, drive 1: UDMA/33: off
IDE: Secondary IDE interface, drive 0: UDMA/33: off
IDE: Secondary IDE interface, drive 1: UDMA/33: off
PCI: 00:04.2 init ...
PCI: 00:0b.0 init ...
PCI: 00:0c.0 init ...
CBFS: 'Master Header Locator' located CBFS at [100:3ffc0)
CBFS: Locating 'pci102b,051a.rom'
CBFS: 'pci102b,051a.rom' not found.
PCI Option ROM loading disabled for PCI: 00:0c.0
PNP: 03f0.0 init ...
PNP: 03f0.1 init ...
PNP: 03f0.2 init ...
PNP: 03f0.3 init ...
PNP: 03f0.5 init ...
PNP: 03f0.6 init ...
PNP: 03f0.7 init ...
PNP: 03f0.a init ...
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:04.0: enabled 1
PNP: 03f0.0: enabled 1
PNP: 03f0.1: enabled 1
PNP: 03f0.2: enabled 1
PNP: 03f0.3: enabled 1
PNP: 03f0.5: enabled 1
PNP: 03f0.6: enabled 1
PNP: 03f0.7: enabled 1
PNP: 03f0.8: enabled 1
PNP: 03f0.a: enabled 1
PCI: 00:04.1: enabled 1
PCI: 00:04.2: enabled 1
PCI: 00:04.3: enabled 1
PCI: 00:0b.0: enabled 1
PCI: 00:0c.0: enabled 1
Finalize devices...
Devices finalized
Copying Interrupt Routing Table to 0x000f0000... done.
Copying Interrupt Routing Table to 0x1ffe5000... done.
PIRQ table: 160 bytes.
smbios_write_tables: 1ffe4000
Root Device (ASUS P3B-F)
CPU_CLUSTER: 0 (Intel 82443BX (440BX) Northbridge)
APIC: 00 (Slot 1 CPU)
DOMAIN: 0000 (Intel 82443BX (440BX) Northbridge)
PCI: 00:00.0 (Intel 82443BX (440BX) Northbridge)
PCI: 00:01.0 (Intel 82443BX (440BX) Northbridge)
PCI: 00:04.0 (Intel 82371FB/SB/MX/AB/EB/MB Southbridge)
PNP: 03f0.0 (Winbond W83977TF Super I/O)
PNP: 03f0.1 (Winbond W83977TF Super I/O)
PNP: 03f0.2 (Winbond W83977TF Super I/O)
PNP: 03f0.3 (Winbond W83977TF Super I/O)
PNP: 03f0.5 (Winbond W83977TF Super I/O)
PNP: 03f0.6 (Winbond W83977TF Super I/O)
PNP: 03f0.7 (Winbond W83977TF Super I/O)
PNP: 03f0.8 (Winbond W83977TF Super I/O)
PNP: 03f0.a (Winbond W83977TF Super I/O)
PCI: 00:04.1 (Intel 82371FB/SB/MX/AB/EB/MB Southbridge)
PCI: 00:04.2 (Intel 82371FB/SB/MX/AB/EB/MB Southbridge)
PCI: 00:04.3 (Intel 82371FB/SB/MX/AB/EB/MB Southbridge)
PCI: 00:0b.0 (unknown)
PCI: 00:0c.0 (unknown)
SMBIOS tables: 336 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 7fe0
Writing coreboot table at 0x1ffe6000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-000000001ffe3fff: RAM
 3. 000000001ffe4000-000000001fffffff: CONFIGURATION TABLES
 4. 00000000ff800000-00000000ffffffff: RESERVED
CBFS: 'Master Header Locator' located CBFS at [100:3ffc0)
FMAP: Found "FLASH" version 1.1 at 0.
FMAP: base = fffc0000 size = 40000 #areas = 3
Wrote coreboot table at: 1ffe6000, 0x1f4 bytes, checksum 5dc2
coreboot table: 524 bytes.
IMD ROOT    0. 1ffff000 00001000
IMD SMALL   1. 1fffe000 00001000
CONSOLE     2. 1ffee000 00010000
COREBOOT    3. 1ffe6000 00008000
IRQ TABLE   4. 1ffe5000 00001000
SMBIOS      5. 1ffe4000 00000800
IMD small region:
  IMD ROOT    0. 1fffec00 00000400
  CAR GLOBALS 1. 1fffeac0 00000140
  GDT         2. 1fffe8c0 00000200
CBFS: 'Master Header Locator' located CBFS at [100:3ffc0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 23800 size f9af
Loading segment from ROM address 0xfffe3938
  code (compression=1)
  New segment dstaddr 0xe23c0 memsize 0x1dc40 srcaddr 0xfffe3970 filesize 0xf977
Loading segment from ROM address 0xfffe3954
  Entry Point 0x000ff06e
Bounce Buffer at 1ffa6000, 250512 bytes
Loading Segment: addr: 0x00000000000e23c0 memsz: 0x000000000001dc40 filesz: 0x000000000000f977
lb: [0x0000000000100000, 0x000000000011e948)
Post relocation: addr: 0x00000000000e23c0 memsz: 0x000000000001dc40 filesz: 0x000000000000f977
using LZMA
[ 0x000e23c0, 00100000, 0x00100000) <- fffe3970
dest 000e23c0, end 00100000, bouncebuffer 1ffa6000
Loaded segments
Jumping to boot code at 000ff06e(1ffe6000)
CPU0: stack: 00115000 - 00116000, lowest used address 00115ba0, stack used: 1120 bytes
entry    = 0x000ff06e
lb_start = 0x00100000
lb_size  = 0x0001e948
buffer   = 0x1ffa6000
SeaBIOS (version rel-1.10.2-0-g5f4c7b1)
BUILD: gcc: (coreboot toolchain v1.47 August 16th, 2017) 6.3.0 binutils: (GNU Binutils) 2.28
Found coreboot cbmem console @ 1ffee000
Found mainboard ASUS P3B-F
Relocating init from 0x000e3940 to 0x1ff97da0 (size 49600)
Found CBFS header at 0xfffc0138
multiboot: eax=0, ebx=0
Found 8 PCI devices (max PCI bus is 01)
Copying SMBIOS entry point from 0x1ffe4000 to 0x000f7120
Copying PIR from 0x1ffe5000 to 0x000f7080
CPU Mhz=936
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.10.2-0-g5f4c7b1)
UHCI init on dev 00:04.2 (io=1400)
ATA controller 1 at 1f0/3f4/0 (irq 14 dev 21)
ATA controller 2 at 170/374/0 (irq 15 dev 21)
Found 1 lpt ports
Found 2 serial ports
ata0-0: Maxtor 6E040L0 ATA-7 Hard-Disk (39205 MiBytes)
Searching bootorder for: /pci@i0cf8/*@4,1/drive@0/disk@0
Got ps2 nak (status=51)
All threads complete.
Scan for option roms

Press ESC for boot menu.

Searching bootorder for: HALT
drive 0x000f7010: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=80293248
Space available for UMB: c8000-ef000, f6940-f7010
Returned 262144 bytes of ZoneHigh
e820 map has 6 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 000000001ffe4000 = 1 RAM
  4: 000000001ffe4000 - 0000000020000000 = 2 RESERVED
  5: 00000000ff800000 - 0000000100000000 = 2 RESERVED
enter handle_19:
  NULL
Booting from Hard Disk...
Booting from 0000:7c00