# This image was built using coreboot TIMELESS
CONFIG_COLLECT_TIMESTAMPS=y
CONFIG_VENDOR_ASROCK=y
CONFIG_VGA_BIOS=y
CONFIG_VGA_BIOS_FILE="pci1002,9802.rom.lzma"
CONFIG_BOARD_ASROCK_E350M1=y
CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_NO_POST=y
CONFIG_PCIEXP_ASPM=y
# CONFIG_CONSOLE_SERIAL is not set
CONFIG_SEABIOS_MASTER=y
CONFIG_COREINFO_SECONDARY_PAYLOAD=y
CONFIG_MEMTEST_SECONDARY_PAYLOAD=y
CONFIG_NVRAMCUI_SECONDARY_PAYLOAD=y
CONFIG_TINT_SECONDARY_PAYLOAD=y