

coreboot-4.2-536-g85f362e-dirty-RAPTOR-NORMAL Tue Dec  8 02:45:11 UTC 2015 romstage starting...
Initial stack pointer: 000dff38
POST: 0x30
CPU APICID 00 start flag set
POST: 0x32
POST: 0x66
BSP Family_Model: 00600f20
*sysinfo range: [000c2d20,000ccf5a]
bsp_apicid = 00
cpu_init_detectedx = 00000000
CBFS @ 100000 size ff440
CBFS: Locating 'microcode_amd.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS:  Unmatched 'cmos_layout.bin' at 61340
CBFS: Checking offset 621c0
CBFS:  Unmatched '' at 621c0
CBFS: Checking offset 623c0
CBFS:  Unmatched 'fallback/dsdt.aml' at 623c0
CBFS: Checking offset 64800
CBFS: Found @ offset 64800 size 318c
CBFS @ 100000 size ff440
CBFS: Locating 'microcode_amd_fam15h.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS:  Unmatched 'cmos_layout.bin' at 61340
CBFS: Checking offset 621c0
CBFS:  Unmatched '' at 621c0
CBFS: Checking offset 623c0
CBFS:  Unmatched 'fallback/dsdt.aml' at 623c0
CBFS: Checking offset 64800
CBFS:  Unmatched 'microcode_amd.bin' at 64800
CBFS: Checking offset 67a00
CBFS: Found @ offset 67a00 size 1ec4
[microcode] patch id to apply = 0x06000832
[microcode] updated to patch id = 0x06000832 success
POST: 0x33
cpuSetAMDMSR CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/pa

*** Log truncated, 301781 characters dropped. ***

POST: 0x41
amdmct_cbmem_store_info: Storing AMDMCT configuration in CBMEM
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
disable_spd()
prepare_romstage_ramstack: Prepare CAR migration and stack regions...memset_:  Fill [003f5800-003fffff] ...prepare_romstage_ramstack:  Done
post_cache_as_ram: Copying data from cache to RAM...memcpy_:  Copy [000c2c00-000ccf7f] to [003f5c80 - 003fffff] ...post_cache_as_ram:  Done
post_cache_as_ram: Verifying data integrity in RAM...memcmp_:  Compare [000c2c00-000ccf7f] with [003f5c80 - 003fffff] ...post_cache_as_ram:  Done
post_cache_as_ram: Switching to use RAM as stack...cache_as_ram_new_stack: Top about 003f5c6c ... Done
cache_as_ram_new_stack: Disabling cache as ram now
prepare_ramstage_region: Prepare ramstage memory region...memset_:  Fill [00000000-003f57ff] ...

coreboot-4.2-536-g85f362e-dirty-RAPTOR-NORMAL Tue Dec  8 02:45:11 UTC 2015 ramstage starting...
POST: 0x39
Moving GDT to bfffe700...ok
POST: 0x80
Normal boot.
POST: 0x70
BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0
POST: 0x71
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 2 exit 0
POST: 0x72
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.1: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 1
PCI: 00:0a.0: enabled 1
PCI: 00:0b.0: enabled 1
PCI: 00:0c.0: enabled 1
PCI: 00:0d.0: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.1: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
I2C: 00:52: enabled 1
I2C: 00:53: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:2f: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 0
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 0
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 0
PNP: 002e.7: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.9: enabled 0
PNP: 002e.a: enabled 1
PNP: 002e.b: enabled 1
PNP: 002e.c: enabled 0
PNP: 002e.d: enabled 0
PNP: 002e.e: enabled 0
PNP: 002e.f: enabled 0
PCI: 00:14.4: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 1
PCI: 00:19.2: enabled 1
PCI: 00:19.3: enabled 1
PCI: 00:19.4: enabled 1
PCI: 00:19.5: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1a.1: enabled 1
PCI: 00:1a.2: enabled 1
PCI: 00:1a.3: enabled 1
PCI: 00:1a.4: enabled 1
PCI: 00:1a.5: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1b.1: enabled 1
PCI: 00:1b.2: enabled 1
PCI: 00:1b.3: enabled 1
PCI: 00:1b.4: enabled 1
PCI: 00:1b.5: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
 DOMAIN: 0000: enabled 1
  PCI: 00:18.0: enabled 1
   PCI: 00:00.0: enabled 1
   PCI: 00:00.1: enabled 1
   PCI: 00:00.2: enabled 1
   PCI: 00:02.0: enabled 1
   PCI: 00:03.0: enabled 0
   PCI: 00:04.0: enabled 1
   PCI: 00:05.0: enabled 0
   PCI: 00:06.0: enabled 0
   PCI: 00:07.0: enabled 0
   PCI: 00:08.0: enabled 0
   PCI: 00:09.0: enabled 1
   PCI: 00:0a.0: enabled 1
   PCI: 00:0b.0: enabled 1
   PCI: 00:0c.0: enabled 1
   PCI: 00:0d.0: enabled 1
   PCI: 00:11.0: enabled 1
   PCI: 00:12.0: enabled 1
   PCI: 00:12.1: enabled 1
   PCI: 00:12.2: enabled 1
   PCI: 00:13.0: enabled 1
   PCI: 00:13.1: enabled 1
   PCI: 00:13.2: enabled 1
   PCI: 00:14.0: enabled 1
    I2C: 00:50: enabled 1
    I2C: 00:51: enabled 1
    I2C: 00:52: enabled 1
    I2C: 00:53: enabled 1
    I2C: 00:54: enabled 1
    I2C: 00:55: enabled 1
    I2C: 00:56: enabled 1
    I2C: 00:57: enabled 1
    I2C: 00:2f: enabled 1
   PCI: 00:14.1: enabled 1
   PCI: 00:14.2: enabled 0
   PCI: 00:14.3: enabled 1
    PNP: 002e.0: enabled 0
    PNP: 002e.1: enabled 0
    PNP: 002e.2: enabled 1
    PNP: 002e.3: enabled 0
    PNP: 002e.5: enabled 1
    PNP: 002e.6: enabled 0
    PNP: 002e.7: enabled 0
    PNP: 002e.8: enabled 0
    PNP: 002e.9: enabled 0
    PNP: 002e.a: enabled 1
    PNP: 002e.b: enabled 1
    PNP: 002e.c: enabled 0
    PNP: 002e.d: enabled 0
    PNP: 002e.e: enabled 0
    PNP: 002e.f: enabled 0
   PCI: 00:14.4: enabled 1
    PCI: 00:01.0: enabled 1
    PCI: 00:02.0: enabled 1
    PCI: 00:03.0: enabled 1
   PCI: 00:14.5: enabled 1
  PCI: 00:18.1: enabled 1
  PCI: 00:18.2: enabled 1
  PCI: 00:18.3: enabled 1
  PCI: 00:18.4: enabled 1
  PCI: 00:18.5: enabled 1
  PCI: 00:19.0: enabled 1
  PCI: 00:19.1: enabled 1
  PCI: 00:19.2: enabled 1
  PCI: 00:19.3: enabled 1
  PCI: 00:19.4: enabled 1
  PCI: 00:19.5: enabled 1
  PCI: 00:1a.0: enabled 1
  PCI: 00:1a.1: enabled 1
  PCI: 00:1a.2: enabled 1
  PCI: 00:1a.3: enabled 1
  PCI: 00:1a.4: enabled 1
  PCI: 00:1a.5: enabled 1
  PCI: 00:1b.0: enabled 1
  PCI: 00:1b.1: enabled 1
  PCI: 00:1b.2: enabled 1
  PCI: 00:1b.3: enabled 1
  PCI: 00:1b.4: enabled 1
  PCI: 00:1b.5: enabled 1
Mainboard KGPE-D16 Enable. dev=0x0012af20
mainboard_enable, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000
mainboard_enable, TOP MEM2: msr2.lo = 0x40000000, msr2.hi = 0x00000001
Root Device scanning...
root_dev_scan_bus for Root Device
Writing AMD DCT configuration to Flash
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
CBFS @ 100000 size ff440
CBFS: Locating 's3nv'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS: Found @ offset 27fc0 size 10000
SF: Detected W25Q16 with sector size 0x1000, total 0x200000
SF: Successfully erased 32768 bytes @ 0x130000
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
setup_bsp_ramtop, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000
setup_bsp_ramtop, TOP MEM2: msr.lo = 0x40000000, msr.hi = 0x00000001
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
CPU_CLUSTER: 0 scanning...
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
  PCI: 00:18.5 siblings=7
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
CPU: APIC: 02 enabled
CPU: APIC: 03 enabled
CPU: APIC: 04 enabled
CPU: APIC: 05 enabled
CPU: APIC: 06 enabled
CPU: APIC: 07 enabled
  PCI: 00:19.5 siblings=7
CPU: APIC: 08 enabled
CPU: APIC: 09 enabled
CPU: APIC: 0a enabled
CPU: APIC: 0b enabled
CPU: APIC: 0c enabled
CPU: APIC: 0d enabled
CPU: APIC: 0e enabled
CPU: APIC: 0f enabled
scan_bus: scanning of bus CPU_CLUSTER: 0 took 1485 usecs
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:18.0 [1022/1600] bus ops
PCI: 00:18.0 [1022/1600] enabled
PCI: 00:18.1 [1022/1601] enabled
PCI: 00:18.2 [1022/1602] enabled
PCI: 00:18.3 [1022/1603] ops
PCI: 00:18.3 [1022/1603] enabled
PCI: 00:18.4 [1022/1604] ops
PCI: 00:18.4 [1022/1604] enabled
PCI: 00:18.5 [1022/1605] ops
PCI: 00:18.5 [1022/1605] enabled
PCI: 00:19.0 [1022/1600] bus ops
PCI: 00:19.0 [1022/1600] enabled
PCI: 00:19.1 [1022/1601] enabled
PCI: 00:19.2 [1022/1602] enabled
PCI: 00:19.3 [1022/1603] ops
PCI: 00:19.3 [1022/1603] enabled
PCI: 00:19.4 [1022/1604] ops
PCI: 00:19.4 [1022/1604] enabled
PCI: 00:19.5 [1022/1605] ops
PCI: 00:19.5 [1022/1605] enabled
PCI: Static device PCI: 00:1a.0 not found, disabling it.
PCI: Static device PCI: 00:1a.1 not found, disabling it.
PCI: Static device PCI: 00:1a.2 not found, disabling it.
PCI: Static device PCI: 00:1a.3 not found, disabling it.
PCI: Static device PCI: 00:1a.4 not found, disabling it.
PCI: Static device PCI: 00:1a.5 not found, disabling it.
PCI: Static device PCI: 00:1b.0 not found, disabling it.
PCI: Static device PCI: 00:1b.1 not found, disabling it.
PCI: Static device PCI: 00:1b.2 not found, disabling it.
PCI: Static device PCI: 00:1b.3 not found, disabling it.
PCI: Static device PCI: 00:1b.4 not found, disabling it.
PCI: Static device PCI: 00:1b.5 not found, disabling it.
POST: 0x25
PCI: 00:18.0 scanning...
do_hypertransport_scan_chain for bus 00
sr5650_enable: dev=0012d3c0, VID_DID=0x5a101002
Bus-0, Dev-0, Fun-0.
enable_pcie_bar3
sr5650_gpp_sb_init: nb_dev=0x0012d3c0, dev=0x0012ce20, port=0x8
PciePowerOffGppPorts() port 8
NB_PCI_REG04 = 2.
NB_PCI_REG84 = 3000010.
NB_PCI_REG4C = 52042.
Sysmem TOM = 0_c0000000
Sysmem TOM2 = 1_40000000
PCI: 00:00.0 [1002/5a10] ops
PCI: 00:00.0 [1002/5a10] enabled
Capability: type 0x08 @ 0xf0
flags: 0xa803
Capability: type 0x08 @ 0xf0
Capability: type 0x08 @ 0xc4
flags: 0x0280
PCI: 00:00.0 count: 0014 static_count: 0015
PCI: 00:00.0 [1002/5a10] enabled next_unitid: 0015
PCI: pci_scan_bus for bus 00
POST: 0x24
sr5650_enable: dev=0012d3c0, VID_DID=0x5a101002
Bus-0, Dev-0, Fun-0.
enable_pcie_bar3
sr5650_gpp_sb_init: nb_dev=0x0012d3c0, dev=0x0012ce20, port=0x8
PciePowerOffGppPorts() port 8
NB_PCI_REG04 = 2.
NB_PCI_REG84 = 3000010.
NB_PCI_REG4C = 52042.
Sysmem TOM = 0_c0000000
Sysmem TOM2 = 1_40000000
PCI: 00:00.0 [1002/5a10] enabled
sr5650_enable: dev=0012d320, VID_DID=0xffffffff
Bus-0, Dev-0, Fun-1.
PCI: Static device PCI: 00:00.1 not found, disabling it.
sr5650_enable: dev=0012d280, VID_DID=0x5a231002
Bus-0, Dev-0, Fun-2.
PCI: 00:00.2 [1002/5a23] ops
PCI: 00:00.2 [1002/5a23] enabled
sr5650_enable: dev=0012d1e0, VID_DID=0xffffffff
Bus-0, Dev-2,3, Fun-0. enable=1
sr5650_gpp_sb_init: nb_dev=0x0012d3c0, dev=0x0012d1e0, port=0x2
PcieLinkTraining port=2:lc current state=1020304
sr5650_gpp_sb_init: port=0x2 hw_port=0x2 result=0
PciePowerOffGppPorts() port 2
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:02.0 subordinate bus PCI Express
PCI: 00:02.0 [1002/5a16] disabled
sr5650_enable: dev=0012d140, VID_DID=0xffffffff
Bus-0, Dev-2,3, Fun-0. enable=0
sr5650_enable: dev=0012d0a0, VID_DID=0xffffffff
enable_pcie_bar3
Bus-0, Dev-4,5,6,7, Fun-0. enable=1
sr5650_gpp_sb_init: nb_dev=0x0012d3c0, dev=0x0012d0a0, port=0x4
PcieLinkTraining port=4:lc current state=2030400
sr5650_gpp_sb_init: port=0x4 hw_port=0x4 result=0
PciePowerOffGppPorts() port 4
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:04.0 subordinate bus PCI Express
PCI: 00:04.0 [1002/5a18] disabled
sr5650_enable: dev=0012d000, VID_DID=0xffffffff
enable_pcie_bar3
Bus-0, Dev-4,5,6,7, Fun-0. enable=0
sr5650_enable: dev=0012cf60, VID_DID=0xffffffff
enable_pcie_bar3
Bus-0, Dev-4,5,6,7, Fun-0. enable=0
sr5650_enable: dev=0012cec0, VID_DID=0xffffffff
enable_pcie_bar3
Bus-0, Dev-4,5,6,7, Fun-0. enable=0
sr5650_enable: dev=0012ce20, VID_DID=0xffffffff
Bus-0, Dev-8, Fun-0. enable=0
disable_pcie_bar3
sr5650_enable: dev=0012cd80, VID_DID=0xffffffff
Bus-0, Dev-9, 10, Fun-0. enable=1
enable_pcie_bar3
sr5650_gpp_sb_init: nb_dev=0x0012d3c0, dev=0x0012cd80, port=0x9
PcieLinkTraining port=5:lc current state=a0b0f10
addr=c0000000,bus=0,devfn=48
PcieTrainPort reg=0x10000
sr5650_gpp_sb_init: port=0x9 hw_port=0x5 result=1
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:09.0 subordinate bus PCI Express
PCI: 00:09.0 [1002/5a1c] enabled
sr5650_enable: dev=0012cce0, VID_DID=0xffffffff
Bus-0, Dev-9, 10, Fun-0. enable=1
enable_pcie_bar3
sr5650_gpp_sb_init: nb_dev=0x0012d3c0, dev=0x0012cce0, port=0xa
PcieLinkTraining port=6:lc current state=a0b0f10
addr=c0000000,bus=0,devfn=50
PcieTrainPort reg=0x10000
sr5650_gpp_sb_init: port=0xa hw_port=0x6 result=1
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:0a.0 subordinate bus PCI Express
PCI: 00:0a.0 [1002/5a1d] enabled
sr5650_enable: dev=0012cc40, VID_DID=0xffffffff
Bus-0, Dev-11,12, Fun-0. enable=1
sr5650_gpp_sb_init: nb_dev=0x0012d3c0, dev=0x0012cc40, port=0xb
PcieLinkTraining port=b:lc current state=2030400
sr5650_gpp_sb_init: port=0xb hw_port=0xb result=0
PciePowerOffGppPorts() port 11
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:0b.0 subordinate bus PCI Express
PCI: 00:0b.0 [1002/5a1f] disabled
sr5650_enable: dev=0012cba0, VID_DID=0xffffffff
Bus-0, Dev-11,12, Fun-0. enable=1
sr5650_gpp_sb_init: nb_dev=0x0012d3c0, dev=0x0012cba0, port=0xc
PcieLinkTraining port=c:lc current state=2030400
sr5650_gpp_sb_init: port=0xc hw_port=0xc result=0
PciePowerOffGppPorts() port 12
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:0c.0 subordinate bus PCI Express
PCI: 00:0c.0 [1002/5a20] disabled
sr5650_enable: dev=0012cb00, VID_DID=0xffffffff
sr5650_gpp_sb_init: nb_dev=0x0012d3c0, dev=0x0012cb00, port=0xd
PcieLinkTraining port=d:lc current state=2030400
sr5650_gpp_sb_init: port=0xd hw_port=0xd result=0
PciePowerOffGppPorts() port 13
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:0d.0 subordinate bus PCI Express
PCI: 00:0d.0 [1002/5a1e] disabled
sb7xx_51xx_enable()
PCI: 00:11.0 [1002/4394] ops
PCI: 00:11.0 [1002/4394] enabled
sb7xx_51xx_enable()
PCI: 00:12.0 [1002/4397] ops
PCI: 00:12.0 [1002/4397] enabled
sb7xx_51xx_enable()
PCI: 00:12.1 [1002/4398] ops
PCI: 00:12.1 [1002/4398] enabled
sb7xx_51xx_enable()
PCI: 00:12.2 [1002/4396] ops
PCI: 00:12.2 [1002/4396] enabled
sb7xx_51xx_enable()
PCI: 00:13.0 [1002/4397] ops
PCI: 00:13.0 [1002/4397] enabled
sb7xx_51xx_enable()
PCI: 00:13.1 [1002/4398] ops
PCI: 00:13.1 [1002/4398] enabled
sb7xx_51xx_enable()
PCI: 00:13.2 [1002/4396] ops
PCI: 00:13.2 [1002/4396] enabled
sb7xx_51xx_enable()
PCI: 00:14.0 [1002/4385] bus ops
PCI: 00:14.0 [1002/4385] enabled
sb7xx_51xx_enable()
PCI: 00:14.1 [1002/439c] ops
PCI: 00:14.1 [1002/439c] enabled
sb7xx_51xx_enable()
sb7xx_51xx_enable()
PCI: 00:14.3 [1002/439d] bus ops
PCI: 00:14.3 [1002/439d] enabled
sb7xx_51xx_enable()
PCI: 00:14.4 [1002/4384] bus ops
PCI: 00:14.4 [1002/4384] enabled
sb7xx_51xx_enable()
PCI: 00:14.5 [1002/4399] ops
PCI: 00:14.5 [1002/4399] enabled
POST: 0x25
PCI: 00:09.0 scanning...
do_pci_scan_bridge for PCI: 00:09.0
PCI: pci_scan_bus for bus 01
POST: 0x24
PCI: 01:00.0 [8086/10d3] enabled
POST: 0x25
POST: 0x55
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpointASPM: Enabled None
scan_bus: scanning of bus PCI: 00:09.0 took 125 usecs
PCI: 00:0a.0 scanning...
do_pci_scan_bridge for PCI: 00:0a.0
PCI: pci_scan_bus for bus 02
POST: 0x24
PCI: 02:00.0 [8086/10d3] enabled
POST: 0x25
POST: 0x55
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpointASPM: Enabled None
scan_bus: scanning of bus PCI: 00:0a.0 took 124 usecs
PCI: 00:14.0 scanning...
scan_smbus for PCI: 00:14.0
smbus: PCI: 00:14.0[0]->I2C: 01:50 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:51 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:52 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:53 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:54 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:55 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:56 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:57 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:2f enabled
scan_smbus for PCI: 00:14.0 done
scan_bus: scanning of bus PCI: 00:14.0 took 11 usecs
PCI: 00:14.3 scanning...
scan_lpc_bus for PCI: 00:14.3
PNP: 002e.0 disabled
PNP: 002e.1 disabled
PNP: 002e.2 enabled
PNP: 002e.3 disabled
PNP: 002e.5 enabled
PNP: 002e.6 disabled
PNP: 002e.7 disabled
PNP: 002e.8 disabled
PNP: 002e.9 disabled
PNP: 002e.a enabled
PNP: 002e.b enabled
PNP: 002e.c disabled
PNP: 002e.d disabled
PNP: 002e.e disabled
PNP: 002e.f disabled
PNP: 002e.109 enabled
PNP: 002e.209 enabled
PNP: 002e.309 enabled
PNP: 002e.107 enabled
PNP: 002e.207 enabled
PNP: 002e.307 enabled
PNP: 002e.407 enabled
scan_lpc_bus for PCI: 00:14.3 done
scan_bus: scanning of bus PCI: 00:14.3 took 265 usecs
PCI: 00:14.4 scanning...
do_pci_scan_bridge for PCI: 00:14.4
PCI: pci_scan_bus for bus 03
POST: 0x24
sb7xx_51xx_enable()
PCI: 03:01.0 [1a03/2000] ops
PCI: 03:01.0 [1a03/2000] enabled
sb7xx_51xx_enable()
PCI: 03:02.0 [11c1/5811] enabled
sb7xx_51xx_enable()
PCI: Static device PCI: 03:03.0 not found, disabling it.
POST: 0x25
POST: 0x55
scan_bus: scanning of bus PCI: 00:14.4 took 54 usecs
POST: 0x55
scan_bus: scanning of bus PCI: 00:18.0 took 941196 usecs
PCI: 00:19.0 scanning...
scan_bus: scanning of bus PCI: 00:19.0 took 1 usecs
POST: 0x55
DOMAIN: 0000 passpw: enabled
DOMAIN: 0000 passpw: enabled
scan_bus: scanning of bus DOMAIN: 0000 took 941270 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 1436618 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 1 run 1436713 exit 1
POST: 0x73
found VGA at PCI: 03:01.0
Setting up VGA for PCI: 03:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:14.4
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
Reserving CC6 save segment base: 138000000 size: 08000000
DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 2
PCI: 00:18.0 read_resources bus 0 link: 2 done
PCI: 00:18.0 read_resources bus 0 link: 3
PCI: 00:18.0 read_resources bus 0 link: 3 done
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
PCI: 00:09.0 read_resources bus 1 link: 0
PCI: 00:09.0 read_resources bus 1 link: 0 done
PCI: 00:0a.0 read_resources bus 2 link: 0
PCI: 00:0a.0 read_resources bus 2 link: 0 done
PCI: 00:14.0 read_resources bus 1 link: 0
I2C: 01:50 missing read_resources
I2C: 01:51 missing read_resources
I2C: 01:52 missing read_resources
I2C: 01:53 missing read_resources
I2C: 01:54 missing read_resources
I2C: 01:55 missing read_resources
I2C: 01:56 missing read_resources
I2C: 01:57 missing read_resources
PCI: 00:14.0 read_resources bus 1 link: 0 done
PCI: 00:14.3 read_resources bus 0 link: 0
PCI: 00:14.3 read_resources bus 0 link: 0 done
PCI: 00:14.4 read_resources bus 3 link: 0
PCI: 00:14.4 read_resources bus 3 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1 done
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
PCI: 00:18.4 read_resources bus 0 link: 0
PCI: 00:18.4 read_resources bus 0 link: 0 done
PCI: 00:18.4 read_resources bus 0 link: 1
PCI: 00:18.4 read_resources bus 0 link: 1 done
PCI: 00:18.4 read_resources bus 0 link: 2
PCI: 00:18.4 read_resources bus 0 link: 2 done
PCI: 00:18.4 read_resources bus 0 link: 3
PCI: 00:18.4 read_resources bus 0 link: 3 done
PCI: 00:19.0 read_resources bus 0 link: 3
PCI: 00:19.0 read_resources bus 0 link: 3 done
PCI: 00:19.0 read_resources bus 0 link: 2
PCI: 00:19.0 read_resources bus 0 link: 2 done
PCI: 00:19.0 read_resources bus 0 link: 0
PCI: 00:19.0 read_resources bus 0 link: 0 done
PCI: 00:19.0 read_resources bus 0 link: 1
PCI: 00:19.0 read_resources bus 0 link: 1 done
PCI: 00:19.4 read_resources bus 0 link: 0
PCI: 00:19.4 read_resources bus 0 link: 0 done
PCI: 00:19.4 read_resources bus 0 link: 1
PCI: 00:19.4 read_resources bus 0 link: 1 done
PCI: 00:19.4 read_resources bus 0 link: 2
PCI: 00:19.4 read_resources bus 0 link: 2 done
PCI: 00:19.4 read_resources bus 0 link: 3
PCI: 00:19.4 read_resources bus 0 link: 3 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: 01
   APIC: 02
   APIC: 03
   APIC: 04
   APIC: 05
   APIC: 06
   APIC: 07
   APIC: 08
   APIC: 09
   APIC: 0a
   APIC: 0b
   APIC: 0c
   APIC: 0d
   APIC: 0e
   APIC: 0f
  DOMAIN: 0000 child on link 0 PCI: 00:18.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
  DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7
  DOMAIN: 0000 resource base 138000000 size 8000000 align 0 gran 0 limit 0 flags f0004200 index 8
   PCI: 00:18.0
   PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 110b0
   PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 110b8
   PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 110d8
    PCI: 00:00.0
    PCI: 00:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 201 index 1c
    PCI: 00:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 1200 index fc
    PCI: 00:00.1
    PCI: 00:00.2
    PCI: 00:00.2 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 10000200 index 44
    PCI: 00:02.0
    PCI: 00:03.0
    PCI: 00:04.0
    PCI: 00:05.0
    PCI: 00:06.0
    PCI: 00:07.0
    PCI: 00:08.0
    PCI: 00:09.0 child on link 0 PCI: 01:00.0
    PCI: 00:09.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
    PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
    PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
     PCI: 01:00.0
     PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
     PCI: 01:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
     PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c
    PCI: 00:0a.0 child on link 0 PCI: 02:00.0
    PCI: 00:0a.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
    PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
    PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
     PCI: 02:00.0
     PCI: 02:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
     PCI: 02:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
     PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c
    PCI: 00:0b.0
    PCI: 00:0c.0
    PCI: 00:0d.0
    PCI: 00:11.0
    PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
    PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
    PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
    PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
    PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
    PCI: 00:11.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24
    PCI: 00:12.0
    PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
    PCI: 00:12.1
    PCI: 00:12.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
    PCI: 00:12.2
    PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
    PCI: 00:13.0
    PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
    PCI: 00:13.1
    PCI: 00:13.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
    PCI: 00:13.2
    PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
    PCI: 00:14.0 child on link 0 I2C: 01:50
    PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74
    PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4
    PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90
    PCI: 00:14.0 resource base b20 size 10 align 8 gran 8 limit ffff flags d0000100 index 58
     I2C: 01:50
     I2C: 01:51
     I2C: 01:52
     I2C: 01:53
     I2C: 01:54
     I2C: 01:55
     I2C: 01:56
     I2C: 01:57
     I2C: 01:2f
    PCI: 00:14.1
    PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
    PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
    PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
    PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
    PCI: 00:14.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
    PCI: 00:14.2
    PCI: 00:14.3 child on link 0 PNP: 002e.0
    PCI: 00:14.3 resource base 0 size 1 align 12 gran 0 limit ffffffff flags 200 index a0
    PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
    PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
    PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
     PNP: 002e.0
     PNP: 002e.1
     PNP: 002e.2
     PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
     PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.3
     PNP: 002e.3 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
     PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.5
     PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
     PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
     PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
     PNP: 002e.6
     PNP: 002e.6 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
     PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.7
     PNP: 002e.8
     PNP: 002e.9
     PNP: 002e.a
     PNP: 002e.b
     PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags c0000100 index 60
     PNP: 002e.b resource base 0 size 2 align 1 gran 1 limit fff flags c0000100 index 62
     PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.c
     PNP: 002e.d
     PNP: 002e.e
     PNP: 002e.e resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
     PNP: 002e.e resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.f
     PNP: 002e.109
     PNP: 002e.209
     PNP: 002e.309
     PNP: 002e.107
     PNP: 002e.207
     PNP: 002e.307
     PNP: 002e.407
    PCI: 00:14.4 child on link 0 PCI: 03:01.0
    PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
    PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
    PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
     PCI: 03:01.0
     PCI: 03:01.0 resource base 0 size 800000 align 23 gran 23 limit ffffffff flags 200 index 10
     PCI: 03:01.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 14
     PCI: 03:01.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 18
     PCI: 03:02.0
     PCI: 03:02.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
     PCI: 03:03.0
    PCI: 00:14.5
    PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94
   PCI: 00:18.4
   PCI: 00:18.5
   PCI: 00:19.0
   PCI: 00:19.1
   PCI: 00:19.2
   PCI: 00:19.3
   PCI: 00:19.4
   PCI: 00:19.5
   PCI: 00:1a.0
   PCI: 00:1a.1
   PCI: 00:1a.2
   PCI: 00:1a.3
   PCI: 00:1a.4
   PCI: 00:1a.5
   PCI: 00:1b.0
   PCI: 00:1b.1
   PCI: 00:1b.2
   PCI: 00:1b.3
   PCI: 00:1b.4
   PCI: 00:1b.5
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:18.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:09.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 01:00.0 18 *  [0x0 - 0x1f] io
PCI: 00:09.0 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:0a.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 02:00.0 18 *  [0x0 - 0x1f] io
PCI: 00:0a.0 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 03:01.0 18 *  [0x0 - 0x7f] io
PCI: 00:14.4 io: base: 80 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:09.0 1c *  [0x0 - 0xfff] io
PCI: 00:0a.0 1c *  [0x1000 - 0x1fff] io
PCI: 00:14.4 1c *  [0x2000 - 0x2fff] io
PCI: 00:11.0 20 *  [0x3000 - 0x300f] io
PCI: 00:14.1 20 *  [0x3010 - 0x301f] io
PCI: 00:11.0 10 *  [0x3020 - 0x3027] io
PCI: 00:11.0 18 *  [0x3028 - 0x302f] io
PCI: 00:14.1 10 *  [0x3030 - 0x3037] io
PCI: 00:14.1 18 *  [0x3038 - 0x303f] io
PCI: 00:11.0 14 *  [0x3040 - 0x3043] io
PCI: 00:11.0 1c *  [0x3044 - 0x3047] io
PCI: 00:14.1 14 *  [0x3048 - 0x304b] io
PCI: 00:14.1 1c *  [0x304c - 0x304f] io
PCI: 00:18.0 io: base: 3050 size: 4000 align: 12 gran: 12 limit: ffff done
PCI: 00:18.0 110d8 *  [0x0 - 0x3fff] io
DOMAIN: 0000 io: base: 4000 size: 4000 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:18.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:0a.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:0a.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:00.0 fc *  [0x0 - 0xff] prefmem
PCI: 00:18.0 prefmem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:18.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
PCI: 00:09.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 *  [0x0 - 0x1ffff] mem
PCI: 01:00.0 1c *  [0x20000 - 0x23fff] mem
PCI: 00:09.0 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:0a.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 10 *  [0x0 - 0x1ffff] mem
PCI: 02:00.0 1c *  [0x20000 - 0x23fff] mem
PCI: 00:0a.0 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 03:01.0 10 *  [0x0 - 0x7fffff] mem
PCI: 03:01.0 14 *  [0x800000 - 0x81ffff] mem
PCI: 03:02.0 10 *  [0x820000 - 0x820fff] mem
PCI: 00:14.4 mem: base: 821000 size: 900000 align: 23 gran: 20 limit: ffffffff done
PCI: 00:00.0 1c *  [0x0 - 0xfffffff] mem
PCI: 00:14.4 20 *  [0x10000000 - 0x108fffff] mem
PCI: 00:09.0 20 *  [0x10900000 - 0x109fffff] mem
PCI: 00:0a.0 20 *  [0x10a00000 - 0x10afffff] mem
PCI: 00:00.2 44 *  [0x10b00000 - 0x10b03fff] mem
PCI: 00:12.0 10 *  [0x10b04000 - 0x10b04fff] mem
PCI: 00:12.1 10 *  [0x10b05000 - 0x10b05fff] mem
PCI: 00:13.0 10 *  [0x10b06000 - 0x10b06fff] mem
PCI: 00:13.1 10 *  [0x10b07000 - 0x10b07fff] mem
PCI: 00:14.5 10 *  [0x10b08000 - 0x10b08fff] mem
PCI: 00:11.0 24 *  [0x10b09000 - 0x10b093ff] mem
PCI: 00:12.2 10 *  [0x10b0a000 - 0x10b0a0ff] mem
PCI: 00:13.2 10 *  [0x10b0b000 - 0x10b0b0ff] mem
PCI: 00:14.3 a0 *  [0x10b0c000 - 0x10b0c000] mem
PCI: 00:18.0 mem: base: 10b0c001 size: 10c00000 align: 28 gran: 20 limit: ffffffff done
PCI: 00:18.0 110b8 *  [0x0 - 0x10bfffff] mem
PCI: 00:18.3 94 *  [0x14000000 - 0x17ffffff] mem
PCI: 00:18.0 110b0 *  [0x18000000 - 0x180fffff] prefmem
DOMAIN: 0000 mem: base: 18100000 size: 18100000 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: DOMAIN: 0000 c0010058 base c0000000 limit cfffffff mem (fixed)
constrain_resources: DOMAIN: 0000 07 base 00000000 limit bfffffff mem (fixed)
constrain_resources: DOMAIN: 0000 08 base 138000000 limit 13fffffff mem (fixed)
constrain_resources: PCI: 00:14.0 74 base fec00000 limit fec00fff mem (fixed)
constrain_resources: PCI: 00:14.0 90 base 00000b00 limit 00000b0f io (fixed)
constrain_resources: PCI: 00:14.0 58 base 00000b20 limit 00000b2f io (fixed)
constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit febfffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:4000 align:12 gran:0 limit:ffff
PCI: 00:18.0 110d8 *  [0x1000 - 0x4fff] io
DOMAIN: 0000 io: next_base: 5000 size: 4000 align: 12 gran: 0 done
PCI: 00:18.0 io: base:1000 size:4000 align:12 gran:12 limit:4fff
PCI: 00:09.0 1c *  [0x1000 - 0x1fff] io
PCI: 00:0a.0 1c *  [0x2000 - 0x2fff] io
PCI: 00:14.4 1c *  [0x3000 - 0x3fff] io
PCI: 00:11.0 20 *  [0x4000 - 0x400f] io
PCI: 00:14.1 20 *  [0x4010 - 0x401f] io
PCI: 00:11.0 10 *  [0x4020 - 0x4027] io
PCI: 00:11.0 18 *  [0x4028 - 0x402f] io
PCI: 00:14.1 10 *  [0x4030 - 0x4037] io
PCI: 00:14.1 18 *  [0x4038 - 0x403f] io
PCI: 00:11.0 14 *  [0x4040 - 0x4043] io
PCI: 00:11.0 1c *  [0x4044 - 0x4047] io
PCI: 00:14.1 14 *  [0x4048 - 0x404b] io
PCI: 00:14.1 1c *  [0x404c - 0x404f] io
PCI: 00:18.0 io: next_base: 4050 size: 4000 align: 12 gran: 12 done
PCI: 00:09.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff
PCI: 01:00.0 18 *  [0x1000 - 0x101f] io
PCI: 00:09.0 io: next_base: 1020 size: 1000 align: 12 gran: 12 done
PCI: 00:0a.0 io: base:2000 size:1000 align:12 gran:12 limit:2fff
PCI: 02:00.0 18 *  [0x2000 - 0x201f] io
PCI: 00:0a.0 io: next_base: 2020 size: 1000 align: 12 gran: 12 done
PCI: 00:14.4 io: base:3000 size:1000 align:12 gran:12 limit:3fff
PCI: 03:01.0 18 *  [0x3000 - 0x307f] io
PCI: 00:14.4 io: next_base: 3080 size: 1000 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:e0000000 size:18100000 align:28 gran:0 limit:febfffff
PCI: 00:18.0 110b8 *  [0xe0000000 - 0xf0bfffff] mem
PCI: 00:18.3 94 *  [0xf4000000 - 0xf7ffffff] mem
PCI: 00:18.0 110b0 *  [0xf8000000 - 0xf80fffff] prefmem
DOMAIN: 0000 mem: next_base: f8100000 size: 18100000 align: 28 gran: 0 done
PCI: 00:18.0 prefmem: base:f8000000 size:100000 align:20 gran:20 limit:f80fffff
PCI: 00:00.0 fc *  [0xf8000000 - 0xf80000ff] prefmem
PCI: 00:18.0 prefmem: next_base: f8000100 size: 100000 align: 20 gran: 20 done
PCI: 00:09.0 prefmem: base:f80fffff size:0 align:20 gran:20 limit:f80fffff
PCI: 00:09.0 prefmem: next_base: f80fffff size: 0 align: 20 gran: 20 done
PCI: 00:0a.0 prefmem: base:f80fffff size:0 align:20 gran:20 limit:f80fffff
PCI: 00:0a.0 prefmem: next_base: f80fffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 prefmem: base:f80fffff size:0 align:20 gran:20 limit:f80fffff
PCI: 00:14.4 prefmem: next_base: f80fffff size: 0 align: 20 gran: 20 done
PCI: 00:18.0 mem: base:e0000000 size:10c00000 align:28 gran:20 limit:f0bfffff
PCI: 00:00.0 1c *  [0xe0000000 - 0xefffffff] mem
PCI: 00:14.4 20 *  [0xf0000000 - 0xf08fffff] mem
PCI: 00:09.0 20 *  [0xf0900000 - 0xf09fffff] mem
PCI: 00:0a.0 20 *  [0xf0a00000 - 0xf0afffff] mem
PCI: 00:00.2 44 *  [0xf0b00000 - 0xf0b03fff] mem
PCI: 00:12.0 10 *  [0xf0b04000 - 0xf0b04fff] mem
PCI: 00:12.1 10 *  [0xf0b05000 - 0xf0b05fff] mem
PCI: 00:13.0 10 *  [0xf0b06000 - 0xf0b06fff] mem
PCI: 00:13.1 10 *  [0xf0b07000 - 0xf0b07fff] mem
PCI: 00:14.5 10 *  [0xf0b08000 - 0xf0b08fff] mem
PCI: 00:11.0 24 *  [0xf0b09000 - 0xf0b093ff] mem
PCI: 00:12.2 10 *  [0xf0b0a000 - 0xf0b0a0ff] mem
PCI: 00:13.2 10 *  [0xf0b0b000 - 0xf0b0b0ff] mem
PCI: 00:14.3 a0 *  [0xf0b0c000 - 0xf0b0c000] mem
PCI: 00:18.0 mem: next_base: f0b0c001 size: 10c00000 align: 28 gran: 20 done
PCI: 00:09.0 mem: base:f0900000 size:100000 align:20 gran:20 limit:f09fffff
PCI: 01:00.0 10 *  [0xf0900000 - 0xf091ffff] mem
PCI: 01:00.0 1c *  [0xf0920000 - 0xf0923fff] mem
PCI: 00:09.0 mem: next_base: f0924000 size: 100000 align: 20 gran: 20 done
PCI: 00:0a.0 mem: base:f0a00000 size:100000 align:20 gran:20 limit:f0afffff
PCI: 02:00.0 10 *  [0xf0a00000 - 0xf0a1ffff] mem
PCI: 02:00.0 1c *  [0xf0a20000 - 0xf0a23fff] mem
PCI: 00:0a.0 mem: next_base: f0a24000 size: 100000 align: 20 gran: 20 done
PCI: 00:14.4 mem: base:f0000000 size:900000 align:23 gran:20 limit:f08fffff
PCI: 03:01.0 10 *  [0xf0000000 - 0xf07fffff] mem
PCI: 03:01.0 14 *  [0xf0800000 - 0xf081ffff] mem
PCI: 03:02.0 10 *  [0xf0820000 - 0xf0820fff] mem
PCI: 00:14.4 mem: next_base: f0821000 size: 900000 align: 23 gran: 20 done
Root Device assign_resources, bus 0 link: 0
0: mmio_basek=00300000, basek=00000300, limitk=00200000
1: mmio_basek=00300000, basek=00400000, limitk=00500000
DOMAIN: 0000 assign_resources, bus 0 link: 0
VGA: PCI: 00:18.0 (aka node 0) link 1 has VGA device
PCI: 00:18.0 111b8 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem <node 0 link 1>
PCI: 00:18.0 110b0 <- [0x00f8000000 - 0x00f80fffff] size 0x00100000 gran 0x14 prefmem <node 0 link 1>
PCI: 00:18.0 110b8 <- [0x00e0000000 - 0x00f0bfffff] size 0x10c00000 gran 0x14 mem <node 0 link 1>
PCI: 00:18.0 110d8 <- [0x0000001000 - 0x0000004fff] size 0x00004000 gran 0x0c io <node 0 link 1>
PCI: 00:18.0 assign_resources, bus 0 link: 1
PCI: 00:00.0 1c <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c mem64
PCI: 00:00.0 fc <- [0x00f8000000 - 0x00f80000ff] size 0x00000100 gran 0x08 prefmem
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
PCI: 00:00.2 44 <- [0x00f0b00000 - 0x00f0b03fff] size 0x00004000 gran 0x0e mem
PCI: 00:09.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
PCI: 00:09.0 24 <- [0x00f80fffff - 0x00f80ffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:09.0 20 <- [0x00f0900000 - 0x00f09fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:09.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00f0900000 - 0x00f091ffff] size 0x00020000 gran 0x11 mem
PCI: 01:00.0 18 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io
PCI: 01:00.0 1c <- [0x00f0920000 - 0x00f0923fff] size 0x00004000 gran 0x0e mem
PCI: 00:09.0 assign_resources, bus 1 link: 0
PCI: 00:0a.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 02 io
PCI: 00:0a.0 24 <- [0x00f80fffff - 0x00f80ffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:0a.0 20 <- [0x00f0a00000 - 0x00f0afffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:0a.0 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x00f0a00000 - 0x00f0a1ffff] size 0x00020000 gran 0x11 mem
PCI: 02:00.0 18 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io
PCI: 02:00.0 1c <- [0x00f0a20000 - 0x00f0a23fff] size 0x00004000 gran 0x0e mem
PCI: 00:0a.0 assign_resources, bus 2 link: 0
PCI: 00:11.0 10 <- [0x0000004020 - 0x0000004027] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x0000004040 - 0x0000004043] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x0000004028 - 0x000000402f] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x0000004044 - 0x0000004047] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000004000 - 0x000000400f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f0b09000 - 0x00f0b093ff] size 0x00000400 gran 0x0a mem
PCI: 00:12.0 10 <- [0x00f0b04000 - 0x00f0b04fff] size 0x00001000 gran 0x0c mem
PCI: 00:12.1 10 <- [0x00f0b05000 - 0x00f0b05fff] size 0x00001000 gran 0x0c mem
PCI: 00:12.2 10 <- [0x00f0b0a000 - 0x00f0b0a0ff] size 0x00000100 gran 0x08 mem
PCI: 00:13.0 10 <- [0x00f0b06000 - 0x00f0b06fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.1 10 <- [0x00f0b07000 - 0x00f0b07fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00f0b0b000 - 0x00f0b0b0ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.0 assign_resources, bus 1 link: 0
PCI: 00:14.0 assign_resources, bus 1 link: 0
PCI: 00:14.1 10 <- [0x0000004030 - 0x0000004037] size 0x00000008 gran 0x03 io
PCI: 00:14.1 14 <- [0x0000004048 - 0x000000404b] size 0x00000004 gran 0x02 io
PCI: 00:14.1 18 <- [0x0000004038 - 0x000000403f] size 0x00000008 gran 0x03 io
PCI: 00:14.1 1c <- [0x000000404c - 0x000000404f] size 0x00000004 gran 0x02 io
PCI: 00:14.1 20 <- [0x0000004010 - 0x000000401f] size 0x00000010 gran 0x04 io
PCI: 00:14.3 a0 <- [0x00f0b0c000 - 0x00f0b0c000] size 0x00000001 gran 0x00 mem
PCI: 00:14.3 assign_resources, bus 0 link: 0
PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PNP: 002e.b 60 <- [0x0000000290 - 0x0000000291] size 0x00000002 gran 0x01 io
PNP: 002e.b 62 <- [0x0000000000 - 0x0000000001] size 0x00000002 gran 0x01 io
PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq
PCI: 00:14.3 assign_resources, bus 0 link: 0
PCI: 00:14.4 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 03 io
PCI: 00:14.4 24 <- [0x00f80fffff - 0x00f80ffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:14.4 20 <- [0x00f0000000 - 0x00f08fffff] size 0x00900000 gran 0x14 bus 03 mem
PCI: 00:14.4 assign_resources, bus 3 link: 0
PCI: 03:01.0 10 <- [0x00f0000000 - 0x00f07fffff] size 0x00800000 gran 0x17 mem
PCI: 03:01.0 14 <- [0x00f0800000 - 0x00f081ffff] size 0x00020000 gran 0x11 mem
PCI: 03:01.0 18 <- [0x0000003000 - 0x000000307f] size 0x00000080 gran 0x07 io
PCI: 03:02.0 10 <- [0x00f0820000 - 0x00f0820fff] size 0x00001000 gran 0x0c mem
PCI: 00:14.4 assign_resources, bus 3 link: 0
PCI: 00:14.5 10 <- [0x00f0b08000 - 0x00f0b08fff] size 0x00001000 gran 0x0c mem
PCI: 00:18.0 assign_resources, bus 0 link: 1
PCI: 00:18.3 94 <- [0x00f4000000 - 0x00f7ffffff] size 0x04000000 gran 0x1a mem <gart>
PCI: 00:19.3 94 <- [0x00f4000000 - 0x00f7ffffff] size 0x04000000 gran 0x1a mem <gart>
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: 01
   APIC: 02
   APIC: 03
   APIC: 04
   APIC: 05
   APIC: 06
   APIC: 07
   APIC: 08
   APIC: 09
   APIC: 0a
   APIC: 0b
   APIC: 0c
   APIC: 0d
   APIC: 0e
   APIC: 0f
  DOMAIN: 0000 child on link 0 PCI: 00:18.0
  DOMAIN: 0000 resource base 1000 size 4000 align 12 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base e0000000 size 18100000 align 28 gran 0 limit febfffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
  DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7
  DOMAIN: 0000 resource base 138000000 size 8000000 align 0 gran 0 limit 0 flags f0004200 index 8
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
  DOMAIN: 0000 resource base c0000 size 7ff40000 align 0 gran 0 limit 0 flags e0004200 index 20
  DOMAIN: 0000 resource base 80000000 size 40000000 align 0 gran 0 limit 0 flags e0004200 index 31
  DOMAIN: 0000 resource base 100000000 size 40000000 align 0 gran 0 limit 0 flags e0004200 index 41
   PCI: 00:18.0
   PCI: 00:18.0 resource base f8000000 size 100000 align 20 gran 20 limit f80fffff flags 60081200 index 110b0
   PCI: 00:18.0 resource base e0000000 size 10c00000 align 28 gran 20 limit f0bfffff flags 60080200 index 110b8
   PCI: 00:18.0 resource base 1000 size 4000 align 12 gran 12 limit 4fff flags 60080100 index 110d8
   PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags e0000200 index 111b8
    PCI: 00:00.0
    PCI: 00:00.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60000201 index 1c
    PCI: 00:00.0 resource base f8000000 size 100 align 12 gran 8 limit f80000ff flags 60001200 index fc
    PCI: 00:00.1
    PCI: 00:00.2
    PCI: 00:00.2 resource base f0b00000 size 4000 align 14 gran 14 limit f0b03fff flags 70000200 index 44
    PCI: 00:02.0
    PCI: 00:03.0
    PCI: 00:04.0
    PCI: 00:05.0
    PCI: 00:06.0
    PCI: 00:07.0
    PCI: 00:08.0
    PCI: 00:09.0 child on link 0 PCI: 01:00.0
    PCI: 00:09.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
    PCI: 00:09.0 resource base f80fffff size 0 align 20 gran 20 limit f80fffff flags 60081202 index 24
    PCI: 00:09.0 resource base f0900000 size 100000 align 20 gran 20 limit f09fffff flags 60080202 index 20
     PCI: 01:00.0
     PCI: 01:00.0 resource base f0900000 size 20000 align 17 gran 17 limit f091ffff flags 60000200 index 10
     PCI: 01:00.0 resource base 1000 size 20 align 5 gran 5 limit 101f flags 60000100 index 18
     PCI: 01:00.0 resource base f0920000 size 4000 align 14 gran 14 limit f0923fff flags 60000200 index 1c
    PCI: 00:0a.0 child on link 0 PCI: 02:00.0
    PCI: 00:0a.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
    PCI: 00:0a.0 resource base f80fffff size 0 align 20 gran 20 limit f80fffff flags 60081202 index 24
    PCI: 00:0a.0 resource base f0a00000 size 100000 align 20 gran 20 limit f0afffff flags 60080202 index 20
     PCI: 02:00.0
     PCI: 02:00.0 resource base f0a00000 size 20000 align 17 gran 17 limit f0a1ffff flags 60000200 index 10
     PCI: 02:00.0 resource base 2000 size 20 align 5 gran 5 limit 201f flags 60000100 index 18
     PCI: 02:00.0 resource base f0a20000 size 4000 align 14 gran 14 limit f0a23fff flags 60000200 index 1c
    PCI: 00:0b.0
    PCI: 00:0c.0
    PCI: 00:0d.0
    PCI: 00:11.0
    PCI: 00:11.0 resource base 4020 size 8 align 3 gran 3 limit 4027 flags 60000100 index 10
    PCI: 00:11.0 resource base 4040 size 4 align 2 gran 2 limit 4043 flags 60000100 index 14
    PCI: 00:11.0 resource base 4028 size 8 align 3 gran 3 limit 402f flags 60000100 index 18
    PCI: 00:11.0 resource base 4044 size 4 align 2 gran 2 limit 4047 flags 60000100 index 1c
    PCI: 00:11.0 resource base 4000 size 10 align 4 gran 4 limit 400f flags 60000100 index 20
    PCI: 00:11.0 resource base f0b09000 size 400 align 12 gran 10 limit f0b093ff flags 60000200 index 24
    PCI: 00:12.0
    PCI: 00:12.0 resource base f0b04000 size 1000 align 12 gran 12 limit f0b04fff flags 60000200 index 10
    PCI: 00:12.1
    PCI: 00:12.1 resource base f0b05000 size 1000 align 12 gran 12 limit f0b05fff flags 60000200 index 10
    PCI: 00:12.2
    PCI: 00:12.2 resource base f0b0a000 size 100 align 12 gran 8 limit f0b0a0ff flags 60000200 index 10
    PCI: 00:13.0
    PCI: 00:13.0 resource base f0b06000 size 1000 align 12 gran 12 limit f0b06fff flags 60000200 index 10
    PCI: 00:13.1
    PCI: 00:13.1 resource base f0b07000 size 1000 align 12 gran 12 limit f0b07fff flags 60000200 index 10
    PCI: 00:13.2
    PCI: 00:13.2 resource base f0b0b000 size 100 align 12 gran 8 limit f0b0b0ff flags 60000200 index 10
    PCI: 00:14.0 child on link 0 I2C: 01:50
    PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74
    PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4
    PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90
    PCI: 00:14.0 resource base b20 size 10 align 8 gran 8 limit ffff flags d0000100 index 58
     I2C: 01:50
     I2C: 01:51
     I2C: 01:52
     I2C: 01:53
     I2C: 01:54
     I2C: 01:55
     I2C: 01:56
     I2C: 01:57
     I2C: 01:2f
    PCI: 00:14.1
    PCI: 00:14.1 resource base 4030 size 8 align 3 gran 3 limit 4037 flags 60000100 index 10
    PCI: 00:14.1 resource base 4048 size 4 align 2 gran 2 limit 404b flags 60000100 index 14
    PCI: 00:14.1 resource base 4038 size 8 align 3 gran 3 limit 403f flags 60000100 index 18
    PCI: 00:14.1 resource base 404c size 4 align 2 gran 2 limit 404f flags 60000100 index 1c
    PCI: 00:14.1 resource base 4010 size 10 align 4 gran 4 limit 401f flags 60000100 index 20
    PCI: 00:14.2
    PCI: 00:14.3 child on link 0 PNP: 002e.0
    PCI: 00:14.3 resource base f0b0c000 size 1 align 12 gran 0 limit f0b0c000 flags 60000200 index a0
    PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
    PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
    PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
     PNP: 002e.0
     PNP: 002e.1
     PNP: 002e.2
     PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60
     PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
     PNP: 002e.3
     PNP: 002e.3 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
     PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.5
     PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
     PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62
     PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
     PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72
     PNP: 002e.6
     PNP: 002e.6 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
     PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.7
     PNP: 002e.8
     PNP: 002e.9
     PNP: 002e.a
     PNP: 002e.b
     PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags e0000100 index 60
     PNP: 002e.b resource base 0 size 2 align 1 gran 1 limit fff flags e0000100 index 62
     PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
     PNP: 002e.c
     PNP: 002e.d
     PNP: 002e.e
     PNP: 002e.e resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
     PNP: 002e.e resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.f
     PNP: 002e.109
     PNP: 002e.209
     PNP: 002e.309
     PNP: 002e.107
     PNP: 002e.207
     PNP: 002e.307
     PNP: 002e.407
    PCI: 00:14.4 child on link 0 PCI: 03:01.0
    PCI: 00:14.4 resource base 3000 size 1000 align 12 gran 12 limit 3fff flags 60080102 index 1c
    PCI: 00:14.4 resource base f80fffff size 0 align 20 gran 20 limit f80fffff flags 60081202 index 24
    PCI: 00:14.4 resource base f0000000 size 900000 align 23 gran 20 limit f08fffff flags 60080202 index 20
     PCI: 03:01.0
     PCI: 03:01.0 resource base f0000000 size 800000 align 23 gran 23 limit f07fffff flags 60000200 index 10
     PCI: 03:01.0 resource base f0800000 size 20000 align 17 gran 17 limit f081ffff flags 60000200 index 14
     PCI: 03:01.0 resource base 3000 size 80 align 7 gran 7 limit 307f flags 60000100 index 18
     PCI: 03:01.0 resource base a0000 size 1fc00 align 0 gran 0 limit 0 flags f0000200 index 3
     PCI: 03:02.0
     PCI: 03:02.0 resource base f0820000 size 1000 align 12 gran 12 limit f0820fff flags 60000200 index 10
     PCI: 03:03.0
    PCI: 00:14.5
    PCI: 00:14.5 resource base f0b08000 size 1000 align 12 gran 12 limit f0b08fff flags 60000200 index 10
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.3 resource base f4000000 size 4000000 align 26 gran 26 limit f7ffffff flags 60000200 index 94
   PCI: 00:18.4
   PCI: 00:18.5
   PCI: 00:19.0
   PCI: 00:19.1
   PCI: 00:19.2
   PCI: 00:19.3
   PCI: 00:19.4
   PCI: 00:19.5
   PCI: 00:1a.0
   PCI: 00:1a.1
   PCI: 00:1a.2
   PCI: 00:1a.3
   PCI: 00:1a.4
   PCI: 00:1a.5
   PCI: 00:1b.0
   PCI: 00:1b.1
   PCI: 00:1b.2
   PCI: 00:1b.3
   PCI: 00:1b.4
   PCI: 00:1b.5
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 5236 exit 0
POST: 0x74
Enabling resources...
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1043/8163
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1043/8163
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 cmd <- 00
PCI: 00:19.0 cmd <- 00
PCI: 00:19.1 subsystem <- 1043/8163
PCI: 00:19.1 cmd <- 00
PCI: 00:19.2 subsystem <- 1043/8163
PCI: 00:19.2 cmd <- 00
PCI: 00:19.3 cmd <- 00
PCI: 00:19.4 cmd <- 00
PCI: 00:19.5 cmd <- 00
PCI: 00:00.0 subsystem <- 1043/8163
PCI: 00:00.0 cmd <- 02
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
Initializing IOMMU
PCI: 00:09.0 bridge ctrl <- 0003
PCI: 00:09.0 cmd <- 07
PCI: 00:0a.0 bridge ctrl <- 0003
PCI: 00:0a.0 cmd <- 07
PCI: 00:11.0 subsystem <- 1043/8163
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 subsystem <- 1043/8163
PCI: 00:12.0 cmd <- 02
PCI: 00:12.1 subsystem <- 1043/8163
PCI: 00:12.1 cmd <- 02
PCI: 00:12.2 subsystem <- 1043/8163
PCI: 00:12.2 cmd <- 02
PCI: 00:13.0 subsystem <- 1043/8163
PCI: 00:13.0 cmd <- 02
PCI: 00:13.1 subsystem <- 1043/8163
PCI: 00:13.1 cmd <- 02
PCI: 00:13.2 subsystem <- 1043/8163
PCI: 00:13.2 cmd <- 02
PCI: 00:14.0 subsystem <- 1043/8163
PCI: 00:14.0 cmd <- 403
PCI: 00:14.1 subsystem <- 1043/8163
PCI: 00:14.1 cmd <- 01
PCI: 00:14.3 subsystem <- 1043/8163
PCI: 00:14.3 cmd <- 0f
sb700 lpc decode:PNP: 002e.2, base=0x000003f8, end=0x000003ff
sb700 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060
sb700 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064
sb700 lpc decode:PNP: 002e.b, base=0x00000290, end=0x00000291
sb700 lpc decode:PNP: 002e.b, base=0x00000000, end=0x00000001
PCI: 00:14.4 bridge ctrl <- 000b
PCI: 00:14.4 cmd <- 07
PCI: 00:14.5 subsystem <- 1043/8163
PCI: 00:14.5 cmd <- 02
PCI: 01:00.0 cmd <- 03
PCI: 02:00.0 cmd <- 03
PCI: 03:01.0 cmd <- 03
PCI: 03:02.0 subsystem <- 1043/8163
PCI: 03:02.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 1202 exit 0
POST: 0x75
Initializing devices...
Root Device init ...
Root Device init finished in 0 usecs
POST: 0x75
CPU_CLUSTER: 0 init ...
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
Enabling probe filter
Enabling ATM mode
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
start_eip=0x00001000, code_size=0x00000031
CPU1: stack_base 0014d000, stack_end 0014dff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 1.
After apic_write.
Initializing CPU #1
CPU: vendor AMD device 600f20
CPU: family 15, model 02, stepping 00
Startup point 1.
Waiting for send to finish...
+nodeid = 00, coreid = 01
POST: 0x60
Enabling cache
After Startup.
CPU2: stack_base 0014c000, stack_end 0014cff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 2.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU3: stack_base 0014b000, stack_end 0014bff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU4: stack_base 0014a000, stack_end 0014aff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 4.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU5: stack_base 00149000, stack_end 00149ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 5.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU6: stack_base 00148000, stack_end 00148ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 6.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU7: stack_base 00147000, stack_end 00147ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 7.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU8: stack_base 00146000, stack_end 00146ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 8.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU9: stack_base 00145000, stack_end 00145ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 9.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU10: stack_base 00144000, stack_end 00144ff8
Asserting INIT.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Waiting for send to finish...
+POST: 0x93
Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 10.
After apic_write.
Startup point 1.
Waiting for send to finish...
+
MTRR check
CPU: family 15, model 02, stepping 00
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled
After Startup.
Setting up local apic...CPU11: stack_base 00143000, stack_end 00143ff8
 apic_id: 0x02 done.
POST: 0x9b
nodeid = 00, coreid = 05
Asserting INIT.

POST: 0x93
Waiting for send to finish...
CPU model: AMD Opteron(tm) Processor 6378
+siblings = 15, Deasserting INIT.
Disabling SMM ASeg memory
Waiting for send to finish...
+
MTRR check
CPU #2 initialized
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
#startup loops: 1.
Sending STARTUP #1 to 11.
After apic_write.
Startup point 1.
Waiting for send to finish...
+POST: 0x60
Setting up local apic...After Startup.
CPU12: stack_base 00142000, stack_end 00142ff8
 apic_id: 0x04 done.
Setting up local apic...Asserting INIT.
Enabling cache
 apic_id: 0x03 Waiting for send to finish...
POST: 0x9b
+done.
POST: 0x9b
CPU model: AMD Opteron(tm) Processor 6378
Deasserting INIT.
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, siblings = 15, Waiting for send to finish...
+Disabling SMM ASeg memory
Disabling SMM ASeg memory
CPU #3 initialized

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
#startup loops: 1.
Sending STARTUP #1 to 12.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Setting up local apic...CPU #4 initialized
 apic_id: 0x05 done.
POST: 0x9b
CPU model: AMD Opteron(tm) Processor 6378
After Startup.
CPU13: stack_base 00141000, stack_end 00141ff8
siblings = 15, Asserting INIT.
Disabling SMM ASeg memory
Waiting for send to finish...
+CPU #5 initialized
Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 13.
After apic_write.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU14: stack_base 00140000, stack_end 00140ff8
Asserting INIT.
Waiting for send to finish...
+Setting up local apic...Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 14.
 apic_id: 0x06 done.
POST: 0x9b
After apic_write.
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, Disabling SMM ASeg memory
CPU #6 initialized

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU15: stack_base 0013f000, stack_end 0013fff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 1.
Sending STARTUP #1 to 15.
After apic_write.
Startup point 1.
Waiting for send to finish...
+
MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
After Startup.
Initializing CPU #0
Setting up local apic...CPU: vendor AMD device 600f20
 apic_id: 0x07 CPU: family 15, model 02, stepping 00
done.
POST: 0x9b
CPU model: AMD Opteron(tm) Processor 6378
nodeid = 00, coreid = 00
POST: 0x60
siblings = 15, Enabling cache
Disabling SMM ASeg memory
CPU #7 initialized
Enabling cache

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Enabling cache
Setting up local apic... apic_id: 0x08 done.
POST: 0x9b
CPU model: AMD Opteron(tm) Processor 6378

MTRR check
Fixed MTRRs   : Enabled
siblings = 15, Variable MTRRs: Enabled

POST: 0x93
Disabling SMM ASeg memory
CPU #8 initialized

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local apic...Setting up local apic... apic_id: 0x0a done.
POST: 0x9b
 apic_id: 0x00 done.
POST: 0x9b
CPU model: AMD Opteron(AMD Opteron(tm) Processor 6378
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, siblings = 15, Disabling SMM ASeg memory
Disabling SMM ASeg memory
CPU #10 initialized

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
CPU #0 initialized

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Waiting for 7 CPUS to stop
Enabled

POST: 0x93
Enabling cache
Setting up local apic...Setting up local apic...
MTRR check
 apic_id: 0x0b done.
 apic_id: 0x09 done.
POST: 0x9b
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
POST: 0x9b
Setting up local apic... apic_id: 0x01 done.
POST: 0x9b
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, Disabling SMM ASeg memory
CPU model: AMD Opteron(tm) Processor 6378  AMD AMD Opteron
CPU #11 initialized
siblings = 15, CPU model: AMD Opteron(tm) Processor 6378
Disabling SMM ASeg memory
siblings = 15, CPU #9 initialized
Disabling SMM ASeg memory
Waiting for 5 CPUS to stop
CPU #1 initialized
Waiting for 4 CPUS to stop

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local apic... apic_id: 0x0c done.
POST: 0x9b
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, Disabling SMM ASeg memory
CPU #12 initialized

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Waiting for 3 CPUS to stop
Setting up local apic... apic_id: 0x0e done.
POST: 0x9b
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, Disabling SMM ASeg memory
CPU #14 initialized

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Waiting for 2 CPUS to stop
Setting up local apic... apic_id: 0x0d done.
POST: 0x9b
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, Disabling SMM ASeg memory
CPU #13 initialized
Waiting for 1 CPUS to stop
Setting up local apic... apic_id: 0x0f done.
POST: 0x9b
CPU model: AMD Opteron(tm) Processor 6378
siblings = 15, Disabling SMM ASeg memory
CPU #15 initialized
All AP CPUs stopped (750 loops)
CPU0: stack: 0014e000 - 0014f000, lowest used address 0014e9e0, stack used: 1568 bytes
CPU1: stack: 0014d000 - 0014e000, lowest used address 0014dde4, stack used: 540 bytes
CPU2: stack: 0014c000 - 0014d000, lowest used address 0014ccac, stack used: 852 bytes
CPU3: stack: 0014b000 - 0014c000, lowest used address 0014bde4, stack used: 540 bytes
CPU4: stack: 0014a000 - 0014b000, lowest used address 0014ad24, stack used: 732 bytes
CPU5: stack: 00149000 - 0014a000, lowest used address 00149de4, stack used: 540 bytes
CPU6: stack: 00148000 - 00149000, lowest used address 00148d24, stack used: 732 bytes
CPU7: stack: 00147000 - 00148000, lowest used address 00147de4, stack used: 540 bytes
CPU8: stack: 00146000 - 00147000, lowest used address 00146d24, stack used: 732 bytes
CPU9: stack: 00145000 - 00146000, lowest used address 00145de4, stack used: 540 bytes
CPU10: stack: 00144000 - 00145000, lowest used address 00144d24, stack used: 732 bytes
CPU11: stack: 00143000 - 00144000, lowest used address 00143de4, stack used: 540 bytes
CPU12: stack: 00142000 - 00143000, lowest used address 00142d24, stack used: 732 bytes
CPU13: stack: 00141000 - 00142000, lowest used address 00141de4, stack used: 540 bytes
CPU14: stack: 00140000 - 00141000, lowest used address 00140d24, stack used: 732 bytes
CPU15: stack: 0013f000 - 00140000, lowest used address 0013fde4, stack used: 540 bytes
CPU_CLUSTER: 0 init finished in 39566 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:18.0 init ...
PCI: 00:18.0 init finished in 0 usecs
POST: 0x75
PCI: 00:18.1 init ...
PCI: 00:18.1 init finished in 0 usecs
POST: 0x75
PCI: 00:18.2 init ...
PCI: 00:18.2 init finished in 0 usecs
POST: 0x75
PCI: 00:18.3 init ...
NB: Function 3 Misc Control.. CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
done.
PCI: 00:18.3 init finished in 960 usecs
POST: 0x75
PCI: 00:18.4 init ...
NB: Function 4 Link Control.. CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
done.
PCI: 00:18.4 init finished in 1727 usecs
POST: 0x75
PCI: 00:18.5 init ...
NB: Function 5 Northbridge Control.. done.
PCI: 00:18.5 init finished in 1 usecs
POST: 0x75
PCI: 00:19.0 init ...
PCI: 00:19.0 init finished in 0 usecs
POST: 0x75
PCI: 00:19.1 init ...
PCI: 00:19.1 init finished in 0 usecs
POST: 0x75
PCI: 00:19.2 init ...
PCI: 00:19.2 init finished in 0 usecs
POST: 0x75
PCI: 00:19.3 init ...
NB: Function 3 Misc Control.. CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
done.
PCI: 00:19.3 init finished in 960 usecs
POST: 0x75
PCI: 00:19.4 init ...
NB: Function 4 Link Control.. CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
done.
PCI: 00:19.4 init finished in 1727 usecs
POST: 0x75
PCI: 00:19.5 init ...
NB: Function 5 Northbridge Control.. done.
PCI: 00:19.5 init finished in 1 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:00.0 init ...
pcie_init in sr5650_ht.c
IOAPIC: Initializing IOAPIC at 0xf8000000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x01
IOAPIC: Dumping registers
  reg 0x0000: 0x01000000
  reg 0x0001: 0x001f8021
  reg 0x0002: 0x00000000
IOAPIC: 32 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
IOAPIC: reg 0x00000018 value 0x00000000 0x00010000
IOAPIC: reg 0x00000019 value 0x00000000 0x00010000
IOAPIC: reg 0x0000001a value 0x00000000 0x00010000
IOAPIC: reg 0x0000001b value 0x00000000 0x00010000
IOAPIC: reg 0x0000001c value 0x00000000 0x00010000
IOAPIC: reg 0x0000001d value 0x00000000 0x00010000
IOAPIC: reg 0x0000001e value 0x00000000 0x00010000
IOAPIC: reg 0x0000001f value 0x00000000 0x00010000
PCI: 00:00.0 init finished in 32 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:11.0 init ...
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
rev_id=15
sata_bar0=4020
sata_bar1=4040
sata_bar2=4028
sata_bar3=4044
sata_bar4=4000
sata_bar5=f0b09000
ide_bar0=4030
ide_bar1=4048
ide_bar2=4038
ide_bar3=404c
Maximum SATA port count supported by silicon: 6
SATA port 0 status = 0
No AHCI SATA drive on Slot0
SATA port 1 status = 0
No AHCI SATA drive on Slot1
SATA port 2 status = 0
No AHCI SATA drive on Slot2
SATA port 3 status = 0
No AHCI SATA drive on Slot3
SATA port 4 status = 0
No AHCI SATA drive on Slot4
SATA port 5 status = 0
No AHCI SATA drive on Slot5
PCI: 00:11.0 init finished in 10584 usecs
POST: 0x75
PCI: 00:12.0 init ...
PCI: 00:12.0 init finished in 22 usecs
POST: 0x75
PCI: 00:12.1 init ...
PCI: 00:12.1 init finished in 22 usecs
POST: 0x75
PCI: 00:12.2 init ...
usb2_bar0=0xf0b0a000
rpr 6.23, final dword=809e03c8
PCI: 00:12.2 init finished in 14 usecs
POST: 0x75
PCI: 00:13.0 init ...
PCI: 00:13.0 init finished in 23 usecs
POST: 0x75
PCI: 00:13.1 init ...
PCI: 00:13.1 init finished in 22 usecs
POST: 0x75
PCI: 00:13.2 init ...
usb2_bar0=0xf0b0b000
rpr 6.23, final dword=809e03c8
PCI: 00:13.2 init finished in 14 usecs
POST: 0x75
PCI: 00:14.0 init ...
sm_init().
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: Dumping registers
  reg 0x0000: 0x00000000
  reg 0x0001: 0x00178021
  reg 0x0002: 0x00000000
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
set power "on" after power fail
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
++++++++++no set NMI+++++
RTC Init
sm_init() end
PCI: 00:14.0 init finished in 1872 usecs
POST: 0x75
PCI: 00:14.1 init ...
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
PCI: 00:14.1 init finished in 879 usecs
POST: 0x75
POST: 0x75
PCI: 00:14.3 init ...
lpc_init
PCI: 00:14.3 init finished in 11 usecs
POST: 0x75
PCI: 00:14.4 init ...
PCI: 00:14.4 init finished in 18 usecs
POST: 0x75
PCI: 00:14.5 init ...
PCI: 00:14.5 init finished in 22 usecs
POST: 0x75
PCI: 01:00.0 init ...
PCI: 01:00.0 init finished in 0 usecs
POST: 0x75
PCI: 02:00.0 init ...
PCI: 02:00.0 init finished in 0 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
smbus: PCI: 00:14.0[0]->I2C: 01:2f init ...
Set SMBUS controller to channel 1
Found 64 pin W83795G Nuvoton H/W Monitor
W83795G/ADG work in Thermal Cruise Mode
Fan	CTFS(celsius)	TTTI(celsius)
 1	80	80
 2	80	80
 3	80	80
 4	80	80
 5	80	80
 6	80	80
DTS1 current value: 1d
DTS2 current value: 0
DTS3 current value: 0
DTS4 current value: 0
DTS5 current value: 0
DTS6 current value: 0
DTS7 current value: 0
DTS8 current value: 0
Set SMBUS controller to channel 0
I2C: 01:2f init finished in 253539 usecs
POST: 0x75
POST: 0x75
POST: 0x75
PNP: 002e.2 init ...
PNP: 002e.2 init finished in 0 usecs
POST: 0x75
POST: 0x75
PNP: 002e.5 init ...
Keyboard init...
No PS/2 keyboard detected.
PNP: 002e.5 init finished in 84582 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PNP: 002e.a init ...
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
set power on after power fail
PNP: 002e.a init finished in 751 usecs
POST: 0x75
PNP: 002e.b init ...
PNP: 002e.b init finished in 1 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PNP: 002e.109 init ...
PNP: 002e.109 init finished in 0 usecs
POST: 0x75
PNP: 002e.209 init ...
PNP: 002e.209 init finished in 0 usecs
POST: 0x75
PNP: 002e.309 init ...
PNP: 002e.309 init finished in 0 usecs
POST: 0x75
PNP: 002e.107 init ...
PNP: 002e.107 init finished in 0 usecs
POST: 0x75
PNP: 002e.207 init ...
PNP: 002e.207 init finished in 0 usecs
POST: 0x75
PNP: 002e.307 init ...
PNP: 002e.307 init finished in 0 usecs
POST: 0x75
PNP: 002e.407 init ...
PNP: 002e.407 init finished in 0 usecs
POST: 0x75
PCI: 03:01.0 init ...
ASpeed AST2050: initializing video device
ast_detect_chip: AST 1100 detected
ast_detect_chip: VGA not enabled on entry, requesting chip POST
ast_detect_chip: Analog VGA only
ast_driver_load: dram 800000000 0 16 00800000
ASpeed VGA text mode initialized
PCI: 03:01.0 init finished in 15599 usecs
POST: 0x75
PCI: 03:02.0 init ...
PCI: 03:02.0 init finished in 0 usecs
POST: 0x75
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.1: enabled 0
PCI: 00:00.2: enabled 1
PCI: 00:02.0: enabled 0
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 0
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 1
PCI: 00:0a.0: enabled 1
PCI: 00:0b.0: enabled 0
PCI: 00:0c.0: enabled 0
PCI: 00:0d.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.1: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 01:50: enabled 1
I2C: 01:51: enabled 1
I2C: 01:52: enabled 1
I2C: 01:53: enabled 1
I2C: 01:54: enabled 1
I2C: 01:55: enabled 1
I2C: 01:56: enabled 1
I2C: 01:57: enabled 1
I2C: 01:2f: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 0
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 0
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 0
PNP: 002e.7: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.9: enabled 0
PNP: 002e.a: enabled 1
PNP: 002e.b: enabled 1
PNP: 002e.c: enabled 0
PNP: 002e.d: enabled 0
PNP: 002e.e: enabled 0
PNP: 002e.f: enabled 0
PCI: 00:14.4: enabled 1
PCI: 03:01.0: enabled 1
PCI: 03:02.0: enabled 1
PCI: 03:03.0: enabled 0
PCI: 00:14.5: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 1
PCI: 00:19.2: enabled 1
PCI: 00:19.3: enabled 1
PCI: 00:19.4: enabled 1
PCI: 00:19.5: enabled 1
PCI: 00:1a.0: enabled 0
PCI: 00:1a.1: enabled 0
PCI: 00:1a.2: enabled 0
PCI: 00:1a.3: enabled 0
PCI: 00:1a.4: enabled 0
PCI: 00:1a.5: enabled 0
PCI: 00:1b.0: enabled 0
PCI: 00:1b.1: enabled 0
PCI: 00:1b.2: enabled 0
PCI: 00:1b.3: enabled 0
PCI: 00:1b.4: enabled 0
PCI: 00:1b.5: enabled 0
APIC: 01: enabled 1
APIC: 02: enabled 1
APIC: 03: enabled 1
APIC: 04: enabled 1
APIC: 05: enabled 1
APIC: 06: enabled 1
APIC: 07: enabled 1
APIC: 08: enabled 1
APIC: 09: enabled 1
APIC: 0a: enabled 1
APIC: 0b: enabled 1
APIC: 0c: enabled 1
APIC: 0d: enabled 1
APIC: 0e: enabled 1
APIC: 0f: enabled 1
PCI: 01:00.0: enabled 1
PCI: 02:00.0: enabled 1
PNP: 002e.109: enabled 1
PNP: 002e.209: enabled 1
PNP: 002e.309: enabled 1
PNP: 002e.107: enabled 1
PNP: 002e.207: enabled 1
PNP: 002e.307: enabled 1
PNP: 002e.407: enabled 1
BS: BS_DEV_INIT times (us): entry 1 run 413046 exit 0
POST: 0x76
Finalize devices...
Devices finalized
BS: BS_POST_DEVICE times (us): entry 1 run 2 exit 0
POST: 0x77
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0
POST: 0x79
POST: 0x9b
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
Wrote the mp table end at: 000f0010 - 000f0314
Wrote the mp table end at: bfcc8010 - bfcc8314
MP table: 788 bytes.
POST: 0x9c
CBFS @ 100000 size ff440
CBFS: Locating 'normal/dsdt.aml'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS:  Unmatched 'cmos_layout.bin' at 61340
CBFS: Checking offset 621c0
CBFS:  Unmatched '' at 621c0
CBFS: Checking offset 623c0
CBFS:  Unmatched 'fallback/dsdt.aml' at 623c0
CBFS: Checking offset 64800
CBFS:  Unmatched 'microcode_amd.bin' at 64800
CBFS: Checking offset 67a00
CBFS:  Unmatched 'microcode_amd_fam15h.bin' at 67a00
CBFS: Checking offset 69940
CBFS:  Unmatched 'pci8086,10d3.rom' at 69940
CBFS: Checking offset 77bc0
CBFS:  Unmatched 'revision' at 77bc0
CBFS: Checking offset 77e80
CBFS: Found @ offset 77e80 size 23f2
CBFS @ 100000 size ff440
CBFS: Locating 'normal/slic'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS:  Unmatched 'cmos_layout.bin' at 61340
CBFS: Checking offset 621c0
CBFS:  Unmatched '' at 621c0
CBFS: Checking offset 623c0
CBFS:  Unmatched 'fallback/dsdt.aml' at 623c0
CBFS: Checking offset 64800
CBFS:  Unmatched 'microcode_amd.bin' at 64800
CBFS: Checking offset 67a00
CBFS:  Unmatched 'microcode_amd_fam15h.bin' at 67a00
CBFS: Checking offset 69940
CBFS:  Unmatched 'pci8086,10d3.rom' at 69940
CBFS: Checking offset 77bc0
CBFS:  Unmatched 'revision' at 77bc0
CBFS: Checking offset 77e80
CBFS:  Unmatched 'normal/dsdt.aml' at 77e80
CBFS: Checking offset 7a2c0
CBFS:  Unmatched '' at 7a2c0
CBFS: Checking offset 7ff80
CBFS:  Unmatched 'normal/romstage' at 7ff80
CBFS: Checking offset a75c0
CBFS:  Unmatched 'normal/ramstage' at a75c0
CBFS: Checking offset bbb80
CBFS:  Unmatched 'normal/payload' at bbb80
CBFS: Checking offset c9440
CBFS:  Unmatched 'bootsplash.jpg' at c9440
CBFS: Checking offset d0580
CBFS:  Unmatched '' at d0580
CBFS: Checking offset ff440
CBFS: 'normal/slic' not found.
ACPI: Writing ACPI tables at bfca4000.
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * FADT
pm_base: 0x0800
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
processor_brand=AMD Opteron(tm) Processor 6378
Pstates algorithm ...
Pstate_freq[0] = 2400MHz	Pstate_power[0] = 5973mw
Pstate_latency[0] = 5us
Pstate_freq[1] = 2200MHz	Pstate_power[1] = 5500mw
Pstate_latency[1] = 5us
Pstate_freq[2] = 1900MHz	Pstate_power[2] = 4620mw
Pstate_latency[2] = 5us
Pstate_freq[3] = 1600MHz	Pstate_power[3] = 3792mw
Pstate_latency[3] = 5us
Pstate_freq[4] = 1400MHz	Pstate_power[4] = 3240mw
Pstate_latency[4] = 5us
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
PSS: 2400MHz power 5973 control 0x0 status 0x0
PSS: 2200MHz power 5500 control 0x1 status 0x1
PSS: 1900MHz power 4620 control 0x2 status 0x2
PSS: 1600MHz power 3792 control 0x3 status 0x3
PSS: 1400MHz power 3240 control 0x4 status 0x4
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI:    * TCPA
TCPA log created at bfc94000
ACPI: added table 3/32, length now 48
ACPI:    * MADT
ACPI: added table 4/32, length now 52
current = bfca8800
ACPI:    * SRAT at bfca8800
SRAT: lapic cpu_index=00, node_id=00, apic_id=00
SRAT: lapic cpu_index=01, node_id=00, apic_id=01
SRAT: lapic cpu_index=02, node_id=00, apic_id=02
SRAT: lapic cpu_index=03, node_id=00, apic_id=03
SRAT: lapic cpu_index=04, node_id=00, apic_id=04
SRAT: lapic cpu_index=05, node_id=00, apic_id=05
SRAT: lapic cpu_index=06, node_id=00, apic_id=06
SRAT: lapic cpu_index=07, node_id=00, apic_id=07
SRAT: lapic cpu_index=08, node_id=01, apic_id=08
SRAT: lapic cpu_index=09, node_id=01, apic_id=09
SRAT: lapic cpu_index=0a, node_id=01, apic_id=0a
SRAT: lapic cpu_index=0b, node_id=01, apic_id=0b
SRAT: lapic cpu_index=0c, node_id=01, apic_id=0c
SRAT: lapic cpu_index=0d, node_id=01, apic_id=0d
SRAT: lapic cpu_index=0e, node_id=01, apic_id=0e
SRAT: lapic cpu_index=0f, node_id=01, apic_id=0f
set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000
set_srat_mem: dev DOMAIN: 0000, res->index=0008 startk=004e0000, sizek=00020000
set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=001ffd00
set_srat_mem: dev DOMAIN: 0000, res->index=0031 startk=00200000, sizek=00100000
set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=00400000, sizek=00100000
ACPI: added table 5/32, length now 56
ACPI:   * SLIT at bfca89d0
ACPI: added table 6/32, length now 60
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
ACPI:   * IVRS at bfca8a00
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x01 @ 0x40
Capability: type 0x01 @ 0x44
ACPI: added table 7/32, length now 64
ACPI:    * HPET
ACPI: added table 8/32, length now 68
ACPI:    * SRAT at bfca8b20
SRAT: lapic cpu_index=00, node_id=00, apic_id=00
SRAT: lapic cpu_index=01, node_id=00, apic_id=01
SRAT: lapic cpu_index=02, node_id=00, apic_id=02
SRAT: lapic cpu_index=03, node_id=00, apic_id=03
SRAT: lapic cpu_index=04, node_id=00, apic_id=04
SRAT: lapic cpu_index=05, node_id=00, apic_id=05
SRAT: lapic cpu_index=06, node_id=00, apic_id=06
SRAT: lapic cpu_index=07, node_id=00, apic_id=07
SRAT: lapic cpu_index=08, node_id=01, apic_id=08
SRAT: lapic cpu_index=09, node_id=01, apic_id=09
SRAT: lapic cpu_index=0a, node_id=01, apic_id=0a
SRAT: lapic cpu_index=0b, node_id=01, apic_id=0b
SRAT: lapic cpu_index=0c, node_id=01, apic_id=0c
SRAT: lapic cpu_index=0d, node_id=01, apic_id=0d
SRAT: lapic cpu_index=0e, node_id=01, apic_id=0e
SRAT: lapic cpu_index=0f, node_id=01, apic_id=0f
set_srat_mem: dev DOMAIN: 0000, res->index=0007 startk=00000000, sizek=00300000
set_srat_mem: dev DOMAIN: 0000, res->index=0008 startk=004e0000, sizek=00020000
set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=001ffd00
set_srat_mem: dev DOMAIN: 0000, res->index=0031 startk=00200000, sizek=00100000
set_srat_mem: dev DOMAIN: 0000, res->index=0041 startk=00400000, sizek=00100000
ACPI: added table 9/32, length now 72
ACPI:   * SLIT at bfca8cf0
ACPI: added table 10/32, length now 76
ACPI: done.
ACPI tables: 19744 bytes.
smbios_write_tables: bfc93000
Root Device (ASUS KGPE-D16)
CPU_CLUSTER: 0 (AMD Family 10h/15h Root Complex)
APIC: 00 (unknown)
DOMAIN: 0000 (AMD Family 10h/15h Root Complex)
PCI: 00:18.0 (AMD Family 10h/15h Northbridge)
PCI: 00:00.0 (ATI SR5650)
PCI: 00:00.1 (ATI SR5650)
PCI: 00:00.2 (ATI SR5650)
PCI: 00:02.0 (ATI SR5650)
PCI: 00:03.0 (ATI SR5650)
PCI: 00:04.0 (ATI SR5650)
PCI: 00:05.0 (ATI SR5650)
PCI: 00:06.0 (ATI SR5650)
PCI: 00:07.0 (ATI SR5650)
PCI: 00:08.0 (ATI SR5650)
PCI: 00:09.0 (ATI SR5650)
PCI: 00:0a.0 (ATI SR5650)
PCI: 00:0b.0 (ATI SR5650)
PCI: 00:0c.0 (ATI SR5650)
PCI: 00:0d.0 (ATI SR5650)
PCI: 00:11.0 (ATI SP5100)
PCI: 00:12.0 (ATI SP5100)
PCI: 00:12.1 (ATI SP5100)
PCI: 00:12.2 (ATI SP5100)
PCI: 00:13.0 (ATI SP5100)
PCI: 00:13.1 (ATI SP5100)
PCI: 00:13.2 (ATI SP5100)
PCI: 00:14.0 (ATI SP5100)
I2C: 01:50 (unknown)
I2C: 01:51 (unknown)
I2C: 01:52 (unknown)
I2C: 01:53 (unknown)
I2C: 01:54 (unknown)
I2C: 01:55 (unknown)
I2C: 01:56 (unknown)
I2C: 01:57 (unknown)
I2C: 01:2f (Nuvoton W83795G/ADG Hardware Monitor)
PCI: 00:14.1 (ATI SP5100)
PCI: 00:14.2 (ATI SP5100)
PCI: 00:14.3 (ATI SP5100)
PNP: 002e.0 (NUVOTON NCT5572D Super I/O)
PNP: 002e.1 (NUVOTON NCT5572D Super I/O)
PNP: 002e.2 (NUVOTON NCT5572D Super I/O)
PNP: 002e.3 (NUVOTON NCT5572D Super I/O)
PNP: 002e.5 (NUVOTON NCT5572D Super I/O)
PNP: 002e.6 (NUVOTON NCT5572D Super I/O)
PNP: 002e.7 (NUVOTON NCT5572D Super I/O)
PNP: 002e.8 (NUVOTON NCT5572D Super I/O)
PNP: 002e.9 (NUVOTON NCT5572D Super I/O)
PNP: 002e.a (NUVOTON NCT5572D Super I/O)
PNP: 002e.b (NUVOTON NCT5572D Super I/O)
PNP: 002e.c (NUVOTON NCT5572D Super I/O)
PNP: 002e.d (NUVOTON NCT5572D Super I/O)
PNP: 002e.e (NUVOTON NCT5572D Super I/O)
PNP: 002e.f (NUVOTON NCT5572D Super I/O)
PCI: 00:14.4 (ATI SP5100)
PCI: 03:01.0 (ATI SP5100)
PCI: 03:02.0 (ATI SP5100)
PCI: 03:03.0 (ATI SP5100)
PCI: 00:14.5 (ATI SP5100)
PCI: 00:18.1 (AMD Family 10h/15h Northbridge)
PCI: 00:18.2 (AMD Family 10h/15h Northbridge)
PCI: 00:18.3 (AMD Family 10h/15h Northbridge)
PCI: 00:18.4 (AMD Family 10h/15h Northbridge)
PCI: 00:18.5 (AMD Family 10h/15h Northbridge)
PCI: 00:19.0 (AMD Family 10h/15h Northbridge)
PCI: 00:19.1 (AMD Family 10h/15h Northbridge)
PCI: 00:19.2 (AMD Family 10h/15h Northbridge)
PCI: 00:19.3 (AMD Family 10h/15h Northbridge)
PCI: 00:19.4 (AMD Family 10h/15h Northbridge)
PCI: 00:19.5 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.0 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.1 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.2 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.3 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.4 (AMD Family 10h/15h Northbridge)
PCI: 00:1a.5 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.0 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.1 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.2 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.3 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.4 (AMD Family 10h/15h Northbridge)
PCI: 00:1b.5 (AMD Family 10h/15h Northbridge)
APIC: 01 (unknown)
APIC: 02 (unknown)
APIC: 03 (unknown)
APIC: 04 (unknown)
APIC: 05 (unknown)
APIC: 06 (unknown)
APIC: 07 (unknown)
APIC: 08 (unknown)
APIC: 09 (unknown)
APIC: 0a (unknown)
APIC: 0b (unknown)
APIC: 0c (unknown)
APIC: 0d (unknown)
APIC: 0e (unknown)
APIC: 0f (unknown)
PCI: 01:00.0 (unknown)
PCI: 02:00.0 (unknown)
PNP: 002e.109 (unknown)
PNP: 002e.209 (unknown)
PNP: 002e.309 (unknown)
PNP: 002e.107 (unknown)
PNP: 002e.207 (unknown)
PNP: 002e.307 (unknown)
PNP: 002e.407 (unknown)
SMBIOS tables: 538 bytes.
POST: 0x9e
POST: 0x9d
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 9015
Table forward entry ends at 0x00000528.
... aligned to 0x00001000
Writing coreboot table at 0xbfc8b000
rom_table_end = 0xbfc8b000
... aligned to 0xbfc90000
CBFS @ 100000 size ff440
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS: Found @ offset 61340 size e2c
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000a0000-00000000000bffff: RESERVED
 3. 00000000000c0000-00000000bfc8afff: RAM
 4. 00000000bfc8b000-00000000bfffffff: CONFIGURATION TABLES
 5. 00000000c0000000-00000000cfffffff: RESERVED
 6. 00000000f0b00000-00000000f0b03fff: RESERVED
 7. 00000000fec00000-00000000fec00fff: RESERVED
 8. 00000000fed00000-00000000fed00fff: RESERVED
 9. 0000000100000000-0000000137ffffff: RAM
10. 0000000138000000-000000013fffffff: RESERVED
CBFS @ 100000 size ff440
No FMAP found at 0 offset.
Wrote coreboot table at: bfc8b000, 0x1140 bytes, checksum d9f5
coreboot table: 4440 bytes.
IMD ROOT    0. bffff000 00001000
IMD SMALL   1. bfffe000 00001000
CAR GLOBALS 2. bfff3000 0000a380
CONSOLE     3. bffd3000 00020000
AMDMEM INFO 4. bffc9000 000090ca
ACPI RESUME 5. bfcc9000 00300000
SMP TABLE   6. bfcc8000 00001000
ACPI        7. bfca4000 00024000
TCPA LOG    8. bfc94000 00010000
SMBIOS      9. bfc93000 00000800
COREBOOT   10. bfc8b000 00008000
IMD small region:
  IMD ROOT    0. bfffec00 00000400
  TIME STAMP  1. bfffe920 000002e0
  ROMSTAGE    2. bfffe900 00000004
  GDT         3. bfffe700 00000200
BS: BS_WRITE_TABLES times (us): entry 0 run 10091 exit 0
POST: 0x7a
CBFS provider active.
CBFS @ 100000 size ff440
CBFS: Locating 'normal/payload'
CBFS: Checking offset 0
CBFS:  Unmatched 'fallback/romstage' at 0
CBFS: Checking offset 27800
CBFS:  Unmatched 'config' at 27800
CBFS: Checking offset 27b00
CBFS:  Unmatched 'cmos.default' at 27b00
CBFS: Checking offset 27c40
CBFS:  Unmatched 'etc/pci-optionrom-exec' at 27c40
CBFS: Checking offset 27cc0
CBFS:  Unmatched '' at 27cc0
CBFS: Checking offset 27fc0
CBFS:  Unmatched 's3nv' at 27fc0
CBFS: Checking offset 38000
CBFS:  Unmatched 'fallback/ramstage' at 38000
CBFS: Checking offset 4c700
CBFS:  Unmatched 'fallback/payload' at 4c700
CBFS: Checking offset 5a2c0
CBFS:  Unmatched 'vgaroms/seavgabios.bin' at 5a2c0
CBFS: Checking offset 61340
CBFS:  Unmatched 'cmos_layout.bin' at 61340
CBFS: Checking offset 621c0
CBFS:  Unmatched '' at 621c0
CBFS: Checking offset 623c0
CBFS:  Unmatched 'fallback/dsdt.aml' at 623c0
CBFS: Checking offset 64800
CBFS:  Unmatched 'microcode_amd.bin' at 64800
CBFS: Checking offset 67a00
CBFS:  Unmatched 'microcode_amd_fam15h.bin' at 67a00
CBFS: Checking offset 69940
CBFS:  Unmatched 'pci8086,10d3.rom' at 69940
CBFS: Checking offset 77bc0
CBFS:  Unmatched 'revision' at 77bc0
CBFS: Checking offset 77e80
CBFS:  Unmatched 'normal/dsdt.aml' at 77e80
CBFS: Checking offset 7a2c0
CBFS:  Unmatched '' at 7a2c0
CBFS: Checking offset 7ff80
CBFS:  Unmatched 'normal/romstage' at 7ff80
CBFS: Checking offset a75c0
CBFS:  Unmatched 'normal/ramstage' at a75c0
CBFS: Checking offset bbb80
CBFS: Found @ offset bbb80 size d882
'normal/payload' located at offset: 1bbba8 size: d882
Loading segment from rom address 0xfffbbba8
  code (compression=1)
  New segment dstaddr 0xe6694 memsize 0x1996c srcaddr 0xfffbbbe0 filesize 0xd84a
Loading segment from rom address 0xfffbbbc4
  Entry Point 0x000fd51c
Bounce Buffer at bfa62000, 2262688 bytes
Loading Segment: addr: 0x00000000000e6694 memsz: 0x000000000001996c filesz: 0x000000000000d84a
lb: [0x0000000000100000, 0x0000000000214350)
Post relocation: addr: 0x00000000000e6694 memsz: 0x000000000001996c filesz: 0x000000000000d84a
using LZMA
[ 0x000e6694, 00100000, 0x00100000) <- fffbbbe0
dest 000e6694, end 00100000, bouncebuffer bfa62000
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 1 run 23678 exit 0
POST: 0x7b
Jumping to boot code at 000fd51c(bfc8b000)
POST: 0xf8
CPU0: stack: 0014e000 - 0014f000, lowest used address 0014e9e0, stack used: 1568 bytes
entry    = 0x000fd51c
lb_start = 0x00100000
lb_size  = 0x00114350
buffer   = 0xbfa62000
SeaBIOS (version rel-1.8.0-10-g5ae3dd6-20151208_030809-cb-test-tgt)
Found coreboot cbmem console @ bffd3000
Found mainboard ASUS KGPE-D16
Relocating init from 0x000e78c0 to 0xbfc40b00 (size 42048)
Found CBFS header at 0xfffff458
CPU Mhz=2402
Found 37 PCI devices (max PCI bus is 03)
Copying SMBIOS entry point from 0xbfc93000 to 0x000f1ce0
Copying ACPI RSDP from 0xbfca4000 to 0x000f1cb0
Copying MPTABLE from 0xbfcc8000/bfcc8010 to 0x000f1990
Using pmtimer, ioport 0x820
Scan for VGA option rom
Running option rom at c000:0003
pmm call arg1=0
Turning on vga text mode console
SeaBIOS (version rel-1.8.0-10-g5ae3dd6-20151208_030809-cb-test-tgt)
EHCI init on dev 00:12.2 (regs=0xf0b0a020)
EHCI init on dev 00:13.2 (regs=0xf0b0b020)
Found 0 lpt ports
Found 1 serial ports
ATA controller 1 at 1f0/3f4/0 (irq 14 dev a1)
OHCI init on dev 00:12.0 (regs=0xf0b04000)
ATA controller 2 at 170/374/0 (irq 15 dev a1)
OHCI init on dev 00:12.1 (regs=0xf0b05000)
AHCI controller at 11.0, iobase f0b09000, irq 0
OHCI init on dev 00:13.0 (regs=0xf0b06000)
OHCI init on dev 00:13.1 (regs=0xf0b07000)
OHCI init on dev 00:14.5 (regs=0xf0b08000)
Got ps2 nak (status=51)
All threads complete.
Scan for option roms
Running option rom at c700:0003
pmm call arg1=1
pmm call arg1=0
pmm call arg1=1
pmm call arg1=0
Running option rom at c800:0003
pmm call arg1=1
pmm call arg1=1
Searching bootorder for: /pci@i0cf8/pci-bridge@9/*@0
Searching bootorder for: /pci@i0cf8/pci-bridge@a/*@0

Press F12 for boot menu.

Unable to find vesa video mode dimensions 640/480
failed to find a videomode with 640x480 0bpp (0=any).
Searching bootorder for: HALT
Space available for UMB: c9000-ec800, f0000-f1950
Returned 262144 bytes of ZoneHigh
e820 map has 10 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 00000000bfc8b000 = 1 RAM
  4: 00000000bfc8b000 - 00000000d0000000 = 2 RESERVED
  5: 00000000f0b00000 - 00000000f0b04000 = 2 RESERVED
  6: 00000000fec00000 - 00000000fec01000 = 2 RESERVED
  7: 00000000fed00000 - 00000000fed01000 = 2 RESERVED
  8: 0000000100000000 - 0000000138000000 = 1 RAM
  9: 0000000138000000 - 0000000140000000 = 2 RESERVED
enter handle_19:
  NULL
Booting from ROM...
Booting from c700:0373