asus/p5gc-mx/4.5-1394-g3795b03/2017-03-27T00_59_22Z
diff --git a/asus/p5gc-mx/4.5-1394-g3795b03/2017-03-27T00_59_22Z/coreboot_console.txt b/asus/p5gc-mx/4.5-1394-g3795b03/2017-03-27T00_59_22Z/coreboot_console.txt
new file mode 100644
index 0000000..4b287b8
--- /dev/null
+++ b/asus/p5gc-mx/4.5-1394-g3795b03/2017-03-27T00_59_22Z/coreboot_console.txt
@@ -0,0 +1,1427 @@
+
+
+coreboot-4.5-1394-g3795b03-dirty-RAPTOR-NORMAL Mon Mar 27 00:59:22 UTC 2017 romstage starting...
+
+Intel(R) 82945GC Chipset
+(G)MCH capable of up to DDR2-667
+Setting up static southbridge registers... done.
+Disabling Watchdog reboot... done.
+Setting up static northbridge registers...CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
+CBFS: Locating 'cmos_layout.bin'
+CBFS: Found @ offset 70c0 size 500
+ done.
+Waiting for MCHBAR to come up...ok
+CPU BSEL: 0x2
+MCH BSEL: 0x2
+PM1_CNT: 00000000
+SMBus controller enabled.
+Setting up RAM controller.
+This mainboard supports Dual Channel Operation.
+DDR II Channel 0 Socket 0: x8DS
+DDR II Channel 0 Socket 1: N/A
+DDR II Channel 1 Socket 0: x8DS
+DDR II Channel 1 Socket 1: N/A
+Memory will be driven at 667MHz with CAS=4 clocks
+tRAS = 15 cycles
+tRP = 5 cycles
+tRCD = 5 cycles
+Refresh: 7.8us
+tWR = 5 cycles
+DIMM 0 side 0 = 1024 MB
+DIMM 2 side 0 = 1024 MB
+tRFC = 43 cycles
+Setting Memory Frequency... CLKCFG = 0x20000002, CLKCFG = 0x20000032, ok
+Setting mode of operation for memory channels...Dual Channel Interleaved.
+Programming Clock Crossing...MEM=667 FSB=800... ok
+Setting RAM size...
+C0DRB = 0x20202020
+C1DRB = 0x20202020
+TOLUD = 0x0080
+Setting row attributes...
+C0DRA = 0x0003
+C1DRA = 0x0003
+DIMM0 has 8 banks.
+DIMM2 has 8 banks.
+one dimm per channel config..
+Initializing System Memory IO...
+Programming Dual Channel RCOMP
+Table Index: 6
+Programming DLL Timings...
+Enabling System Memory IO...
+jedec enable sequence: bank 0
+jedec enable sequence: bank 4
+receive_enable_autoconfig() for channel 0
+ find_strobes_low()
+ set_receive_enable() medium=0x3, coarse=0x4
+ set_receive_enable() medium=0x1, coarse=0x4
+ set_receive_enable() medium=0x1, coarse=0x4
+ find_strobes_edge()
+ set_receive_enable() medium=0x1, coarse=0x4
+ add_quarter_clock() mediumcoarse=11 fine=81
+ set_receive_enable() medium=0x3, coarse=0x4
+ find_preamble()
+ set_receive_enable() medium=0x3, coarse=0x3
+ set_receive_enable() medium=0x3, coarse=0x2
+ add_quarter_clock() mediumcoarse=0b fine=01
+ normalize()
+ set_receive_enable() medium=0x0, coarse=0x3
+receive_enable_autoconfig() for channel 1
+ find_strobes_low()
+ set_receive_enable() medium=0x3, coarse=0x4
+ set_receive_enable() medium=0x1, coarse=0x4
+ find_strobes_edge()
+ set_receive_enable() medium=0x1, coarse=0x4
+ set_receive_enable() medium=0x3, coarse=0x4
+ add_quarter_clock() mediumcoarse=13 fine=02
+ find_preamble()
+ set_receive_enable() medium=0x3, coarse=0x3
+ set_receive_enable() medium=0x3, coarse=0x2
+ add_quarter_clock() mediumcoarse=0b fine=82
+ set_receive_enable() medium=0x1, coarse=0x3
+ normalize()
+RAM initialization finished.
+Setting up Egress Port RCRB
+Loading port arbitration table ...ok
+Wait for VC1 negotiation ...ok
+Setting up DMI RCRB
+Wait for VC1 negotiation ...done..
+Internal graphics: enabled
+Waiting for DMI hardware...ok
+Enabling PCI Express x16 Link
+SLOTSTS: 0000
+Disabling PCI Express x16 Link
+Wait for link to enter
+
+*** Log truncated, 127 characters dropped. ***
+
+MTRR Range: Start=ff800000 End=0 (Size 800000)
+MTRR Range: Start=0 End=1000000 (Size 1000000)
+MTRR Range: Start=7f400000 End=7f800000 (Size 400000)
+MTRR Range: Start=7f000000 End=7f400000 (Size 400000)
+CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
+CBFS: Locating 'normal/ramstage'
+CBFS: Found @ offset 5bdc0 size 11147
+Decompressing stage normal/ramstage @ 0x7f79dfc0 (235632 bytes)
+Loading module at 7f79e000 with entry 7f79e000. filesize: 0x2c0b0 memsize: 0x39830
+Processing 2191 relocs. Offset value of 0x7f69e000
+CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
+CBFS: Locating 'cmos_layout.bin'
+CBFS: Found @ offset 70c0 size 500
+
+
+coreboot-4.5-1394-g3795b03-dirty-RAPTOR-NORMAL Mon Mar 27 00:59:22 UTC 2017 ramstage starting...
+POST: 0x39
+POST: 0x80
+Normal boot.
+POST: 0x70
+BS: BS_PRE_DEVICE times (us): entry 0 run 1060 exit 0
+POST: 0x71
+BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1060 exit 0
+POST: 0x72
+Enumerating buses...
+Show all devs... Before device enumeration.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+APIC: acac: enabled 0
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:01.0: enabled 1
+PCI: 00:02.0: enabled 1
+PCI: 00:1b.0: enabled 1
+PCI: 00:1c.0: enabled 1
+PCI: 00:1c.1: enabled 1
+PCI: 00:1d.0: enabled 1
+PCI: 00:1d.1: enabled 1
+PCI: 00:1d.2: enabled 1
+PCI: 00:1d.3: enabled 1
+PCI: 00:1d.7: enabled 1
+PCI: 00:1e.0: enabled 1
+PCI: 00:1f.0: enabled 1
+PNP: 002e.0: enabled 1
+PNP: 002e.1: enabled 1
+PNP: 002e.2: enabled 1
+PNP: 002e.3: enabled 1
+PNP: 002e.5: enabled 1
+PNP: 002e.6: enabled 0
+PNP: 002e.7: enabled 1
+PNP: 002e.8: enabled 0
+PNP: 002e.9: enabled 1
+PNP: 002e.a: enabled 1
+PNP: 002e.b: enabled 1
+PNP: 002e.c: enabled 1
+PCI: 00:1f.1: enabled 1
+PCI: 00:1f.2: enabled 1
+PCI: 00:1f.3: enabled 1
+Compare with tree...
+Root Device: enabled 1
+ CPU_CLUSTER: 0: enabled 1
+ APIC: 00: enabled 1
+ APIC: acac: enabled 0
+ DOMAIN: 0000: enabled 1
+ PCI: 00:00.0: enabled 1
+ PCI: 00:01.0: enabled 1
+ PCI: 00:02.0: enabled 1
+ PCI: 00:1b.0: enabled 1
+ PCI: 00:1c.0: enabled 1
+ PCI: 00:1c.1: enabled 1
+ PCI: 00:1d.0: enabled 1
+ PCI: 00:1d.1: enabled 1
+ PCI: 00:1d.2: enabled 1
+ PCI: 00:1d.3: enabled 1
+ PCI: 00:1d.7: enabled 1
+ PCI: 00:1e.0: enabled 1
+ PCI: 00:1f.0: enabled 1
+ PNP: 002e.0: enabled 1
+ PNP: 002e.1: enabled 1
+ PNP: 002e.2: enabled 1
+ PNP: 002e.3: enabled 1
+ PNP: 002e.5: enabled 1
+ PNP: 002e.6: enabled 0
+ PNP: 002e.7: enabled 1
+ PNP: 002e.8: enabled 0
+ PNP: 002e.9: enabled 1
+ PNP: 002e.a: enabled 1
+ PNP: 002e.b: enabled 1
+ PNP: 002e.c: enabled 1
+ PCI: 00:1f.1: enabled 1
+ PCI: 00:1f.2: enabled 1
+ PCI: 00:1f.3: enabled 1
+Root Device scanning...
+root_dev_scan_bus for Root Device
+CPU_CLUSTER: 0 enabled
+DOMAIN: 0000 enabled
+DOMAIN: 0000 scanning...
+PCI: pci_scan_bus for bus 00
+POST: 0x24
+PCI: 00:00.0 [8086/0000] ops
+PCI: 00:00.0 [8086/2770] enabled
+PCI: Static device PCI: 00:01.0 not found, disabling it.
+PCI: 00:02.0 [8086/0000] ops
+PCI: 00:02.0 [8086/2772] enabled
+PCI: 00:1b.0 [8086/27d8] ops
+PCI: 00:1b.0 [8086/27d8] enabled
+PCI: 00:1c.0 [8086/0000] bus ops
+PCI: 00:1c.0 [8086/27d0] enabled
+PCI: 00:1c.1 [8086/0000] bus ops
+PCI: 00:1c.1 [8086/27d2] enabled
+PCI: 00:1d.0 [8086/27c8] ops
+PCI: 00:1d.0 [8086/27c8] enabled
+PCI: 00:1d.1 [8086/27c9] ops
+PCI: 00:1d.1 [8086/27c9] enabled
+PCI: 00:1d.2 [8086/27ca] ops
+PCI: 00:1d.2 [8086/27ca] enabled
+PCI: 00:1d.3 [8086/27cb] ops
+PCI: 00:1d.3 [8086/27cb] enabled
+PCI: 00:1d.7 [8086/27cc] ops
+PCI: 00:1d.7 [8086/27cc] enabled
+PCI: 00:1e.0 [8086/244e] bus ops
+PCI: 00:1e.0 [8086/244e] enabled
+PCI: 00:1f.0 [8086/0000] bus ops
+PCI: 00:1f.0 [8086/27b8] enabled
+PCI: 00:1f.1 [8086/27df] ops
+PCI: 00:1f.1 [8086/27df] enabled
+Set SATA mode early
+PCI: 00:1f.2 [8086/0000] ops
+Set SATA mode early
+PCI: 00:1f.2 [8086/27c0] enabled
+PCI: 00:1f.3 [8086/27da] bus ops
+PCI: 00:1f.3 [8086/27da] enabled
+POST: 0x25
+PCI: 00:1c.0 scanning...
+do_pci_scan_bridge for PCI: 00:1c.0
+PCI: pci_scan_bus for bus 01
+POST: 0x24
+PCI: 01:00.0 [8086/10d3] enabled
+POST: 0x25
+POST: 0x55
+scan_bus: scanning of bus PCI: 00:1c.0 took 14285 usecs
+PCI: 00:1c.1 scanning...
+do_pci_scan_bridge for PCI: 00:1c.1
+PCI: pci_scan_bus for bus 02
+POST: 0x24
+PCI: 02:00.0 [1969/2048] enabled
+POST: 0x25
+POST: 0x55
+scan_bus: scanning of bus PCI: 00:1c.1 took 14286 usecs
+PCI: 00:1e.0 scanning...
+do_pci_scan_bridge for PCI: 00:1e.0
+PCI: pci_scan_bus for bus 03
+POST: 0x24
+POST: 0x25
+POST: 0x55
+scan_bus: scanning of bus PCI: 00:1e.0 took 11333 usecs
+PCI: 00:1f.0 scanning...
+scan_lpc_bus for PCI: 00:1f.0
+PNP: 002e.0 enabled
+PNP: 002e.1 enabled
+PNP: 002e.2 enabled
+PNP: 002e.3 enabled
+PNP: 002e.5 enabled
+PNP: 002e.6 disabled
+PNP: 002e.7 enabled
+PNP: 002e.8 disabled
+PNP: 002e.9 enabled
+PNP: 002e.a enabled
+PNP: 002e.b enabled
+PNP: 002e.c enabled
+PNP: 002e.307 enabled
+PNP: 002e.109 enabled
+PNP: 002e.209 enabled
+PNP: 002e.309 enabled
+scan_lpc_bus for PCI: 00:1f.0 done
+scan_bus: scanning of bus PCI: 00:1f.0 took 38634 usecs
+PCI: 00:1f.3 scanning...
+scan_generic_bus for PCI: 00:1f.3
+scan_generic_bus for PCI: 00:1f.3 done
+scan_bus: scanning of bus PCI: 00:1f.3 took 8803 usecs
+POST: 0x55
+scan_bus: scanning of bus DOMAIN: 0000 took 214328 usecs
+root_dev_scan_bus for Root Device done
+scan_bus: scanning of bus Root Device took 232108 usecs
+done
+BS: BS_DEV_ENUMERATE times (us): entry 0 run 394034 exit 0
+POST: 0x73
+found VGA at PCI: 00:02.0
+Setting up VGA for PCI: 00:02.0
+Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
+Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
+Allocating resources...
+Reading resources...
+Root Device read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0
+Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
+PCI: 00:1c.0 read_resources bus 1 link: 0
+PCI: 00:1c.0 read_resources bus 1 link: 0 done
+PCI: 00:1c.1 read_resources bus 2 link: 0
+PCI: 00:1c.1 read_resources bus 2 link: 0 done
+PCI: 00:1e.0 read_resources bus 3 link: 0
+PCI: 00:1e.0 read_resources bus 3 link: 0 done
+PCI: 00:1f.0 read_resources bus 0 link: 0
+PNP: 002e.7 missing read_resources
+PCI: 00:1f.0 read_resources bus 0 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0 done
+Root Device read_resources bus 0 link: 0 done
+Done reading resources.
+Show resources in subtree (Root Device)...After reading.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ APIC: acac
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
+ PCI: 00:00.0
+ PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 48
+ PCI: 00:01.0
+ PCI: 00:02.0
+ PCI: 00:02.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 10
+ PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 14
+ PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 18
+ PCI: 00:02.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 1c
+ PCI: 00:1b.0
+ PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:1c.0 child on link 0 PCI: 01:00.0
+ PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 01:00.0
+ PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
+ PCI: 01:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 14
+ PCI: 01:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
+ PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c
+ PCI: 01:00.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 2200 index 30
+ PCI: 00:1c.1 child on link 0 PCI: 02:00.0
+ PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 02:00.0
+ PCI: 02:00.0 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10
+ PCI: 02:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
+ PCI: 00:1d.0
+ PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.1
+ PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.2
+ PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.3
+ PCI: 00:1d.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.7
+ PCI: 00:1d.7 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
+ PCI: 00:1e.0
+ PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 00:1f.0 child on link 0 PNP: 002e.0
+ PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+ PNP: 002e.0
+ PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
+ PNP: 002e.1
+ PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.1 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
+ PNP: 002e.2
+ PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.3
+ PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.5
+ PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
+ PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
+ PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
+ PNP: 002e.6
+ PNP: 002e.6 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 62
+ PNP: 002e.7
+ PNP: 002e.8
+ PNP: 002e.9
+ PNP: 002e.a
+ PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.b
+ PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit 7ff flags c0000100 index 60
+ PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.c
+ PNP: 002e.307
+ PNP: 002e.109
+ PNP: 002e.209
+ PNP: 002e.309
+ PCI: 00:1f.1
+ PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
+ PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
+ PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
+ PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
+ PCI: 00:1f.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
+ PCI: 00:1f.2
+ PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
+ PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
+ PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
+ PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
+ PCI: 00:1f.2 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
+ PCI: 00:1f.3
+ PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
+DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
+PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 01:00.0 18 * [0x0 - 0x1f] io
+PCI: 00:1c.0 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.0 1c * [0x0 - 0xfff] io
+PCI: 00:1d.0 20 * [0x1000 - 0x101f] io
+PCI: 00:1d.1 20 * [0x1020 - 0x103f] io
+PCI: 00:1d.2 20 * [0x1040 - 0x105f] io
+PCI: 00:1d.3 20 * [0x1060 - 0x107f] io
+PCI: 00:1f.1 20 * [0x1080 - 0x108f] io
+PCI: 00:1f.2 20 * [0x1090 - 0x109f] io
+PCI: 00:02.0 14 * [0x10a0 - 0x10a7] io
+PCI: 00:1f.1 10 * [0x10a8 - 0x10af] io
+PCI: 00:1f.1 18 * [0x10b0 - 0x10b7] io
+PCI: 00:1f.2 10 * [0x10b8 - 0x10bf] io
+PCI: 00:1f.2 18 * [0x10c0 - 0x10c7] io
+PCI: 00:1f.1 14 * [0x10c8 - 0x10cb] io
+PCI: 00:1f.1 1c * [0x10cc - 0x10cf] io
+PCI: 00:1f.2 14 * [0x10d0 - 0x10d3] io
+PCI: 00:1f.2 1c * [0x10d4 - 0x10d7] io
+DOMAIN: 0000 io: base: 10d8 size: 10d8 align: 12 gran: 0 limit: ffff done
+DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
+PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 01:00.0 14 * [0x0 - 0x7ffff] mem
+PCI: 01:00.0 30 * [0x80000 - 0xbffff] mem
+PCI: 01:00.0 10 * [0xc0000 - 0xdffff] mem
+PCI: 01:00.0 1c * [0xe0000 - 0xe3fff] mem
+PCI: 00:1c.0 mem: base: e4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 02:00.0 10 * [0x0 - 0x3ffff] mem
+PCI: 02:00.0 30 * [0x40000 - 0x5ffff] mem
+PCI: 00:1c.1 mem: base: 60000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
+PCI: 00:1c.0 20 * [0x10000000 - 0x100fffff] mem
+PCI: 00:1c.1 20 * [0x10100000 - 0x101fffff] mem
+PCI: 00:02.0 10 * [0x10200000 - 0x1027ffff] mem
+PCI: 00:02.0 1c * [0x10280000 - 0x102bffff] mem
+PCI: 00:1b.0 10 * [0x102c0000 - 0x102c3fff] mem
+PCI: 00:1d.7 10 * [0x102c4000 - 0x102c43ff] mem
+DOMAIN: 0000 mem: base: 102c4400 size: 102c4400 align: 28 gran: 0 limit: ffffffff done
+avoid_fixed_resources: DOMAIN: 0000
+avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
+constrain_resources: PCI: 00:00.0 48 base f0000000 limit f3ffffff mem (fixed)
+constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
+avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 base d0000000 limit efffffff
+Setting resources...
+DOMAIN: 0000 io: base:1000 size:10d8 align:12 gran:0 limit:ffff
+PCI: 00:1c.0 1c * [0x1000 - 0x1fff] io
+PCI: 00:1d.0 20 * [0x2000 - 0x201f] io
+PCI: 00:1d.1 20 * [0x2020 - 0x203f] io
+PCI: 00:1d.2 20 * [0x2040 - 0x205f] io
+PCI: 00:1d.3 20 * [0x2060 - 0x207f] io
+PCI: 00:1f.1 20 * [0x2080 - 0x208f] io
+PCI: 00:1f.2 20 * [0x2090 - 0x209f] io
+PCI: 00:02.0 14 * [0x20a0 - 0x20a7] io
+PCI: 00:1f.1 10 * [0x20a8 - 0x20af] io
+PCI: 00:1f.1 18 * [0x20b0 - 0x20b7] io
+PCI: 00:1f.2 10 * [0x20b8 - 0x20bf] io
+PCI: 00:1f.2 18 * [0x20c0 - 0x20c7] io
+PCI: 00:1f.1 14 * [0x20c8 - 0x20cb] io
+PCI: 00:1f.1 1c * [0x20cc - 0x20cf] io
+PCI: 00:1f.2 14 * [0x20d0 - 0x20d3] io
+PCI: 00:1f.2 1c * [0x20d4 - 0x20d7] io
+DOMAIN: 0000 io: next_base: 20d8 size: 10d8 align: 12 gran: 0 done
+PCI: 00:1c.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff
+PCI: 01:00.0 18 * [0x1000 - 0x101f] io
+PCI: 00:1c.0 io: next_base: 1020 size: 1000 align: 12 gran: 12 done
+PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done
+PCI: 00:1e.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:1e.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
+DOMAIN: 0000 mem: base:d0000000 size:102c4400 align:28 gran:0 limit:efffffff
+PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem
+PCI: 00:1c.0 20 * [0xe0000000 - 0xe00fffff] mem
+PCI: 00:1c.1 20 * [0xe0100000 - 0xe01fffff] mem
+PCI: 00:02.0 10 * [0xe0200000 - 0xe027ffff] mem
+PCI: 00:02.0 1c * [0xe0280000 - 0xe02bffff] mem
+PCI: 00:1b.0 10 * [0xe02c0000 - 0xe02c3fff] mem
+PCI: 00:1d.7 10 * [0xe02c4000 - 0xe02c43ff] mem
+DOMAIN: 0000 mem: next_base: e02c4400 size: 102c4400 align: 28 gran: 0 done
+PCI: 00:1c.0 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.0 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.0 mem: base:e0000000 size:100000 align:20 gran:20 limit:e00fffff
+PCI: 01:00.0 14 * [0xe0000000 - 0xe007ffff] mem
+PCI: 01:00.0 30 * [0xe0080000 - 0xe00bffff] mem
+PCI: 01:00.0 10 * [0xe00c0000 - 0xe00dffff] mem
+PCI: 01:00.0 1c * [0xe00e0000 - 0xe00e3fff] mem
+PCI: 00:1c.0 mem: next_base: e00e4000 size: 100000 align: 20 gran: 20 done
+PCI: 00:1c.1 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.1 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.1 mem: base:e0100000 size:100000 align:20 gran:20 limit:e01fffff
+PCI: 02:00.0 10 * [0xe0100000 - 0xe013ffff] mem
+PCI: 02:00.0 30 * [0xe0140000 - 0xe015ffff] mem
+PCI: 00:1c.1 mem: next_base: e0160000 size: 100000 align: 20 gran: 20 done
+PCI: 00:1e.0 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1e.0 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1e.0 mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1e.0 mem: next_base: efffffff size: 0 align: 20 gran: 20 done
+Root Device assign_resources, bus 0 link: 0
+pci_tolm: 0xd0000000
+Base of stolen memory: 0x7f800000
+Top of Low Used DRAM: 0x80000000
+IGD decoded, subtracting 8M UMA
+Available memory: 2088960K (2040M)
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+PCI: 00:02.0 10 <- [0x00e0200000 - 0x00e027ffff] size 0x00080000 gran 0x13 mem
+PCI: 00:02.0 14 <- [0x00000020a0 - 0x00000020a7] size 0x00000008 gran 0x03 io
+PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem
+PCI: 00:02.0 1c <- [0x00e0280000 - 0x00e02bffff] size 0x00040000 gran 0x12 mem
+PCI: 00:1b.0 10 <- [0x00e02c0000 - 0x00e02c3fff] size 0x00004000 gran 0x0e mem64
+PCI: 00:1c.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
+PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
+PCI: 00:1c.0 20 <- [0x00e0000000 - 0x00e00fffff] size 0x00100000 gran 0x14 bus 01 mem
+PCI: 00:1c.0 assign_resources, bus 1 link: 0
+PCI: 01:00.0 10 <- [0x00e00c0000 - 0x00e00dffff] size 0x00020000 gran 0x11 mem
+PCI: 01:00.0 14 <- [0x00e0000000 - 0x00e007ffff] size 0x00080000 gran 0x13 mem
+PCI: 01:00.0 18 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io
+PCI: 01:00.0 1c <- [0x00e00e0000 - 0x00e00e3fff] size 0x00004000 gran 0x0e mem
+PCI: 01:00.0 30 <- [0x00e0080000 - 0x00e00bffff] size 0x00040000 gran 0x12 romem
+PCI: 00:1c.0 assign_resources, bus 1 link: 0
+PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
+PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem
+PCI: 00:1c.1 20 <- [0x00e0100000 - 0x00e01fffff] size 0x00100000 gran 0x14 bus 02 mem
+PCI: 00:1c.1 assign_resources, bus 2 link: 0
+PCI: 02:00.0 10 <- [0x00e0100000 - 0x00e013ffff] size 0x00040000 gran 0x12 mem64
+PCI: 02:00.0 30 <- [0x00e0140000 - 0x00e015ffff] size 0x00020000 gran 0x11 romem
+PCI: 00:1c.1 assign_resources, bus 2 link: 0
+PCI: 00:1d.0 20 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.1 20 <- [0x0000002020 - 0x000000203f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.2 20 <- [0x0000002040 - 0x000000205f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.3 20 <- [0x0000002060 - 0x000000207f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.7 10 <- [0x00e02c4000 - 0x00e02c43ff] size 0x00000400 gran 0x0a mem
+PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
+PCI: 00:1e.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem
+PCI: 00:1e.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 mem
+PCI: 00:1f.0 assign_resources, bus 0 link: 0
+PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io
+PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq
+PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq
+PNP: 002e.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io
+PNP: 002e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
+PNP: 002e.1 74 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 drq
+PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
+PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
+PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
+PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
+PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
+PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
+PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
+PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
+PNP: 002e.a 70 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
+PNP: 002e.b 60 <- [0x0000000290 - 0x0000000291] size 0x00000002 gran 0x01 io
+PNP: 002e.b 70 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
+PCI: 00:1f.0 assign_resources, bus 0 link: 0
+PCI: 00:1f.1 10 <- [0x00000020a8 - 0x00000020af] size 0x00000008 gran 0x03 io
+PCI: 00:1f.1 14 <- [0x00000020c8 - 0x00000020cb] size 0x00000004 gran 0x02 io
+PCI: 00:1f.1 18 <- [0x00000020b0 - 0x00000020b7] size 0x00000008 gran 0x03 io
+PCI: 00:1f.1 1c <- [0x00000020cc - 0x00000020cf] size 0x00000004 gran 0x02 io
+PCI: 00:1f.1 20 <- [0x0000002080 - 0x000000208f] size 0x00000010 gran 0x04 io
+PCI: 00:1f.2 10 <- [0x00000020b8 - 0x00000020bf] size 0x00000008 gran 0x03 io
+PCI: 00:1f.2 14 <- [0x00000020d0 - 0x00000020d3] size 0x00000004 gran 0x02 io
+PCI: 00:1f.2 18 <- [0x00000020c0 - 0x00000020c7] size 0x00000008 gran 0x03 io
+PCI: 00:1f.2 1c <- [0x00000020d4 - 0x00000020d7] size 0x00000004 gran 0x02 io
+PCI: 00:1f.2 20 <- [0x0000002090 - 0x000000209f] size 0x00000010 gran 0x04 io
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+Root Device assign_resources, bus 0 link: 0
+Done setting resources.
+Show resources in subtree (Root Device)...After assigning values.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ APIC: acac
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 1000 size 10d8 align 12 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base d0000000 size 102c4400 align 28 gran 0 limit efffffff flags 40040200 index 10000100
+ DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
+ DOMAIN: 0000 resource base c0000 size 7ff40000 align 0 gran 0 limit 0 flags e0004200 index 4
+ DOMAIN: 0000 resource base 7f800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 5
+ PCI: 00:00.0
+ PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 48
+ PCI: 00:01.0
+ PCI: 00:02.0
+ PCI: 00:02.0 resource base e0200000 size 80000 align 19 gran 19 limit e027ffff flags 60000200 index 10
+ PCI: 00:02.0 resource base 20a0 size 8 align 3 gran 3 limit 20a7 flags 60000100 index 14
+ PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001200 index 18
+ PCI: 00:02.0 resource base e0280000 size 40000 align 18 gran 18 limit e02bffff flags 60000200 index 1c
+ PCI: 00:1b.0
+ PCI: 00:1b.0 resource base e02c0000 size 4000 align 14 gran 14 limit e02c3fff flags 60000201 index 10
+ PCI: 00:1c.0 child on link 0 PCI: 01:00.0
+ PCI: 00:1c.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
+ PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1c.0 resource base e0000000 size 100000 align 20 gran 20 limit e00fffff flags 60080202 index 20
+ PCI: 01:00.0
+ PCI: 01:00.0 resource base e00c0000 size 20000 align 17 gran 17 limit e00dffff flags 60000200 index 10
+ PCI: 01:00.0 resource base e0000000 size 80000 align 19 gran 19 limit e007ffff flags 60000200 index 14
+ PCI: 01:00.0 resource base 1000 size 20 align 5 gran 5 limit 101f flags 60000100 index 18
+ PCI: 01:00.0 resource base e00e0000 size 4000 align 14 gran 14 limit e00e3fff flags 60000200 index 1c
+ PCI: 01:00.0 resource base e0080000 size 40000 align 18 gran 18 limit e00bffff flags 60002200 index 30
+ PCI: 00:1c.1 child on link 0 PCI: 02:00.0
+ PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1c.1 resource base e0100000 size 100000 align 20 gran 20 limit e01fffff flags 60080202 index 20
+ PCI: 02:00.0
+ PCI: 02:00.0 resource base e0100000 size 40000 align 18 gran 18 limit e013ffff flags 60000201 index 10
+ PCI: 02:00.0 resource base e0140000 size 20000 align 17 gran 17 limit e015ffff flags 60002200 index 30
+ PCI: 00:1d.0
+ PCI: 00:1d.0 resource base 2000 size 20 align 5 gran 5 limit 201f flags 60000100 index 20
+ PCI: 00:1d.1
+ PCI: 00:1d.1 resource base 2020 size 20 align 5 gran 5 limit 203f flags 60000100 index 20
+ PCI: 00:1d.2
+ PCI: 00:1d.2 resource base 2040 size 20 align 5 gran 5 limit 205f flags 60000100 index 20
+ PCI: 00:1d.3
+ PCI: 00:1d.3 resource base 2060 size 20 align 5 gran 5 limit 207f flags 60000100 index 20
+ PCI: 00:1d.7
+ PCI: 00:1d.7 resource base e02c4000 size 400 align 12 gran 10 limit e02c43ff flags 60000200 index 10
+ PCI: 00:1e.0
+ PCI: 00:1e.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1e.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1e.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20
+ PCI: 00:1f.0 child on link 0 PNP: 002e.0
+ PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+ PNP: 002e.0
+ PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
+ PNP: 002e.1
+ PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.1 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
+ PNP: 002e.2
+ PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.3
+ PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.5
+ PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
+ PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62
+ PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72
+ PNP: 002e.6
+ PNP: 002e.6 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 62
+ PNP: 002e.7
+ PNP: 002e.8
+ PNP: 002e.9
+ PNP: 002e.a
+ PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.b
+ PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit 7ff flags e0000100 index 60
+ PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.c
+ PNP: 002e.307
+ PNP: 002e.109
+ PNP: 002e.209
+ PNP: 002e.309
+ PCI: 00:1f.1
+ PCI: 00:1f.1 resource base 20a8 size 8 align 3 gran 3 limit 20af flags 60000100 index 10
+ PCI: 00:1f.1 resource base 20c8 size 4 align 2 gran 2 limit 20cb flags 60000100 index 14
+ PCI: 00:1f.1 resource base 20b0 size 8 align 3 gran 3 limit 20b7 flags 60000100 index 18
+ PCI: 00:1f.1 resource base 20cc size 4 align 2 gran 2 limit 20cf flags 60000100 index 1c
+ PCI: 00:1f.1 resource base 2080 size 10 align 4 gran 4 limit 208f flags 60000100 index 20
+ PCI: 00:1f.2
+ PCI: 00:1f.2 resource base 20b8 size 8 align 3 gran 3 limit 20bf flags 60000100 index 10
+ PCI: 00:1f.2 resource base 20d0 size 4 align 2 gran 2 limit 20d3 flags 60000100 index 14
+ PCI: 00:1f.2 resource base 20c0 size 8 align 3 gran 3 limit 20c7 flags 60000100 index 18
+ PCI: 00:1f.2 resource base 20d4 size 4 align 2 gran 2 limit 20d7 flags 60000100 index 1c
+ PCI: 00:1f.2 resource base 2090 size 10 align 4 gran 4 limit 209f flags 60000100 index 20
+ PCI: 00:1f.3
+ PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
+Done allocating resources.
+BS: BS_DEV_RESOURCES times (us): entry 0 run 2251190 exit 0
+POST: 0x74
+Enabling resources...
+PCI: 00:00.0 subsystem <- 1458/5000
+PCI: 00:00.0 cmd <- 06
+PCI: 00:02.0 subsystem <- 1458/d000
+PCI: 00:02.0 cmd <- 03
+PCI: 00:1b.0 subsystem <- 0000/0000
+PCI: 00:1b.0 cmd <- 102
+PCI: 00:1c.0 bridge ctrl <- 0003
+PCI: 00:1c.0 subsystem <- 0000/0000
+PCI: 00:1c.0 cmd <- 107
+PCI: 00:1c.1 bridge ctrl <- 0003
+PCI: 00:1c.1 subsystem <- 0000/0000
+PCI: 00:1c.1 cmd <- 106
+PCI: 00:1d.0 subsystem <- 0000/0000
+PCI: 00:1d.0 cmd <- 01
+PCI: 00:1d.1 subsystem <- 0000/0000
+PCI: 00:1d.1 cmd <- 01
+PCI: 00:1d.2 subsystem <- 0000/0000
+PCI: 00:1d.2 cmd <- 01
+PCI: 00:1d.3 subsystem <- 0000/0000
+PCI: 00:1d.3 cmd <- 01
+PCI: 00:1d.7 subsystem <- 0000/0000
+PCI: 00:1d.7 cmd <- 102
+PCI: 00:1e.0 bridge ctrl <- 0003
+PCI: 00:1e.0 subsystem <- 0000/0000
+PCI: 00:1e.0 cmd <- 100 (NOT WRITTEN!)
+PCI: 00:1f.0 subsystem <- 0000/0000
+PCI: 00:1f.0 cmd <- 107
+PCI: 00:1f.1 subsystem <- 0000/0000
+PCI: 00:1f.1 cmd <- 01
+PCI: 00:1f.2 subsystem <- 0000/0000
+PCI: 00:1f.2 cmd <- 01
+PCI: 00:1f.3 subsystem <- 0000/0000
+PCI: 00:1f.3 cmd <- 101
+PCI: 01:00.0 cmd <- 03
+PCI: 02:00.0 cmd <- 02
+done.
+BS: BS_DEV_ENABLE times (us): entry 0 run 98720 exit 0
+POST: 0x75
+Initializing devices...
+Root Device init ...
+Root Device init finished in 1923 usecs
+POST: 0x75
+CPU_CLUSTER: 0 init ...
+start_eip=0x00001000, code_size=0x00000031
+Initializing SMM handler... ... pmbase = 0x0500
+
+SMI_STS: PM1
+PM1_STS: PRBTNOR PWRBTN TMROF
+GPE0_STS: GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO9 GPIO8 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
+ALT_GP_SMI_STS: GPI15 GPI14 GPI13 GPI12 GPI11 GPI9 GPI8 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0
+TCO_STS:
+ ... raise SMI#
+Initializing CPU #0
+CPU: vendor Intel device 6fd
+CPU: family 06, model 0f, stepping 0d
+POST: 0x60
+Enabling cache
+CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
+CBFS: Locating 'cpu_microcode_blob.bin'
+CBFS: 'cpu_microcode_blob.bin' not found.
+CPU: Intel(R) Pentium(R) Dual CPU E2180 @ 2.00GHz.
+MTRR: Physical address space:
+0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
+0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
+0x00000000000c0000 - 0x000000007f800000 size 0x7f740000 type 6
+0x000000007f800000 - 0x00000000d0000000 size 0x50800000 type 0
+0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
+0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
+MTRR addr 0x0-0x10 set to 6 type @ 0
+MTRR addr 0x10-0x20 set to 6 type @ 1
+MTRR addr 0x20-0x30 set to 6 type @ 2
+MTRR addr 0x30-0x40 set to 6 type @ 3
+MTRR addr 0x40-0x50 set to 6 type @ 4
+MTRR addr 0x50-0x60 set to 6 type @ 5
+MTRR addr 0x60-0x70 set to 6 type @ 6
+MTRR addr 0x70-0x80 set to 6 type @ 7
+MTRR addr 0x80-0x84 set to 6 type @ 8
+MTRR addr 0x84-0x88 set to 6 type @ 9
+MTRR addr 0x88-0x8c set to 6 type @ 10
+MTRR addr 0x8c-0x90 set to 6 type @ 11
+MTRR addr 0x90-0x94 set to 6 type @ 12
+MTRR addr 0x94-0x98 set to 6 type @ 13
+MTRR addr 0x98-0x9c set to 6 type @ 14
+MTRR addr 0x9c-0xa0 set to 6 type @ 15
+MTRR addr 0xa0-0xa4 set to 0 type @ 16
+MTRR addr 0xa4-0xa8 set to 0 type @ 17
+MTRR addr 0xa8-0xac set to 0 type @ 18
+MTRR addr 0xac-0xb0 set to 0 type @ 19
+MTRR addr 0xb0-0xb4 set to 0 type @ 20
+MTRR addr 0xb4-0xb8 set to 0 type @ 21
+MTRR addr 0xb8-0xbc set to 0 type @ 22
+MTRR addr 0xbc-0xc0 set to 0 type @ 23
+MTRR addr 0xc0-0xc1 set to 6 type @ 24
+MTRR addr 0xc1-0xc2 set to 6 type @ 25
+MTRR addr 0xc2-0xc3 set to 6 type @ 26
+MTRR addr 0xc3-0xc4 set to 6 type @ 27
+MTRR addr 0xc4-0xc5 set to 6 type @ 28
+MTRR addr 0xc5-0xc6 set to 6 type @ 29
+MTRR addr 0xc6-0xc7 set to 6 type @ 30
+MTRR addr 0xc7-0xc8 set to 6 type @ 31
+MTRR addr 0xc8-0xc9 set to 6 type @ 32
+MTRR addr 0xc9-0xca set to 6 type @ 33
+MTRR addr 0xca-0xcb set to 6 type @ 34
+MTRR addr 0xcb-0xcc set to 6 type @ 35
+MTRR addr 0xcc-0xcd set to 6 type @ 36
+MTRR addr 0xcd-0xce set to 6 type @ 37
+MTRR addr 0xce-0xcf set to 6 type @ 38
+MTRR addr 0xcf-0xd0 set to 6 type @ 39
+MTRR addr 0xd0-0xd1 set to 6 type @ 40
+MTRR addr 0xd1-0xd2 set to 6 type @ 41
+MTRR addr 0xd2-0xd3 set to 6 type @ 42
+MTRR addr 0xd3-0xd4 set to 6 type @ 43
+MTRR addr 0xd4-0xd5 set to 6 type @ 44
+MTRR addr 0xd5-0xd6 set to 6 type @ 45
+MTRR addr 0xd6-0xd7 set to 6 type @ 46
+MTRR addr 0xd7-0xd8 set to 6 type @ 47
+MTRR addr 0xd8-0xd9 set to 6 type @ 48
+MTRR addr 0xd9-0xda set to 6 type @ 49
+MTRR addr 0xda-0xdb set to 6 type @ 50
+MTRR addr 0xdb-0xdc set to 6 type @ 51
+MTRR addr 0xdc-0xdd set to 6 type @ 52
+MTRR addr 0xdd-0xde set to 6 type @ 53
+MTRR addr 0xde-0xdf set to 6 type @ 54
+MTRR addr 0xdf-0xe0 set to 6 type @ 55
+MTRR addr 0xe0-0xe1 set to 6 type @ 56
+MTRR addr 0xe1-0xe2 set to 6 type @ 57
+MTRR addr 0xe2-0xe3 set to 6 type @ 58
+MTRR addr 0xe3-0xe4 set to 6 type @ 59
+MTRR addr 0xe4-0xe5 set to 6 type @ 60
+MTRR addr 0xe5-0xe6 set to 6 type @ 61
+MTRR addr 0xe6-0xe7 set to 6 type @ 62
+MTRR addr 0xe7-0xe8 set to 6 type @ 63
+MTRR addr 0xe8-0xe9 set to 6 type @ 64
+MTRR addr 0xe9-0xea set to 6 type @ 65
+MTRR addr 0xea-0xeb set to 6 type @ 66
+MTRR addr 0xeb-0xec set to 6 type @ 67
+MTRR addr 0xec-0xed set to 6 type @ 68
+MTRR addr 0xed-0xee set to 6 type @ 69
+MTRR addr 0xee-0xef set to 6 type @ 70
+MTRR addr 0xef-0xf0 set to 6 type @ 71
+MTRR addr 0xf0-0xf1 set to 6 type @ 72
+MTRR addr 0xf1-0xf2 set to 6 type @ 73
+MTRR addr 0xf2-0xf3 set to 6 type @ 74
+MTRR addr 0xf3-0xf4 set to 6 type @ 75
+MTRR addr 0xf4-0xf5 set to 6 type @ 76
+MTRR addr 0xf5-0xf6 set to 6 type @ 77
+MTRR addr 0xf6-0xf7 set to 6 type @ 78
+MTRR addr 0xf7-0xf8 set to 6 type @ 79
+MTRR addr 0xf8-0xf9 set to 6 type @ 80
+MTRR addr 0xf9-0xfa set to 6 type @ 81
+MTRR addr 0xfa-0xfb set to 6 type @ 82
+MTRR addr 0xfb-0xfc set to 6 type @ 83
+MTRR addr 0xfc-0xfd set to 6 type @ 84
+MTRR addr 0xfd-0xfe set to 6 type @ 85
+MTRR addr 0xfe-0xff set to 6 type @ 86
+MTRR addr 0xff-0x100 set to 6 type @ 87
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+call enable_fixed_mtrr()
+CPU physical address size: 36 bits
+MTRR: default type WB/UC MTRR counts: 5/3.
+MTRR: UC selected as default type.
+MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
+MTRR: 1 base 0x000000007f800000 mask 0x0000000fff800000 type 0
+MTRR: 2 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+POST: 0x93
+Setting up local APIC... apic_id: 0x00 done.
+POST: 0x9b
+CPU doesn't support VMX; exiting
+CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
+CBFS: Locating 'cmos_layout.bin'
+CBFS: Found @ offset 70c0 size 500
+CPU: 0 2 siblings
+CPU: 0 has sibling 1
+CPU #0 initialized
+CPU1: stack_base 7f7cd000, stack_end 7f7cdff8
+Asserting INIT.
+Waiting for send to finish...
++Deasserting INIT.
+Waiting for send to finish...
++#startup loops: 2.
+Sending STARTUP #1 to 1.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++Sending STARTUP #2 to 1.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++After Startup.
+Initializing CPU #1
+Waiting for 1 CPUS to stop
+CPU: vendor Intel device 6fd
+CPU: family 06, model 0f, stepping 0d
+POST: 0x60
+Enabling cache
+CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
+CBFS: Locating 'cpu_microcode_blob.bin'
+CBFS: 'cpu_microcode_blob.bin' not found.
+CPU: Intel(R) Pentium(R) Dual CPU E2180 @ 2.00GHz.
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+call enable_fixed_mtrr()
+CPU physical address size: 36 bits
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+POST: 0x93
+Setting up local APIC... apic_id: 0x01 done.
+POST: 0x9b
+CPU doesn't support VMX; exiting
+CPU: 1 2 siblings
+CPU #1 initialized
+CPU 1 going down...
+All AP CPUs stopped (10035 loops)
+CPU0: stack: 7f7ce000 - 7f7cf000, lowest used address 7f7ceb30, stack used: 1232 bytes
+CPU1: stack: 7f7cd000 - 7f7ce000, lowest used address 7f7cdcd8, stack used: 808 bytes
+CPU_CLUSTER: 0 init finished in 677047 usecs
+POST: 0x75
+POST: 0x75
+POST: 0x75
+POST: 0x75
+POST: 0x75
+POST: 0x75
+POST: 0x75
+PCI: 00:02.0 init ...
+Initializing VGA without OPROM.
+GMADR = 0xd0000008 GTTADR = 0xe0280000
+EDID:
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+No display connected on slave 3
+mmiobase e0200000 addrport 20a0 physbase 7f800000
+gtt_setup is enabled.
+8M UMA
+PCI: 00:02.0 init finished in 109188 usecs
+POST: 0x75
+PCI: 00:1b.0 init ...
+Azalia: codec type: Azalia
+Azalia: base = e02c0000
+Azalia: codec_mask = 01
+Azalia: Initializing codec #0
+Azalia: codec viddid: 10ec0662
+Azalia: No verb!
+PCI: 00:1b.0 init finished in 18942 usecs
+POST: 0x75
+PCI: 00:1c.0 init ...
+Initializing ICH7 PCIe bridge.
+PCI: 00:1c.0 init finished in 4817 usecs
+POST: 0x75
+PCI: 00:1c.1 init ...
+Initializing ICH7 PCIe bridge.
+PCI: 00:1c.1 init finished in 4818 usecs
+POST: 0x75
+PCI: 00:1d.0 init ...
+UHCI: Setting up controller.. done.
+PCI: 00:1d.0 init finished in 5249 usecs
+POST: 0x75
+PCI: 00:1d.1 init ...
+UHCI: Setting up controller.. done.
+PCI: 00:1d.1 init finished in 5248 usecs
+POST: 0x75
+PCI: 00:1d.2 init ...
+UHCI: Setting up controller.. done.
+PCI: 00:1d.2 init finished in 5250 usecs
+POST: 0x75
+PCI: 00:1d.3 init ...
+UHCI: Setting up controller.. done.
+PCI: 00:1d.3 init finished in 5250 usecs
+POST: 0x75
+PCI: 00:1d.7 init ...
+EHCI: Setting up controller.. done.
+PCI: 00:1d.7 init finished in 5259 usecs
+POST: 0x75
+PCI: 00:1e.0 init ...
+PCI: 00:1e.0 init finished in 2020 usecs
+POST: 0x75
+PCI: 00:1f.0 init ...
+i82801gx: lpc_init
+IOAPIC: Initializing IOAPIC at 0xfec00000
+IOAPIC: Bootstrap Processor Local APIC = 0x00
+IOAPIC: ID = 0x02
+IOAPIC: Dumping registers
+ reg 0x0000: 0x02000000
+ reg 0x0001: 0x00170020
+ reg 0x0002: 0x00170020
+CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
+CBFS: Locating 'cmos_layout.bin'
+CBFS: Found @ offset 70c0 size 500
+WARNING: No CMOS option 'power_on_after_fail'.
+Set power on after power failure.
+CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
+CBFS: Locating 'cmos_layout.bin'
+CBFS: Found @ offset 70c0 size 500
+NMI sources enabled.
+rtc_failed = 0x0
+RTC Init
+Disabling ACPI via APMC:
+done.
+Locking SMM.
+PCI: 00:1f.0 init finished in 63182 usecs
+POST: 0x75
+PCI: 00:1f.1 init ...
+i82801gx_ide: initializing... IDE0
+PCI: 00:1f.1 init finished in 5179 usecs
+POST: 0x75
+PCI: 00:1f.2 init ...
+i82801gx_sata: initializing...
+SATA controller in plain mode.
+PCI: 00:1f.2 init finished in 7614 usecs
+POST: 0x75
+POST: 0x75
+PCI: 01:00.0 init ...
+PCI: 01:00.0 init finished in 2009 usecs
+POST: 0x75
+PCI: 02:00.0 init ...
+PCI: 02:00.0 init finished in 2007 usecs
+POST: 0x75
+PNP: 002e.0 init ...
+PNP: 002e.0 init finished in 1921 usecs
+POST: 0x75
+PNP: 002e.1 init ...
+PNP: 002e.1 init finished in 1921 usecs
+POST: 0x75
+PNP: 002e.2 init ...
+PNP: 002e.2 init finished in 1920 usecs
+POST: 0x75
+PNP: 002e.3 init ...
+PNP: 002e.3 init finished in 1935 usecs
+POST: 0x75
+PNP: 002e.5 init ...
+PNP: 002e.5 init finished in 1922 usecs
+POST: 0x75
+POST: 0x75
+POST: 0x75
+POST: 0x75
+PNP: 002e.9 init ...
+PNP: 002e.9 init finished in 1921 usecs
+POST: 0x75
+PNP: 002e.a init ...
+PNP: 002e.a init finished in 1923 usecs
+POST: 0x75
+PNP: 002e.b init ...
+PNP: 002e.b init finished in 1921 usecs
+POST: 0x75
+PNP: 002e.c init ...
+PNP: 002e.c init finished in 1921 usecs
+POST: 0x75
+PNP: 002e.307 init ...
+PNP: 002e.307 init finished in 2093 usecs
+POST: 0x75
+PNP: 002e.109 init ...
+PNP: 002e.109 init finished in 2096 usecs
+POST: 0x75
+PNP: 002e.209 init ...
+PNP: 002e.209 init finished in 2095 usecs
+POST: 0x75
+PNP: 002e.309 init ...
+PNP: 002e.309 init finished in 2095 usecs
+Devices initialized
+Show all devs... After init.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+APIC: acac: enabled 0
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:01.0: enabled 0
+PCI: 00:02.0: enabled 1
+PCI: 00:1b.0: enabled 1
+PCI: 00:1c.0: enabled 1
+PCI: 00:1c.1: enabled 1
+PCI: 00:1d.0: enabled 1
+PCI: 00:1d.1: enabled 1
+PCI: 00:1d.2: enabled 1
+PCI: 00:1d.3: enabled 1
+PCI: 00:1d.7: enabled 1
+PCI: 00:1e.0: enabled 1
+PCI: 00:1f.0: enabled 1
+PNP: 002e.0: enabled 1
+PNP: 002e.1: enabled 1
+PNP: 002e.2: enabled 1
+PNP: 002e.3: enabled 1
+PNP: 002e.5: enabled 1
+PNP: 002e.6: enabled 0
+PNP: 002e.7: enabled 1
+PNP: 002e.8: enabled 0
+PNP: 002e.9: enabled 1
+PNP: 002e.a: enabled 1
+PNP: 002e.b: enabled 1
+PNP: 002e.c: enabled 1
+PCI: 00:1f.1: enabled 1
+PCI: 00:1f.2: enabled 1
+PCI: 00:1f.3: enabled 1
+PCI: 01:00.0: enabled 1
+PCI: 02:00.0: enabled 1
+PNP: 002e.307: enabled 1
+PNP: 002e.109: enabled 1
+PNP: 002e.209: enabled 1
+PNP: 002e.309: enabled 1
+APIC: 01: enabled 1
+BS: BS_DEV_INIT times (us): entry 0 run 1195437 exit 0
+POST: 0x76
+Finalize devices...
+Devices finalized
+BS: BS_POST_DEVICE times (us): entry 0 run 4558 exit 0
+POST: 0x77
+BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1059 exit 0
+POST: 0x79
+POST: 0x9b
+no IRQ found for PCI: 00:00.0
+fixed IRQ entry for: PCI: 00:02.0: INTA# -> IOAPIC 2 PIN 16
+fixed IRQ entry for: PCI: 00:1b.0: INTA# -> IOAPIC 2 PIN 16
+no IRQ found for PCI: 00:1c.0
+no IRQ found for PCI: 00:1c.1
+fixed IRQ entry for: PCI: 00:1d.0: INTA# -> IOAPIC 2 PIN 16
+fixed IRQ entry for: PCI: 00:1d.1: INTB# -> IOAPIC 2 PIN 17
+fixed IRQ entry for: PCI: 00:1d.2: INTC# -> IOAPIC 2 PIN 18
+fixed IRQ entry for: PCI: 00:1d.3: INTD# -> IOAPIC 2 PIN 19
+fixed IRQ entry for: PCI: 00:1d.7: INTA# -> IOAPIC 2 PIN 16
+no IRQ found for PCI: 00:1e.0
+fixed IRQ entry for: PCI: 00:1f.0: INTA# -> IOAPIC 2 PIN 16
+fixed IRQ entry for: PCI: 00:1f.1: INTB# -> IOAPIC 2 PIN 17
+fixed IRQ entry for: PCI: 00:1f.2: INTC# -> IOAPIC 2 PIN 18
+fixed IRQ entry for: PCI: 00:1f.3: INTD# -> IOAPIC 2 PIN 19
+no IRQ found for PCI: 01:00.0
+no IRQ found for PCI: 02:00.0
+Wrote the mp table end at: 000f0010 - 000f00f4
+MPTABLE len: 244
+no IRQ found for PCI: 00:00.0
+fixed IRQ entry for: PCI: 00:02.0: INTA# -> IOAPIC 2 PIN 16
+fixed IRQ entry for: PCI: 00:1b.0: INTA# -> IOAPIC 2 PIN 16
+no IRQ found for PCI: 00:1c.0
+no IRQ found for PCI: 00:1c.1
+fixed IRQ entry for: PCI: 00:1d.0: INTA# -> IOAPIC 2 PIN 16
+fixed IRQ entry for: PCI: 00:1d.1: INTB# -> IOAPIC 2 PIN 17
+fixed IRQ entry for: PCI: 00:1d.2: INTC# -> IOAPIC 2 PIN 18
+fixed IRQ entry for: PCI: 00:1d.3: INTD# -> IOAPIC 2 PIN 19
+fixed IRQ entry for: PCI: 00:1d.7: INTA# -> IOAPIC 2 PIN 16
+no IRQ found for PCI: 00:1e.0
+fixed IRQ entry for: PCI: 00:1f.0: INTA# -> IOAPIC 2 PIN 16
+fixed IRQ entry for: PCI: 00:1f.1: INTB# -> IOAPIC 2 PIN 17
+fixed IRQ entry for: PCI: 00:1f.2: INTC# -> IOAPIC 2 PIN 18
+fixed IRQ entry for: PCI: 00:1f.3: INTD# -> IOAPIC 2 PIN 19
+no IRQ found for PCI: 01:00.0
+no IRQ found for PCI: 02:00.0
+Wrote the mp table end at: 7f75a010 - 7f75a0f4
+MPTABLE len: 244
+MP table: 244 bytes.
+POST: 0x9c
+CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
+CBFS: Locating 'normal/dsdt.aml'
+CBFS: Found @ offset 9d80 size 2234
+CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
+CBFS: Locating 'normal/slic'
+CBFS: 'normal/slic' not found.
+ACPI: Writing ACPI tables at 7f736000.
+ACPI: * FACS
+ACPI: * DSDT
+ACPI: * FADT
+ACPI: added table 1/32, length now 40
+ACPI: * SSDT
+Found 1 CPU(s) with 2 core(s) each.
+clocks between 1200 and 2000 MHz.
+adding 3 P-States between busratio 6 and a, incl. P0
+PSS: 2000MHz power 35000 control 0xa27 status 0xa27
+PSS: 1600MHz power 30000 control 0x822 status 0x822
+PSS: 1200MHz power 25000 control 0x61d status 0x61d
+clocks between 1200 and 2000 MHz.
+adding 3 P-States between busratio 6 and a, incl. P0
+PSS: 2000MHz power 35000 control 0xa27 status 0xa27
+PSS: 1600MHz power 30000 control 0x822 status 0x822
+PSS: 1200MHz power 25000 control 0x61d status 0x61d
+ACPI: added table 2/32, length now 44
+ACPI: * MCFG
+ACPI: added table 3/32, length now 48
+ACPI: * TCPA
+TCPA log created at 7f726000
+ACPI: added table 4/32, length now 52
+ACPI: * MADT
+ACPI: added table 5/32, length now 56
+current = 7f738920
+ACPI: * HPET
+ACPI: added table 6/32, length now 60
+ACPI: done.
+ACPI tables: 10592 bytes.
+smbios_write_tables: 7f725000
+Root Device (ASUS P5GC-MX)
+CPU_CLUSTER: 0 (Intel i945 Northbridge)
+APIC: 00 (unknown)
+APIC: acac (Intel Penryn CPU)
+DOMAIN: 0000 (Intel i945 Northbridge)
+PCI: 00:00.0 (Intel i945 Northbridge)
+PCI: 00:01.0 (Intel i945 Northbridge)
+PCI: 00:02.0 (Intel i945 Northbridge)
+PCI: 00:1b.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1c.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1c.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.7 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1e.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1f.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PNP: 002e.0 (Winbond W83627DHG Super I/O)
+PNP: 002e.1 (Winbond W83627DHG Super I/O)
+PNP: 002e.2 (Winbond W83627DHG Super I/O)
+PNP: 002e.3 (Winbond W83627DHG Super I/O)
+PNP: 002e.5 (Winbond W83627DHG Super I/O)
+PNP: 002e.6 (Winbond W83627DHG Super I/O)
+PNP: 002e.7 (Winbond W83627DHG Super I/O)
+PNP: 002e.8 (Winbond W83627DHG Super I/O)
+PNP: 002e.9 (Winbond W83627DHG Super I/O)
+PNP: 002e.a (Winbond W83627DHG Super I/O)
+PNP: 002e.b (Winbond W83627DHG Super I/O)
+PNP: 002e.c (Winbond W83627DHG Super I/O)
+PCI: 00:1f.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1f.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1f.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 01:00.0 (unknown)
+PCI: 02:00.0 (unknown)
+PNP: 002e.307 (unknown)
+PNP: 002e.109 (unknown)
+PNP: 002e.209 (unknown)
+PNP: 002e.309 (unknown)
+APIC: 01 (unknown)
+SMBIOS tables: 333 bytes.
+Writing table forward entry at 0x00000500
+Wrote coreboot table at: 00000500, 0x10 bytes, checksum d068
+Writing coreboot table at 0x7f75b000
+CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
+CBFS: Locating 'cmos_layout.bin'
+CBFS: Found @ offset 70c0 size 500
+ 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
+ 1. 0000000000001000-000000000009ffff: RAM
+ 2. 00000000000c0000-000000007f724fff: RAM
+ 3. 000000007f725000-000000007f7fffff: CONFIGURATION TABLES
+ 4. 000000007f800000-000000007fffffff: RESERVED
+ 5. 00000000f0000000-00000000f3ffffff: RESERVED
+CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
+CBFS: Locating 'cmos_layout.bin'
+CBFS: Found @ offset 70c0 size 500
+CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
+FMAP: Found "FLASH" version 1.1 at 700000.
+FMAP: base = ff800000 size = 800000 #areas = 3
+Wrote coreboot table at: 7f75b000, 0x810 bytes, checksum 6f66
+coreboot table: 2088 bytes.
+IMD ROOT 0. 7f7ff000 00001000
+IMD SMALL 1. 7f7fe000 00001000
+CONSOLE 2. 7f7de000 00020000
+TIME STAMP 3. 7f7dd000 00000400
+ROMSTG STCK 4. 7f7d8000 00005000
+RAMSTAGE 5. 7f79d000 0003b000
+57a9e100 6. 7f763000 00039830
+COREBOOT 7. 7f75b000 00008000
+SMP TABLE 8. 7f75a000 00001000
+ACPI 9. 7f736000 00024000
+TCPA LOG 10. 7f726000 00010000
+SMBIOS 11. 7f725000 00000800
+IMD small region:
+ IMD ROOT 0. 7f7fec00 00000400
+ CAR GLOBALS 1. 7f7feac0 00000140
+ ROMSTAGE 2. 7f7feaa0 00000004
+ 57a9e000 3. 7f7fea80 00000010
+ ACPI GNVS 4. 7f7fe980 00000100
+BS: BS_WRITE_TABLES times (us): entry 0 run 583520 exit 0
+POST: 0x7a
+CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
+CBFS: Locating 'normal/payload'
+CBFS: Found @ offset 6cf40 size fda8
+Loading segment from ROM address 0xfff6d068
+ code (compression=1)
+ New segment dstaddr 0xe19c0 memsize 0x1e640 srcaddr 0xfff6d0a0 filesize 0xfd70
+Loading segment from ROM address 0xfff6d084
+ Entry Point 0x000ff06e
+Loading Segment: addr: 0x00000000000e19c0 memsz: 0x000000000001e640 filesz: 0x000000000000fd70
+lb: [0x000000007f79e000, 0x000000007f7d7830)
+Post relocation: addr: 0x00000000000e19c0 memsz: 0x000000000001e640 filesz: 0x000000000000fd70
+using LZMA
+[ 0x000e19c0, 00100000, 0x00100000) <- fff6d0a0
+dest 000e19c0, end 00100000, bouncebuffer ffffffff
+Loaded segments
+BS: BS_PAYLOAD_LOAD times (us): entry 0 run 101831 exit 0
+POST: 0x7b
+ICH7 watchdog disabled
+Jumping to boot code at 000ff06e(7f75b000)
+POST: 0xf8
+CPU0: stack: 7f7ce000 - 7f7cf000, lowest used address 7f7ceb30, stack used: 1232 bytes
+SeaBIOS (version rel-1.10.1-0-g8891697)
+BUILD: gcc: (coreboot toolchain v1.43 August 31st, 2016) 5.3.0 binutils: (GNU Binutils) 2.26.1
+Found coreboot cbmem console @ 7f7de000
+Found mainboard ASUS P5GC-MX
+Relocating init from 0x000e2f40 to 0x7f6d8d00 (size 49760)
+Found CBFS header at 0xfff00138
+multiboot: eax=7f7c9b60, ebx=7f7c9b14
+Found 17 PCI devices (max PCI bus is 03)
+Copying SMBIOS entry point from 0x7f725000 to 0x000f6ac0
+Copying ACPI RSDP from 0x7f736000 to 0x000f6a90
+Copying MPTABLE from 0x7f75a000/7f75a010 to 0x000f6990
+Using pmtimer, ioport 0x508
+Scan for VGA option rom
+Running option rom at c000:0003
+pmm call arg1=0
+Turning on vga text mode console
+SeaBIOS (version rel-1.10.1-0-g8891697)
+EHCI init on dev 00:1d.7 (regs=0xe02c4020)
+/7f6d6000\ Start thread
+UHCI init on dev 00:1d.0 (io=2000)
+/7f6d5000\ Start thread
+UHCI init on dev 00:1d.1 (io=2020)
+/7f6d4000\ Start thread
+/7f6d2000\ Start thread
+/7f6d1000\ Start thread
+UHCI init on dev 00:1d.2 (io=2040)
+/7f6d0000\ Start thread
+/7f6cf000\ Start thread
+/7f6ce000\ Start thread
+/7f6cd000\ Start thread
+/7f6cc000\ Start thread
+UHCI init on dev 00:1d.3 (io=2060)
+/7f6cb000\ Start thread
+/7f6ca000\ Start thread
+/7f6c9000\ Start thread
+/7f6c8000\ Start thread
+/7f6c7000\ Start thread
+/7f6c6000\ Start thread
+/7f6c5000\ Start thread
+ATA controller 1 at 1f0/3f4/0 (irq 14 dev f9)
+/7f6c4000\ Start thread
+\7f6c4000/ End thread
+/7f6c4000\ Start thread
+ATA controller 2 at 170/374/0 (irq 15 dev f9)
+/7f6c3000\ Start thread
+\7f6c3000/ End thread
+|7f6c7000| Got ps2 nak (status=51)
+|7f6c7000| ps2 command 1ff failed (aux=0)
+\7f6c7000/ End thread
+/7f6c7000\ Start thread
+ATA controller 3 at 20b8/20d0/0 (irq 0 dev fa)
+/7f6c3000\ Start thread
+\7f6c3000/ End thread
+/7f6c3000\ Start thread
+ATA controller 4 at 20c0/20d4/0 (irq 0 dev fa)
+/7f6c2000\ Start thread
+\7f6c2000/ End thread
+/7f6c2000\ Start thread
+Found 1 lpt ports
+Found 2 serial ports
+/7f6c1000\ Start thread
+\7f6ce000/ End thread
+\7f6d2000/ End thread
+\7f6cd000/ End thread
+\7f6d1000/ End thread
+\7f6d4000/ End thread
+\7f6d5000/ End thread
+\7f6c9000/ End thread
+\7f6cf000/ End thread
+\7f6c1000/ End thread
+\7f6c2000/ End thread
+\7f6c3000/ End thread
+\7f6c7000/ End thread
+\7f6c4000/ End thread
+\7f6c5000/ End thread
+\7f6c8000/ End thread
+\7f6cc000/ End thread
+\7f6c6000/ End thread
+\7f6ca000/ End thread
+\7f6d0000/ End thread
+\7f6cb000/ End thread
+\7f6d6000/ End thread
+All threads complete.
+Scan for option roms
+Running option rom at c700:0003
+pmm call arg1=1
+pmm call arg1=0
+pmm call arg1=1
+pmm call arg1=0
+Searching bootorder for: /pci@i0cf8/pci-bridge@1c/*@0
+
+Press ESC for boot menu.
+
+Unable to find vesa video mode dimensions 640/480
+failed to find a videomode with 640x480 0bpp (0=any).
+Searching bootorder for: HALT
+Space available for UMB: c8000-ec800, f62e0-f6910
+Returned 262144 bytes of ZoneHigh
+e820 map has 6 items:
+ 0: 0000000000000000 - 000000000009fc00 = 1 RAM
+ 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
+ 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
+ 3: 0000000000100000 - 000000007f725000 = 1 RAM
+ 4: 000000007f725000 - 0000000080000000 = 2 RESERVED
+ 5: 00000000f0000000 - 00000000f4000000 = 2 RESERVED
+enter handle_19:
+ NULL
+Booting from ROM...
+Booting from c700:0373
+