lenovo/t430s/4.0-8022-gc355306/2015-02-04T13:22:58Z
diff --git a/lenovo/t430s/4.0-8022-gc355306/2015-02-04T13:22:58Z/coreboot_console.txt b/lenovo/t430s/4.0-8022-gc355306/2015-02-04T13:22:58Z/coreboot_console.txt
new file mode 100644
index 0000000..9c60cc0
--- /dev/null
+++ b/lenovo/t430s/4.0-8022-gc355306/2015-02-04T13:22:58Z/coreboot_console.txt
@@ -0,0 +1,1225 @@
+
+
+coreboot-4.0-7962-g29445dc-dirty Sat Jan 24 03:51:17 CET 2015 starting...
+Setting up static southbridge registers... done.
+Disabling Watchdog reboot... done.
+Setting up static northbridge registers... done.
+Initializing Graphics...
+Back from sandybridge_early_initialization()
+Resume from S3 detected.
+SMBus controller enabled.
+CPU id(306a9): Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz
+AES supported, TXT supported, VT supported
+PCH type: QM77, device id: 1e55, rev id 4
+Intel ME early init
+Intel ME firmware is ready
+ME: Requested 16MB UMA
+Starting native Platform init
+find_current_mrc_cache_local: picked entry 2 from cache block
+ PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy... PLL busy...done
+MCU frequency is set at : 800 MHz
+[c14] = 3000000
+[320c] = 4024000
+[d14] = 3000000
+[330c] = 4024000
+[4000] = 1c8bbb
+[4004] = cc186465
+[400c] = a08b4
+[4298] = 6c801860
+[42a4] = 41f88200
+[4400] = 1c8bbb
+[4404] = cc186465
+[440c] = a08b4
+[4698] = 6c801860
+[46a4] = 41f88200
+Done dimm mapping
+PCI:[a0] = 0
+PCI:[a4] = 2
+PCI:[bc] = c2a00000
+PCI:[a8] = 3c600000
+PCI:[ac] = 2
+PCI:[b8] = c0000000
+PCI:[b0] = c0a00000
+PCI:[b4] = c0800000
+PCI:[7c] = 7f
+PCI:[70] = ff000000
+PCI:[74] = 1
+PCI:[78] = ff000c00
+Done memory map
+RCOMP...done
+COMP2 done
+COMP1 done
+FORCE RCOMP and wait 20us...done
+Done io registers
+t123: 1767, 6000, 7620
+ME: FW Partition Table : OK
+ME: Bringup Loader Failure : NO
+ME: Firmware Init Complete : NO
+ME: Manufacturing Mode : NO
+ME: Boot Options Present : NO
+ME: Update In Progress : NO
+ME: Current Working State : Normal
+ME: Current Operation State : Bring up
+ME: Current Operation Mode : Normal
+ME: Error Code : No Error
+ME: Progress Phase : BUP Phase
+ME: Power Management Event : Clean Moff->Mx wake
+ME: Progress Phase State : Waiting for DID BIOS message
+ME: FWS2: 0x101f0106
+ME: Bist in progress: 0x0
+ME: ICC Status : 0x3
+ME: Invoke MEBx : 0x0
+ME: CPU replaced : 0x0
+ME: MBP ready : 0x0
+ME: MFS failure : 0x0
+ME: Warm reset req : 0x0
+ME: CPU repl valid : 0x1
+ME: (Reserved) : 0x0
+ME: FW update req : 0x0
+ME: (Reserved) : 0x0
+ME: Current state : 0x1f
+ME: Current PM event: 0x0
+ME: Progress code : 0x1
+PASSED! Tell ME that DRAM is ready
+ME: FWS2: 0x10320106
+ME: Bist in progress: 0x0
+ME: ICC Status : 0x3
+ME: Invoke MEBx : 0x0
+ME: CPU replaced : 0x0
+ME: MBP ready : 0x0
+ME: MFS
+
+*** Log truncated, 1307 characters dropped. ***
+
+Trying CBFS ramstage loader.
+CBFS: loading stage fallback/ramstage @ 0x100000 (385076 bytes), entry @ 0x100000
+coreboot-4.0-7962-g29445dc-dirty Sat Jan 24 03:51:17 CET 2015 booting...
+BS: Entering BS_PRE_DEVICE state.
+CBMEM: recovering 13/254 entries from root @ bffff000
+ok
+BS: Exiting BS_PRE_DEVICE state.
+BS: BS_PRE_DEVICE times (us): entry 15 run 12 exit 0
+BS: Entering BS_DEV_INIT_CHIPS state.
+BS: Exiting BS_DEV_INIT_CHIPS state.
+BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 15 exit 0
+BS: Entering BS_DEV_ENUMERATE state.
+Enumerating buses...
+Show all devs...Before device enumeration.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+APIC: acac: enabled 0
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:01.0: enabled 0
+PCI: 00:02.0: enabled 1
+PCI: 00:14.0: enabled 1
+PCI: 00:16.0: enabled 0
+PCI: 00:16.1: enabled 0
+PCI: 00:16.2: enabled 0
+PCI: 00:16.3: enabled 0
+PCI: 00:19.0: enabled 1
+PCI: 00:1a.0: enabled 1
+PCI: 00:1b.0: enabled 1
+PCI: 00:1c.0: enabled 1
+PCI: 00:1c.1: enabled 1
+PCI: 00:1c.2: enabled 1
+PCI: 00:1c.3: enabled 0
+PCI: 00:1c.4: enabled 0
+PCI: 00:1c.5: enabled 0
+PCI: 00:1c.6: enabled 0
+PCI: 00:1c.7: enabled 0
+PCI: 00:1d.0: enabled 1
+PCI: 00:1e.0: enabled 0
+PCI: 00:1f.0: enabled 1
+PNP: 00ff.1: enabled 1
+PNP: 00ff.2: enabled 1
+PCI: 00:1f.2: enabled 1
+PCI: 00:1f.3: enabled 1
+I2C: 00:54: enabled 1
+I2C: 00:55: enabled 1
+I2C: 00:56: enabled 1
+I2C: 00:57: enabled 1
+I2C: 00:5c: enabled 1
+I2C: 00:5d: enabled 1
+I2C: 00:5e: enabled 1
+I2C: 00:5f: enabled 1
+PCI: 00:1f.5: enabled 0
+PCI: 00:1f.6: enabled 1
+Compare with tree...
+Root Device: enabled 1
+ CPU_CLUSTER: 0: enabled 1
+ APIC: 00: enabled 1
+ APIC: acac: enabled 0
+ DOMAIN: 0000: enabled 1
+ PCI: 00:00.0: enabled 1
+ PCI: 00:01.0: enabled 0
+ PCI: 00:02.0: enabled 1
+ PCI: 00:14.0: enabled 1
+ PCI: 00:16.0: enabled 0
+ PCI: 00:16.1: enabled 0
+ PCI: 00:16.2: enabled 0
+ PCI: 00:16.3: enabled 0
+ PCI: 00:19.0: enabled 1
+ PCI: 00:1a.0: enabled 1
+ PCI: 00:1b.0: enabled 1
+ PCI: 00:1c.0: enabled 1
+ PCI: 00:1c.1: enabled 1
+ PCI: 00:1c.2: enabled 1
+ PCI: 00:1c.3: enabled 0
+ PCI: 00:1c.4: enabled 0
+ PCI: 00:1c.5: enabled 0
+ PCI: 00:1c.6: enabled 0
+ PCI: 00:1c.7: enabled 0
+ PCI: 00:1d.0: enabled 1
+ PCI: 00:1e.0: enabled 0
+ PCI: 00:1f.0: enabled 1
+ PNP: 00ff.1: enabled 1
+ PNP: 00ff.2: enabled 1
+ PCI: 00:1f.2: enabled 1
+ PCI: 00:1f.3: enabled 1
+ I2C: 00:54: enabled 1
+ I2C: 00:55: enabled 1
+ I2C: 00:56: enabled 1
+ I2C: 00:57: enabled 1
+ I2C: 00:5c: enabled 1
+ I2C: 00:5d: enabled 1
+ I2C: 00:5e: enabled 1
+ I2C: 00:5f: enabled 1
+ PCI: 00:1f.5: enabled 0
+ PCI: 00:1f.6: enabled 1
+scan_static_bus for Root Device
+CPU_CLUSTER: 0 enabled
+DOMAIN: 0000 enabled
+DOMAIN: 0000 scanning...
+PCI: pci_scan_bus for bus 00
+PCI: 00:00.0 [8086/0154] ops
+S3 Resume.
+PCI: 00:00.0 [8086/0154] enabled
+PCI: 00:02.0 [8086/0000] ops
+PCI: 00:02.0 [8086/0166] enabled
+PCI: 00:14.0 [8086/0000] ops
+PCI: 00:14.0 [8086/1e31] enabled
+PCI: 00:16.0: Disabling device
+PCI: 00:16.0 [8086/1e3a] bus ops
+PCI: 00:16.0 [8086/1e3a] disabled
+PCI: 00:16.1: Disabling device
+PCI: 00:16.2: Disabling device
+PCI: 00:16.3: Disabling device
+PCI: 00:19.0 [8086/1502] enabled
+PCI: 00:1a.0 [8086/0000] ops
+PCI: 00:1a.0 [8086/1e2d] enabled
+PCI: 00:1b.0 [8086/0000] ops
+PCI: 00:1b.0 [8086/1e20] enabled
+PCH: PCIe Root Port coalescing is enabled
+PCI: 00:1c.0 [8086/0000] bus ops
+PCI: 00:1c.0 [8086/1e10] enabled
+PCI: 00:1c.1 [8086/0000] bus ops
+PCI: 00:1c.1 [8086/1e12] enabled
+PCI: 00:1c.2 [8086/0000] bus ops
+PCI: 00:1c.2 [8086/1e14] enabled
+PCI: 00:1c.3: Disabling device
+PCI: 00:1c.4: Disabling device
+PCI: 00:1c.4: check set enabled
+PCI: 00:1c.5: Disabling device
+PCI: 00:1c.6: Disabling device
+PCI: 00:1c.7: Disabling device
+PCH: RPFN 0x76543210 -> 0xfedcb210
+PCI: 00:1d.0 [8086/0000] ops
+PCI: 00:1d.0 [8086/1e26] enabled
+PCI: 00:1e.0: Disabling device
+PCI: 00:1f.0 [8086/0000] bus ops
+PCI: 00:1f.0 [8086/1e55] enabled
+PCI: 00:1f.2 [8086/0000] ops
+PCI: 00:1f.2 [8086/1e01] enabled
+PCI: 00:1f.3 [8086/0000] bus ops
+PCI: 00:1f.3 [8086/1e22] enabled
+PCI: 00:1f.5: Disabling device
+PCI: Static device PCI: 00:1f.6 not found, disabling it.
+do_pci_scan_bridge for PCI: 00:1c.0
+PCI: pci_scan_bus for bus 01
+PCI: pci_scan_bus returning with max=001
+do_pci_scan_bridge returns max 1
+do_pci_scan_bridge for PCI: 00:1c.1
+PCI: pci_scan_bus for bus 02
+PCI: 02:00.0 [8086/0000] ops
+PCI: 02:00.0 [8086/0085] enabled
+PCI: pci_scan_bus returning with max=002
+Capability: type 0x01 @ 0xc8
+Capability: type 0x05 @ 0xd0
+Capability: type 0x10 @ 0xe0
+Capability: type 0x10 @ 0x40
+Enabling Common Clock Configuration
+ASPM: Enabled L1
+do_pci_scan_bridge returns max 2
+do_pci_scan_bridge for PCI: 00:1c.2
+PCI: pci_scan_bus for bus 03
+PCI: 03:00.0 [1180/e823] enabled
+PCI: pci_scan_bus returning with max=003
+Capability: type 0x05 @ 0x50
+Capability: type 0x01 @ 0x78
+Capability: type 0x10 @ 0x80
+Capability: type 0x10 @ 0x40
+Enabling Common Clock Configuration
+ASPM: Enabled L0s and L1
+do_pci_scan_bridge returns max 3
+scan_static_bus for PCI: 00:1f.0
+PNP: 00ff.1 enabled
+recv_ec_data: 0x47
+recv_ec_data: 0x37
+recv_ec_data: 0x48
+recv_ec_data: 0x54
+recv_ec_data: 0x33
+recv_ec_data: 0x39
+recv_ec_data: 0x57
+recv_ec_data: 0x57
+recv_ec_data: 0x16
+recv_ec_data: 0x03
+recv_ec_data: 0x50
+recv_ec_data: 0x11
+EC Firmware ID G7HT39WW-3.22, Version 5.01B
+recv_ec_data: 0x70
+recv_ec_data: 0x90
+recv_ec_data: 0x70
+recv_ec_data: 0x70
+recv_ec_data: 0x00
+recv_ec_data: 0xa7
+recv_ec_data: 0xe2
+recv_ec_data: 0x70
+PNP: 00ff.2 enabled
+scan_static_bus for PCI: 00:1f.0 done
+scan_static_bus for PCI: 00:1f.3
+smbus: PCI: 00:1f.3[0]->I2C: 01:54 enabled
+smbus: PCI: 00:1f.3[0]->I2C: 01:55 enabled
+smbus: PCI: 00:1f.3[0]->I2C: 01:56 enabled
+smbus: PCI: 00:1f.3[0]->I2C: 01:57 enabled
+smbus: PCI: 00:1f.3[0]->I2C: 01:5c enabled
+smbus: PCI: 00:1f.3[0]->I2C: 01:5d enabled
+smbus: PCI: 00:1f.3[0]->I2C: 01:5e enabled
+smbus: PCI: 00:1f.3[0]->I2C: 01:5f enabled
+scan_static_bus for PCI: 00:1f.3 done
+PCI: pci_scan_bus returning with max=003
+scan_static_bus for Root Device done
+done
+BS: Exiting BS_DEV_ENUMERATE state.
+BS: BS_DEV_ENUMERATE times (us): entry 0 run 7062 exit 0
+BS: Entering BS_DEV_RESOURCES state.
+found VGA at PCI: 00:02.0
+Setting up VGA for PCI: 00:02.0
+Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
+Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
+Allocating resources...
+Reading resources...
+Root Device read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0
+APIC: 00 missing read_resources
+CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0
+Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
+PCI: 00:1c.0 read_resources bus 1 link: 0
+PCI: 00:1c.0 read_resources bus 1 link: 0 done
+PCI: 00:1c.1 read_resources bus 2 link: 0
+PCI: 00:1c.1 read_resources bus 2 link: 0 done
+PCI: 00:1c.2 read_resources bus 3 link: 0
+PCI: 00:1c.2 read_resources bus 3 link: 0 done
+PCI: 00:1f.0 read_resources bus 0 link: 0
+PNP: 00ff.1 missing read_resources
+PNP: 00ff.2 missing read_resources
+PCI: 00:1f.0 read_resources bus 0 link: 0 done
+PCI: 00:1f.3 read_resources bus 1 link: 0
+PCI: 00:1f.3 read_resources bus 1 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0 done
+Root Device read_resources bus 0 link: 0 done
+Done reading resources.
+Show resources in subtree (Root Device)...After reading.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ APIC: acac
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
+ PCI: 00:00.0
+ PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf
+ PCI: 00:01.0
+ PCI: 00:02.0
+ PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
+ PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
+ PCI: 00:14.0
+ PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:16.0
+ PCI: 00:16.1
+ PCI: 00:16.2
+ PCI: 00:16.3
+ PCI: 00:19.0
+ PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
+ PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
+ PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
+ PCI: 00:1a.0
+ PCI: 00:1a.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10
+ PCI: 00:1b.0
+ PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:1c.0
+ PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 00:1c.1 child on link 0 PCI: 02:00.0
+ PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 02:00.0
+ PCI: 02:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:1c.2 child on link 0 PCI: 03:00.0
+ PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 03:00.0
+ PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
+Unknown device path type: 0
+
+Unknown device path type: 0
+ resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10
+Unknown device path type: 0
+ resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14
+Unknown device path type: 0
+ resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18
+ PCI: 00:1c.3
+ PCI: 00:1c.4
+ PCI: 00:1c.5
+ PCI: 00:1c.6
+ PCI: 00:1c.7
+ PCI: 00:1d.0
+ PCI: 00:1d.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10
+ PCI: 00:1e.0
+ PCI: 00:1f.0 child on link 0 PNP: 00ff.1
+ PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+ PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
+ PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
+ PNP: 00ff.1
+ PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
+ PNP: 00ff.2
+ PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
+ PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
+ PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
+ PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
+ PCI: 00:1f.2
+ PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
+ PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
+ PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
+ PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
+ PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1f.2 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 24
+ PCI: 00:1f.3 child on link 0 I2C: 01:54
+ PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
+ PCI: 00:1f.3 resource base 0 size 100 align 8 gran 8 limit ffffffffffffffff flags 201 index 10
+ I2C: 01:54
+ I2C: 01:55
+ I2C: 01:56
+ I2C: 01:57
+ I2C: 01:5c
+ I2C: 01:5d
+ I2C: 01:5e
+ I2C: 01:5f
+ PCI: 00:1f.5
+ PCI: 00:1f.6
+DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
+PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+Unknown device path type: 0
+ 18 * [0x0 - 0xfff] io
+PCI: 00:1c.2 compute_resources_io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.2 1c * [0x0 - 0xfff] io
+PCI: 00:02.0 20 * [0x1000 - 0x103f] io
+PCI: 00:19.0 18 * [0x1040 - 0x105f] io
+PCI: 00:1f.2 20 * [0x1060 - 0x107f] io
+PCI: 00:1f.2 10 * [0x1080 - 0x1087] io
+PCI: 00:1f.2 18 * [0x1088 - 0x108f] io
+PCI: 00:1f.2 14 * [0x1090 - 0x1093] io
+PCI: 00:1f.2 1c * [0x1094 - 0x1097] io
+DOMAIN: 0000 compute_resources_io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done
+DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
+PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 02:00.0 10 * [0x0 - 0x1fff] mem
+PCI: 00:1c.1 compute_resources_mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+Unknown device path type: 0
+ 14 * [0x0 - 0x7fffff] prefmem
+PCI: 00:1c.2 compute_resources_prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done
+PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+Unknown device path type: 0
+ 10 * [0x0 - 0x7fffff] mem
+PCI: 03:00.0 10 * [0x800000 - 0x8000ff] mem
+PCI: 00:1c.2 compute_resources_mem: base: 800100 size: 900000 align: 22 gran: 20 limit: ffffffff done
+PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
+PCI: 00:1c.2 20 * [0x10000000 - 0x108fffff] mem
+PCI: 00:1c.2 24 * [0x10c00000 - 0x113fffff] prefmem
+PCI: 00:02.0 10 * [0x11400000 - 0x117fffff] mem
+PCI: 00:1c.1 20 * [0x11800000 - 0x118fffff] mem
+PCI: 00:19.0 10 * [0x11900000 - 0x1191ffff] mem
+PCI: 00:14.0 10 * [0x11920000 - 0x1192ffff] mem
+PCI: 00:1b.0 10 * [0x11930000 - 0x11933fff] mem
+PCI: 00:19.0 14 * [0x11934000 - 0x11934fff] mem
+PCI: 00:1f.2 24 * [0x11935000 - 0x119357ff] mem
+PCI: 00:1a.0 10 * [0x11935800 - 0x11935bff] mem
+PCI: 00:1d.0 10 * [0x11935c00 - 0x11935fff] mem
+PCI: 00:1f.3 10 * [0x11936000 - 0x119360ff] mem
+DOMAIN: 0000 compute_resources_mem: base: 11936100 size: 11936100 align: 28 gran: 0 limit: ffffffff done
+avoid_fixed_resources: DOMAIN: 0000
+avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
+constrain_resources: DOMAIN: 0000
+constrain_resources: PCI: 00:00.0
+constrain_resources: PCI: 00:02.0
+constrain_resources: PCI: 00:14.0
+constrain_resources: PCI: 00:19.0
+constrain_resources: PCI: 00:1a.0
+constrain_resources: PCI: 00:1b.0
+constrain_resources: PCI: 00:1c.0
+constrain_resources: PCI: 00:1c.1
+constrain_resources: PCI: 02:00.0
+constrain_resources: PCI: 00:1c.2
+constrain_resources: PCI: 03:00.0
+Unknown device path type: 0
+constrain_resources:
+constrain_resources: PCI: 00:1d.0
+constrain_resources: PCI: 00:1f.0
+constrain_resources: PNP: 00ff.1
+constrain_resources: PNP: 00ff.2
+skipping PNP: 00ff.2@60 fixed resource, size=0!
+skipping PNP: 00ff.2@62 fixed resource, size=0!
+skipping PNP: 00ff.2@64 fixed resource, size=0!
+skipping PNP: 00ff.2@66 fixed resource, size=0!
+constrain_resources: PCI: 00:1f.2
+constrain_resources: PCI: 00:1f.3
+constrain_resources: I2C: 01:54
+constrain_resources: I2C: 01:55
+constrain_resources: I2C: 01:56
+constrain_resources: I2C: 01:57
+constrain_resources: I2C: 01:5c
+constrain_resources: I2C: 01:5d
+constrain_resources: I2C: 01:5e
+constrain_resources: I2C: 01:5f
+avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff
+ lim->base 0000167c lim->limit 0000ffff
+avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff
+ lim->base 00000000 lim->limit efffffff
+Setting resources...
+DOMAIN: 0000 allocate_resources_io: base:167c size:1098 align:12 gran:0 limit:ffff
+Assigned: PCI: 00:1c.2 1c * [0x2000 - 0x2fff] io
+Assigned: PCI: 00:02.0 20 * [0x3000 - 0x303f] io
+Assigned: PCI: 00:19.0 18 * [0x3040 - 0x305f] io
+Assigned: PCI: 00:1f.2 20 * [0x3060 - 0x307f] io
+Assigned: PCI: 00:1f.2 10 * [0x3080 - 0x3087] io
+Assigned: PCI: 00:1f.2 18 * [0x3088 - 0x308f] io
+Assigned: PCI: 00:1f.2 14 * [0x3090 - 0x3093] io
+Assigned: PCI: 00:1f.2 1c * [0x3094 - 0x3097] io
+DOMAIN: 0000 allocate_resources_io: next_base: 3098 size: 1098 align: 12 gran: 0 done
+PCI: 00:1c.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:1c.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
+PCI: 00:1c.1 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:1c.1 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
+PCI: 00:1c.2 allocate_resources_io: base:2000 size:1000 align:12 gran:12 limit:ffff
+Unknown device path type: 0
+Assigned: 18 * [0x2000 - 0x2fff] io
+PCI: 00:1c.2 allocate_resources_io: next_base: 3000 size: 1000 align: 12 gran: 12 done
+DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:11936100 align:28 gran:0 limit:efffffff
+Assigned: PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem
+Assigned: PCI: 00:1c.2 20 * [0xe0000000 - 0xe08fffff] mem
+Assigned: PCI: 00:1c.2 24 * [0xe0c00000 - 0xe13fffff] prefmem
+Assigned: PCI: 00:02.0 10 * [0xe1400000 - 0xe17fffff] mem
+Assigned: PCI: 00:1c.1 20 * [0xe1800000 - 0xe18fffff] mem
+Assigned: PCI: 00:19.0 10 * [0xe1900000 - 0xe191ffff] mem
+Assigned: PCI: 00:14.0 10 * [0xe1920000 - 0xe192ffff] mem
+Assigned: PCI: 00:1b.0 10 * [0xe1930000 - 0xe1933fff] mem
+Assigned: PCI: 00:19.0 14 * [0xe1934000 - 0xe1934fff] mem
+Assigned: PCI: 00:1f.2 24 * [0xe1935000 - 0xe19357ff] mem
+Assigned: PCI: 00:1a.0 10 * [0xe1935800 - 0xe1935bff] mem
+Assigned: PCI: 00:1d.0 10 * [0xe1935c00 - 0xe1935fff] mem
+Assigned: PCI: 00:1f.3 10 * [0xe1936000 - 0xe19360ff] mem
+DOMAIN: 0000 allocate_resources_mem: next_base: e1936100 size: 11936100 align: 28 gran: 0 done
+PCI: 00:1c.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.0 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.0 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.1 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.1 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.1 allocate_resources_mem: base:e1800000 size:100000 align:20 gran:20 limit:efffffff
+Assigned: PCI: 02:00.0 10 * [0xe1800000 - 0xe1801fff] mem
+PCI: 00:1c.1 allocate_resources_mem: next_base: e1802000 size: 100000 align: 20 gran: 20 done
+PCI: 00:1c.2 allocate_resources_prefmem: base:e0c00000 size:800000 align:22 gran:20 limit:efffffff
+Unknown device path type: 0
+Assigned: 14 * [0xe0c00000 - 0xe13fffff] prefmem
+PCI: 00:1c.2 allocate_resources_prefmem: next_base: e1400000 size: 800000 align: 22 gran: 20 done
+PCI: 00:1c.2 allocate_resources_mem: base:e0000000 size:900000 align:22 gran:20 limit:efffffff
+Unknown device path type: 0
+Assigned: 10 * [0xe0000000 - 0xe07fffff] mem
+Assigned: PCI: 03:00.0 10 * [0xe0800000 - 0xe08000ff] mem
+PCI: 00:1c.2 allocate_resources_mem: next_base: e0800100 size: 900000 align: 22 gran: 20 done
+Root Device assign_resources, bus 0 link: 0
+TOUUD 0x23c600000 TOLUD 0xc2a00000 TOM 0x200000000
+MEBASE 0x1ff000000
+IGD decoded, subtracting 32M UMA and 2M GTT
+TSEG base 0xc0000000 size 8M
+Available memory below 4GB: 3072M
+Available memory above 4GB: 5062M
+Adding PCIe config bar base=0xf0000000 size=0x4000000
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+PCI: 00:00.0 cf <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem<mmconfig>
+PCI: 00:02.0 10 <- [0x00e1400000 - 0x00e17fffff] size 0x00400000 gran 0x16 mem64
+PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
+PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io
+PCI: 00:14.0 10 <- [0x00e1920000 - 0x00e192ffff] size 0x00010000 gran 0x10 mem64
+PCI: 00:19.0 10 <- [0x00e1900000 - 0x00e191ffff] size 0x00020000 gran 0x11 mem
+PCI: 00:19.0 14 <- [0x00e1934000 - 0x00e1934fff] size 0x00001000 gran 0x0c mem
+PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io
+PCI: 00:1a.0 10 <- [0x00e1935800 - 0x00e1935bff] size 0x00000400 gran 0x0a mem
+PCI: 00:1b.0 10 <- [0x00e1930000 - 0x00e1933fff] size 0x00004000 gran 0x0e mem64
+PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
+PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
+PCI: 00:1c.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 mem
+PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
+PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem
+PCI: 00:1c.1 20 <- [0x00e1800000 - 0x00e18fffff] size 0x00100000 gran 0x14 bus 02 mem
+PCI: 00:1c.1 assign_resources, bus 2 link: 0
+PCI: 02:00.0 10 <- [0x00e1800000 - 0x00e1801fff] size 0x00002000 gran 0x0d mem64
+PCI: 00:1c.1 assign_resources, bus 2 link: 0
+PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io
+PCI: 00:1c.2 24 <- [0x00e0c00000 - 0x00e13fffff] size 0x00800000 gran 0x14 bus 03 prefmem
+PCI: 00:1c.2 20 <- [0x00e0000000 - 0x00e08fffff] size 0x00900000 gran 0x14 bus 03 mem
+PCI: 00:1c.2 assign_resources, bus 3 link: 0
+PCI: 03:00.0 10 <- [0x00e0800000 - 0x00e08000ff] size 0x00000100 gran 0x08 mem
+Unknown device path type: 0
+ missing set_resources
+PCI: 00:1c.2 assign_resources, bus 3 link: 0
+PCI: 00:1d.0 10 <- [0x00e1935c00 - 0x00e1935fff] size 0x00000400 gran 0x0a mem
+PCI: 00:1f.0 assign_resources, bus 0 link: 0
+PNP: 00ff.1 missing set_resources
+PNP: 00ff.2 missing set_resources
+PCI: 00:1f.0 assign_resources, bus 0 link: 0
+PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io
+PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io
+PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io
+PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io
+PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io
+PCI: 00:1f.2 24 <- [0x00e1935000 - 0x00e19357ff] size 0x00000800 gran 0x0b mem
+PCI: 00:1f.3 10 <- [0x00e1936000 - 0x00e19360ff] size 0x00000100 gran 0x08 mem64
+PCI: 00:1f.3 assign_resources, bus 1 link: 0
+PCI: 00:1f.3 assign_resources, bus 1 link: 0
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+Root Device assign_resources, bus 0 link: 0
+Done setting resources.
+Show resources in subtree (Root Device)...After assigning values.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ APIC: acac
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 167c size 1098 align 12 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base d0000000 size 11936100 align 28 gran 0 limit efffffff flags 40040200 index 10000100
+ DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
+ DOMAIN: 0000 resource base 100000 size bff00000 align 0 gran 0 limit 0 flags e0004200 index 4
+ DOMAIN: 0000 resource base 100000000 size 13c600000 align 0 gran 0 limit 0 flags e0004200 index 5
+ DOMAIN: 0000 resource base c0000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
+ DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7
+ DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 8
+ DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 9
+ DOMAIN: 0000 resource base 20000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index a
+ DOMAIN: 0000 resource base 40000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index b
+ PCI: 00:00.0
+ PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf
+ PCI: 00:01.0
+ PCI: 00:02.0
+ PCI: 00:02.0 resource base e1400000 size 400000 align 22 gran 22 limit efffffff flags 60000201 index 10
+ PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18
+ PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit ffff flags 60000100 index 20
+ PCI: 00:14.0
+ PCI: 00:14.0 resource base e1920000 size 10000 align 16 gran 16 limit efffffff flags 60000201 index 10
+ PCI: 00:16.0
+ PCI: 00:16.1
+ PCI: 00:16.2
+ PCI: 00:16.3
+ PCI: 00:19.0
+ PCI: 00:19.0 resource base e1900000 size 20000 align 17 gran 17 limit efffffff flags 60000200 index 10
+ PCI: 00:19.0 resource base e1934000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 14
+ PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit ffff flags 60000100 index 18
+ PCI: 00:1a.0
+ PCI: 00:1a.0 resource base e1935800 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10
+ PCI: 00:1b.0
+ PCI: 00:1b.0 resource base e1930000 size 4000 align 14 gran 14 limit efffffff flags 60000201 index 10
+ PCI: 00:1c.0
+ PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20
+ PCI: 00:1c.1 child on link 0 PCI: 02:00.0
+ PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1c.1 resource base e1800000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20
+ PCI: 02:00.0
+ PCI: 02:00.0 resource base e1800000 size 2000 align 13 gran 13 limit efffffff flags 60000201 index 10
+ PCI: 00:1c.2 child on link 0 PCI: 03:00.0
+ PCI: 00:1c.2 resource base 2000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1c.2 resource base e0c00000 size 800000 align 22 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1c.2 resource base e0000000 size 900000 align 22 gran 20 limit efffffff flags 60080202 index 20
+ PCI: 03:00.0
+ PCI: 03:00.0 resource base e0800000 size 100 align 8 gran 8 limit efffffff flags 60000200 index 10
+Unknown device path type: 0
+
+Unknown device path type: 0
+ resource base e0000000 size 800000 align 22 gran 22 limit efffffff flags 40000200 index 10
+Unknown device path type: 0
+ resource base e0c00000 size 800000 align 22 gran 22 limit efffffff flags 40001200 index 14
+Unknown device path type: 0
+ resource base 2000 size 1000 align 12 gran 12 limit ffff flags 40000100 index 18
+ PCI: 00:1c.3
+ PCI: 00:1c.4
+ PCI: 00:1c.5
+ PCI: 00:1c.6
+ PCI: 00:1c.7
+ PCI: 00:1d.0
+ PCI: 00:1d.0 resource base e1935c00 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10
+ PCI: 00:1e.0
+ PCI: 00:1f.0 child on link 0 PNP: 00ff.1
+ PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+ PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
+ PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
+ PNP: 00ff.1
+ PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
+ PNP: 00ff.2
+ PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
+ PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
+ PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
+ PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
+ PCI: 00:1f.2
+ PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
+ PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
+ PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
+ PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
+ PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
+ PCI: 00:1f.2 resource base e1935000 size 800 align 11 gran 11 limit efffffff flags 60000200 index 24
+ PCI: 00:1f.3 child on link 0 I2C: 01:54
+ PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
+ PCI: 00:1f.3 resource base e1936000 size 100 align 8 gran 8 limit efffffff flags 60000201 index 10
+ I2C: 01:54
+ I2C: 01:55
+ I2C: 01:56
+ I2C: 01:57
+ I2C: 01:5c
+ I2C: 01:5d
+ I2C: 01:5e
+ I2C: 01:5f
+ PCI: 00:1f.5
+ PCI: 00:1f.6
+Done allocating resources.
+BS: Exiting BS_DEV_RESOURCES state.
+BS: BS_DEV_RESOURCES times (us): entry 0 run 10547 exit 0
+BS: Entering BS_DEV_ENABLE state.
+Enabling resources...
+PCI: 00:00.0 subsystem <- 17aa/21fb
+PCI: 00:00.0 cmd <- 06
+PCI: 00:02.0 subsystem <- 17aa/21fb
+PCI: 00:02.0 cmd <- 03
+PCI: 00:14.0 subsystem <- 17aa/21fb
+PCI: 00:14.0 cmd <- 102
+PCI: 00:19.0 subsystem <- 17aa/21f3
+PCI: 00:19.0 cmd <- 103
+PCI: 00:1a.0 subsystem <- 17aa/21fb
+PCI: 00:1a.0 cmd <- 102
+PCI: 00:1b.0 subsystem <- 17aa/21fb
+PCI: 00:1b.0 cmd <- 102
+PCI: 00:1c.0 bridge ctrl <- 0003
+PCI: 00:1c.0 subsystem <- 17aa/21fb
+PCI: 00:1c.0 cmd <- 100
+PCI: 00:1c.1 bridge ctrl <- 0003
+PCI: 00:1c.1 subsystem <- 17aa/21fb
+PCI: 00:1c.1 cmd <- 106
+PCI: 00:1c.2 bridge ctrl <- 0003
+PCI: 00:1c.2 subsystem <- 17aa/21fb
+PCI: 00:1c.2 cmd <- 107
+PCI: 00:1d.0 subsystem <- 17aa/21fb
+PCI: 00:1d.0 cmd <- 102
+pch_decode_init
+PCI: 00:1f.0 subsystem <- 17aa/21fb
+PCI: 00:1f.0 cmd <- 107
+PCI: 00:1f.2 subsystem <- 17aa/21fb
+PCI: 00:1f.2 cmd <- 03
+PCI: 00:1f.3 subsystem <- 17aa/21fb
+PCI: 00:1f.3 cmd <- 103
+PCI: 02:00.0 cmd <- 02
+PCI: 03:00.0 cmd <- 06
+done.
+BS: Exiting BS_DEV_ENABLE state.
+BS: BS_DEV_ENABLE times (us): entry 0 run 554 exit 0
+BS: Entering BS_DEV_INIT state.
+Initializing devices...
+Root Device init
+Root Device init 6 usecs
+CPU_CLUSTER: 0 init
+start_eip=0x00001000, code_size=0x00000031
+Installing SMM handler to 0xc0000000
+Installing IED header to 0xc0400000
+Initializing SMM handler... ... pmbase = 0x0500
+
+SMI_STS: INTEL_USB2 MCSMI PM1
+PM1_STS: WAK PWRBTN
+GPE0_STS: GPIO14 GPIO11 GPIO9 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 EL_SCI/BATLOW
+ALT_GP_SMI_STS: GPI14 GPI11 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1
+TCO_STS:
+ ... raise SMI#
+Initializing CPU #0
+CPU: vendor Intel device 306a9
+CPU: family 06, model 3a, stepping 09
+Enabling cache
+microcode: sig=0x306a9 pf=0x10 revision=0x1b
+CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
+MTRR: Physical address space:
+0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
+0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
+0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6
+0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 0
+0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
+0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
+0x0000000100000000 - 0x000000023c600000 size 0x13c600000 type 6
+MTRR addr 0x0-0x10 set to 6 type @ 0
+MTRR addr 0x10-0x20 set to 6 type @ 1
+MTRR addr 0x20-0x30 set to 6 type @ 2
+MTRR addr 0x30-0x40 set to 6 type @ 3
+MTRR addr 0x40-0x50 set to 6 type @ 4
+MTRR addr 0x50-0x60 set to 6 type @ 5
+MTRR addr 0x60-0x70 set to 6 type @ 6
+MTRR addr 0x70-0x80 set to 6 type @ 7
+MTRR addr 0x80-0x84 set to 6 type @ 8
+MTRR addr 0x84-0x88 set to 6 type @ 9
+MTRR addr 0x88-0x8c set to 6 type @ 10
+MTRR addr 0x8c-0x90 set to 6 type @ 11
+MTRR addr 0x90-0x94 set to 6 type @ 12
+MTRR addr 0x94-0x98 set to 6 type @ 13
+MTRR addr 0x98-0x9c set to 6 type @ 14
+MTRR addr 0x9c-0xa0 set to 6 type @ 15
+MTRR addr 0xa0-0xa4 set to 0 type @ 16
+MTRR addr 0xa4-0xa8 set to 0 type @ 17
+MTRR addr 0xa8-0xac set to 0 type @ 18
+MTRR addr 0xac-0xb0 set to 0 type @ 19
+MTRR addr 0xb0-0xb4 set to 0 type @ 20
+MTRR addr 0xb4-0xb8 set to 0 type @ 21
+MTRR addr 0xb8-0xbc set to 0 type @ 22
+MTRR addr 0xbc-0xc0 set to 0 type @ 23
+MTRR addr 0xc0-0xc1 set to 6 type @ 24
+MTRR addr 0xc1-0xc2 set to 6 type @ 25
+MTRR addr 0xc2-0xc3 set to 6 type @ 26
+MTRR addr 0xc3-0xc4 set to 6 type @ 27
+MTRR addr 0xc4-0xc5 set to 6 type @ 28
+MTRR addr 0xc5-0xc6 set to 6 type @ 29
+MTRR addr 0xc6-0xc7 set to 6 type @ 30
+MTRR addr 0xc7-0xc8 set to 6 type @ 31
+MTRR addr 0xc8-0xc9 set to 6 type @ 32
+MTRR addr 0xc9-0xca set to 6 type @ 33
+MTRR addr 0xca-0xcb set to 6 type @ 34
+MTRR addr 0xcb-0xcc set to 6 type @ 35
+MTRR addr 0xcc-0xcd set to 6 type @ 36
+MTRR addr 0xcd-0xce set to 6 type @ 37
+MTRR addr 0xce-0xcf set to 6 type @ 38
+MTRR addr 0xcf-0xd0 set to 6 type @ 39
+MTRR addr 0xd0-0xd1 set to 6 type @ 40
+MTRR addr 0xd1-0xd2 set to 6 type @ 41
+MTRR addr 0xd2-0xd3 set to 6 type @ 42
+MTRR addr 0xd3-0xd4 set to 6 type @ 43
+MTRR addr 0xd4-0xd5 set to 6 type @ 44
+MTRR addr 0xd5-0xd6 set to 6 type @ 45
+MTRR addr 0xd6-0xd7 set to 6 type @ 46
+MTRR addr 0xd7-0xd8 set to 6 type @ 47
+MTRR addr 0xd8-0xd9 set to 6 type @ 48
+MTRR addr 0xd9-0xda set to 6 type @ 49
+MTRR addr 0xda-0xdb set to 6 type @ 50
+MTRR addr 0xdb-0xdc set to 6 type @ 51
+MTRR addr 0xdc-0xdd set to 6 type @ 52
+MTRR addr 0xdd-0xde set to 6 type @ 53
+MTRR addr 0xde-0xdf set to 6 type @ 54
+MTRR addr 0xdf-0xe0 set to 6 type @ 55
+MTRR addr 0xe0-0xe1 set to 6 type @ 56
+MTRR addr 0xe1-0xe2 set to 6 type @ 57
+MTRR addr 0xe2-0xe3 set to 6 type @ 58
+MTRR addr 0xe3-0xe4 set to 6 type @ 59
+MTRR addr 0xe4-0xe5 set to 6 type @ 60
+MTRR addr 0xe5-0xe6 set to 6 type @ 61
+MTRR addr 0xe6-0xe7 set to 6 type @ 62
+MTRR addr 0xe7-0xe8 set to 6 type @ 63
+MTRR addr 0xe8-0xe9 set to 6 type @ 64
+MTRR addr 0xe9-0xea set to 6 type @ 65
+MTRR addr 0xea-0xeb set to 6 type @ 66
+MTRR addr 0xeb-0xec set to 6 type @ 67
+MTRR addr 0xec-0xed set to 6 type @ 68
+MTRR addr 0xed-0xee set to 6 type @ 69
+MTRR addr 0xee-0xef set to 6 type @ 70
+MTRR addr 0xef-0xf0 set to 6 type @ 71
+MTRR addr 0xf0-0xf1 set to 6 type @ 72
+MTRR addr 0xf1-0xf2 set to 6 type @ 73
+MTRR addr 0xf2-0xf3 set to 6 type @ 74
+MTRR addr 0xf3-0xf4 set to 6 type @ 75
+MTRR addr 0xf4-0xf5 set to 6 type @ 76
+MTRR addr 0xf5-0xf6 set to 6 type @ 77
+MTRR addr 0xf6-0xf7 set to 6 type @ 78
+MTRR addr 0xf7-0xf8 set to 6 type @ 79
+MTRR addr 0xf8-0xf9 set to 6 type @ 80
+MTRR addr 0xf9-0xfa set to 6 type @ 81
+MTRR addr 0xfa-0xfb set to 6 type @ 82
+MTRR addr 0xfb-0xfc set to 6 type @ 83
+MTRR addr 0xfc-0xfd set to 6 type @ 84
+MTRR addr 0xfd-0xfe set to 6 type @ 85
+MTRR addr 0xfe-0xff set to 6 type @ 86
+MTRR addr 0xff-0x100 set to 6 type @ 87
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+call enable_fixed_mtrr()
+MTRR: default type WB/UC MTRR counts: 3/9.
+MTRR: WB selected as default type.
+MTRR: 0 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0
+MTRR: 1 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
+MTRR: 2 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+Setting up local apic... apic_id: 0x00 done.
+Enabling VMX
+model_x06ax: energy policy set to 6
+model_x06ax: frequency set to 2900
+Turbo is available but hidden
+Turbo has been enabled
+CPU: 0 has 2 cores, 2 threads per core
+CPU: 0 has core 1
+CPU1: stack_base 00158000, stack_end 00158ff8
+Asserting INIT.
+Waiting for send to finish...
++Deasserting INIT.
+Waiting for send to finish...
++#startup loops: 2.
+Sending STARTUP #1 to 1.
+After apic_write.
+Initializing CPU #1
+Startup point 1.
+CPU: vendor Intel device 306a9
+Waiting for send to finish...
+CPU: family 06, model 3a, stepping 09
++Enabling cache
+Sending STARTUP #2 to 1.
+After apic_write.
+microcode: sig=0x306a9 pf=0x10 revision=0x1b
+CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+Startup point 1.
+Waiting for send to finish...
++After Startup.
+CPU: 0 has core 2
+CPU2: stack_base 00157000, stack_end 00157ff8
+Asserting INIT.
+Waiting for send to finish...
++call enable_fixed_mtrr()
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+Setting up local apic... apic_id: 0x01 done.
+Enabling VMX
+model_x06ax: energy policy set to 6
+model_x06ax: frequency set to 2900
+CPU #1 initialized
+Deasserting INIT.
+Waiting for send to finish...
++#startup loops: 2.
+Sending STARTUP #1 to 2.
+After apic_write.
+Initializing CPU #2
+Startup point 1.
+Waiting for send to finish...
++CPU: vendor Intel device 306a9
+Sending STARTUP #2 to 2.
+After apic_write.
+CPU: family 06, model 3a, stepping 09
+Startup point 1.
+Waiting for send to finish...
++Enabling cache
+After Startup.
+CPU: 0 has core 3
+CPU3: stack_base 00156000, stack_end 00156ff8
+Asserting INIT.
+Waiting for send to finish...
++microcode: sig=0x306a9 pf=0x10 revision=0x0
+microcode: updated to revision 0x1b date=2014-05-29
+CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+Deasserting INIT.
+Waiting for send to finish...
++MTRR: Fixed MSR 0x26a 0x0606060606060606
+#startup loops: 2.
+Sending STARTUP #1 to 3.
+After apic_write.
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+Startup point 1.
+Waiting for send to finish...
++Initializing CPU #3
+Sending STARTUP #2 to 3.
+After apic_write.
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+Startup point 1.
+Waiting for send to finish...
++CPU: vendor Intel device 306a9
+After Startup.
+CPU #0 initialized
+Waiting for 2 CPUS to stop
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+CPU: family 06, model 3a, stepping 09
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+Enabling cache
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+microcode: sig=0x306a9 pf=0x10 revision=0x1b
+call enable_fixed_mtrr()
+CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: MTRR: Fixed MSR 0x250 0x0606060606060606
+Enabled
+
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+Setting up local apic... apic_id: 0x02 call enable_fixed_mtrr()
+done.
+Enabling VMX
+model_x06ax: energy policy set to 6
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+Setting up local apic...model_x06ax: frequency set to 2900
+CPU #2 initialized
+ apic_id: 0x03 done.
+Enabling VMX
+Waiting for 1 CPUS to stop
+model_x06ax: energy policy set to 6
+model_x06ax: frequency set to 2900
+CPU #3 initialized
+All AP CPUs stopped (1190 loops)
+CPU1: stack: 00158000 - 00159000, lowest used address 00158c50, stack used: 944 bytes
+CPU2: stack: 00157000 - 00158000, lowest used address 00157c50, stack used: 944 bytes
+CPU3: stack: 00156000 - 00157000, lowest used address 00156c50, stack used: 944 bytes
+CPU_CLUSTER: 0 init 61255 usecs
+PCI: 00:00.0 init
+Set BIOS_RESET_CPL
+CPU TDP: 35 Watts
+PCI: 00:00.0 init 1007 usecs
+PCI: 00:02.0 init
+GT Power Management Init
+IVB GT2 25W-35W Power Meter Weights
+In CBFS, ROM address for PCI: 00:02.0 = fff00838
+PCI expansion ROM, signature 0xaa55, INIT size 0x10000, data ptr 0x0040
+PCI ROM image, vendor ID 8086, device ID 0106,
+PCI ROM image, Class Code 030000, Code Type 00
+Copying VGA ROM Image from fff00838 to 0xc0000, 0x10000 bytes
+Real mode stub @00000600: 867 bytes
+Calling Option ROM...
+intel_vga_int15_handler: AX=5fac BX=0190 CX=0000 DX=00c0
+Unknown INT15 function 5fac!
+int15 call returned error.
+intel_vga_int15_handler: AX=5f40 BX=0000 CX=0004 DX=0001
+DISPLAY=0
+int15 call returned error.
+intel_vga_int15_handler: AX=5f35 BX=c000 CX=0002 DX=03da
+... Option ROM returned.
+VGA Option ROM was run
+GT Power Management Init (post VBIOS)
+PCI: 00:02.0 init 440236 usecs
+PCI: 00:14.0 init
+XHCI: Setting up controller.. done.
+PCI: 00:14.0 init 4 usecs
+PCI: 00:19.0 init
+PCI: 00:19.0 init 1 usecs
+PCI: 00:1a.0 init
+EHCI: Setting up controller.. done.
+PCI: 00:1a.0 init 12 usecs
+PCI: 00:1b.0 init
+Azalia: base = e1930000
+Azalia: codec_mask = 09
+Azalia: Initializing codec #3
+Azalia: codec viddid: 80862806
+Azalia: verb_size: 16
+Azalia: verb loaded.
+Azalia: Initializing codec #0
+Azalia: codec viddid: 10ec0269
+Azalia: verb_size: 76
+Azalia: verb loaded.
+PCI: 00:1b.0 init 5972 usecs
+PCI: 00:1c.0 init
+Initializing PCH PCIe bridge.
+PCI: 00:1c.0 init 10 usecs
+PCI: 00:1c.1 init
+Initializing PCH PCIe bridge.
+PCI: 00:1c.1 init 10 usecs
+PCI: 00:1c.2 init
+Initializing PCH PCIe bridge.
+PCI: 00:1c.2 init 12 usecs
+PCI: 00:1d.0 init
+EHCI: Setting up controller.. done.
+PCI: 00:1d.0 init 12 usecs
+PCI: 00:1f.0 init
+pch: lpc_init
+IOAPIC: Initializing IOAPIC at 0xfec00000
+IOAPIC: Bootstrap Processor Local APIC = 0x00
+IOAPIC: ID = 0x02
+IOAPIC: Dumping registers
+ reg 0x0000: 0x02000000
+ reg 0x0001: 0x00170020
+ reg 0x0002: 0x00170020
+Set power on after power failure.
+NMI sources enabled.
+PantherPoint PM init
+rtc_failed = 0x0
+Enabling BIOS updates outside of SMM... Locking SMM.
+PCI: 00:1f.0 init 520 usecs
+PCI: 00:1f.2 init
+SATA: Initializing...
+SATA: Controller in AHCI mode.
+ABAR: E1935000
+PCI: 00:1f.2 init 281 usecs
+PCI: 00:1f.3 init
+PCI: 00:1f.3 init 7 usecs
+PCI: 02:00.0 init
+PCI: 02:00.0 init 1 usecs
+PCI: 03:00.0 init
+PCI: 03:00.0 init 0 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:54 init
+I2C: 01:54 init 1 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:55 init
+I2C: 01:55 init 1 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:56 init
+I2C: 01:56 init 1 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:57 init
+I2C: 01:57 init 1 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:5c init
+Locking EEPROM RFID
+init EEPROM done
+I2C: 01:5c init 26612 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:5d init
+I2C: 01:5d init 1 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:5e init
+I2C: 01:5e init 1 usecs
+smbus: PCI: 00:1f.3[0]->I2C: 01:5f init
+I2C: 01:5f init 1 usecs
+Devices initialized
+Show all devs...After init.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+APIC: acac: enabled 0
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:01.0: enabled 0
+PCI: 00:02.0: enabled 1
+PCI: 00:14.0: enabled 1
+PCI: 00:16.0: enabled 0
+PCI: 00:16.1: enabled 0
+PCI: 00:16.2: enabled 0
+PCI: 00:16.3: enabled 0
+PCI: 00:19.0: enabled 1
+PCI: 00:1a.0: enabled 1
+PCI: 00:1b.0: enabled 1
+PCI: 00:1c.0: enabled 1
+PCI: 00:1c.1: enabled 1
+PCI: 00:1c.2: enabled 1
+PCI: 00:1c.3: enabled 0
+PCI: 00:1c.4: enabled 0
+PCI: 00:1c.5: enabled 0
+PCI: 00:1c.6: enabled 0
+PCI: 00:1c.7: enabled 0
+PCI: 00:1d.0: enabled 1
+PCI: 00:1e.0: enabled 0
+PCI: 00:1f.0: enabled 1
+PNP: 00ff.1: enabled 1
+PNP: 00ff.2: enabled 1
+PCI: 00:1f.2: enabled 1
+PCI: 00:1f.3: enabled 1
+I2C: 01:54: enabled 1
+I2C: 01:55: enabled 1
+I2C: 01:56: enabled 1
+I2C: 01:57: enabled 1
+I2C: 01:5c: enabled 1
+I2C: 01:5d: enabled 1
+I2C: 01:5e: enabled 1
+I2C: 01:5f: enabled 1
+PCI: 00:1f.5: enabled 0
+PCI: 00:1f.6: enabled 0
+PCI: 02:00.0: enabled 1
+PCI: 03:00.0: enabled 1
+Unknown device path type: 0
+: enabled 1
+APIC: 01: enabled 1
+APIC: 02: enabled 1
+APIC: 03: enabled 1
+BS: Exiting BS_DEV_INIT state.
+BS: BS_DEV_INIT times (us): entry 5 run 536009 exit 0
+BS: Entering BS_POST_DEVICE state.
+Finalize devices...
+Devices finalized
+BS: Exiting BS_POST_DEVICE state.
+BS: BS_POST_DEVICE times (us): entry 0 run 1 exit 0
+BS: Entering BS_OS_RESUME_CHECK state.
+Trying to find the wakeup vector...
+Looking on 000f1fa0 for valid checksum
+Checksum 1 passed
+Checksum 2 passed all OK
+RSDP found at 000f1fa0
+RSDT found at bfe56030 ends at bfe56068
+FADT found at bfe59920
+FACS found at bfe56210
+OS waking vector is 0009a1d0
+BS: Exiting BS_OS_RESUME_CHECK state.
+BS: BS_OS_RESUME_CHECK times (us): entry 0 run 12 exit 0
+BS: Entering BS_OS_RESUME state.
+