protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z
diff --git a/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/cbfs.txt b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/cbfs.txt
new file mode 100644
index 0000000..c5a4446
--- /dev/null
+++ b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/cbfs.txt
@@ -0,0 +1,22 @@
+FMAP REGION: COREBOOT
+Name                           Offset     Type           Size   Comp
+cbfs master header             0x0        cbfs header        32 none
+fallback/romstage              0x80       stage           28804 none
+cpu_microcode_blob.bin         0x7180     microcode      138240 none
+fallback/ramstage              0x28e00    stage           74515 none
+config                         0x3b180    raw               285 none
+revision                       0x3b300    raw               675 none
+pci8086,22b1.rom               0x3b600    optionrom       65536 none
+cmos_layout.bin                0x4b680    cmos_layout      1132 none
+pci8086,22b0.rom               0x4bb40    optionrom       65536 none
+fallback/postcar               0x5bbc0    stage           18428 none
+fallback/dsdt.aml              0x60400    raw             10050 none
+fallback/payload               0x62bc0    simple elf      69499 none
+payload_config                 0x73b80    raw              1621 none
+payload_revision               0x74240    raw               234 none
+pci8086,157b.rom               0x74380    raw             67584 none
+etc/sercon-port                0x84c00    raw                 8 none
+(empty)                        0x84c40    null          3715416 none
+fsp.bin                        0x40fdc0   fsp            307456 none
+(empty)                        0x45af00   null           577176 none
+bootblock                      0x4e7dc0   bootblock       32768 none
diff --git a/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/config.short.txt b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/config.short.txt
new file mode 100644
index 0000000..7da48f9
--- /dev/null
+++ b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/config.short.txt
@@ -0,0 +1,10 @@
+# This image was built using coreboot 4.11-1387-g5dd4f5f206
+CONFIG_VENDOR_PROTECTLI=y
+CONFIG_VGA_BIOS=y
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_BOARD_PROTECTLI_FW4B=y
+CONFIG_HAVE_ME_BIN=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
+CONFIG_PXE=y
+CONFIG_BUILD_IPXE=y
+# CONFIG_PXE_SERIAL_CONSOLE is not set
diff --git a/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/config.txt b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/config.txt
new file mode 100644
index 0000000..7084e72
--- /dev/null
+++ b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/config.txt
@@ -0,0 +1,747 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_USE_OPTION_TABLE is not set
+CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+# CONFIG_USE_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_RELOCATABLE_RAMSTAGE=y
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BAP is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_ELMEX is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GIZMOSPHERE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_JETWAY is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIPPERT is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PORTWELL is not set
+CONFIG_VENDOR_PROTECTLI=y
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SCALEWAY is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_VENDOR="Protectli"
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_DIR="protectli/vault_bsw"
+CONFIG_MAINBOARD_PART_NUMBER="FW4B"
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_VGA_BIOS=y
+CONFIG_VGA_BIOS_ID="8086,22b0"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_VGA_BIOS_FILE="3rdparty/blobs/mainboard/protectli/vault_bsw/vgabios.bin"
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x8000
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Protectli"
+CONFIG_VARIANT_DIR="fw4b"
+CONFIG_DEVICETREE="devicetree.cb"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CBFS_SIZE=0x500000
+CONFIG_POST_IO=y
+CONFIG_PAYLOAD_CONFIGFILE=""
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_FMDFILE=""
+# CONFIG_VBOOT is not set
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x4000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_FSP_LOC=0xfff20000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="3rdparty/blobs/mainboard/$(MAINBOARDDIR)/descriptor.bin"
+CONFIG_ME_BIN_PATH="3rdparty/blobs/mainboard/$(MAINBOARDDIR)/me.bin"
+CONFIG_DIMM_MAX=1
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="FW4B"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_MAINBOARD_VERSION="1.0"
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+# CONFIG_BOARD_PROTECTLI_FW2B is not set
+CONFIG_BOARD_PROTECTLI_FW4B=y
+CONFIG_PXE_ROM_ID="8086,157b"
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+# CONFIG_NO_POST is not set
+CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
+CONFIG_HEAP_SIZE=0x4000
+# CONFIG_CONSOLE_POST is not set
+CONFIG_POST_DEVICE=y
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x800000
+# CONFIG_SYSTEM_TYPE_LAPTOP is not set
+# CONFIG_SYSTEM_TYPE_TABLET is not set
+# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
+# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
+# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CPU_SPECIFIC_OPTIONS=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_CPU_ADDR_BITS=36
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
+# CONFIG_SOC_CAVIUM_CN81XX is not set
+CONFIG_ARCH_ARMV8_EXTENSION=0
+CONFIG_STACK_SIZE=0x1000
+# CONFIG_SOC_CAVIUM_COMMON is not set
+# CONFIG_SOC_INTEL_GLK is not set
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/BraswellFspBinPkg/Include/"
+# CONFIG_ENABLE_BUILTIN_COM1 is not set
+CONFIG_SOC_INTEL_BRASWELL=y
+CONFIG_DISABLE_HPET=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_TTYS0_BASE=0x3f8
+CONFIG_TTYS0_LCS=3
+CONFIG_UART_PCI_ADDR=0x0
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_CPU is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_CAR is not set
+# CONFIG_INTEL_CAR_NEM is not set
+# CONFIG_INTEL_CAR_CQOS is not set
+# CONFIG_INTEL_CAR_NEM_ENHANCED is not set
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_CSE is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_IMC is not set
+# CONFIG_PMC_INVALID_READ_AFTER_WRITE is not set
+# CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE is not set
+# CONFIG_SOC_INTEL_COMMON_MMC_OVERRIDE is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_1MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_DISABLED=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+# CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL is not set
+CONFIG_USE_LEGACY_8254_TIMER=y
+
+#
+# Intel SoC Common PCH Code
+#
+
+#
+# Intel SoC Common coreboot stages
+#
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+# CONFIG_ACPI_CONSOLE is not set
+# CONFIG_SOC_INTEL_COMMON_ACPI is not set
+# CONFIG_SOC_INTEL_COMMON_NHLT is not set
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+# CONFIG_SOC_MEDIATEK_MT8173 is not set
+# CONFIG_SOC_MEDIATEK_MT8183 is not set
+# CONFIG_SOC_NVIDIA_TEGRA124 is not set
+# CONFIG_SOC_NVIDIA_TEGRA210 is not set
+# CONFIG_SOC_QUALCOMM_COMMON is not set
+# CONFIG_SOC_QC_IPQ40XX is not set
+# CONFIG_SOC_QC_IPQ806X is not set
+# CONFIG_SOC_QUALCOMM_QCS405 is not set
+# CONFIG_SOC_QUALCOMM_SC7180 is not set
+# CONFIG_SOC_QUALCOMM_SDM845 is not set
+# CONFIG_SOC_ROCKCHIP_RK3288 is not set
+# CONFIG_SOC_ROCKCHIP_RK3399 is not set
+# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
+# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
+# CONFIG_SOC_UCB_RISCV is not set
+
+#
+# CPU
+#
+# CONFIG_CPU_AMD_AGESA is not set
+# CONFIG_CPU_AMD_PI is not set
+# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
+CONFIG_SSE2=y
+# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
+CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+# CONFIG_CPU_TI_AM335X is not set
+# CONFIG_PARALLEL_CPU_INIT is not set
+CONFIG_PARALLEL_MP=y
+# CONFIG_PARALLEL_MP_AP_WORK is not set
+# CONFIG_UDELAY_LAPIC is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+# CONFIG_TSC_SYNC_LFENCE is not set
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_NO_FIXED_XIP_ROM_SIZE=y
+CONFIG_LOGICAL_CPUS=y
+CONFIG_HAVE_SMI_HANDLER=y
+# CONFIG_NO_SMM is not set
+# CONFIG_SMM_ASEG is not set
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
+CONFIG_SMM_STUB_STACK_SIZE=0x400
+# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
+# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
+# CONFIG_X86_AMD_FIXED_MTRRS is not set
+# CONFIG_X86_AMD_INIT_SIPI is not set
+# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
+# CONFIG_SOC_SETS_MSRS is not set
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+# CONFIG_USES_MICROCODE_HEADER_FILES is not set
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
+# CONFIG_NORTHBRIDGE_AMD_PI is not set
+
+#
+# Southbridge
+#
+# CONFIG_AMD_SB_CIMX is not set
+# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7 is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 is not set
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_SILVERMONT=y
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
+# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
+# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+
+#
+# Super I/O
+#
+# CONFIG_SUPERIO_ASPEED_AST2400 is not set
+# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
+# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
+# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
+CONFIG_SUPERIO_ITE_COMMON_PRE_RAM=y
+CONFIG_SUPERIO_ITE_ENV_CTRL=y
+CONFIG_SUPERIO_ITE_ENV_CTRL_8BIT_PWM=y
+CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2=y
+CONFIG_SUPERIO_ITE_ENV_CTRL_NO_ONOFF=y
+CONFIG_SUPERIO_ITE_ENV_CTRL_5FANS=y
+CONFIG_SUPERIO_ITE_IT8613E=y
+
+#
+# Embedded Controllers
+#
+# CONFIG_EC_GOOGLE_CHROMEEC_SKUID is not set
+# CONFIG_EC_GOOGLE_WILCO is not set
+CONFIG_SEABIOS_PS2_TIMEOUT=0
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_CHECK_ME is not set
+# CONFIG_USE_ME_CLEANER is not set
+# CONFIG_MAINBOARD_USES_IFD_GBE_REGION is not set
+# CONFIG_MAINBOARD_USES_IFD_EC_REGION is not set
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+# CONFIG_CAVIUM_BDK is not set
+# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
+# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
+CONFIG_UEFI_2_4_BINDING=y
+# CONFIG_UDK_2015_BINDING is not set
+# CONFIG_UDK_2017_BINDING is not set
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2015_VERSION=2015
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_VERSION=2013
+# CONFIG_USE_SIEMENS_HWILIB is not set
+# CONFIG_ARM_LPAE is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+# CONFIG_ARCH_POSTCAR_X86_64 is not set
+# CONFIG_USE_MARCH_586 is not set
+# CONFIG_AP_IN_SIPI_WAIT is not set
+CONFIG_X86_RESET_VECTOR=0xfffffff0
+# CONFIG_SIPI_VECTOR_IN_ROM is not set
+CONFIG_RAMBASE=0xe00000
+CONFIG_RAMTOP=0x1000000
+CONFIG_NUM_IPI_STARTS=2
+# CONFIG_CBMEM_TOP_BACKUP is not set
+CONFIG_PC80_SYSTEM=y
+# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
+# CONFIG_HAVE_CMOS_DEFAULT is not set
+CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
+# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
+# CONFIG_HPET_ADDRESS_OVERRIDE is not set
+CONFIG_HPET_ADDRESS=0xfed00000
+CONFIG_ID_SECTION_OFFSET=0x80
+CONFIG_POSTCAR_STAGE=y
+# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
+# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_ACPI_HAVE_PCAT_8259=y
+# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
+# CONFIG_IDT_IN_EVERY_STAGE is not set
+CONFIG_HAVE_CF9_RESET=y
+# CONFIG_PIRQ_ROUTE is not set
+
+#
+# Devices
+#
+CONFIG_HAVE_FSP_GOP=y
+# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
+# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+CONFIG_NO_GFX_INIT=y
+# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
+CONFIG_PCI=y
+# CONFIG_NO_MMCONF_SUPPORT is not set
+CONFIG_MMCONF_SUPPORT=y
+# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
+CONFIG_HT_CHAIN_UNITID_BASE=0
+CONFIG_HT_CHAIN_END_UNITID_BASE=0
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+# CONFIG_PCIEXP_HOTPLUG is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+# CONFIG_VGA_BIOS_DGPU is not set
+# CONFIG_INTEL_GMA_ADD_VBT is not set
+# CONFIG_SOFTWARE_I2C is not set
+
+#
+# Generic Drivers
+#
+# CONFIG_DRIVERS_AS3722_RTC is not set
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
+# CONFIG_ELOG is not set
+# CONFIG_GIC is not set
+# CONFIG_IPMI_KCS is not set
+# CONFIG_DRIVERS_LENOVO_WACOM is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
+# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
+# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
+# CONFIG_MRC_WRITE_NV_LATE is not set
+# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
+# CONFIG_RT8168_SET_LED_MODE is not set
+# CONFIG_SMMSTORE is not set
+# CONFIG_SMMSTORE_IN_CBFS is not set
+CONFIG_SPI_FLASH=y
+# CONFIG_SPI_SDCARD is not set
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
+# CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS is not set
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
+CONFIG_HAVE_SPI_CONSOLE_SUPPORT=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
+# CONFIG_NO_UART_ON_SUPERIO is not set
+# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
+# CONFIG_UART_OVERRIDE_REFCLK is not set
+# CONFIG_DRIVERS_UART_8250MEM is not set
+# CONFIG_DRIVERS_UART_8250MEM_32 is not set
+# CONFIG_HAVE_UART_SPECIAL is not set
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_DRIVERS_UART_PL011 is not set
+# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
+# CONFIG_HAVE_USBDEBUG is not set
+# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
+# CONFIG_VPD is not set
+CONFIG_DRIVERS_GENERIC_WIFI=y
+# CONFIG_USE_SAR is not set
+# CONFIG_DRIVERS_AMD_PI is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GFX_GENERIC is not set
+# CONFIG_DRIVERS_I2C_MAX98373 is not set
+# CONFIG_DRIVERS_I2C_MAX98927 is not set
+# CONFIG_DRIVERS_I2C_PCA9538 is not set
+# CONFIG_DRIVERS_I2C_PCF8523 is not set
+# CONFIG_DRIVERS_I2C_PTN3460 is not set
+# CONFIG_DRIVERS_I2C_RT1011 is not set
+# CONFIG_DRIVERS_I2C_RT5663 is not set
+# CONFIG_DRIVERS_I2C_RTD2132 is not set
+# CONFIG_DRIVERS_I2C_RX6110SA is not set
+# CONFIG_DRIVERS_I2C_SX9310 is not set
+# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
+# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
+# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
+CONFIG_PLATFORM_USES_FSP1_1=y
+
+#
+# Intel FSP 1.1
+#
+CONFIG_FSP_USE_REPO=y
+CONFIG_HAVE_FSP_BIN=y
+CONFIG_FSP_FILE="3rdparty/fsp/BraswellFspBinPkg/FspBin/BSWFSP.fd"
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_VBT is not set
+# CONFIG_DISPLAY_FSP_ENTRY_POINTS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+CONFIG_USE_GENERIC_FSP_CAR_INC=y
+# CONFIG_SKIP_FSP_CAR is not set
+# CONFIG_FSP1_1_DISPLAY_LOGO is not set
+# CONFIG_PLATFORM_USES_FSP2_0 is not set
+# CONFIG_PLATFORM_USES_FSP2_1 is not set
+# CONFIG_INTEL_DDI is not set
+# CONFIG_INTEL_EDID is not set
+# CONFIG_INTEL_INT15 is not set
+CONFIG_INTEL_GMA_ACPI=y
+# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
+CONFIG_INTEL_GMA_SWSMISCI=y
+# CONFIG_DRIVER_INTEL_I210 is not set
+# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
+# CONFIG_HAVE_INTEL_PTT is not set
+# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
+# CONFIG_DRIVER_MAXIM_MAX77686 is not set
+# CONFIG_DRIVER_PARADE_PS8625 is not set
+# CONFIG_DRIVER_PARADE_PS8640 is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_LPC_TPM is not set
+# CONFIG_MAINBOARD_HAS_LPC_TPM is not set
+# CONFIG_DRIVERS_RICOH_RCE822 is not set
+# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
+# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
+# CONFIG_DRIVERS_SIL_3114 is not set
+# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
+# CONFIG_DRIVER_TI_TPS65090 is not set
+# CONFIG_DRIVERS_TI_TPS65913 is not set
+# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
+# CONFIG_DRIVERS_USB_ACPI is not set
+# CONFIG_COMMONLIB_STORAGE is not set
+
+#
+# Security
+#
+
+#
+# Verified Boot (vboot)
+#
+
+#
+# Trusted Platform Module
+#
+CONFIG_USER_NO_TPM=y
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# CONFIG_STM is not set
+# CONFIG_ACPI_SATA_GENERATOR is not set
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
+# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+CONFIG_CONSOLE_SERIAL=y
+
+#
+# I/O mapped, 8250-compatible
+#
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_BAUD=115200
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_SPI_CONSOLE is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+# CONFIG_DEFAULT_POST_ON_LPC is not set
+CONFIG_POST_IO_PORT=0x80
+# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
+CONFIG_HWBASE_DEBUG_CB=y
+CONFIG_HAVE_ACPI_RESUME=y
+# CONFIG_DISABLE_ACPI_HIBERNATE is not set
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+# CONFIG_NO_MONOTONIC_TIMER is not set
+CONFIG_HAVE_MONOTONIC_TIMER=y
+# CONFIG_TIMER_QUEUE is not set
+CONFIG_HAVE_OPTION_TABLE=y
+# CONFIG_PCI_IO_CFG_EXT is not set
+# CONFIG_IOAPIC is not set
+# CONFIG_USE_WATCHDOG_ON_BOOT is not set
+# CONFIG_GFXUMA is not set
+CONFIG_HAVE_ACPI_TABLES=y
+# CONFIG_COMMON_FADT is not set
+# CONFIG_ACPI_NHLT is not set
+
+#
+# System tables
+#
+# CONFIG_GENERATE_MP_TABLE is not set
+# CONFIG_GENERATE_PIRQ_TABLE is not set
+CONFIG_GENERATE_SMBIOS_TABLES=y
+# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
+
+#
+# Payload
+#
+# CONFIG_PAYLOAD_NONE is not set
+# CONFIG_PAYLOAD_ELF is not set
+# CONFIG_PAYLOAD_FILO is not set
+# CONFIG_PAYLOAD_GRUB2 is not set
+# CONFIG_PAYLOAD_LINUXBOOT is not set
+CONFIG_PAYLOAD_SEABIOS=y
+# CONFIG_PAYLOAD_UBOOT is not set
+# CONFIG_PAYLOAD_YABITS is not set
+# CONFIG_PAYLOAD_LINUX is not set
+# CONFIG_PAYLOAD_TIANOCORE is not set
+CONFIG_PAYLOAD_FILE="payloads/external/SeaBIOS/seabios/out/bios.bin.elf"
+CONFIG_SEABIOS_STABLE=y
+# CONFIG_SEABIOS_MASTER is not set
+# CONFIG_SEABIOS_REVISION is not set
+# CONFIG_SEABIOS_THREAD_OPTIONROMS is not set
+CONFIG_SEABIOS_BOOTORDER_FILE=""
+CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y
+CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8
+CONFIG_SEABIOS_DEBUG_LEVEL=-1
+
+#
+# Using default SeaBIOS log level
+#
+CONFIG_PAYLOAD_OPTIONS=""
+CONFIG_PXE=y
+
+#
+# PXE Options
+#
+# CONFIG_PXE_ROM is not set
+CONFIG_BUILD_IPXE=y
+CONFIG_IPXE_STABLE=y
+# CONFIG_IPXE_MASTER is not set
+# CONFIG_PXE_SERIAL_CONSOLE is not set
+# CONFIG_PXE_NO_PROMT is not set
+# CONFIG_PXE_ADD_SCRIPT is not set
+# CONFIG_COMPRESSED_PAYLOAD_NONE is not set
+CONFIG_COMPRESSED_PAYLOAD_LZMA=y
+# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set
+# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
+CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
+
+#
+# Secondary Payloads
+#
+# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
+# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
+# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
+# CONFIG_TINT_SECONDARY_PAYLOAD is not set
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+CONFIG_HAVE_DISPLAY_MTRRS=y
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_TRACE is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+CONFIG_NO_EDID_FILL_FB=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
+# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
+# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
+# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
+# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
+CONFIG_REG_SCRIPT=y
+CONFIG_MAX_REBOOT_CNT=3
+# CONFIG_NO_XIP_EARLY_STAGES is not set
+# CONFIG_EARLY_CBMEM_LIST is not set
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/coreboot_console.txt b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/coreboot_console.txt
new file mode 100644
index 0000000..ca54409
--- /dev/null
+++ b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/coreboot_console.txt
@@ -0,0 +1,1753 @@
+
+
+coreboot-4.11-1387-g5dd4f5f206 Fri Mar  6 12:54:49 UTC 2020 bootblock starting (log level: 8)...
+RTC Init
+FMAP: Found "FLASH" version 1.1 at 0x310000.
+FMAP: base = 0xff800000 size = 0x800000 #areas = 4
+FMAP: area COREBOOT found @ 310200 (5176832 bytes)
+CBFS: Locating 'fallback/romstage'
+CBFS: Found @ offset 80 size 7084
+BS: bootblock times (exec / console): total (unknown) / 30 ms
+
+
+coreboot-4.11-1387-g5dd4f5f206 Fri Mar  6 12:54:49 UTC 2020 romstage starting (log level: 8)...
+FMAP: area COREBOOT found @ 310200 (5176832 bytes)
+CBFS: Locating 'fsp.bin'
+CBFS: Found @ offset 40fdc0 size 4b100
+FMAP: area COREBOOT found @ 310200 (5176832 bytes)
+CBFS: Locating 'cpu_microcode_blob.bin'
+CBFS: Found @ offset 7180 size 21c00
+microcode: sig=0x406c4 pf=0x1 revision=0x411
+microcode: Update skipped, already up-to-date
+CONFIG_MMCONF_BASE_ADDRESS: 0xe0000000
+Using FSP 1.1
+FSP_INFO_HEADER: 0xfff20094
+FSP Signature: $BSWFSP$
+FSP Header Version: 2
+FSP Revision: 1.1.8.0
+pm1_sts: 0000 pm1_en: 0000 pm1_cnt: 00000000
+gpe0_sts: 00000000 gpe0_en: 00000000 tco_sts: 00000000
+prsts: 00040910 gen_pmcon1: 00201a08 gen_pmcon2: 00000000
+prev_sleep_state 0
+FMAP: area RW_MRC_CACHE found @ 300000 (65536 bytes)
+MRC: no data in 'RW_MRC_CACHE'
+No MRC cache found.
+VPD Data: 0xfff4b92c
+UPD Data: 0xfff4b940
+Updating UPD values for MemoryInit
+Calling FspMemoryInit: 0xfff6a10f
+    0x00000000: NvsBufferPtr
+    0xfef01e28: RtBufferPtr
+    0xfef01dd0: HobListPtr
+FspMemoryInit returned 0x00000000
+Reserving 0x0000000000200000 bytes for FSP
+0x00800000: smm_size
+0x7d000000: smm_base
+0x7d000000: cbmem_top
+CBMEM:
+IMD: root @ 0x7cfff000 254 entries.
+IMD: root @ 0x7cffec00 62 entries.
+External stage cache:
+IMD: root @ 0x7d7ff000 254 entries.
+IMD: root @ 0x7d7fec00 62 entries.
+0x7cdfe000: fsp_reserved_memory_area
+MRC data at 0x7ce1eed8 27760 bytes
+CBMEM entry for DIMM info: 0x7cffe900
+1 DIMMs found
+Disable ROM shadow below 1MB.
+SMM Memory Map
+SMRAM       : 0x7d000000 0x800000
+ Subregion 0: 0x7d000000 0x700000
+ Subregion 1: 0x7d700000 0x100000
+ Subregion 2: 0x7d800000 0x0
+MTRR Range: Start=7c800000 End=7d000000 (Size 800000)
+MTRR Range: Start=7d000000 End=7d800000 (Size 800000)
+MTRR Range: Start=ff800000 End=0 (Size 800000)
+FMAP: area COREBOOT found @ 310200 (5176832 bytes)
+CBFS: Locating 'fallback/postcar'
+CBFS: Found @ offset 5bbc0 size 47fc
+Decompressing stage fallback/postcar @ 0x7cdcbfc0 (34864 bytes)
+Loading module at 0x7cdcc000 with entry 0x7cdcc000. filesize: 0x4510 memsize: 0x87f0
+Processing 164 relocs. Offset value of 0x7adcc000
+BS: romstage times (exec / console): total (unknown) / 201 ms
+
+
+coreboot-4.11-1387-g5dd4f5f206 Fri Mar  6 12:54:49 UTC 2020 postcar starting (log level: 8)...
+FMAP: area COREBOOT found @ 310200 (5176832 bytes)
+CBFS: Locating 'fallback/ramstage'
+CBFS: Found @ offset 28e00 size 12313
+Decompressing stage fallback/ramstage @ 0x7cd96fc0 (209144 bytes)
+Loading module at 0x7cd97000 with entry 0x7cd97000. filesize: 0x24e88 memsize: 0x330b8
+Processing 2665 relocs. Offset value of 0x7bf97000
+BS: postcar times (exec / console): total (unknown) / 39 ms
+
+
+coreboot-4.11-1387-g5dd4f5f206 Fri Mar  6 12:54:49 UTC 2020 ramstage starting (log level: 8)...
+Normal boot.
+src/soc/intel/braswell/chip.c/soc_init
+FMAP: area COREBOOT found @ 310200 (5176832 bytes)
+CBFS: Locating 'cpu_microcode_blob.bin'
+CBFS: Found @ offset 7180 size 21c00
+microcode: sig=0x406c4 pf=0x1 revision=0x411
+Cpuid 000406c4 cpus 4 rid 35 step D1
+msr(17) = 000000f090041c4e
+msr(ce) = 0000060002001400
+msr(66a) = 0000000000140602
+msr(66c) = 000000001c1c1c1c
+msr(66b) = 00000000003a2d2d
+msr(66d) = 000000004e4e4e4e
+FMAP: area COREBOOT found @ 310200 (5176832 bytes)
+CBFS: Locating 'fsp.bin'
+CBFS: Found @ offset 40fdc0 size 4b100
+Ignoring FSPP entry: ffffffff
+Ignoring FSPP entry: ffffffff
+FSP: Saving binary in cache
+FSP_INFO_HEADER: 0x7cd48094
+FSP Signature: $BSWFSP$
+FSP Header Version: 2
+FSP Revision: 1.1.8.0
+0x7cd7392c: VPD Data
+0x7cd73940: UPD Data
+Updating UPD values for SiliconInit
+Calling FspSiliconInit
+Calling FspSiliconInit(0x7cdc0d0b) at 0x7cd9211d
+FspSiliconInit returned 0x00000000
+north
+Write Pad: Base(fed8c400) - conf0 = 918200 conf1= 5c00000 gpio #- 0 pad # = 0
+Write Pad: Base(fed8c408) - conf0 = 918200 conf1= 5c00000 gpio #- 1 pad # = 1
+Write Pad: Base(fed8c410) - conf0 = 918200 conf1= 5c00000 gpio #- 2 pad # = 2
+Write Pad: Base(fed8c418) - conf0 = 918200 conf1= 5c00000 gpio #- 3 pad # = 3
+Write Pad: Base(fed8c420) - conf0 = 918200 conf1= 5c00000 gpio #- 4 pad # = 4
+Write Pad: Base(fed8c428) - conf0 = 918200 conf1= 5c00000 gpio #- 5 pad # = 5
+Write Pad: Base(fed8c430) - conf0 = 918200 conf1= 5c00000 gpio #- 6 pad # = 6
+Write Pad: Base(fed8c438) - conf0 = 918200 conf1= 5c00000 gpio #- 7 pad # = 7
+Write Pad: Base(fed8c440) - conf0 = 918200 conf1= 5c00000 gpio #- 8 pad # = 8
+Write Pad: Base(fed8c800) - conf0 = 8c108200 conf1= 5c00001 gpio #- 15 pad # = 9
+Write Pad: Base(fed8c808) - conf0 = 108102 conf1= 5c00000 gpio #- 16 pad # = 10
+Write Pad: Base(fed8c810) - conf0 = 110300 conf1= 5c00000 gpio #- 17 pad # = 11
+Write Pad: Base(fed8c818) - conf0 = fc908200 conf1= 5c00001 gpio #- 18 pad # = 12
+Write Pad: Base(fed8c820) - conf0 = 110300 conf1= 5c00000 gpio #- 19 pad # = 13
+Write Pad: Base(fed8c828) - conf0 = 918200 conf1= 5c00000 gpio #- 20 pad # = 14
+Write Pad: Base(fed8c830) - conf0 = 2c108200 conf1= 5c00002 gpio #- 21 pad # = 15
+Write Pad: Base(fed8c838) - conf0 = 910300 conf1= 5c00000 gpio #- 22 pad # = 16
+Write Pad: Base(fed8c840) - conf0 = 38908200 conf1= 5c00004 gpio #- 23 pad # = 17
+Write Pad: Base(fed8c848) - conf0 = 910300 conf1= 5c00000 gpio #- 24 pad # = 18
+Write Pad: Base(fed8c850) - conf0 = ec908200 conf1= 5c00001 gpio #- 25 pad # = 19
+Write Pad: Base(fed8c858) - conf0 = 10300 conf1= 5c00000 gpio #- 26 pad # = 20
+Write Pad: Base(fed8c860) - conf0 = 118200 conf1= 5c00000 gpio #- 27 pad # = 21
+Write Pad: Base(fed8cc00) - conf0 = 10300 conf1= 5c00000 gpio #- 30 pad # = 22
+Write Pad: Base(fed8cc08) - conf0 = 10300 conf1= 5c00000 gpio #- 31 pad # = 23
+Write Pad: Base(fed8cc20) - conf0 = 10300 conf1= 5c00000 gpio #- 34 pad # = 26
+Write Pad: Base(fed8cc28) - conf0 = 918200 conf1= 5c00000 gpio #- 35 pad # = 27
+Write Pad: Base(fed8cc30) - conf0 = 918200 conf1= 5c00000 gpio #- 36 pad # = 28
+Write Pad: Base(fed8cc38) - conf0 = 10300 conf1= 5c00000 gpio #- 37 pad # = 29
+Write Pad: Base(fed8cc48) - conf0 = 10300 conf1= 5c00000 gpio #- 39 pad # = 31
+Write Pad: Base(fed8cc58) - conf0 = 10300 conf1= 5c00000 gpio #- 41 pad # = 33
+Write Pad: Base(fed8d000) - conf0 = 918200 conf1= 5c00000 gpio #- 45 pad # = 34
+Write Pad: Base(fed8d008) - conf0 = 918200 conf1= 5c00000 gpio #- 46 pad # = 35
+Write Pad: Base(fed8d010) - conf0 = 918200 conf1= 5c00000 gpio #- 47 pad # = 36
+Write Pad: Base(fed8d018) - conf0 = 918200 conf1= 5c00000 gpio #- 48 pad # = 37
+Write Pad: Base(fed8d020) - conf0 = 918200 conf1= 5c00000 gpio #- 49 pad # = 38
+Write Pad: Base(fed8d028) - conf0 = 918200 conf1= 5c00000 gpio #- 50 pad # = 39
+Write Pad: Base(fed8d030) - conf0 = 918200 conf1= 5c00000 gpio #- 51 pad # = 40
+Write Pad: Base(fed8d038) - conf0 = 918200 conf1= 5c00000 gpio #- 52 pad # = 41
+Write Pad: Base(fed8d040) - conf0 = 918200 conf1= 5c00000 gpio #- 53 pad # = 42
+Write Pad: Base(fed8d048) - conf0 = 918200 conf1= 5c00000 gpio #- 54 pad # = 43
+Write Pad: Base(fed8d050) - conf0 = 918200 conf1= 5c00000 gpio #- 55 pad # = 44
+Write Pad: Base(fed8d058) - conf0 = 918200 conf1= 5c00000 gpio #- 56 pad # = 45
+Write Pad: Base(fed8d400) - conf0 = 918200 conf1= 5c00000 gpio #- 60 pad # = 46
+Write Pad: Base(fed8d408) - conf0 = 3010000 conf1= 5c00020 gpio #- 61 pad # = 47
+Write Pad: Base(fed8d410) - conf0 = c10300 conf1= 5c00000 gpio #- 62 pad # = 48
+Write Pad: Base(fed8d418) - conf0 = 918200 conf1= 5c00000 gpio #- 63 pad # = 49
+Write Pad: Base(fed8d420) - conf0 = 918200 conf1= 5c00000 gpio #- 64 pad # = 50
+Write Pad: Base(fed8d428) - conf0 = 918200 conf1= 5c00000 gpio #- 65 pad # = 51
+Write Pad: Base(fed8d430) - conf0 = c10300 conf1= 5c00000 gpio #- 66 pad # = 52
+Write Pad: Base(fed8d438) - conf0 = c10300 conf1= 5c00000 gpio #- 67 pad # = 53
+Write Pad: Base(fed8d440) - conf0 = 3010000 conf1= 5c00020 gpio #- 68 pad # = 54
+Write Pad: Base(fed8d448) - conf0 = 918200 conf1= 5c00000 gpio #- 69 pad # = 55
+Write Pad: Base(fed8d450) - conf0 = 918200 conf1= 5c00000 gpio #- 70 pad # = 56
+Write Pad: Base(fed8d458) - conf0 = c10300 conf1= 5c00000 gpio #- 71 pad # = 57
+Write Pad: Base(fed8d460) - conf0 = 918200 conf1= 5c00000 gpio #- 72 pad # = 58
+gpio_wake_mask0 = 200 gpio_wake_mask1 = 0 gpio_int_mask = c10c
+southwest
+Write Pad: Base(fed84400) - conf0 = 910300 conf1= 5c00000 gpio #- 0 pad # = 0
+Write Pad: Base(fed84408) - conf0 = 910300 conf1= 5c00000 gpio #- 1 pad # = 1
+Write Pad: Base(fed84410) - conf0 = 910300 conf1= 5c00000 gpio #- 2 pad # = 2
+Write Pad: Base(fed84418) - conf0 = 910300 conf1= 5c00000 gpio #- 3 pad # = 3
+Write Pad: Base(fed84420) - conf0 = 908102 conf1= 5c00000 gpio #- 4 pad # = 4
+Write Pad: Base(fed84428) - conf0 = 910300 conf1= 5c00000 gpio #- 5 pad # = 5
+Write Pad: Base(fed84430) - conf0 = 910300 conf1= 5c00000 gpio #- 6 pad # = 6
+Write Pad: Base(fed84438) - conf0 = 908102 conf1= 5c00000 gpio #- 7 pad # = 7
+Write Pad: Base(fed84800) - conf0 = 918200 conf1= 5c00000 gpio #- 15 pad # = 8
+Write Pad: Base(fed84808) - conf0 = 918200 conf1= 5c00000 gpio #- 16 pad # = 9
+Write Pad: Base(fed84810) - conf0 = 918200 conf1= 5c00000 gpio #- 17 pad # = 10
+Write Pad: Base(fed84818) - conf0 = 918200 conf1= 5c00000 gpio #- 18 pad # = 11
+Write Pad: Base(fed84820) - conf0 = 918200 conf1= 5c00000 gpio #- 19 pad # = 12
+Write Pad: Base(fed84828) - conf0 = 918200 conf1= 5c00000 gpio #- 20 pad # = 13
+Write Pad: Base(fed84830) - conf0 = 918200 conf1= 5c00000 gpio #- 21 pad # = 14
+Write Pad: Base(fed84838) - conf0 = 918200 conf1= 5c00000 gpio #- 22 pad # = 15
+Write Pad: Base(fed84c00) - conf0 = 120300 conf1= 5c00000 gpio #- 30 pad # = 16
+Write Pad: Base(fed84c08) - conf0 = 120300 conf1= 5c00000 gpio #- 31 pad # = 17
+Write Pad: Base(fed84c10) - conf0 = 120300 conf1= 5c00000 gpio #- 32 pad # = 18
+Write Pad: Base(fed84c18) - conf0 = 120300 conf1= 5c00000 gpio #- 33 pad # = 19
+Write Pad: Base(fed84c20) - conf0 = 108102 conf1= 5c00000 gpio #- 34 pad # = 20
+Write Pad: Base(fed84c28) - conf0 = 120300 conf1= 5c00000 gpio #- 35 pad # = 21
+Write Pad: Base(fed84c30) - conf0 = 120300 conf1= 5c00000 gpio #- 36 pad # = 22
+Write Pad: Base(fed84c38) - conf0 = 118200 conf1= 5c00000 gpio #- 37 pad # = 23
+Write Pad: Base(fed85000) - conf0 = 918200 conf1= 5c00000 gpio #- 45 pad # = 24
+Write Pad: Base(fed85008) - conf0 = 918200 conf1= 5c00000 gpio #- 46 pad # = 25
+Write Pad: Base(fed85010) - conf0 = 918200 conf1= 5c00000 gpio #- 47 pad # = 26
+Write Pad: Base(fed85018) - conf0 = 918200 conf1= 5c00000 gpio #- 48 pad # = 27
+Write Pad: Base(fed85020) - conf0 = 918200 conf1= 5c00000 gpio #- 49 pad # = 28
+Write Pad: Base(fed85028) - conf0 = 918200 conf1= 5c00000 gpio #- 50 pad # = 29
+Write Pad: Base(fed85030) - conf0 = 918200 conf1= 5c00000 gpio #- 51 pad # = 30
+Write Pad: Base(fed85038) - conf0 = 918200 conf1= 5c00000 gpio #- 52 pad # = 31
+Write Pad: Base(fed85400) - conf0 = 918200 conf1= 5c00000 gpio #- 60 pad # = 32
+Write Pad: Base(fed85408) - conf0 = 918200 conf1= 5c00000 gpio #- 61 pad # = 33
+Write Pad: Base(fed85410) - conf0 = 918200 conf1= 5c00000 gpio #- 62 pad # = 34
+Write Pad: Base(fed85418) - conf0 = 918200 conf1= 5c00000 gpio #- 63 pad # = 35
+Write Pad: Base(fed85420) - conf0 = 918200 conf1= 5c00000 gpio #- 64 pad # = 36
+Write Pad: Base(fed85428) - conf0 = 918200 conf1= 5c00000 gpio #- 65 pad # = 37
+Write Pad: Base(fed85430) - conf0 = 918200 conf1= 5c00000 gpio #- 66 pad # = 38
+Write Pad: Base(fed85438) - conf0 = 918200 conf1= 5c00000 gpio #- 67 pad # = 39
+Write Pad: Base(fed85800) - conf0 = 918200 conf1= 5c00000 gpio #- 75 pad # = 40
+Write Pad: Base(fed85808) - conf0 = 918200 conf1= 5c00000 gpio #- 76 pad # = 41
+Write Pad: Base(fed85810) - conf0 = 10300 conf1= 5c00000 gpio #- 77 pad # = 42
+Write Pad: Base(fed85818) - conf0 = 918200 conf1= 5c00000 gpio #- 78 pad # = 43
+Write Pad: Base(fed85820) - conf0 = 910300 conf1= 5c00000 gpio #- 79 pad # = 44
+Write Pad: Base(fed85828) - conf0 = 918200 conf1= 5c00000 gpio #- 80 pad # = 45
+Write Pad: Base(fed85830) - conf0 = 910300 conf1= 5c00000 gpio #- 81 pad # = 46
+Write Pad: Base(fed85838) - conf0 = 910300 conf1= 5c00000 gpio #- 82 pad # = 47
+Write Pad: Base(fed85c00) - conf0 = 918200 conf1= 5c00000 gpio #- 90 pad # = 48
+Write Pad: Base(fed85c08) - conf0 = 918200 conf1= 5c00000 gpio #- 91 pad # = 49
+Write Pad: Base(fed85c10) - conf0 = 918200 conf1= 5c00000 gpio #- 92 pad # = 50
+Write Pad: Base(fed85c18) - conf0 = 918200 conf1= 5c00000 gpio #- 93 pad # = 51
+Write Pad: Base(fed85c20) - conf0 = 918200 conf1= 5c00000 gpio #- 94 pad # = 52
+Write Pad: Base(fed85c28) - conf0 = 918200 conf1= 5c00000 gpio #- 95 pad # = 53
+Write Pad: Base(fed85c30) - conf0 = 918200 conf1= 5c00000 gpio #- 96 pad # = 54
+Write Pad: Base(fed85c38) - conf0 = 918200 conf1= 5c00000 gpio #- 97 pad # = 55
+gpio_wake_mask0 = 0 gpio_wake_mask1 = 0 gpio_int_mask = 0
+southeast
+Write Pad: Base(fed9c400) - conf0 = 918200 conf1= 5c00000 gpio #- 0 pad # = 0
+Write Pad: Base(fed9c408) - conf0 = 918200 conf1= 5c00000 gpio #- 1 pad # = 1
+Write Pad: Base(fed9c410) - conf0 = 918200 conf1= 5c00000 gpio #- 2 pad # = 2
+Write Pad: Base(fed9c418) - conf0 = 918200 conf1= 5c00000 gpio #- 3 pad # = 3
+Write Pad: Base(fed9c420) - conf0 = 918200 conf1= 5c00000 gpio #- 4 pad # = 4
+Write Pad: Base(fed9c428) - conf0 = 918200 conf1= 5c00000 gpio #- 5 pad # = 5
+Write Pad: Base(fed9c430) - conf0 = 918200 conf1= 5c00000 gpio #- 6 pad # = 6
+Write Pad: Base(fed9c438) - conf0 = 918200 conf1= 5c00000 gpio #- 7 pad # = 7
+Write Pad: Base(fed9c800) - conf0 = 918200 conf1= 5c00000 gpio #- 15 pad # = 8
+Write Pad: Base(fed9c808) - conf0 = 918200 conf1= 5c00000 gpio #- 16 pad # = 9
+Write Pad: Base(fed9c810) - conf0 = 918200 conf1= 5c00000 gpio #- 17 pad # = 10
+Write Pad: Base(fed9c818) - conf0 = 918200 conf1= 5c00000 gpio #- 18 pad # = 11
+Write Pad: Base(fed9c820) - conf0 = 918200 conf1= 5c00000 gpio #- 19 pad # = 12
+Write Pad: Base(fed9c828) - conf0 = 918200 conf1= 5c00000 gpio #- 20 pad # = 13
+Write Pad: Base(fed9c830) - conf0 = 918200 conf1= 5c00000 gpio #- 21 pad # = 14
+Write Pad: Base(fed9c838) - conf0 = 918200 conf1= 5c00000 gpio #- 22 pad # = 15
+Write Pad: Base(fed9c840) - conf0 = 918200 conf1= 5c00000 gpio #- 23 pad # = 16
+Write Pad: Base(fed9c848) - conf0 = 918200 conf1= 5c00000 gpio #- 24 pad # = 17
+Write Pad: Base(fed9c850) - conf0 = 918200 conf1= 5c00000 gpio #- 25 pad # = 18
+Write Pad: Base(fed9c858) - conf0 = 918200 conf1= 5c00000 gpio #- 26 pad # = 19
+Write Pad: Base(fed9cc00) - conf0 = 918200 conf1= 5c00000 gpio #- 30 pad # = 20
+Write Pad: Base(fed9cc08) - conf0 = 918200 conf1= 5c00000 gpio #- 31 pad # = 21
+Write Pad: Base(fed9cc10) - conf0 = 918200 conf1= 5c00000 gpio #- 32 pad # = 22
+Write Pad: Base(fed9cc18) - conf0 = 918200 conf1= 5c00000 gpio #- 33 pad # = 23
+Write Pad: Base(fed9cc20) - conf0 = 918200 conf1= 5c00000 gpio #- 34 pad # = 24
+Write Pad: Base(fed9cc28) - conf0 = 918200 conf1= 5c00000 gpio #- 35 pad # = 25
+Write Pad: Base(fed9d000) - conf0 = 910300 conf1= 5c00000 gpio #- 45 pad # = 26
+Write Pad: Base(fed9d008) - conf0 = 910300 conf1= 5c00000 gpio #- 46 pad # = 27
+Write Pad: Base(fed9d010) - conf0 = 910300 conf1= 5c00000 gpio #- 47 pad # = 28
+Write Pad: Base(fed9d018) - conf0 = 10300 conf1= 5c00000 gpio #- 48 pad # = 29
+Write Pad: Base(fed9d020) - conf0 = 10300 conf1= 5c00000 gpio #- 49 pad # = 30
+Write Pad: Base(fed9d028) - conf0 = 910300 conf1= 5c00000 gpio #- 50 pad # = 31
+Write Pad: Base(fed9d030) - conf0 = 10300 conf1= 5c00000 gpio #- 51 pad # = 32
+Write Pad: Base(fed9d038) - conf0 = 910300 conf1= 5c00000 gpio #- 52 pad # = 33
+Write Pad: Base(fed9d400) - conf0 = 918200 conf1= 5c00000 gpio #- 60 pad # = 34
+Write Pad: Base(fed9d408) - conf0 = 918200 conf1= 5c00000 gpio #- 61 pad # = 35
+Write Pad: Base(fed9d410) - conf0 = 918200 conf1= 5c00000 gpio #- 62 pad # = 36
+Write Pad: Base(fed9d418) - conf0 = 918200 conf1= 5c00000 gpio #- 63 pad # = 37
+Write Pad: Base(fed9d420) - conf0 = 918200 conf1= 5c00000 gpio #- 64 pad # = 38
+Write Pad: Base(fed9d428) - conf0 = 918200 conf1= 5c00000 gpio #- 65 pad # = 39
+Write Pad: Base(fed9d430) - conf0 = 918200 conf1= 5c00000 gpio #- 66 pad # = 40
+Write Pad: Base(fed9d438) - conf0 = 918200 conf1= 5c00000 gpio #- 67 pad # = 41
+Write Pad: Base(fed9d440) - conf0 = 918200 conf1= 5c00000 gpio #- 68 pad # = 42
+Write Pad: Base(fed9d448) - conf0 = 918200 conf1= 5c00000 gpio #- 69 pad # = 43
+Write Pad: Base(fed9d800) - conf0 = 10300 conf1= 5c00000 gpio #- 75 pad # = 44
+Write Pad: Base(fed9d808) - conf0 = 10300 conf1= 5c00000 gpio #- 76 pad # = 45
+Write Pad: Base(fed9d810) - conf0 = 4008200 conf1= 5c00003 gpio #- 77 pad # = 46
+Write Pad: Base(fed9d818) - conf0 = 918200 conf1= 5c00000 gpio #- 78 pad # = 47
+Write Pad: Base(fed9d820) - conf0 = 910300 conf1= 5c00000 gpio #- 79 pad # = 48
+Write Pad: Base(fed9d828) - conf0 = 910300 conf1= 5c00000 gpio #- 80 pad # = 49
+Write Pad: Base(fed9d830) - conf0 = 918200 conf1= 5c00000 gpio #- 81 pad # = 50
+Write Pad: Base(fed9d838) - conf0 = 10300 conf1= 5c00000 gpio #- 82 pad # = 51
+Write Pad: Base(fed9d840) - conf0 = 10300 conf1= 5c00000 gpio #- 83 pad # = 52
+Write Pad: Base(fed9d848) - conf0 = 110300 conf1= 5c00000 gpio #- 84 pad # = 53
+Write Pad: Base(fed9d850) - conf0 = 918200 conf1= 5c00000 gpio #- 85 pad # = 54
+gpio_wake_mask0 = 0 gpio_wake_mask1 = 0 gpio_int_mask = 1
+east
+Write Pad: Base(fed94400) - conf0 = 910300 conf1= 5c00000 gpio #- 0 pad # = 0
+Write Pad: Base(fed94408) - conf0 = 910300 conf1= 5c00000 gpio #- 1 pad # = 1
+Write Pad: Base(fed94410) - conf0 = 910300 conf1= 5c00000 gpio #- 2 pad # = 2
+Write Pad: Base(fed94418) - conf0 = 910300 conf1= 5c00000 gpio #- 3 pad # = 3
+Write Pad: Base(fed94420) - conf0 = 110300 conf1= 5c00000 gpio #- 4 pad # = 4
+Write Pad: Base(fed94428) - conf0 = 910300 conf1= 5c00000 gpio #- 5 pad # = 5
+Write Pad: Base(fed94430) - conf0 = 110300 conf1= 5c00000 gpio #- 6 pad # = 6
+Write Pad: Base(fed94438) - conf0 = 910300 conf1= 5c00000 gpio #- 7 pad # = 7
+Write Pad: Base(fed94440) - conf0 = 910300 conf1= 5c00000 gpio #- 8 pad # = 8
+Write Pad: Base(fed94448) - conf0 = 910300 conf1= 5c00000 gpio #- 9 pad # = 9
+Write Pad: Base(fed94450) - conf0 = 8c10000 conf1= 5c00000 gpio #- 10 pad # = 10
+Write Pad: Base(fed94458) - conf0 = 918200 conf1= 5c00000 gpio #- 11 pad # = 11
+Write Pad: Base(fed94800) - conf0 = 918200 conf1= 5c00000 gpio #- 15 pad # = 12
+Write Pad: Base(fed94808) - conf0 = 918200 conf1= 5c00000 gpio #- 16 pad # = 13
+Write Pad: Base(fed94810) - conf0 = 918200 conf1= 5c00000 gpio #- 17 pad # = 14
+Write Pad: Base(fed94818) - conf0 = 918200 conf1= 5c00000 gpio #- 18 pad # = 15
+Write Pad: Base(fed94820) - conf0 = 918200 conf1= 5c00000 gpio #- 19 pad # = 16
+Write Pad: Base(fed94828) - conf0 = 918200 conf1= 5c00000 gpio #- 20 pad # = 17
+Write Pad: Base(fed94830) - conf0 = 918200 conf1= 5c00000 gpio #- 21 pad # = 18
+Write Pad: Base(fed94838) - conf0 = 918200 conf1= 5c00000 gpio #- 22 pad # = 19
+Write Pad: Base(fed94840) - conf0 = 918200 conf1= 5c00000 gpio #- 23 pad # = 20
+Write Pad: Base(fed94848) - conf0 = 918200 conf1= 5c00000 gpio #- 24 pad # = 21
+Write Pad: Base(fed94850) - conf0 = 918200 conf1= 5c00000 gpio #- 25 pad # = 22
+Write Pad: Base(fed94858) - conf0 = 918200 conf1= 5c00000 gpio #- 26 pad # = 23
+gpio_wake_mask0 = 0 gpio_wake_mask1 = 0 gpio_int_mask = 0
+Routing SW and N gpios
+gpio_rout = 6002 alt_gpio_smi = 800000  gpe0a_en = 410000
+Tri-state TDO and TMS
+BS: BS_DEV_INIT_CHIPS run times (exec / console): 145 / 1456 ms
+Enumerating buses...
+Show all devs... Before device enumeration.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+DOMAIN: 0000: enabled 1
+APIC: 00: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:02.0: enabled 1
+PCI: 00:03.0: enabled 0
+PCI: 00:0b.0: enabled 0
+PCI: 00:10.0: enabled 0
+PCI: 00:12.0: enabled 0
+PCI: 00:13.0: enabled 1
+PCI: 00:14.0: enabled 1
+PCI: 00:18.0: enabled 0
+PCI: 00:18.1: enabled 0
+PCI: 00:18.2: enabled 0
+PCI: 00:18.3: enabled 0
+PCI: 00:18.4: enabled 0
+PCI: 00:18.5: enabled 0
+PCI: 00:18.6: enabled 0
+PCI: 00:18.7: enabled 0
+PCI: 00:1a.0: enabled 1
+PCI: 00:1b.0: enabled 1
+PCI: 00:1c.0: enabled 1
+PCI: 00:1c.1: enabled 1
+PCI: 00:1c.2: enabled 1
+PCI: 00:1c.3: enabled 1
+PCI: 00:1e.0: enabled 0
+PCI: 00:1e.3: enabled 0
+PCI: 00:1e.4: enabled 0
+PCI: 00:1f.0: enabled 1
+PCI: 00:1f.3: enabled 1
+PNP: 002e.0: enabled 0
+PNP: 002e.1: enabled 1
+PNP: 002e.4: enabled 0
+PNP: 002e.5: enabled 0
+PNP: 002e.6: enabled 0
+PNP: 002e.7: enabled 0
+PNP: 002e.a: enabled 0
+Compare with tree...
+Root Device: enabled 1
+ CPU_CLUSTER: 0: enabled 1
+  APIC: 00: enabled 1
+ DOMAIN: 0000: enabled 1
+  PCI: 00:00.0: enabled 1
+  PCI: 00:02.0: enabled 1
+  PCI: 00:03.0: enabled 0
+  PCI: 00:0b.0: enabled 0
+  PCI: 00:10.0: enabled 0
+  PCI: 00:12.0: enabled 0
+  PCI: 00:13.0: enabled 1
+  PCI: 00:14.0: enabled 1
+  PCI: 00:18.0: enabled 0
+  PCI: 00:18.1: enabled 0
+  PCI: 00:18.2: enabled 0
+  PCI: 00:18.3: enabled 0
+  PCI: 00:18.4: enabled 0
+  PCI: 00:18.5: enabled 0
+  PCI: 00:18.6: enabled 0
+  PCI: 00:18.7: enabled 0
+  PCI: 00:1a.0: enabled 1
+  PCI: 00:1b.0: enabled 1
+  PCI: 00:1c.0: enabled 1
+  PCI: 00:1c.1: enabled 1
+  PCI: 00:1c.2: enabled 1
+  PCI: 00:1c.3: enabled 1
+  PCI: 00:1e.0: enabled 0
+  PCI: 00:1e.3: enabled 0
+  PCI: 00:1e.4: enabled 0
+  PCI: 00:1f.0: enabled 1
+   PNP: 002e.0: enabled 0
+   PNP: 002e.1: enabled 1
+   PNP: 002e.4: enabled 0
+   PNP: 002e.5: enabled 0
+   PNP: 002e.6: enabled 0
+   PNP: 002e.7: enabled 0
+   PNP: 002e.a: enabled 0
+  PCI: 00:1f.3: enabled 1
+Root Device scanning...
+scan_static_bus for Root Device
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 7
+vendor: 0x8086. device: 0x2280
+class: 0x06 Bridge
+subclass: 0x00 Host bridge
+prog: 0x00
+revision: 0x35
+CPU_CLUSTER: 0 enabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 6
+vendor: 0x8086. device: 0x2280
+class: 0x06 Bridge
+subclass: 0x00 Host bridge
+prog: 0x00
+revision: 0x35
+DOMAIN: 0000 enabled
+DOMAIN: 0000 scanning...
+PCI: pci_scan_bus for bus 00
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x2280
+class: 0x06 Bridge
+subclass: 0x00 Host bridge
+prog: 0x00
+revision: 0x35
+PCI: 00:00.0 [8086/2280] ops
+PCI: 00:00.0 [8086/2280] enabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x22b1
+class: 0x03 Display
+subclass: 0x00 VGA compatible controller
+prog: 0x00
+revision: 0x35
+PCI: 00:02.0 [8086/22b1] ops
+PCI: 00:02.0 [8086/22b1] enabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0xffff. device: 0xffff
+class: 0xff Unassigned class
+subclass: 0xff ???
+prog: 0xff
+revision: 0xff
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:03.0: Disabling device: 03.0
+src/soc/intel/braswell/southcluster.c/place_device_in_d3hot (Intel Braswell SoC)
+Could not place 03.0 into D3Hot. Keeping device visible.
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0xffff. device: 0xffff
+class: 0xff Unassigned class
+subclass: 0xff ???
+prog: 0xff
+revision: 0xff
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:0b.0: Disabling device: 0b.0
+src/soc/intel/braswell/southcluster.c/place_device_in_d3hot (Intel Braswell SoC)
+Could not place 0b.0 into D3Hot. Keeping device visible.
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0xffff. device: 0xffff
+class: 0xff Unassigned class
+subclass: 0xff ???
+prog: 0xff
+revision: 0xff
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:10.0: Disabling device: 10.0
+src/soc/intel/braswell/southcluster.c/place_device_in_d3hot (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/set_d3hot_bits (Intel Braswell SoC, 0x00000080)
+Power management CAP offset 0x80.
+src/soc/intel/braswell/southcluster.c/sc_disable_devfn (Intel Braswell SoC)
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0xffff. device: 0xffff
+class: 0xff Unassigned class
+subclass: 0xff ???
+prog: 0xff
+revision: 0xff
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:12.0: Disabling device: 12.0
+src/soc/intel/braswell/southcluster.c/place_device_in_d3hot (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/set_d3hot_bits (Intel Braswell SoC, 0x00000080)
+Power management CAP offset 0x80.
+src/soc/intel/braswell/southcluster.c/sc_disable_devfn (Intel Braswell SoC)
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x22a3
+class: 0x01 Mass storage
+subclass: 0x06 SATA controller
+prog: 0x01
+revision: 0x35
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:13.0 [8086/0000] ops
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:13.0 [8086/22a3] enabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x22b5
+class: 0x0c Serial bus
+subclass: 0x03 USB controller
+prog: 0x30
+revision: 0x35
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:14.0 [8086/22b5] ops
+PCI: 00:14.0 [8086/22b5] enabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0xffff. device: 0xffff
+class: 0xff Unassigned class
+subclass: 0xff ???
+prog: 0xff
+revision: 0xff
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:18.0: Disabling device: 18.0
+src/soc/intel/braswell/southcluster.c/place_device_in_d3hot (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/set_d3hot_bits (Intel Braswell SoC, 0x00000080)
+Power management CAP offset 0x80.
+src/soc/intel/braswell/southcluster.c/sc_disable_devfn (Intel Braswell SoC)
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x22c1
+class: 0x0c Serial bus
+subclass: 0x80 Serial Bus Controller
+prog: 0x00
+revision: 0x35
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:18.1: Disabling device: 18.1
+src/soc/intel/braswell/southcluster.c/place_device_in_d3hot (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/set_d3hot_bits (Intel Braswell SoC, 0x00000080)
+Power management CAP offset 0x80.
+src/soc/intel/braswell/southcluster.c/sc_disable_devfn (Intel Braswell SoC)
+PCI: 00:18.1 [8086/0000] ops
+PCI: 00:18.1 [8086/22c1] disabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x22c2
+class: 0x0c Serial bus
+subclass: 0x80 Serial Bus Controller
+prog: 0x00
+revision: 0x35
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:18.2: Disabling device: 18.2
+src/soc/intel/braswell/southcluster.c/place_device_in_d3hot (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/set_d3hot_bits (Intel Braswell SoC, 0x00000080)
+Power management CAP offset 0x80.
+src/soc/intel/braswell/southcluster.c/sc_disable_devfn (Intel Braswell SoC)
+PCI: 00:18.2 [8086/0000] ops
+PCI: 00:18.2 [8086/22c2] disabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x22c3
+class: 0x0c Serial bus
+subclass: 0x80 Serial Bus Controller
+prog: 0x00
+revision: 0x35
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:18.3: Disabling device: 18.3
+src/soc/intel/braswell/southcluster.c/place_device_in_d3hot (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/set_d3hot_bits (Intel Braswell SoC, 0x00000080)
+Power management CAP offset 0x80.
+src/soc/intel/braswell/southcluster.c/sc_disable_devfn (Intel Braswell SoC)
+PCI: 00:18.3 [8086/0000] ops
+PCI: 00:18.3 [8086/22c3] disabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x22c4
+class: 0x0c Serial bus
+subclass: 0x80 Serial Bus Controller
+prog: 0x00
+revision: 0x35
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:18.4: Disabling device: 18.4
+src/soc/intel/braswell/southcluster.c/place_device_in_d3hot (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/set_d3hot_bits (Intel Braswell SoC, 0x00000080)
+Power management CAP offset 0x80.
+src/soc/intel/braswell/southcluster.c/sc_disable_devfn (Intel Braswell SoC)
+PCI: 00:18.4 [8086/0000] ops
+PCI: 00:18.4 [8086/22c4] disabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x22c5
+class: 0x0c Serial bus
+subclass: 0x80 Serial Bus Controller
+prog: 0x00
+revision: 0x35
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:18.5: Disabling device: 18.5
+src/soc/intel/braswell/southcluster.c/place_device_in_d3hot (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/set_d3hot_bits (Intel Braswell SoC, 0x00000080)
+Power management CAP offset 0x80.
+src/soc/intel/braswell/southcluster.c/sc_disable_devfn (Intel Braswell SoC)
+PCI: 00:18.5 [8086/0000] ops
+PCI: 00:18.5 [8086/22c5] disabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x22c6
+class: 0x0c Serial bus
+subclass: 0x80 Serial Bus Controller
+prog: 0x00
+revision: 0x35
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:18.6: Disabling device: 18.6
+src/soc/intel/braswell/southcluster.c/place_device_in_d3hot (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/set_d3hot_bits (Intel Braswell SoC, 0x00000080)
+Power management CAP offset 0x80.
+src/soc/intel/braswell/southcluster.c/sc_disable_devfn (Intel Braswell SoC)
+PCI: 00:18.6 [8086/0000] ops
+PCI: 00:18.6 [8086/22c6] disabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x22c7
+class: 0x0c Serial bus
+subclass: 0x80 Serial Bus Controller
+prog: 0x00
+revision: 0x35
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:18.7: Disabling device: 18.7
+src/soc/intel/braswell/southcluster.c/place_device_in_d3hot (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/set_d3hot_bits (Intel Braswell SoC, 0x00000080)
+Power management CAP offset 0x80.
+src/soc/intel/braswell/southcluster.c/sc_disable_devfn (Intel Braswell SoC)
+PCI: 00:18.7 [8086/0000] ops
+PCI: 00:18.7 [8086/22c7] disabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0xffff. device: 0xffff
+class: 0xff Unassigned class
+subclass: 0xff ???
+prog: 0xff
+revision: 0xff
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: Static device PCI: 00:1a.0 not found, disabling it.
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x2284
+class: 0x04 Multimedia
+subclass: 0x03 Audio device
+prog: 0x00
+revision: 0x35
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:1b.0 [8086/0000] bus ops
+PCI: 00:1b.0 [8086/2284] enabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x22c8
+class: 0x06 Bridge
+subclass: 0x04 PCI bridge
+prog: 0x00
+revision: 0x35
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:1c.0 [8086/0000] bus ops
+src/soc/intel/braswell/pcie.c/pcie_enable (Intel Braswell SoC)
+src/soc/intel/braswell/pcie.c/check_port_enabled (Intel Braswell SoC)
+src/soc/intel/braswell/pcie.c/check_device_present (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:1c.0 [8086/22c8] enabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x22ca
+class: 0x06 Bridge
+subclass: 0x04 PCI bridge
+prog: 0x00
+revision: 0x35
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:1c.1 [8086/0000] bus ops
+src/soc/intel/braswell/pcie.c/pcie_enable (Intel Braswell SoC)
+src/soc/intel/braswell/pcie.c/check_port_enabled (Intel Braswell SoC)
+src/soc/intel/braswell/pcie.c/check_device_present (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:1c.1 [8086/22ca] enabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x22cc
+class: 0x06 Bridge
+subclass: 0x04 PCI bridge
+prog: 0x00
+revision: 0x35
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:1c.2 [8086/0000] bus ops
+src/soc/intel/braswell/pcie.c/pcie_enable (Intel Braswell SoC)
+src/soc/intel/braswell/pcie.c/check_port_enabled (Intel Braswell SoC)
+src/soc/intel/braswell/pcie.c/check_device_present (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:1c.2 [8086/22cc] enabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x22ce
+class: 0x06 Bridge
+subclass: 0x04 PCI bridge
+prog: 0x00
+revision: 0x35
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:1c.3 [8086/0000] bus ops
+src/soc/intel/braswell/pcie.c/pcie_enable (Intel Braswell SoC)
+src/soc/intel/braswell/pcie.c/check_port_enabled (Intel Braswell SoC)
+src/soc/intel/braswell/pcie.c/check_device_present (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:1c.3 [8086/22ce] enabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0xffff. device: 0xffff
+class: 0xff Unassigned class
+subclass: 0xff ???
+prog: 0xff
+revision: 0xff
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:1e.0: Disabling device: 1e.0
+src/soc/intel/braswell/southcluster.c/place_device_in_d3hot (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/set_d3hot_bits (Intel Braswell SoC, 0x00000080)
+Power management CAP offset 0x80.
+src/soc/intel/braswell/southcluster.c/sc_disable_devfn (Intel Braswell SoC)
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0xffff. device: 0xffff
+class: 0xff Unassigned class
+subclass: 0xff ???
+prog: 0xff
+revision: 0xff
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:1e.3: Disabling device: 1e.3
+src/soc/intel/braswell/southcluster.c/place_device_in_d3hot (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/set_d3hot_bits (Intel Braswell SoC, 0x00000080)
+Power management CAP offset 0x80.
+src/soc/intel/braswell/southcluster.c/sc_disable_devfn (Intel Braswell SoC)
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0xffff. device: 0xffff
+class: 0xff Unassigned class
+subclass: 0xff ???
+prog: 0xff
+revision: 0xff
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:1e.4: Disabling device: 1e.4
+src/soc/intel/braswell/southcluster.c/place_device_in_d3hot (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/set_d3hot_bits (Intel Braswell SoC, 0x00000080)
+Power management CAP offset 0x80.
+src/soc/intel/braswell/southcluster.c/sc_disable_devfn (Intel Braswell SoC)
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x229c
+class: 0x06 Bridge
+subclass: 0x01 ISA bridge
+prog: 0x00
+revision: 0x35
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:1f.0 [8086/229c] bus ops
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:1f.0 [8086/229c] enabled
+----------
+src/soc/intel/braswell/chip.c/enable_dev (Intel Braswell SoC), type: 2
+vendor: 0x8086. device: 0x2292
+class: 0x0c Serial bus
+subclass: 0x05 SMBus
+prog: 0x00
+revision: 0x35
+src/soc/intel/braswell/southcluster.c/southcluster_enable_dev (Intel Braswell SoC)
+PCI: 00:1f.3 [8086/2292] enabled
+PCI: Leftover static devices:
+PCI: 00:03.0
+PCI: 00:0b.0
+PCI: 00:10.0
+PCI: 00:12.0
+PCI: 00:18.0
+PCI: 00:1a.0
+PCI: 00:1e.0
+PCI: 00:1e.3
+PCI: 00:1e.4
+PCI: Check your devicetree.cb.
+PCI: 00:1b.0 scanning...
+scan_bus: bus PCI: 00:1b.0 finished in 0 msecs
+PCI: 00:1c.0 scanning...
+do_pci_scan_bridge for PCI: 00:1c.0
+PCI: pci_scan_bus for bus 01
+PCI: 01:00.0 [8086/157b] enabled
+Enabling Common Clock Configuration
+PCIE CLK PM is not supported by endpoint
+ASPM: Enabled L1
+PCIe: Max_Payload_Size adjusted to 128
+Failed to enable LTR for dev = PCI: 01:00.0
+scan_bus: bus PCI: 00:1c.0 finished in 25 msecs
+PCI: 00:1c.1 scanning...
+do_pci_scan_bridge for PCI: 00:1c.1
+PCI: pci_scan_bus for bus 02
+PCI: 02:00.0 [8086/157b] enabled
+Enabling Common Clock Configuration
+PCIE CLK PM is not supported by endpoint
+ASPM: Enabled L1
+PCIe: Max_Payload_Size adjusted to 128
+Failed to enable LTR for dev = PCI: 02:00.0
+scan_bus: bus PCI: 00:1c.1 finished in 25 msecs
+PCI: 00:1c.2 scanning...
+do_pci_scan_bridge for PCI: 00:1c.2
+PCI: pci_scan_bus for bus 03
+PCI: 03:00.0 [8086/157b] enabled
+Enabling Common Clock Configuration
+PCIE CLK PM is not supported by endpoint
+ASPM: Enabled L1
+PCIe: Max_Payload_Size adjusted to 128
+Failed to enable LTR for dev = PCI: 03:00.0
+scan_bus: bus PCI: 00:1c.2 finished in 25 msecs
+PCI: 00:1c.3 scanning...
+do_pci_scan_bridge for PCI: 00:1c.3
+PCI: pci_scan_bus for bus 04
+PCI: 04:00.0 [8086/157b] enabled
+Enabling Common Clock Configuration
+PCIE CLK PM is not supported by endpoint
+ASPM: Enabled L1
+PCIe: Max_Payload_Size adjusted to 128
+Failed to enable LTR for dev = PCI: 04:00.0
+scan_bus: bus PCI: 00:1c.3 finished in 25 msecs
+PCI: 00:1f.0 scanning...
+scan_static_bus for PCI: 00:1f.0
+PNP: 002e.0 disabled
+PNP: 002e.1 enabled
+PNP: 002e.4 disabled
+PNP: 002e.5 disabled
+PNP: 002e.6 disabled
+PNP: 002e.7 disabled
+PNP: 002e.a disabled
+scan_static_bus for PCI: 00:1f.0 done
+scan_bus: bus PCI: 00:1f.0 finished in 19 msecs
+scan_bus: bus DOMAIN: 0000 finished in 1444 msecs
+scan_static_bus for Root Device done
+scan_bus: bus Root Device finished in 1495 msecs
+done
+BS: BS_DEV_ENUMERATE run times (exec / console): 2 / 1680 ms
+FMAP: area RW_MRC_CACHE found @ 300000 (65536 bytes)
+MRC: Checking cached data update for 'RW_MRC_CACHE'.
+Manufacturer: c2
+SF: Detected c2 2537 with sector size 0x1000, total 0x800000
+MRC: no data in 'RW_MRC_CACHE'
+MRC: cache data 'RW_MRC_CACHE' needs update.
+BS: BS_DEV_ENUMERATE exit times (exec / console): 131 / 23 ms
+found VGA at PCI: 00:02.0
+Setting up VGA for PCI: 00:02.0
+Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
+Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
+Allocating resources...
+Reading resources...
+Root Device read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0
+PCI: 00:1c.0 read_resources bus 1 link: 0
+PCI: 00:1c.0 read_resources bus 1 link: 0 done
+PCI: 00:1c.1 read_resources bus 2 link: 0
+PCI: 00:1c.1 read_resources bus 2 link: 0 done
+PCI: 00:1c.2 read_resources bus 3 link: 0
+PCI: 00:1c.2 read_resources bus 3 link: 0 done
+PCI: 00:1c.3 read_resources bus 4 link: 0
+PCI: 00:1c.3 read_resources bus 4 link: 0 done
+src/soc/intel/braswell/southcluster.c/sc_read_resources (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/sc_add_mmio_resources (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/add_mmio_resource (Intel Braswell SoC, 0x00000000feb00000, 0x0000000000100000)
+src/soc/intel/braswell/southcluster.c/add_mmio_resource (Intel Braswell SoC, 0x00000000fed03000, 0x0000000000000400)
+src/soc/intel/braswell/southcluster.c/add_mmio_resource (Intel Braswell SoC, 0x00000000fed80000, 0x0000000000040000)
+src/soc/intel/braswell/southcluster.c/add_mmio_resource (Intel Braswell SoC, 0x00000000fed08000, 0x0000000000002000)
+src/soc/intel/braswell/southcluster.c/add_mmio_resource (Intel Braswell SoC, 0x00000000fed01000, 0x0000000000000400)
+src/soc/intel/braswell/southcluster.c/add_mmio_resource (Intel Braswell SoC, 0x00000000fea00000, 0x0000000000100000)
+src/soc/intel/braswell/southcluster.c/add_mmio_resource (Intel Braswell SoC, 0x00000000fed06000, 0x0000000000000800)
+src/soc/intel/braswell/southcluster.c/add_mmio_resource (Intel Braswell SoC, 0x00000000fed1c000, 0x0000000000000400)
+src/soc/intel/braswell/southcluster.c/add_mmio_resource (Intel Braswell SoC, 0x00000000ff800000, 0x0000000000800000)
+src/soc/intel/braswell/southcluster.c/add_mmio_resource (Intel Braswell SoC, 0x00000000fec00000, 0x0000000000001000)
+src/soc/intel/braswell/southcluster.c/sc_add_io_resources (Intel Braswell SoC)
+src/soc/intel/braswell/southcluster.c/sc_add_io_resource (Intel Braswell SoC, 0x00000500, 0x00000100, 0x00000048)
+src/soc/intel/braswell/southcluster.c/sc_add_io_resource (Intel Braswell SoC, 0x00000400, 0x00000080, 0x00000040)
+PCI: 00:1f.0 read_resources bus 0 link: 0
+PNP: 002e.1 missing read_resources
+PCI: 00:1f.0 read_resources bus 0 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0 done
+Root Device read_resources bus 0 link: 0 done
+Done reading resources.
+Show resources in subtree (Root Device)...After reading.
+ Root Device child on link 0 CPU_CLUSTER: 0
+  CPU_CLUSTER: 0 child on link 0 APIC: 00
+   APIC: 00
+  DOMAIN: 0000 child on link 0 PCI: 00:00.0
+  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
+  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
+   PCI: 00:00.0
+   PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 27
+   PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0
+   PCI: 00:00.0 resource base 100000 size 7ccfe000 align 0 gran 0 limit 0 flags e0004200 index 1
+   PCI: 00:00.0 resource base 7cdfe000 size a02000 align 0 gran 0 limit 0 flags f0004200 index 2
+   PCI: 00:00.0 resource base 7d800000 size 2800000 align 0 gran 0 limit 0 flags f0000200 index 3
+   PCI: 00:00.0 resource base 100000000 size 80000000 align 0 gran 0 limit 0 flags e0004200 index 4
+   PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 5
+   PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 6
+   PCI: 00:00.0 resource base fee00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 7
+   PCI: 00:02.0
+   PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
+   PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
+   PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
+   PCI: 00:13.0
+   PCI: 00:13.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+   PCI: 00:13.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
+   PCI: 00:14.0
+   PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
+   PCI: 00:18.1
+   PCI: 00:18.2
+   PCI: 00:18.3
+   PCI: 00:18.4
+   PCI: 00:18.5
+   PCI: 00:18.6
+   PCI: 00:18.7
+   PCI: 00:1b.0
+   PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
+   PCI: 00:1c.0 child on link 0 PCI: 01:00.0
+   PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+    PCI: 01:00.0
+    PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
+    PCI: 01:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
+    PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c
+   PCI: 00:1c.1 child on link 0 PCI: 02:00.0
+   PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+   PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+   PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+    PCI: 02:00.0
+    PCI: 02:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
+    PCI: 02:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
+    PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c
+   PCI: 00:1c.2 child on link 0 PCI: 03:00.0
+   PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+   PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+   PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+    PCI: 03:00.0
+    PCI: 03:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
+    PCI: 03:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
+    PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c
+   PCI: 00:1c.3 child on link 0 PCI: 04:00.0
+   PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+    PCI: 04:00.0
+    PCI: 04:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
+    PCI: 04:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
+    PCI: 04:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c
+   PCI: 00:1f.0 child on link 0 PNP: 002e.0
+   PCI: 00:1f.0 resource base feb00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index feb
+   PCI: 00:1f.0 resource base fed03000 size 400 align 0 gran 0 limit 0 flags f0000200 index 44
+   PCI: 00:1f.0 resource base fed80000 size 40000 align 0 gran 0 limit 0 flags f0000200 index 4c
+   PCI: 00:1f.0 resource base fed08000 size 2000 align 0 gran 0 limit 0 flags f0000200 index 50
+   PCI: 00:1f.0 resource base fed01000 size 400 align 0 gran 0 limit 0 flags f0000200 index 54
+   PCI: 00:1f.0 resource base fea00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 58
+   PCI: 00:1f.0 resource base fed06000 size 800 align 0 gran 0 limit 0 flags f0000200 index 5c
+   PCI: 00:1f.0 resource base fed1c000 size 400 align 0 gran 0 limit 0 flags f0000200 index f0
+   PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index fff
+   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags f0000200 index fec
+   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
+    PNP: 002e.0
+    PNP: 002e.1
+    PNP: 002e.1 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
+    PNP: 002e.1 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
+    PNP: 002e.4
+    PNP: 002e.5
+    PNP: 002e.6
+    PNP: 002e.7
+    PNP: 002e.a
+   PCI: 00:1f.3
+   PCI: 00:1f.3 resource base 0 size 20 align 12 gran 5 limit ffffffff flags 200 index 10
+   PCI: 00:1f.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
+PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 01:00.0 18 *  [0x0 - 0x1f] io
+PCI: 00:1c.0 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 02:00.0 18 *  [0x0 - 0x1f] io
+PCI: 00:1c.1 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 03:00.0 18 *  [0x0 - 0x1f] io
+PCI: 00:1c.2 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 04:00.0 18 *  [0x0 - 0x1f] io
+PCI: 00:1c.3 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.0 1c *  [0x0 - 0xfff] io
+PCI: 00:1c.1 1c *  [0x1000 - 0x1fff] io
+PCI: 00:1c.2 1c *  [0x2000 - 0x2fff] io
+PCI: 00:1c.3 1c *  [0x3000 - 0x3fff] io
+PCI: 00:02.0 20 *  [0x4000 - 0x403f] io
+PCI: 00:13.0 20 *  [0x4040 - 0x405f] io
+PCI: 00:1f.3 20 *  [0x4060 - 0x407f] io
+DOMAIN: 0000 io: base: 4080 size: 4080 align: 12 gran: 0 limit: ffff done
+DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
+PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 01:00.0 10 *  [0x0 - 0x1ffff] mem
+PCI: 01:00.0 1c *  [0x20000 - 0x23fff] mem
+PCI: 00:1c.0 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 02:00.0 10 *  [0x0 - 0x1ffff] mem
+PCI: 02:00.0 1c *  [0x20000 - 0x23fff] mem
+PCI: 00:1c.1 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 03:00.0 10 *  [0x0 - 0x1ffff] mem
+PCI: 03:00.0 1c *  [0x20000 - 0x23fff] mem
+PCI: 00:1c.2 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 04:00.0 10 *  [0x0 - 0x1ffff] mem
+PCI: 04:00.0 1c *  [0x20000 - 0x23fff] mem
+PCI: 00:1c.3 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
+PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
+PCI: 00:1c.0 20 *  [0x11000000 - 0x110fffff] mem
+PCI: 00:1c.1 20 *  [0x11100000 - 0x111fffff] mem
+PCI: 00:1c.2 20 *  [0x11200000 - 0x112fffff] mem
+PCI: 00:1c.3 20 *  [0x11300000 - 0x113fffff] mem
+PCI: 00:14.0 10 *  [0x11400000 - 0x1140ffff] mem
+PCI: 00:1b.0 10 *  [0x11410000 - 0x11413fff] mem
+PCI: 00:13.0 24 *  [0x11414000 - 0x114147ff] mem
+PCI: 00:1f.3 10 *  [0x11415000 - 0x1141501f] mem
+DOMAIN: 0000 mem: base: 11415020 size: 11415020 align: 28 gran: 0 limit: ffffffff done
+avoid_fixed_resources: DOMAIN: 0000
+avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
+constrain_resources: PCI: 00:00.0 27 base e0000000 limit efffffff mem (fixed)
+constrain_resources: PCI: 00:00.0 00 base 00000000 limit 0009ffff mem (fixed)
+constrain_resources: PCI: 00:00.0 01 base 00100000 limit 7cdfdfff mem (fixed)
+constrain_resources: PCI: 00:00.0 02 base 7cdfe000 limit 7d7fffff mem (fixed)
+constrain_resources: PCI: 00:00.0 03 base 7d800000 limit 7fffffff mem (fixed)
+constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
+skipping PNP: 002e.1@60 fixed resource, size=0!
+skipping PNP: 002e.1@70 fixed resource, size=0!
+avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
+Setting resources...
+DOMAIN: 0000 io: base:1000 size:4080 align:12 gran:0 limit:ffff
+PCI: 00:1c.0 1c *  [0x1000 - 0x1fff] io
+PCI: 00:1c.1 1c *  [0x2000 - 0x2fff] io
+PCI: 00:1c.2 1c *  [0x3000 - 0x3fff] io
+PCI: 00:1c.3 1c *  [0x4000 - 0x4fff] io
+PCI: 00:02.0 20 *  [0x5000 - 0x503f] io
+PCI: 00:13.0 20 *  [0x5040 - 0x505f] io
+PCI: 00:1f.3 20 *  [0x5060 - 0x507f] io
+DOMAIN: 0000 io: next_base: 5080 size: 4080 align: 12 gran: 0 done
+PCI: 00:1c.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff
+PCI: 01:00.0 18 *  [0x1000 - 0x101f] io
+PCI: 00:1c.0 io: next_base: 1020 size: 1000 align: 12 gran: 12 done
+PCI: 00:1c.1 io: base:2000 size:1000 align:12 gran:12 limit:2fff
+PCI: 02:00.0 18 *  [0x2000 - 0x201f] io
+PCI: 00:1c.1 io: next_base: 2020 size: 1000 align: 12 gran: 12 done
+PCI: 00:1c.2 io: base:3000 size:1000 align:12 gran:12 limit:3fff
+PCI: 03:00.0 18 *  [0x3000 - 0x301f] io
+PCI: 00:1c.2 io: next_base: 3020 size: 1000 align: 12 gran: 12 done
+PCI: 00:1c.3 io: base:4000 size:1000 align:12 gran:12 limit:4fff
+PCI: 04:00.0 18 *  [0x4000 - 0x401f] io
+PCI: 00:1c.3 io: next_base: 4020 size: 1000 align: 12 gran: 12 done
+DOMAIN: 0000 mem: base:c0000000 size:11415020 align:28 gran:0 limit:dfffffff
+PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
+PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
+PCI: 00:1c.0 20 *  [0xd1000000 - 0xd10fffff] mem
+PCI: 00:1c.1 20 *  [0xd1100000 - 0xd11fffff] mem
+PCI: 00:1c.2 20 *  [0xd1200000 - 0xd12fffff] mem
+PCI: 00:1c.3 20 *  [0xd1300000 - 0xd13fffff] mem
+PCI: 00:14.0 10 *  [0xd1400000 - 0xd140ffff] mem
+PCI: 00:1b.0 10 *  [0xd1410000 - 0xd1413fff] mem
+PCI: 00:13.0 24 *  [0xd1414000 - 0xd14147ff] mem
+PCI: 00:1f.3 10 *  [0xd1415000 - 0xd141501f] mem
+DOMAIN: 0000 mem: next_base: d1415020 size: 11415020 align: 28 gran: 0 done
+PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
+PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
+PCI: 01:00.0 10 *  [0xd1000000 - 0xd101ffff] mem
+PCI: 01:00.0 1c *  [0xd1020000 - 0xd1023fff] mem
+PCI: 00:1c.0 mem: next_base: d1024000 size: 100000 align: 20 gran: 20 done
+PCI: 00:1c.1 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
+PCI: 00:1c.1 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.1 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
+PCI: 02:00.0 10 *  [0xd1100000 - 0xd111ffff] mem
+PCI: 02:00.0 1c *  [0xd1120000 - 0xd1123fff] mem
+PCI: 00:1c.1 mem: next_base: d1124000 size: 100000 align: 20 gran: 20 done
+PCI: 00:1c.2 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
+PCI: 00:1c.2 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.2 mem: base:d1200000 size:100000 align:20 gran:20 limit:d12fffff
+PCI: 03:00.0 10 *  [0xd1200000 - 0xd121ffff] mem
+PCI: 03:00.0 1c *  [0xd1220000 - 0xd1223fff] mem
+PCI: 00:1c.2 mem: next_base: d1224000 size: 100000 align: 20 gran: 20 done
+PCI: 00:1c.3 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
+PCI: 00:1c.3 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.3 mem: base:d1300000 size:100000 align:20 gran:20 limit:d13fffff
+PCI: 04:00.0 10 *  [0xd1300000 - 0xd131ffff] mem
+PCI: 04:00.0 1c *  [0xd1320000 - 0xd1323fff] mem
+PCI: 00:1c.3 mem: next_base: d1324000 size: 100000 align: 20 gran: 20 done
+Root Device assign_resources, bus 0 link: 0
+src/soc/intel/braswell/chip.c/pci_domain_set_resources (Intel Braswell SoC)
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+PCI: 00:00.0 missing set_resources
+PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
+PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
+PCI: 00:02.0 20 <- [0x0000005000 - 0x000000503f] size 0x00000040 gran 0x06 io
+PCI: 00:13.0 20 <- [0x0000005040 - 0x000000505f] size 0x00000020 gran 0x05 io
+PCI: 00:13.0 24 <- [0x00d1414000 - 0x00d14147ff] size 0x00000800 gran 0x0b mem
+PCI: 00:14.0 10 <- [0x00d1400000 - 0x00d140ffff] size 0x00010000 gran 0x10 mem64
+PCI: 00:1b.0 10 <- [0x00d1410000 - 0x00d1413fff] size 0x00004000 gran 0x0e mem64
+PCI: 00:1c.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
+PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
+PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
+PCI: 00:1c.0 assign_resources, bus 1 link: 0
+PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d101ffff] size 0x00020000 gran 0x11 mem
+PCI: 01:00.0 18 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io
+PCI: 01:00.0 1c <- [0x00d1020000 - 0x00d1023fff] size 0x00004000 gran 0x0e mem
+PCI: 00:1c.0 assign_resources, bus 1 link: 0
+PCI: 00:1c.1 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 02 io
+PCI: 00:1c.1 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
+PCI: 00:1c.1 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
+PCI: 00:1c.1 assign_resources, bus 2 link: 0
+PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d111ffff] size 0x00020000 gran 0x11 mem
+PCI: 02:00.0 18 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io
+PCI: 02:00.0 1c <- [0x00d1120000 - 0x00d1123fff] size 0x00004000 gran 0x0e mem
+PCI: 00:1c.1 assign_resources, bus 2 link: 0
+PCI: 00:1c.2 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 03 io
+PCI: 00:1c.2 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
+PCI: 00:1c.2 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 bus 03 mem
+PCI: 00:1c.2 assign_resources, bus 3 link: 0
+PCI: 03:00.0 10 <- [0x00d1200000 - 0x00d121ffff] size 0x00020000 gran 0x11 mem
+PCI: 03:00.0 18 <- [0x0000003000 - 0x000000301f] size 0x00000020 gran 0x05 io
+PCI: 03:00.0 1c <- [0x00d1220000 - 0x00d1223fff] size 0x00004000 gran 0x0e mem
+PCI: 00:1c.2 assign_resources, bus 3 link: 0
+PCI: 00:1c.3 1c <- [0x0000004000 - 0x0000004fff] size 0x00001000 gran 0x0c bus 04 io
+PCI: 00:1c.3 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 04 prefmem
+PCI: 00:1c.3 20 <- [0x00d1300000 - 0x00d13fffff] size 0x00100000 gran 0x14 bus 04 mem
+PCI: 00:1c.3 assign_resources, bus 4 link: 0
+PCI: 04:00.0 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
+PCI: 04:00.0 18 <- [0x0000004000 - 0x000000401f] size 0x00000020 gran 0x05 io
+PCI: 04:00.0 1c <- [0x00d1320000 - 0x00d1323fff] size 0x00004000 gran 0x0e mem
+PCI: 00:1c.3 assign_resources, bus 4 link: 0
+PCI: 00:1f.0 assign_resources, bus 0 link: 0
+PNP: 002e.1 missing set_resources
+PCI: 00:1f.0 assign_resources, bus 0 link: 0
+PCI: 00:1f.3 10 <- [0x00d1415000 - 0x00d141501f] size 0x00000020 gran 0x05 mem
+PCI: 00:1f.3 20 <- [0x0000005060 - 0x000000507f] size 0x00000020 gran 0x05 io
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+Root Device assign_resources, bus 0 link: 0
+Done setting resources.
+Show resources in subtree (Root Device)...After assigning values.
+ Root Device child on link 0 CPU_CLUSTER: 0
+  CPU_CLUSTER: 0 child on link 0 APIC: 00
+   APIC: 00
+  DOMAIN: 0000 child on link 0 PCI: 00:00.0
+  DOMAIN: 0000 resource base 1000 size 4080 align 12 gran 0 limit ffff flags 40040100 index 10000000
+  DOMAIN: 0000 resource base c0000000 size 11415020 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
+   PCI: 00:00.0
+   PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 27
+   PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0
+   PCI: 00:00.0 resource base 100000 size 7ccfe000 align 0 gran 0 limit 0 flags e0004200 index 1
+   PCI: 00:00.0 resource base 7cdfe000 size a02000 align 0 gran 0 limit 0 flags f0004200 index 2
+   PCI: 00:00.0 resource base 7d800000 size 2800000 align 0 gran 0 limit 0 flags f0000200 index 3
+   PCI: 00:00.0 resource base 100000000 size 80000000 align 0 gran 0 limit 0 flags e0004200 index 4
+   PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 5
+   PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 6
+   PCI: 00:00.0 resource base fee00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 7
+   PCI: 00:02.0
+   PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
+   PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
+   PCI: 00:02.0 resource base 5000 size 40 align 6 gran 6 limit 503f flags 60000100 index 20
+   PCI: 00:13.0
+   PCI: 00:13.0 resource base 5040 size 20 align 5 gran 5 limit 505f flags 60000100 index 20
+   PCI: 00:13.0 resource base d1414000 size 800 align 12 gran 11 limit d14147ff flags 60000200 index 24
+   PCI: 00:14.0
+   PCI: 00:14.0 resource base d1400000 size 10000 align 16 gran 16 limit d140ffff flags 60000201 index 10
+   PCI: 00:18.1
+   PCI: 00:18.2
+   PCI: 00:18.3
+   PCI: 00:18.4
+   PCI: 00:18.5
+   PCI: 00:18.6
+   PCI: 00:18.7
+   PCI: 00:1b.0
+   PCI: 00:1b.0 resource base d1410000 size 4000 align 14 gran 14 limit d1413fff flags 60000201 index 10
+   PCI: 00:1c.0 child on link 0 PCI: 01:00.0
+   PCI: 00:1c.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
+   PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
+   PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
+    PCI: 01:00.0
+    PCI: 01:00.0 resource base d1000000 size 20000 align 17 gran 17 limit d101ffff flags 60000200 index 10
+    PCI: 01:00.0 resource base 1000 size 20 align 5 gran 5 limit 101f flags 60000100 index 18
+    PCI: 01:00.0 resource base d1020000 size 4000 align 14 gran 14 limit d1023fff flags 60000200 index 1c
+   PCI: 00:1c.1 child on link 0 PCI: 02:00.0
+   PCI: 00:1c.1 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
+   PCI: 00:1c.1 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
+   PCI: 00:1c.1 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
+    PCI: 02:00.0
+    PCI: 02:00.0 resource base d1100000 size 20000 align 17 gran 17 limit d111ffff flags 60000200 index 10
+    PCI: 02:00.0 resource base 2000 size 20 align 5 gran 5 limit 201f flags 60000100 index 18
+    PCI: 02:00.0 resource base d1120000 size 4000 align 14 gran 14 limit d1123fff flags 60000200 index 1c
+   PCI: 00:1c.2 child on link 0 PCI: 03:00.0
+   PCI: 00:1c.2 resource base 3000 size 1000 align 12 gran 12 limit 3fff flags 60080102 index 1c
+   PCI: 00:1c.2 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
+   PCI: 00:1c.2 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60080202 index 20
+    PCI: 03:00.0
+    PCI: 03:00.0 resource base d1200000 size 20000 align 17 gran 17 limit d121ffff flags 60000200 index 10
+    PCI: 03:00.0 resource base 3000 size 20 align 5 gran 5 limit 301f flags 60000100 index 18
+    PCI: 03:00.0 resource base d1220000 size 4000 align 14 gran 14 limit d1223fff flags 60000200 index 1c
+   PCI: 00:1c.3 child on link 0 PCI: 04:00.0
+   PCI: 00:1c.3 resource base 4000 size 1000 align 12 gran 12 limit 4fff flags 60080102 index 1c
+   PCI: 00:1c.3 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
+   PCI: 00:1c.3 resource base d1300000 size 100000 align 20 gran 20 limit d13fffff flags 60080202 index 20
+    PCI: 04:00.0
+    PCI: 04:00.0 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
+    PCI: 04:00.0 resource base 4000 size 20 align 5 gran 5 limit 401f flags 60000100 index 18
+    PCI: 04:00.0 resource base d1320000 size 4000 align 14 gran 14 limit d1323fff flags 60000200 index 1c
+   PCI: 00:1f.0 child on link 0 PNP: 002e.0
+   PCI: 00:1f.0 resource base feb00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index feb
+   PCI: 00:1f.0 resource base fed03000 size 400 align 0 gran 0 limit 0 flags f0000200 index 44
+   PCI: 00:1f.0 resource base fed80000 size 40000 align 0 gran 0 limit 0 flags f0000200 index 4c
+   PCI: 00:1f.0 resource base fed08000 size 2000 align 0 gran 0 limit 0 flags f0000200 index 50
+   PCI: 00:1f.0 resource base fed01000 size 400 align 0 gran 0 limit 0 flags f0000200 index 54
+   PCI: 00:1f.0 resource base fea00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 58
+   PCI: 00:1f.0 resource base fed06000 size 800 align 0 gran 0 limit 0 flags f0000200 index 5c
+   PCI: 00:1f.0 resource base fed1c000 size 400 align 0 gran 0 limit 0 flags f0000200 index f0
+   PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index fff
+   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags f0000200 index fec
+   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
+    PNP: 002e.0
+    PNP: 002e.1
+    PNP: 002e.1 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
+    PNP: 002e.1 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
+    PNP: 002e.4
+    PNP: 002e.5
+    PNP: 002e.6
+    PNP: 002e.7
+    PNP: 002e.a
+   PCI: 00:1f.3
+   PCI: 00:1f.3 resource base d1415000 size 20 align 12 gran 5 limit d141501f flags 60000200 index 10
+   PCI: 00:1f.3 resource base 5060 size 20 align 5 gran 5 limit 507f flags 60000100 index 20
+Done allocating resources.
+BS: BS_DEV_RESOURCES run times (exec / console): 4 / 2340 ms
+Calling FspNotify(0x00000020)
+BS: BS_DEV_RESOURCES exit times (exec / console): 0 / 3 ms
+Enabling resources...
+PCI: 00:02.0 subsystem <- 8086/22b1
+PCI: 00:02.0 cmd <- 03
+PCI: 00:13.0 subsystem <- 8086/22a3
+PCI: 00:13.0 cmd <- 107
+PCI: 00:14.0 subsystem <- 8086/22b5
+PCI: 00:14.0 cmd <- 102
+PCI: 00:1b.0 subsystem <- 8086/2284
+PCI: 00:1b.0 cmd <- 102
+PCI: 00:1c.0 bridge ctrl <- 0013
+PCI: 00:1c.0 subsystem <- 8086/22c8
+PCI: 00:1c.0 cmd <- 107
+PCI: 00:1c.1 bridge ctrl <- 0013
+PCI: 00:1c.1 subsystem <- 8086/22ca
+PCI: 00:1c.1 cmd <- 107
+PCI: 00:1c.2 bridge ctrl <- 0013
+PCI: 00:1c.2 subsystem <- 8086/22cc
+PCI: 00:1c.2 cmd <- 107
+PCI: 00:1c.3 bridge ctrl <- 0013
+PCI: 00:1c.3 subsystem <- 8086/22ce
+PCI: 00:1c.3 cmd <- 107
+PCI: 00:1f.3 subsystem <- 8086/2292
+PCI: 00:1f.3 cmd <- 103
+PCI: 01:00.0 cmd <- 03
+PCI: 02:00.0 cmd <- 03
+PCI: 03:00.0 cmd <- 03
+PCI: 04:00.0 cmd <- 03
+done.
+BS: BS_DEV_ENABLE run times (exec / console): 0 / 72 ms
+Initializing devices...
+Root Device init
+Root Device init finished in 0 msecs
+CPU_CLUSTER: 0 init
+src/soc/intel/braswell/cpu.c/soc_init_cpus (Intel Braswell SoC)
+MTRR: Physical address space:
+0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
+0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
+0x00000000000c0000 - 0x000000007d800000 size 0x7d740000 type 6
+0x000000007d800000 - 0x00000000c0000000 size 0x42800000 type 0
+0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
+0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
+0x0000000100000000 - 0x0000000180000000 size 0x80000000 type 6
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+call enable_fixed_mtrr()
+CPU physical address size: 36 bits
+MTRR: default type WB/UC MTRR counts: 6/5.
+MTRR: UC selected as default type.
+MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
+MTRR: 1 base 0x000000007d800000 mask 0x0000000fff800000 type 0
+MTRR: 2 base 0x000000007e000000 mask 0x0000000ffe000000 type 0
+MTRR: 3 base 0x00000000c0000000 mask 0x0000000ff0000000 type 1
+MTRR: 4 base 0x0000000100000000 mask 0x0000000f80000000 type 6
+
+MTRR check
+Fixed MTRRs   : Enabled
+Variable MTRRs: Enabled
+
+Turbo is available and visible
+Setting up SMI for CPU
+Will perform SMM setup.
+CPU: Intel(R) Celeron(R) CPU  J3160  @ 1.60GHz.
+Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
+Processing 16 relocs. Offset value of 0x00030000
+Attempting to start 3 APs
+Waiting for 10ms after sending INIT.
+Waiting for 1st SIPI to complete...AP: slot 1 apic_id 2.
+done.
+AP: slot 3 apic_id 4.
+Waiting for 2nd SIPI to complete...done.
+AP: slot 2 apic_id 6.
+Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b0 memsize: 0x1b0
+Processing 13 relocs. Offset value of 0x00038000
+SMM Module: stub loaded at 0x00038000. Will call 0x7cda95f6(0x00000000)
+Installing SMM handler to 0x7d000000
+Loading module at 0x7d010000 with entry 0x7d010056. filesize: 0x508 memsize: 0x4518
+Processing 23 relocs. Offset value of 0x7d010000
+Loading module at 0x7d008000 with entry 0x7d008000. filesize: 0x1b0 memsize: 0x1b0
+Processing 13 relocs. Offset value of 0x7d008000
+SMM Module: placing jmp sequence at 0x7d007c00 rel16 0x03fd
+SMM Module: placing jmp sequence at 0x7d007800 rel16 0x07fd
+SMM Module: placing jmp sequence at 0x7d007400 rel16 0x0bfd
+SMM Module: stub loaded at 0x7d008000. Will call 0x7d010056(0x00000000)
+Initializing Southbridge SMI... pmbase = 0x0400
+SMI_STS: PM1 
+PM1_STS: TMROF 
+New SMBASE 0x7d000000
+Relocation complete.
+microcode: Update skipped, already up-to-date
+New SMBASE 0x7cfffc00
+Relocation complete.
+microcode: Update skipped, already up-to-date
+New SMBASE 0x7cfff400
+Relocation complete.
+microcode: Update skipped, already up-to-date
+New SMBASE 0x7cfff800
+Relocation complete.
+microcode: Update skipped, already up-to-date
+Initializing CPU #0
+CPU: vendor Intel device 406c4
+CPU: family 06, model 4c, stepping 04
+src/soc/intel/braswell/cpu.c/soc_core_init (Intel(R) Celeron(R) CPU  J3160  @ 1.60GHz)
+Init Braswell core.
+Setting up local APIC...
+ apic_id: 0x00 done.
+VMX status: enabled
+IA32_FEATURE_CONTROL status: locked
+CPU #0 initialized
+Initializing CPU #1
+Initializing CPU #3
+CPU: vendor Intel device 406c4
+CPU: family 06, model 4c, stepping 04
+Initializing CPU #2
+src/soc/intel/braswell/cpu.c/soc_core_init (Intel(R) Celeron(R) CPU  J3160  @ 1.60GHz)
+Init Braswell core.
+Setting up local APIC...
+CPU: vendor Intel device 406c4
+ apic_id: 0x02 done.
+CPU: vendor Intel device 406c4
+Turbo is available and visible
+VMX status: enabled
+IA32_FEATURE_CONTROL status: locked
+CPU: family 06, model 4c, stepping 04
+CPU #1 initialized
+CPU: family 06, model 4c, stepping 04
+src/soc/intel/braswell/cpu.c/soc_core_init (Intel(R) Celeron(R) CPU  J3160  @ 1.60GHz)
+Init Braswell core.
+Setting up local APIC...
+src/soc/intel/braswell/cpu.c/soc_core_init (Intel(R) Celeron(R) CPU  J3160  @ 1.60GHz)
+Init Braswell core.
+Setting up local APIC...
+ apic_id: 0x06 done.
+ apic_id: 0x04 done.
+Turbo is available and visible
+Turbo is available and visible
+VMX status: enabled
+VMX status: enabled
+IA32_FEATURE_CONTROL status: locked
+IA32_FEATURE_CONTROL status: locked
+CPU #2 initialized
+CPU #3 initialized
+bsp_do_flight_plan done after 237 msecs.
+Enabling SMIs.
+GPIO_ROUT = 00006002
+ALT_GPIO_SMI = 00000080
+CPU_CLUSTER: 0 init finished in 472 msecs
+PCI: 00:02.0 init
+src/soc/intel/braswell/gfx.c/gfx_init (Intel Braswell SoC)
+src/soc/intel/braswell/gfx.c/gfx_pre_vbios_init (Intel Braswell SoC)
+GFX: Pre VBIOS Init
+src/soc/intel/braswell/gfx.c/gfx_post_vbios_init (Intel Braswell SoC)
+GFX: Post VBIOS Init
+PCI: 00:02.0 init finished in 21 msecs
+PCI: 00:13.0 init
+src/soc/intel/braswell/sata.c/sata_init (Intel Braswell SoC)
+PCI: 00:13.0 init finished in 5 msecs
+PCI: 00:14.0 init
+PCI: 00:14.0 init finished in 0 msecs
+PCI: 00:1c.0 init
+src/soc/intel/braswell/pcie.c/pcie_init (Intel Braswell SoC)
+PCI: 00:1c.0 init finished in 5 msecs
+PCI: 00:1c.1 init
+src/soc/intel/braswell/pcie.c/pcie_init (Intel Braswell SoC)
+PCI: 00:1c.1 init finished in 5 msecs
+PCI: 00:1c.2 init
+src/soc/intel/braswell/pcie.c/pcie_init (Intel Braswell SoC)
+PCI: 00:1c.2 init finished in 5 msecs
+PCI: 00:1c.3 init
+src/soc/intel/braswell/pcie.c/pcie_init (Intel Braswell SoC)
+PCI: 00:1c.3 init finished in 5 msecs
+PCI: 00:1f.0 init
+src/soc/intel/braswell/southcluster.c/sc_init (Intel Braswell SoC)
+Enable serial irq
+Disabling slp_x stretching.
+PCI_CFG IRQ: Write PIRQ assignments
+PCI IRQ: Found device 0:02.00 using PIN A
+Warning: PCI Device 2 does not have an IRQ entry, skipping it
+PCI IRQ: Found device 0:13.00 using PIN A
+	INT_PIN		: 1 (PIN A)
+	PIRQ		: D
+	INT_LINE	: 0xB (IRQ 11)
+PCI IRQ: Found device 0:14.00 using PIN A
+	INT_PIN		: 1 (PIN A)
+	PIRQ		: E
+	INT_LINE	: 0xB (IRQ 11)
+PCI IRQ: Found device 0:1B.00 using PIN A
+	INT_PIN		: 1 (PIN A)
+	PIRQ		: G
+	INT_LINE	: 0xB (IRQ 11)
+PCI IRQ: Found device 0:1C.00 using PIN A
+	INT_PIN		: 1 (PIN A)
+	PIRQ		: A
+	INT_LINE	: 0xB (IRQ 11)
+PCI IRQ: Found device 0:1C.01 using PIN B
+	INT_PIN		: 2 (PIN B)
+	PIRQ		: B
+	INT_LINE	: 0x5 (IRQ 5)
+PCI IRQ: Found device 0:1C.02 using PIN C
+	INT_PIN		: 3 (PIN C)
+	PIRQ		: C
+	INT_LINE	: 0x5 (IRQ 5)
+PCI IRQ: Found device 0:1C.03 using PIN D
+	INT_PIN		: 4 (PIN D)
+	PIRQ		: D
+	INT_LINE	: 0xB (IRQ 11)
+PCI IRQ: Found device 0:1F.03 using PIN B
+	INT_PIN		: 2 (PIN B)
+	PIRQ		: C
+	INT_LINE	: 0x5 (IRQ 5)
+PCI IRQ: Found device 1:00.00 using PIN A
+	With INT_PIN swizzled to PIN A
+	Attached to bridge device 0:1Ch.00h
+	INT_PIN		: 1 (PIN A)
+	Swizzled to	: 1 (PIN A)
+	PIRQ		: A
+	INT_LINE	: 0xB (IRQ 11)
+PCI IRQ: Found device 2:00.00 using PIN A
+	With INT_PIN swizzled to PIN A
+	Attached to bridge device 0:1Ch.01h
+	INT_PIN		: 1 (PIN A)
+	Swizzled to	: 1 (PIN A)
+	PIRQ		: A
+	INT_LINE	: 0xB (IRQ 11)
+PCI IRQ: Found device 3:00.00 using PIN A
+	With INT_PIN swizzled to PIN A
+	Attached to bridge device 0:1Ch.02h
+	INT_PIN		: 1 (PIN A)
+	Swizzled to	: 1 (PIN A)
+	PIRQ		: A
+	INT_LINE	: 0xB (IRQ 11)
+PCI IRQ: Found device 4:00.00 using PIN A
+	With INT_PIN swizzled to PIN A
+	Attached to bridge device 0:1Ch.03h
+	INT_PIN		: 1 (PIN A)
+	Swizzled to	: 1 (PIN A)
+	PIRQ		: A
+	INT_LINE	: 0xB (IRQ 11)
+PCI_CFG IRQ: Finished writing PIRQ assignments
+PCI: 00:1f.0 init finished in 170 msecs
+PCI: 00:1f.3 init
+PCI: 00:1f.3 init finished in 0 msecs
+PCI: 01:00.0 init
+PCI: 01:00.0 init finished in 0 msecs
+PCI: 02:00.0 init
+PCI: 02:00.0 init finished in 0 msecs
+PCI: 03:00.0 init
+PCI: 03:00.0 init finished in 0 msecs
+PCI: 04:00.0 init
+PCI: 04:00.0 init finished in 0 msecs
+Devices initialized
+Show all devs... After init.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+DOMAIN: 0000: enabled 1
+APIC: 00: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:02.0: enabled 1
+PCI: 00:03.0: enabled 0
+PCI: 00:0b.0: enabled 0
+PCI: 00:10.0: enabled 0
+PCI: 00:12.0: enabled 0
+PCI: 00:13.0: enabled 1
+PCI: 00:14.0: enabled 1
+PCI: 00:18.0: enabled 0
+PCI: 00:18.1: enabled 0
+PCI: 00:18.2: enabled 0
+PCI: 00:18.3: enabled 0
+PCI: 00:18.4: enabled 0
+PCI: 00:18.5: enabled 0
+PCI: 00:18.6: enabled 0
+PCI: 00:18.7: enabled 0
+PCI: 00:1a.0: enabled 0
+PCI: 00:1b.0: enabled 1
+PCI: 00:1c.0: enabled 1
+PCI: 00:1c.1: enabled 1
+PCI: 00:1c.2: enabled 1
+PCI: 00:1c.3: enabled 1
+PCI: 00:1e.0: enabled 0
+PCI: 00:1e.3: enabled 0
+PCI: 00:1e.4: enabled 0
+PCI: 00:1f.0: enabled 1
+PCI: 00:1f.3: enabled 1
+PNP: 002e.0: enabled 0
+PNP: 002e.1: enabled 1
+PNP: 002e.4: enabled 0
+PNP: 002e.5: enabled 0
+PNP: 002e.6: enabled 0
+PNP: 002e.7: enabled 0
+PNP: 002e.a: enabled 0
+PCI: 01:00.0: enabled 1
+PCI: 02:00.0: enabled 1
+PCI: 03:00.0: enabled 1
+PCI: 04:00.0: enabled 1
+APIC: 02: enabled 1
+APIC: 06: enabled 1
+APIC: 04: enabled 1
+BS: BS_DEV_INIT run times (exec / console): 141 / 731 ms
+Finalize devices...
+Devices finalized
+BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
+src/soc/intel/braswell/southcluster.c/finalize_chipset (0x00000000)
+BS: BS_POST_DEVICE exit times (exec / console): 0 / 6 ms
+FMAP: area COREBOOT found @ 310200 (5176832 bytes)
+CBFS: Locating 'fallback/dsdt.aml'
+CBFS: Found @ offset 60400 size 2742
+FMAP: area COREBOOT found @ 310200 (5176832 bytes)
+CBFS: Locating 'fallback/slic'
+CBFS: 'fallback/slic' not found.
+ACPI: Writing ACPI tables at 7cd0c000.
+ACPI:    * FACS
+ACPI:    * DSDT
+ACPI:    * FADT
+SCI is IRQ9
+ACPI: added table 1/32, length now 40
+ACPI:     * SSDT
+Turbo is available and visible
+PSS: 1601MHz power 7000 control 0x1c4e status 0x1c4e
+PSS: 1600MHz power 7000 control 0x143a status 0x143a
+PSS: 1520MHz power 6570 control 0x1341 status 0x1341
+PSS: 1440MHz power 6155 control 0x123f status 0x123f
+PSS: 1360MHz power 5747 control 0x113e status 0x113e
+PSS: 1280MHz power 5342 control 0x103c status 0x103c
+PSS: 1200MHz power 4950 control 0xf3b status 0xf3b
+PSS: 1120MHz power 4566 control 0xe39 status 0xe39
+PSS: 1040MHz power 4190 control 0xd38 status 0xd38
+PSS: 960MHz power 3826 control 0xc36 status 0xc36
+PSS: 880MHz power 3465 control 0xb35 status 0xb35
+PSS: 800MHz power 3111 control 0xa33 status 0xa33
+PSS: 720MHz power 2765 control 0x932 status 0x932
+PSS: 640MHz power 2430 control 0x830 status 0x830
+PSS: 560MHz power 2099 control 0x72f status 0x72f
+PSS: 480MHz power 1778 control 0x62d status 0x62d
+Turbo is available and visible
+PSS: 1601MHz power 7000 control 0x1c4e status 0x1c4e
+PSS: 1600MHz power 7000 control 0x143a status 0x143a
+PSS: 1520MHz power 6570 control 0x1341 status 0x1341
+PSS: 1440MHz power 6155 control 0x123f status 0x123f
+PSS: 1360MHz power 5747 control 0x113e status 0x113e
+PSS: 1280MHz power 5342 control 0x103c status 0x103c
+PSS: 1200MHz power 4950 control 0xf3b status 0xf3b
+PSS: 1120MHz power 4566 control 0xe39 status 0xe39
+PSS: 1040MHz power 4190 control 0xd38 status 0xd38
+PSS: 960MHz power 3826 control 0xc36 status 0xc36
+PSS: 880MHz power 3465 control 0xb35 status 0xb35
+PSS: 800MHz power 3111 control 0xa33 status 0xa33
+PSS: 720MHz power 2765 control 0x932 status 0x932
+PSS: 640MHz power 2430 control 0x830 status 0x830
+PSS: 560MHz power 2099 control 0x72f status 0x72f
+PSS: 480MHz power 1778 control 0x62d status 0x62d
+Turbo is available and visible
+PSS: 1601MHz power 7000 control 0x1c4e status 0x1c4e
+PSS: 1600MHz power 7000 control 0x143a status 0x143a
+PSS: 1520MHz power 6570 control 0x1341 status 0x1341
+PSS: 1440MHz power 6155 control 0x123f status 0x123f
+PSS: 1360MHz power 5747 control 0x113e status 0x113e
+PSS: 1280MHz power 5342 control 0x103c status 0x103c
+PSS: 1200MHz power 4950 control 0xf3b status 0xf3b
+PSS: 1120MHz power 4566 control 0xe39 status 0xe39
+PSS: 1040MHz power 4190 control 0xd38 status 0xd38
+PSS: 960MHz power 3826 control 0xc36 status 0xc36
+PSS: 880MHz power 3465 control 0xb35 status 0xb35
+PSS: 800MHz power 3111 control 0xa33 status 0xa33
+PSS: 720MHz power 2765 control 0x932 status 0x932
+PSS: 640MHz power 2430 control 0x830 status 0x830
+PSS: 560MHz power 2099 control 0x72f status 0x72f
+PSS: 480MHz power 1778 control 0x62d status 0x62d
+Turbo is available and visible
+PSS: 1601MHz power 7000 control 0x1c4e status 0x1c4e
+PSS: 1600MHz power 7000 control 0x143a status 0x143a
+PSS: 1520MHz power 6570 control 0x1341 status 0x1341
+PSS: 1440MHz power 6155 control 0x123f status 0x123f
+PSS: 1360MHz power 5747 control 0x113e status 0x113e
+PSS: 1280MHz power 5342 control 0x103c status 0x103c
+PSS: 1200MHz power 4950 control 0xf3b status 0xf3b
+PSS: 1120MHz power 4566 control 0xe39 status 0xe39
+PSS: 1040MHz power 4190 control 0xd38 status 0xd38
+PSS: 960MHz power 3826 control 0xc36 status 0xc36
+PSS: 880MHz power 3465 control 0xb35 status 0xb35
+PSS: 800MHz power 3111 control 0xa33 status 0xa33
+PSS: 720MHz power 2765 control 0x932 status 0x932
+PSS: 640MHz power 2430 control 0x830 status 0x830
+PSS: 560MHz power 2099 control 0x72f status 0x72f
+PSS: 480MHz power 1778 control 0x62d status 0x62d
+ACPI: added table 2/32, length now 44
+ACPI:    * MCFG
+ACPI: added table 3/32, length now 48
+ACPI:    * MADT
+ACPI: added table 4/32, length now 52
+current = 7cd0ff30
+ACPI:     * SSDT2 not generated.
+current = 7cd0ff30
+ACPI: done.
+ACPI tables: 16176 bytes.
+smbios_write_tables: 7cd0b000
+Create SMBIOS type 17
+SMBIOS tables: 645 bytes.
+Writing table forward entry at 0x00000500
+Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 830b
+Writing coreboot table at 0x7cd30000
+ 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
+ 1. 0000000000001000-000000000009ffff: RAM
+ 2. 00000000000a0000-00000000000fffff: RESERVED
+ 3. 0000000000100000-000000007cd0afff: RAM
+ 4. 000000007cd0b000-000000007cd96fff: CONFIGURATION TABLES
+ 5. 000000007cd97000-000000007cdcafff: RAMSTAGE
+ 6. 000000007cdcb000-000000007cffffff: CONFIGURATION TABLES
+ 7. 000000007d000000-000000007fffffff: RESERVED
+ 8. 00000000e0000000-00000000efffffff: RESERVED
+ 9. 00000000fea00000-00000000fec00fff: RESERVED
+10. 00000000fed01000-00000000fed01fff: RESERVED
+11. 00000000fed03000-00000000fed03fff: RESERVED
+12. 00000000fed06000-00000000fed06fff: RESERVED
+13. 00000000fed08000-00000000fed09fff: RESERVED
+14. 00000000fed1c000-00000000fed1cfff: RESERVED
+15. 00000000fed80000-00000000fedbffff: RESERVED
+16. 00000000fee00000-00000000feefffff: RESERVED
+17. 00000000ff800000-00000000ffffffff: RESERVED
+18. 0000000100000000-000000017fffffff: RAM
+FMAP: area COREBOOT found @ 310200 (5176832 bytes)
+Wrote coreboot table at: 0x7cd30000, 0x45c bytes, checksum 3f1d
+coreboot table: 1140 bytes.
+IMD ROOT    0. 0x7cfff000 0x00001000
+IMD SMALL   1. 0x7cffe000 0x00001000
+FSP MEMORY  2. 0x7cdfe000 0x00200000
+CONSOLE     3. 0x7cdde000 0x00020000
+TIME STAMP  4. 0x7cddd000 0x00000910
+MRC DATA    5. 0x7cdd6000 0x00006c80
+ROMSTG STCK 6. 0x7cdd5000 0x00001000
+AFTER CAR   7. 0x7cdcb000 0x0000a000
+RAMSTAGE    8. 0x7cd96000 0x00035000
+ACPI GNVS   9. 0x7cd94000 0x000010a6
+REFCODE    10. 0x7cd48000 0x0004b100
+SMM BACKUP 11. 0x7cd38000 0x00010000
+COREBOOT   12. 0x7cd30000 0x00008000
+ACPI       13. 0x7cd0c000 0x00024000
+SMBIOS     14. 0x7cd0b000 0x00000800
+IMD small region:
+  IMD ROOT    0. 0x7cffec00 0x00000400
+  FMAP        1. 0x7cffeb20 0x000000e0
+  POWER STATE 2. 0x7cffeae0 0x00000024
+  FSP RUNTIME 3. 0x7cffeac0 0x00000008
+  MEM INFO    4. 0x7cffe900 0x000001b9
+  ROMSTAGE    5. 0x7cffe8e0 0x00000004
+BS: BS_WRITE_TABLES run times (exec / console): 2 / 553 ms
+FMAP: area COREBOOT found @ 310200 (5176832 bytes)
+CBFS: Locating 'fallback/payload'
+CBFS: Found @ offset 62bc0 size 10f7b
+Checking segment from ROM address 0xffb72df8
+Payload being loaded at below 1MiB without region being marked as RAM usable.
+Checking segment from ROM address 0xffb72e14
+Loading segment from ROM address 0xffb72df8
+  code (compression=1)
+  New segment dstaddr 0x000dfc60 memsize 0x203a0 srcaddr 0xffb72e30 filesize 0x10f43
+Loading Segment: addr: 0x000dfc60 memsz: 0x00000000000203a0 filesz: 0x0000000000010f43
+using LZMA
+[ 0x000dfc60, 00100000, 0x00100000) <- ffb72e30
+Loading segment from ROM address 0xffb72e14
+  Entry Point 0x000fd263
+Loaded segments
+BS: BS_PAYLOAD_LOAD run times (exec / console): 31 / 60 ms
+Calling FspNotify(0x00000040)
+BS: BS_PAYLOAD_LOAD exit times (exec / console): 13 / 3 ms
+Jumping to boot code at 0x000fd263(0x7cd30000)
+CPU0: stack: 0x7cdc0000 - 0x7cdc1000, lowest used address 0x7cdc0a9c, stack used: 1380 bytes
+SeaBIOS (version rel-1.13.0-0-gf21b5a4)
+BUILD: gcc: (coreboot toolchain v1.52 June 11th, 2018) 8.1.0 binutils: (GNU Binutils) 2.30
+Found coreboot cbmem console @ 7cdde000
+Found mainboard Protectli FW4B
+Relocating init from 0x000e1340 to 0x7ccbdd40 (size 53792)
+Found CBFS header at 0xffb10238
+multiboot: eax=7cdbb9e0, ebx=7cdbb9a4
+Found 15 PCI devices (max PCI bus is 04)
+Copying SMBIOS entry point from 0x7cd0b000 to 0x000f6280
+Copying ACPI RSDP from 0x7cd0c000 to 0x000f6250
+Using pmtimer, ioport 0x408
+Scan for VGA option rom
+Running option rom at c000:0003
+sercon: using ioport 0x3f8
+sercon: configuring in splitmode (vgabios c000:0014)
+Turning on vga text mode console
+XHCI init on dev 00:14.0: regs @ 0xd1400000, 13 ports, 32 slots, 32 byte contexts
+XHCI    protocol USB  2.00, 7 ports (offset 1), def 3011
+XHCI    protocol USB  3.00, 6 ports (offset 8), def 3000
+XHCI    extcap 0xc0 @ 0xd1408070
+XHCI    extcap 0x1 @ 0xd140846c
+XHCI    extcap 0xc6 @ 0xd14084f4
+XHCI    extcap 0xc7 @ 0xd1408500
+XHCI    extcap 0xc2 @ 0xd1408600
+XHCI    extcap 0xa @ 0xd1408700
+XHCI    extcap 0xc3 @ 0xd1408740
+XHCI    extcap 0xc4 @ 0xd1408800
+XHCI    extcap 0xc5 @ 0xd1408900
+AHCI controller at 00:13.0, iobase 0xd1414000, irq 11
+Found 0 lpt ports
+Found 1 serial ports
+Got ps2 nak (status=51)
+XHCI no devices found
+WARNING - Timeout at ahci_port_reset:326!
+Searching bootorder for: /pci@i0cf8/*@13/drive@0/disk@0
+AHCI/0: Set transfer mode to UDMA-6
+Searching bios-geometry for: /pci@i0cf8/*@13/drive@0/disk@0
+AHCI/0: registering: "AHCI/0: Hoodisk SSD ATA-11 Hard-Disk (30533 MiBytes)"
+All threads complete.
+Scan for option roms
+Running option rom at d000:0003
+pmm call arg1=1
+pmm call arg1=0
+pmm call arg1=1
+pmm call arg1=0
+
diff --git a/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/coreboot_timestamps.txt b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/coreboot_timestamps.txt
new file mode 100644
index 0000000..7312116
--- /dev/null
+++ b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/coreboot_timestamps.txt
@@ -0,0 +1,41 @@
+36 entries total:
+
+   0:1st timestamp                                     126
+  11:start of bootblock                                20,711 (20,585)
+  12:end of bootblock                                  31,598 (10,886)
+  13:starting to load romstage                         51,898 (20,299)
+  14:finished loading romstage                         51,936 (38)
+   1:start of romstage                                 57,737 (5,800)
+   1:start of romstage                                 78,509 (20,771)
+   2:before ram initialization                         129,312 (50,803)
+ 950:calling FspMemoryInit                             157,907 (28,594)
+ 951:returning from FspMemoryInit                      3,942,137 (3,784,230)
+   3:after ram initialization                          3,977,024 (34,886)
+   4:end of romstage                                   4,058,479 (81,455)
+ 100:start of postcar                                  4,076,030 (17,551)
+ 101:end of postcar                                    4,076,031 (0)
+   8:starting to load ramstage                         4,087,521 (11,490)
+  15:starting LZMA decompress (ignore for x86)         4,093,510 (5,988)
+  16:finished LZMA decompress (ignore for x86)         4,154,945 (61,434)
+   9:finished loading ramstage                         4,167,902 (12,956)
+  10:start of ramstage                                 4,182,498 (14,596)
+  30:device enumeration                                4,183,769 (1,270)
+ 954:calling FspSiliconInit                            4,297,928 (114,159)
+ 955:returning from FspSiliconInit                     4,408,573 (110,644)
+  40:device configuration                              7,637,478 (3,228,904)
+ 956:calling FspNotify(AfterPciEnumeration)            9,989,553 (2,352,075)
+ 957:returning from FspNotify(AfterPciEnumeration)     9,989,566 (12)
+  50:device enable                                     9,994,795 (5,228)
+  60:device initialization                             10,071,921 (77,126)
+  70:device setup done                                 10,952,846 (880,925)
+  75:cbmem post                                        10,968,955 (16,108)
+  80:write tables                                      10,968,959 (4)
+  85:finalize chips                                    11,524,543 (555,584)
+  90:load payload                                      11,529,807 (5,263)
+  15:starting LZMA decompress (ignore for x86)         11,578,252 (48,444)
+  16:finished LZMA decompress (ignore for x86)         11,608,807 (30,555)
+ 958:calling FspNotify(ReadyToBoot)                    11,628,767 (19,959)
+ 959:returning from FspNotify(ReadyToBoot)             11,641,571 (12,803)
+  99:selfboot jump                                     11,651,042 (9,471)
+
+Total Time: 11,650,896
diff --git a/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/kernel_log.txt b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/kernel_log.txt
new file mode 100644
index 0000000..abc406a
--- /dev/null
+++ b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/kernel_log.txt
@@ -0,0 +1,592 @@
+[    0.000000] Linux version 4.14.50 (root@adam-X555LJ) (gcc version 5.4.0 20160609 (Ubuntu 5.4.0-6ubuntu1~16.04.10)) #2 SMP Tue Aug 7 22:57:33 CEST 2018
+[    0.000000] Command line: bootfile=http://192.168.4.206:8000/menu.ipxe root=/dev/nfs rw ip=dhcp nfsroot=192.168.4.206:/srv/nfs/debian,vers=3,udp nfsrootdebug --- console=ttyS0,115200 earlyprint=serial,ttyS0,115200
+[    0.000000] x86/fpu: x87 FPU will use FXSAVE
+[    0.000000] e820: BIOS-provided physical RAM map:
+[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009fbff] usable
+[    0.000000] BIOS-e820: [mem 0x000000000009fc00-0x000000000009ffff] reserved
+[    0.000000] BIOS-e820: [mem 0x00000000000f0000-0x00000000000fffff] reserved
+[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000007cccafff] usable
+[    0.000000] BIOS-e820: [mem 0x000000007cccb000-0x000000007fffffff] reserved
+[    0.000000] BIOS-e820: [mem 0x00000000e0000000-0x00000000efffffff] reserved
+[    0.000000] BIOS-e820: [mem 0x00000000fea00000-0x00000000fec00fff] reserved
+[    0.000000] BIOS-e820: [mem 0x00000000fed01000-0x00000000fed01fff] reserved
+[    0.000000] BIOS-e820: [mem 0x00000000fed03000-0x00000000fed03fff] reserved
+[    0.000000] BIOS-e820: [mem 0x00000000fed06000-0x00000000fed06fff] reserved
+[    0.000000] BIOS-e820: [mem 0x00000000fed08000-0x00000000fed09fff] reserved
+[    0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed1cfff] reserved
+[    0.000000] BIOS-e820: [mem 0x00000000fed80000-0x00000000fedbffff] reserved
+[    0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000feefffff] reserved
+[    0.000000] BIOS-e820: [mem 0x00000000ff800000-0x00000000ffffffff] reserved
+[    0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000017fffffff] usable
+[    0.000000] NX (Execute Disable) protection: active
+[    0.000000] SMBIOS 2.8 present.
+[    0.000000] DMI: Protectli FW4B/FW4B, BIOS 4.11-1387-g5dd4f5f206 03/06/2020
+[    0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
+[    0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable
+[    0.000000] e820: last_pfn = 0x180000 max_arch_pfn = 0x400000000
+[    0.000000] MTRR default type: uncachable
+[    0.000000] MTRR fixed ranges enabled:
+[    0.000000]   00000-9FFFF write-back
+[    0.000000]   A0000-BFFFF uncachable
+[    0.000000]   C0000-FFFFF write-back
+[    0.000000] MTRR variable ranges enabled:
+[    0.000000]   0 base 000000000 mask F80000000 write-back
+[    0.000000]   1 base 07D800000 mask FFF800000 uncachable
+[    0.000000]   2 base 07E000000 mask FFE000000 uncachable
+[    0.000000]   3 base 0C0000000 mask FF0000000 write-combining
+[    0.000000]   4 base 100000000 mask F80000000 write-back
+[    0.000000]   5 disabled
+[    0.000000]   6 disabled
+[    0.000000]   7 disabled
+[    0.000000] x86/PAT: Configuration [0-7]: WB  WC  UC- UC  WB  WP  UC- WT  
+[    0.000000] e820: last_pfn = 0x7cccb max_arch_pfn = 0x400000000
+[    0.000000] Base memory trampoline at [ffff9028c0096000] 96000 size 24576
+[    0.000000] BRK [0x129d37000, 0x129d37fff] PGTABLE
+[    0.000000] BRK [0x129d38000, 0x129d38fff] PGTABLE
+[    0.000000] BRK [0x129d39000, 0x129d39fff] PGTABLE
+[    0.000000] BRK [0x129d3a000, 0x129d3afff] PGTABLE
+[    0.000000] BRK [0x129d3b000, 0x129d3bfff] PGTABLE
+[    0.000000] BRK [0x129d3c000, 0x129d3cfff] PGTABLE
+[    0.000000] BRK [0x129d3d000, 0x129d3dfff] PGTABLE
+[    0.000000] ACPI: Early table checksum verification disabled
+[    0.000000] ACPI: RSDP 0x00000000000F6250 000024 (v02 COREv4)
+[    0.000000] ACPI: XSDT 0x000000007CD0C0E0 000044 (v01 COREv4 COREBOOT 00000000 CORE 20180531)
+[    0.000000] ACPI: FACP 0x000000007CD0E9E0 000114 (v06 COREv4 COREBOOT 00000000 CORE 00000001)
+[    0.000000] ACPI: DSDT 0x000000007CD0C280 002752 (v02 COREv4 COREBOOT 00010001 INTL 20180531)
+[    0.000000] ACPI: FACS 0x000000007CD0C240 000040
+[    0.000000] ACPI: FACS 0x000000007CD0C240 000040
+[    0.000000] ACPI: SSDT 0x000000007CD0EB00 00137D (v02 COREv4 COREBOOT 0000002A CORE 20180531)
+[    0.000000] ACPI: MCFG 0x000000007CD0FE80 00003C (v01 COREv4 COREBOOT 00000000 CORE 20180531)
+[    0.000000] ACPI: APIC 0x000000007CD0FEC0 00006C (v02 COREv4 COREBOOT 00000000 CORE 20180531)
+[    0.000000] ACPI: Local APIC address 0xfee00000
+[    0.000000] No NUMA configuration found
+[    0.000000] Faking a node at [mem 0x0000000000000000-0x000000017fffffff]
+[    0.000000] NODE_DATA(0) allocated [mem 0x17fffa000-0x17fffefff]
+[    0.000000] Zone ranges:
+[    0.000000]   DMA      [mem 0x0000000000001000-0x0000000000ffffff]
+[    0.000000]   DMA32    [mem 0x0000000001000000-0x00000000ffffffff]
+[    0.000000]   Normal   [mem 0x0000000100000000-0x000000017fffffff]
+[    0.000000]   Device   empty
+[    0.000000] Movable zone start for each node
+[    0.000000] Early memory node ranges
+[    0.000000]   node   0: [mem 0x0000000000001000-0x000000000009efff]
+[    0.000000]   node   0: [mem 0x0000000000100000-0x000000007cccafff]
+[    0.000000]   node   0: [mem 0x0000000100000000-0x000000017fffffff]
+[    0.000000] Initmem setup node 0 [mem 0x0000000000001000-0x000000017fffffff]
+[    0.000000] On node 0 totalpages: 1035369
+[    0.000000]   DMA zone: 64 pages used for memmap
+[    0.000000]   DMA zone: 24 pages reserved
+[    0.000000]   DMA zone: 3998 pages, LIFO batch:0
+[    0.000000]   DMA32 zone: 7924 pages used for memmap
+[    0.000000]   DMA32 zone: 507083 pages, LIFO batch:31
+[    0.000000]   Normal zone: 8192 pages used for memmap
+[    0.000000]   Normal zone: 524288 pages, LIFO batch:31
+[    0.000000] Reserving Intel graphics memory at 0x000000007e000000-0x000000007fffffff
+[    0.000000] ACPI: PM-Timer IO Port: 0x408
+[    0.000000] ACPI: Local APIC address 0xfee00000
+[    0.000000] IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-114
+[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
+[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
+[    0.000000] ACPI: IRQ0 used by override.
+[    0.000000] ACPI: IRQ9 used by override.
+[    0.000000] Using ACPI (MADT) for SMP configuration information
+[    0.000000] smpboot: Allowing 4 CPUs, 0 hotplug CPUs
+[    0.000000] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
+[    0.000000] PM: Registered nosave memory: [mem 0x0009f000-0x0009ffff]
+[    0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000effff]
+[    0.000000] PM: Registered nosave memory: [mem 0x000f0000-0x000fffff]
+[    0.000000] PM: Registered nosave memory: [mem 0x7cccb000-0x7fffffff]
+[    0.000000] PM: Registered nosave memory: [mem 0x80000000-0xdfffffff]
+[    0.000000] PM: Registered nosave memory: [mem 0xe0000000-0xefffffff]
+[    0.000000] PM: Registered nosave memory: [mem 0xf0000000-0xfe9fffff]
+[    0.000000] PM: Registered nosave memory: [mem 0xfea00000-0xfec00fff]
+[    0.000000] PM: Registered nosave memory: [mem 0xfec01000-0xfed00fff]
+[    0.000000] PM: Registered nosave memory: [mem 0xfed01000-0xfed01fff]
+[    0.000000] PM: Registered nosave memory: [mem 0xfed02000-0xfed02fff]
+[    0.000000] PM: Registered nosave memory: [mem 0xfed03000-0xfed03fff]
+[    0.000000] PM: Registered nosave memory: [mem 0xfed04000-0xfed05fff]
+[    0.000000] PM: Registered nosave memory: [mem 0xfed06000-0xfed06fff]
+[    0.000000] PM: Registered nosave memory: [mem 0xfed07000-0xfed07fff]
+[    0.000000] PM: Registered nosave memory: [mem 0xfed08000-0xfed09fff]
+[    0.000000] PM: Registered nosave memory: [mem 0xfed0a000-0xfed1bfff]
+[    0.000000] PM: Registered nosave memory: [mem 0xfed1c000-0xfed1cfff]
+[    0.000000] PM: Registered nosave memory: [mem 0xfed1d000-0xfed7ffff]
+[    0.000000] PM: Registered nosave memory: [mem 0xfed80000-0xfedbffff]
+[    0.000000] PM: Registered nosave memory: [mem 0xfedc0000-0xfedfffff]
+[    0.000000] PM: Registered nosave memory: [mem 0xfee00000-0xfeefffff]
+[    0.000000] PM: Registered nosave memory: [mem 0xfef00000-0xff7fffff]
+[    0.000000] PM: Registered nosave memory: [mem 0xff800000-0xffffffff]
+[    0.000000] e820: [mem 0x80000000-0xdfffffff] available for PCI devices
+[    0.000000] Booting paravirtualized kernel on bare hardware
+[    0.000000] clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645519600211568 ns
+[    0.000000] random: get_random_bytes called from start_kernel+0x94/0x491 with crng_init=0
+[    0.000000] setup_percpu: NR_CPUS:512 nr_cpumask_bits:512 nr_cpu_ids:4 nr_node_ids:1
+[    0.000000] percpu: Embedded 44 pages/cpu @ffff902a3fc00000 s141912 r8192 d30120 u524288
+[    0.000000] pcpu-alloc: s141912 r8192 d30120 u524288 alloc=1*2097152
+[    0.000000] pcpu-alloc: [0] 0 1 2 3 
+[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 1019165
+[    0.000000] Policy zone: Normal
+[    0.000000] Kernel command line: bootfile=http://192.168.4.206:8000/menu.ipxe root=/dev/nfs rw ip=dhcp nfsroot=192.168.4.206:/srv/nfs/debian,vers=3,udp nfsrootdebug --- console=ttyS0,115200 earlyprint=serial,ttyS0,115200
+[    0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
+[    0.000000] Calgary: detecting Calgary via BIOS EBDA area
+[    0.000000] Calgary: Unable to locate Rio Grande table in EBDA - bailing!
+[    0.000000] Memory: 3983208K/4141476K available (12300K kernel code, 1588K rwdata, 3560K rodata, 1652K init, 688K bss, 158268K reserved, 0K cma-reserved)
+[    0.000000] Kernel/User page tables isolation: enabled
+[    0.000000] ftrace: allocating 34192 entries in 134 pages
+[    0.000000] Hierarchical RCU implementation.
+[    0.000000] 	RCU restricting CPUs from NR_CPUS=512 to nr_cpu_ids=4.
+[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
+[    0.000000] NR_IRQS: 33024, nr_irqs: 1024, preallocated irqs: 16
+[    0.000000] Console: colour VGA+ 80x25
+[    0.000000] console [ttyS0] enabled
+[    0.004000] tsc: Detected 1600.000 MHz processor
+[    0.008000] Calibrating delay loop (skipped), value calculated using timer frequency.. 3200.00 BogoMIPS (lpj=6400000)
+[    0.012005] pid_max: default: 32768 minimum: 301
+[    0.016037] ACPI: Core revision 20170728
+[    0.027147] ACPI: 2 ACPI AML tables successfully acquired and loaded
+[    0.028077] Security Framework initialized
+[    0.032006] Yama: becoming mindful.
+[    0.036014] AppArmor: AppArmor disabled by boot time parameter
+[    0.044770] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes)
+[    0.048906] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes)
+[    0.052098] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes)
+[    0.056038] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes)
+[    0.060388] CPU: Physical Processor ID: 0
+[    0.064006] CPU: Processor Core ID: 0
+[    0.068010] ENERGY_PERF_BIAS: Set to 'normal', was 'performance'
+[    0.072003] ENERGY_PERF_BIAS: View and update with x86_energy_perf_policy(8)
+[    0.076016] mce: CPU supports 6 MCE banks
+[    0.080013] CPU0: Thermal monitoring enabled (TM1)
+[    0.084008] process: using mwait in idle threads
+[    0.088007] Last level iTLB entries: 4KB 48, 2MB 0, 4MB 0
+[    0.092004] Last level dTLB entries: 4KB 256, 2MB 16, 4MB 16, 1GB 0
+[    0.096006] Spectre V2 : Mitigation: Full generic retpoline
+[    0.100003] Spectre V2 : Spectre v2 mitigation: Enabling Indirect Branch Prediction Barrier
+[    0.104003] Spectre V2 : Enabling Restricted Speculation for firmware calls
+[    0.108215] Freeing SMP alternatives memory: 32K
+[    0.113739] smpboot: Max logical packages: 1
+[    0.117441] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
+[    0.159388] TSC deadline timer enabled
+[    0.159392] smpboot: CPU0: Intel(R) Celeron(R) CPU  J3160  @ 1.60GHz (family: 0x6, model: 0x4c, stepping: 0x4)
+[    0.160161] Performance Events: PEBS fmt2+, 8-deep LBR, Silvermont events, 8-deep LBR, full-width counters, Intel PMU driver.
+[    0.164013] ... version:                3
+[    0.168003] ... bit width:              40
+[    0.172002] ... generic registers:      2
+[    0.176002] ... value mask:             000000ffffffffff
+[    0.180002] ... max period:             0000007fffffffff
+[    0.184002] ... fixed-purpose events:   3
+[    0.188002] ... event mask:             0000000700000003
+[    0.192076] Hierarchical SRCU implementation.
+[    0.197295] NMI watchdog: Enabled. Permanently consumes one hw-PMU counter.
+[    0.200040] smp: Bringing up secondary CPUs ...
+[    0.204319] x86: Booting SMP configuration:
+[    0.208010] .... node  #0, CPUs:      #1 #2 #3
+[    0.208441] smp: Brought up 1 node, 4 CPUs
+[    0.216006] smpboot: Total of 4 processors activated (12800.00 BogoMIPS)
+[    0.221256] devtmpfs: initialized
+[    0.224123] x86/mm: Memory block size: 128MB
+[    0.228927] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
+[    0.232020] futex hash table entries: 1024 (order: 4, 65536 bytes)
+[    0.236133] pinctrl core: initialized pinctrl subsystem
+[    0.240234] NET: Registered protocol family 16
+[    0.244354] cpuidle: using governor ladder
+[    0.248041] cpuidle: using governor menu
+[    0.252095] ACPI: bus type PCI registered
+[    0.256008] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
+[    0.260118] PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] (base 0xe0000000)
+[    0.264008] PCI: MMCONFIG at [mem 0xe0000000-0xefffffff] reserved in E820
+[    0.268031] PCI: Using configuration type 1 for base access
+[    0.273940] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
+[    0.280158] ACPI: Added _OSI(Module Device)
+[    0.284014] ACPI: Added _OSI(Processor Device)
+[    0.288005] ACPI: Added _OSI(3.0 _SCP Extensions)
+[    0.292003] ACPI: Added _OSI(Processor Aggregator Device)
+[    0.300259] ACPI: Executed 1 blocks of module-level executable AML code
+[    0.308292] ACPI: Interpreter enabled
+[    0.311989] ACPI: (supports S0 S3 S4 S5)
+[    0.316005] ACPI: Using IOAPIC for interrupt routing
+[    0.324052] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
+[    0.339848] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
+[    0.344014] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
+[    0.352101] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability]
+[    0.360429] PCI host bridge to bus 0000:00
+[    0.368008] pci_bus 0000:00: root bus resource [io  0x0000-0x0cf7 window]
+[    0.372005] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff window]
+[    0.380005] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window]
+[    0.388005] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000c3fff window]
+[    0.396010] pci_bus 0000:00: root bus resource [mem 0x000c4000-0x000c7fff window]
+[    0.404005] pci_bus 0000:00: root bus resource [mem 0x000c8000-0x000cbfff window]
+[    0.408004] pci_bus 0000:00: root bus resource [mem 0x000cc000-0x000cffff window]
+[    0.416004] pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000d3fff window]
+[    0.424004] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff window]
+[    0.432004] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff window]
+[    0.440004] pci_bus 0000:00: root bus resource [mem 0x000dc000-0x000dffff window]
+[    0.448004] pci_bus 0000:00: root bus resource [mem 0x000e0000-0x000e3fff window]
+[    0.456004] pci_bus 0000:00: root bus resource [mem 0x000e4000-0x000e7fff window]
+[    0.464004] pci_bus 0000:00: root bus resource [mem 0x000e8000-0x000ebfff window]
+[    0.468004] pci_bus 0000:00: root bus resource [mem 0x000ec000-0x000effff window]
+[    0.476004] pci_bus 0000:00: root bus resource [mem 0x000f0000-0x000fffff window]
+[    0.484004] pci_bus 0000:00: root bus resource [mem 0x80000000-0xdfffffff window]
+[    0.492004] pci_bus 0000:00: root bus resource [mem 0xfed40000-0xfed44fff window]
+[    0.500005] pci_bus 0000:00: root bus resource [bus 00-ff]
+[    0.504014] pci 0000:00:00.0: [8086:2280] type 00 class 0x060000
+[    0.504154] pci 0000:00:02.0: [8086:22b1] type 00 class 0x030000
+[    0.504175] pci 0000:00:02.0: reg 0x10: [mem 0xd0000000-0xd0ffffff 64bit]
+[    0.504185] pci 0000:00:02.0: reg 0x18: [mem 0xc0000000-0xcfffffff 64bit pref]
+[    0.504193] pci 0000:00:02.0: reg 0x20: [io  0x5000-0x503f]
+[    0.504341] pci 0000:00:13.0: [8086:22a3] type 00 class 0x010601
+[    0.504388] pci 0000:00:13.0: reg 0x20: [io  0x5040-0x505f]
+[    0.504397] pci 0000:00:13.0: reg 0x24: [mem 0xd1414000-0xd14147ff]
+[    0.504444] pci 0000:00:13.0: PME# supported from D3hot
+[    0.504545] pci 0000:00:14.0: [8086:22b5] type 00 class 0x0c0330
+[    0.504568] pci 0000:00:14.0: reg 0x10: [mem 0xd1400000-0xd140ffff 64bit]
+[    0.504633] pci 0000:00:14.0: PME# supported from D3hot D3cold
+[    0.504748] pci 0000:00:1b.0: [8086:2284] type 00 class 0x040300
+[    0.504777] pci 0000:00:1b.0: reg 0x10: [mem 0xd1410000-0xd1413fff 64bit]
+[    0.504859] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
+[    0.505058] pci 0000:00:1c.0: [8086:22c8] type 01 class 0x060400
+[    0.505873] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
+[    0.506186] pci 0000:00:1c.1: [8086:22ca] type 01 class 0x060400
+[    0.506987] pci 0000:00:1c.1: PME# supported from D0 D3hot D3cold
+[    0.507303] pci 0000:00:1c.2: [8086:22cc] type 01 class 0x060400
+[    0.508118] pci 0000:00:1c.2: PME# supported from D0 D3hot D3cold
+[    0.508444] pci 0000:00:1c.3: [8086:22ce] type 01 class 0x060400
+[    0.509236] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold
+[    0.509449] pci 0000:00:1f.0: [8086:229c] type 00 class 0x060100
+[    0.509648] pci 0000:00:1f.3: [8086:2292] type 00 class 0x0c0500
+[    0.509703] pci 0000:00:1f.3: reg 0x10: [mem 0xd1415000-0xd141501f]
+[    0.509794] pci 0000:00:1f.3: reg 0x20: [io  0x5060-0x507f]
+[    0.510333] pci 0000:01:00.0: [8086:157b] type 00 class 0x020000
+[    0.510373] pci 0000:01:00.0: reg 0x10: [mem 0xd1000000-0xd101ffff]
+[    0.510402] pci 0000:01:00.0: reg 0x18: [io  0x1000-0x101f]
+[    0.510417] pci 0000:01:00.0: reg 0x1c: [mem 0xd1020000-0xd1023fff]
+[    0.510567] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
+[    0.524099] pci 0000:00:1c.0: PCI bridge to [bus 01]
+[    0.532036] pci 0000:00:1c.0:   bridge window [io  0x1000-0x1fff]
+[    0.532068] pci 0000:00:1c.0:   bridge window [mem 0xd1000000-0xd10fffff]
+[    0.532469] pci 0000:02:00.0: [8086:157b] type 00 class 0x020000
+[    0.532508] pci 0000:02:00.0: reg 0x10: [mem 0xd1100000-0xd111ffff]
+[    0.532537] pci 0000:02:00.0: reg 0x18: [io  0x2000-0x201f]
+[    0.532553] pci 0000:02:00.0: reg 0x1c: [mem 0xd1120000-0xd1123fff]
+[    0.532702] pci 0000:02:00.0: PME# supported from D0 D3hot D3cold
+[    0.544096] pci 0000:00:1c.1: PCI bridge to [bus 02]
+[    0.548036] pci 0000:00:1c.1:   bridge window [io  0x2000-0x2fff]
+[    0.548068] pci 0000:00:1c.1:   bridge window [mem 0xd1100000-0xd11fffff]
+[    0.548468] pci 0000:03:00.0: [8086:157b] type 00 class 0x020000
+[    0.548507] pci 0000:03:00.0: reg 0x10: [mem 0xd1200000-0xd121ffff]
+[    0.548536] pci 0000:03:00.0: reg 0x18: [io  0x3000-0x301f]
+[    0.548552] pci 0000:03:00.0: reg 0x1c: [mem 0xd1220000-0xd1223fff]
+[    0.548723] pci 0000:03:00.0: PME# supported from D0 D3hot D3cold
+[    0.560103] pci 0000:00:1c.2: PCI bridge to [bus 03]
+[    0.564036] pci 0000:00:1c.2:   bridge window [io  0x3000-0x3fff]
+[    0.564068] pci 0000:00:1c.2:   bridge window [mem 0xd1200000-0xd12fffff]
+[    0.564465] pci 0000:04:00.0: [8086:157b] type 00 class 0x020000
+[    0.564504] pci 0000:04:00.0: reg 0x10: [mem 0xd1300000-0xd131ffff]
+[    0.564533] pci 0000:04:00.0: reg 0x18: [io  0x4000-0x401f]
+[    0.564548] pci 0000:04:00.0: reg 0x1c: [mem 0xd1320000-0xd1323fff]
+[    0.564707] pci 0000:04:00.0: PME# supported from D0 D3hot D3cold
+[    0.576095] pci 0000:00:1c.3: PCI bridge to [bus 04]
+[    0.580036] pci 0000:00:1c.3:   bridge window [io  0x4000-0x4fff]
+[    0.580068] pci 0000:00:1c.3:   bridge window [mem 0xd1300000-0xd13fffff]
+[    0.580566] ACPI: PCI Interrupt Link [LNKA] (IRQs 1 3 4 5 6 7 10 *11 12 14 15)
+[    0.588116] ACPI: PCI Interrupt Link [LNKB] (IRQs 1 3 4 *5 6 7 10 11 12 14 15)
+[    0.596114] ACPI: PCI Interrupt Link [LNKC] (IRQs 1 3 4 *5 6 7 10 11 12 14 15)
+[    0.604114] ACPI: PCI Interrupt Link [LNKD] (IRQs 1 3 4 5 6 7 10 *11 12 14 15)
+[    0.612115] ACPI: PCI Interrupt Link [LNKE] (IRQs 1 3 4 5 6 7 10 *11 12 14 15)
+[    0.620114] ACPI: PCI Interrupt Link [LNKF] (IRQs 1 3 4 *5 6 7 10 11 12 14 15)
+[    0.624114] ACPI: PCI Interrupt Link [LNKG] (IRQs 1 3 4 5 6 7 10 *11 12 14 15)
+[    0.632116] ACPI: PCI Interrupt Link [LNKH] (IRQs 1 3 4 5 6 7 10 *11 12 14 15)
+[    0.644326] cherryview-pinctrl INT33FF:01: Failed to translate GPIO to IRQ
+[    0.652396] pci 0000:00:02.0: vgaarb: setting as boot VGA device
+[    0.656000] pci 0000:00:02.0: vgaarb: VGA device added: decodes=io+mem,owns=io+mem,locks=none
+[    0.664013] pci 0000:00:02.0: vgaarb: bridge control possible
+[    0.672003] vgaarb: loaded
+[    0.674812] pps_core: LinuxPPS API ver. 1 registered
+[    0.680004] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
+[    0.688009] PTP clock support registered
+[    0.691956] EDAC MC: Ver: 3.0.0
+[    0.696293] PCI: Using ACPI for IRQ routing
+[    0.708268] PCI: pci_cache_line_size set to 64 bytes
+[    0.708463] e820: reserve RAM buffer [mem 0x0009fc00-0x0009ffff]
+[    0.708465] e820: reserve RAM buffer [mem 0x7cccb000-0x7fffffff]
+[    0.708760] clocksource: Switched to clocksource refined-jiffies
+[    0.740574] VFS: Disk quotas dquot_6.6.0
+[    0.744052] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
+[    0.748150] pnp: PnP ACPI init
+[    0.751398] system 00:00: [mem 0xfeb00000-0xfebfffff] has been reserved
+[    0.760012] system 00:00: [mem 0xe0000000-0xefffffff] could not be reserved
+[    0.768010] system 00:00: [mem 0xfed03000-0xfed033ff] has been reserved
+[    0.772009] system 00:00: [mem 0xfed08000-0xfed09fff] has been reserved
+[    0.780010] system 00:00: [mem 0xfed01000-0xfed013ff] has been reserved
+[    0.788010] system 00:00: [mem 0xfea00000-0xfeafffff] has been reserved
+[    0.792012] system 00:00: [mem 0xfed06000-0xfed067ff] has been reserved
+[    0.800011] system 00:00: [mem 0xfed1c000-0xfed1c3ff] has been reserved
+[    0.808018] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active)
+[    0.808350] system 00:01: [io  0x0400-0x047f] has been reserved
+[    0.812013] system 00:01: [io  0x0500-0x05fe] has been reserved
+[    0.820018] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active)
+[    0.820068] pnp 00:02: Plug and Play ACPI device, IDs PNP0b00 (active)
+[    0.820136] pnp 00:03: Plug and Play ACPI device, IDs PNP0501 (active)
+[    0.820581] pnp: PnP ACPI: found 4 devices
+[    0.831895] clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns
+[    0.840047] clocksource: Switched to clocksource acpi_pm
+[    0.845689] pci 0000:00:1c.0: PCI bridge to [bus 01]
+[    0.850715] pci 0000:00:1c.0:   bridge window [io  0x1000-0x1fff]
+[    0.856885] pci 0000:00:1c.0:   bridge window [mem 0xd1000000-0xd10fffff]
+[    0.863792] pci 0000:00:1c.1: PCI bridge to [bus 02]
+[    0.868809] pci 0000:00:1c.1:   bridge window [io  0x2000-0x2fff]
+[    0.874974] pci 0000:00:1c.1:   bridge window [mem 0xd1100000-0xd11fffff]
+[    0.881869] pci 0000:00:1c.2: PCI bridge to [bus 03]
+[    0.886889] pci 0000:00:1c.2:   bridge window [io  0x3000-0x3fff]
+[    0.893054] pci 0000:00:1c.2:   bridge window [mem 0xd1200000-0xd12fffff]
+[    0.899949] pci 0000:00:1c.3: PCI bridge to [bus 04]
+[    0.904969] pci 0000:00:1c.3:   bridge window [io  0x4000-0x4fff]
+[    0.911134] pci 0000:00:1c.3:   bridge window [mem 0xd1300000-0xd13fffff]
+[    0.918024] pci_bus 0000:00: resource 4 [io  0x0000-0x0cf7 window]
+[    0.918027] pci_bus 0000:00: resource 5 [io  0x0d00-0xffff window]
+[    0.918029] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff window]
+[    0.918032] pci_bus 0000:00: resource 7 [mem 0x000c0000-0x000c3fff window]
+[    0.918034] pci_bus 0000:00: resource 8 [mem 0x000c4000-0x000c7fff window]
+[    0.918036] pci_bus 0000:00: resource 9 [mem 0x000c8000-0x000cbfff window]
+[    0.918039] pci_bus 0000:00: resource 10 [mem 0x000cc000-0x000cffff window]
+[    0.918041] pci_bus 0000:00: resource 11 [mem 0x000d0000-0x000d3fff window]
+[    0.918043] pci_bus 0000:00: resource 12 [mem 0x000d4000-0x000d7fff window]
+[    0.918045] pci_bus 0000:00: resource 13 [mem 0x000d8000-0x000dbfff window]
+[    0.918048] pci_bus 0000:00: resource 14 [mem 0x000dc000-0x000dffff window]
+[    0.918050] pci_bus 0000:00: resource 15 [mem 0x000e0000-0x000e3fff window]
+[    0.918052] pci_bus 0000:00: resource 16 [mem 0x000e4000-0x000e7fff window]
+[    0.918054] pci_bus 0000:00: resource 17 [mem 0x000e8000-0x000ebfff window]
+[    0.918056] pci_bus 0000:00: resource 18 [mem 0x000ec000-0x000effff window]
+[    0.918059] pci_bus 0000:00: resource 19 [mem 0x000f0000-0x000fffff window]
+[    0.918061] pci_bus 0000:00: resource 20 [mem 0x80000000-0xdfffffff window]
+[    0.918063] pci_bus 0000:00: resource 21 [mem 0xfed40000-0xfed44fff window]
+[    0.918065] pci_bus 0000:01: resource 0 [io  0x1000-0x1fff]
+[    0.918068] pci_bus 0000:01: resource 1 [mem 0xd1000000-0xd10fffff]
+[    0.918070] pci_bus 0000:02: resource 0 [io  0x2000-0x2fff]
+[    0.918072] pci_bus 0000:02: resource 1 [mem 0xd1100000-0xd11fffff]
+[    0.918075] pci_bus 0000:03: resource 0 [io  0x3000-0x3fff]
+[    0.918077] pci_bus 0000:03: resource 1 [mem 0xd1200000-0xd12fffff]
+[    0.918079] pci_bus 0000:04: resource 0 [io  0x4000-0x4fff]
+[    0.918081] pci_bus 0000:04: resource 1 [mem 0xd1300000-0xd13fffff]
+[    0.918211] NET: Registered protocol family 2
+[    0.922876] TCP established hash table entries: 32768 (order: 6, 262144 bytes)
+[    0.930257] TCP bind hash table entries: 32768 (order: 7, 524288 bytes)
+[    0.937051] TCP: Hash tables configured (established 32768 bind 32768)
+[    0.943721] UDP hash table entries: 2048 (order: 4, 65536 bytes)
+[    0.949812] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes)
+[    0.956456] NET: Registered protocol family 1
+[    0.961269] RPC: Registered named UNIX socket transport module.
+[    0.967235] RPC: Registered udp transport module.
+[    0.971975] RPC: Registered tcp transport module.
+[    0.976717] RPC: Registered tcp NFSv4.1 backchannel transport module.
+[    0.983212] pci 0000:00:02.0: Video device with shadowed ROM at [mem 0x000c0000-0x000dffff]
+[    0.992593] PCI: CLS 64 bytes, default 64
+[    0.992678] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
+[    0.999169] software IO TLB [mem 0x78ccb000-0x7cccb000] (64MB) mapped at [ffff902938ccb000-ffff90293cccafff]
+[    1.009290] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x171024fa93b, max_idle_ns: 440795253189 ns
+[    1.019381] clocksource: Switched to clocksource tsc
+[    1.024956] audit: initializing netlink subsys (disabled)
+[    1.030489] audit: type=2000 audit(1583499438.027:1): state=initialized audit_enabled=0 res=1
+[    1.031012] Initialise system trusted keyrings
+[    1.031103] workingset: timestamp_bits=40 max_order=20 bucket_order=0
+[    1.049996] zbud: loaded
+[    1.052951] NFS: Registering the id_resolver key type
+[    1.058034] Key type id_resolver registered
+[    1.062233] Key type id_legacy registered
+[    1.066265] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
+[    1.160903] Key type asymmetric registered
+[    1.165022] Asymmetric key parser 'x509' registered
+[    1.169956] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 248)
+[    1.177431] io scheduler noop registered
+[    1.181368] io scheduler deadline registered
+[    1.185700] io scheduler cfq registered (default)
+[    1.190421] io scheduler mq-deadline registered
+[    1.194966] io scheduler kyber registered
+[    1.203369] pcieport 0000:00:1c.0: Signaling PME with IRQ 115
+[    1.209279] pcieport 0000:00:1c.1: Signaling PME with IRQ 116
+[    1.215192] pcieport 0000:00:1c.2: Signaling PME with IRQ 117
+[    1.221109] pcieport 0000:00:1c.3: Signaling PME with IRQ 118
+[    1.226947] intel_idle: MWAIT substates: 0x33000020
+[    1.226949] intel_idle: v0.4.1 model 0x4C
+[    1.227220] intel_idle: lapic_timer_reliable_states 0xffffffff
+[    1.228167] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
+[    1.255253] 00:03: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A
+[    1.265923] Linux agpgart interface v0.103
+[    1.270131] AMD IOMMUv2 driver by Joerg Roedel <jroedel@suse.de>
+[    1.276150] AMD IOMMUv2 functionality not available on this system
+[    1.284424] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
+[    1.291513] e1000: Copyright (c) 1999-2006 Intel Corporation.
+[    1.297312] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
+[    1.303157] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
+[    1.309115] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.4.0-k
+[    1.316089] igb: Copyright (c) 2007-2014 Intel Corporation.
+[    1.588968] pps pps0: new PPS source ptp0
+[    1.593020] igb 0000:01:00.0: added PHC on eth0
+[    1.597564] igb 0000:01:00.0: Intel(R) Gigabit Ethernet Network Connection
+[    1.604451] igb 0000:01:00.0: eth0: (PCIe:2.5Gb/s:Width x1) 00:e0:67:0e:3a:58
+[    1.611603] igb 0000:01:00.0: eth0: PBA No: FFFFFF-0FF
+[    1.616761] igb 0000:01:00.0: Using MSI-X interrupts. 4 rx queue(s), 4 tx queue(s)
+[    1.891274] pps pps1: new PPS source ptp1
+[    1.895331] igb 0000:02:00.0: added PHC on eth1
+[    1.899874] igb 0000:02:00.0: Intel(R) Gigabit Ethernet Network Connection
+[    1.906768] igb 0000:02:00.0: eth1: (PCIe:2.5Gb/s:Width x1) 00:e0:67:0e:3a:59
+[    1.913920] igb 0000:02:00.0: eth1: PBA No: FFFFFF-0FF
+[    1.919074] igb 0000:02:00.0: Using MSI-X interrupts. 4 rx queue(s), 4 tx queue(s)
+[    2.194126] pps pps2: new PPS source ptp2
+[    2.198193] igb 0000:03:00.0: added PHC on eth2
+[    2.202733] igb 0000:03:00.0: Intel(R) Gigabit Ethernet Network Connection
+[    2.209624] igb 0000:03:00.0: eth2: (PCIe:2.5Gb/s:Width x1) 00:e0:67:0e:3a:5a
+[    2.216776] igb 0000:03:00.0: eth2: PBA No: FFFFFF-0FF
+[    2.221931] igb 0000:03:00.0: Using MSI-X interrupts. 4 rx queue(s), 4 tx queue(s)
+[    2.496639] pps pps3: new PPS source ptp3
+[    2.500690] igb 0000:04:00.0: added PHC on eth3
+[    2.505233] igb 0000:04:00.0: Intel(R) Gigabit Ethernet Network Connection
+[    2.512125] igb 0000:04:00.0: eth3: (PCIe:2.5Gb/s:Width x1) 00:e0:67:0e:3a:5b
+[    2.519278] igb 0000:04:00.0: eth3: PBA No: FFFFFF-0FF
+[    2.524432] igb 0000:04:00.0: Using MSI-X interrupts. 4 rx queue(s), 4 tx queue(s)
+[    2.532164] i8042: PNP: No PS/2 controller found.
+[    2.538416] mousedev: PS/2 mouse device common for all mice
+[    2.544157] rtc_cmos 00:02: RTC can wake from S4
+[    2.549668] rtc_cmos 00:02: rtc core: registered rtc_cmos as rtc0
+[    2.555843] rtc_cmos 00:02: alarms up to one month, 242 bytes nvram
+[    2.562162] IR NEC protocol handler initialized
+[    2.566711] IR RC5(x/sz) protocol handler initialized
+[    2.571780] IR RC6 protocol handler initialized
+[    2.576327] IR JVC protocol handler initialized
+[    2.580867] IR Sony protocol handler initialized
+[    2.585495] IR SANYO protocol handler initialized
+[    2.590224] IR Sharp protocol handler initialized
+[    2.594951] IR MCE Keyboard/mouse protocol handler initialized
+[    2.600802] IR XMP protocol handler initialized
+[    2.605354] intel_pstate: Intel P-state driver initializing
+[    2.612809] ledtrig-cpu: registered to indicate activity on CPUs
+[    2.620875] NET: Registered protocol family 10
+[    2.626628] Segment Routing with IPv6
+[    2.630349] mip6: Mobile IPv6
+[    2.633334] NET: Registered protocol family 17
+[    2.637816] mpls_gso: MPLS GSO support
+[    2.644199] microcode: sig=0x406c4, pf=0x1, revision=0x411
+[    2.650594] microcode: Microcode Update Driver: v2.2.
+[    2.650631] sched_clock: Marking stable (2650525728, 0)->(2749530338, -99004610)
+[    2.665108] registered taskstats version 1
+[    2.669224] Loading compiled-in X.509 certificates
+[    2.674069] zswap: loaded using pool lzo/zbud
+[    2.679540] rtc_cmos 00:02: setting system clock to 2020-03-06 12:57:20 UTC (1583499440)
+[    2.735486] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
+[    2.788874] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready
+[    2.842579] IPv6: ADDRCONF(NETDEV_UP): eth2: link is not ready
+[    2.896131] IPv6: ADDRCONF(NETDEV_UP): eth3: link is not ready
+[    5.481294] igb 0000:01:00.0 eth0: igb: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: RX/TX
+[    5.600688] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
+[    5.620474] Sending DHCP requests ., OK
+[    5.640380] IP-Config: Got DHCP answer from 192.168.4.1, my address is 192.168.4.208
+[    5.648204] IP-Config: Complete:
+[    5.651447]      device=eth0, hwaddr=00:e0:67:0e:3a:58, ipaddr=192.168.4.208, mask=255.255.255.0, gw=192.168.4.1
+[    5.661644]      host=192.168.4.208, domain=lan, nis-domain=(none)
+[    5.667839]      bootserver=192.168.4.1, rootserver=192.168.4.206, rootpath=     nameserver0=192.168.4.1
+[    5.771182] Root-NFS: nfsroot=/srv/nfs/debian,vers=3,udp
+[    5.776665] NFS: nfs mount opts='vers=2,udp,rsize=4096,wsize=4096,vers=3,udp,nolock,addr=192.168.4.206'
+[    5.786391] NFS:   parsing nfs mount option 'vers=2'
+[    5.791542] NFS:   parsing nfs mount option 'udp'
+[    5.796414] NFS:   parsing nfs mount option 'rsize=4096'
+[    5.801911] NFS:   parsing nfs mount option 'wsize=4096'
+[    5.807414] NFS:   parsing nfs mount option 'vers=3'
+[    5.812561] NFS:   parsing nfs mount option 'udp'
+[    5.817430] NFS:   parsing nfs mount option 'nolock'
+[    5.822569] NFS:   parsing nfs mount option 'addr=192.168.4.206'
+[    5.828847] NFS: MNTPATH: '/srv/nfs/debian'
+[    5.833181] NFS: sending MNT request for 192.168.4.206:/srv/nfs/debian
+[    5.869103] NFS: received 1 auth flavors
+[    5.873216] NFS:   auth flavor[0]: 1
+[    5.877023] NFS: MNT request succeeded
+[    5.880936] NFS: attempting to use auth flavor 1
+[    5.896528] VFS: Mounted root (nfs filesystem) on device 0:17.
+[    5.914915] Freeing unused kernel memory: 1652K
+[    5.919787] Write protecting the kernel read-only data: 18432k
+[    5.928275] Freeing unused kernel memory: 2008K
+[    5.936004] Freeing unused kernel memory: 536K
+[    5.956134] x86/mm: Checked W+X mappings: passed, no W+X pages found.
+[    5.962796] x86/mm: Checking user space page tables
+[    5.983117] x86/mm: Checked W+X mappings: passed, no W+X pages found.
+[    6.040543] random: fast init done
+[    6.365943] autofs4: module verification failed: signature and/or required key missing - tainting kernel
+[    6.394336] ip_tables: (C) 2000-2006 Netfilter Core Team
+[    6.417175] random: systemd: uninitialized urandom read (16 bytes read)
+[    6.431099] random: systemd: uninitialized urandom read (16 bytes read)
+[    6.441730] systemd[1]: systemd 232 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +SECCOMP +BLKID +ELFUTILS +KMOD +IDN)
+[    6.480722] systemd[1]: Detected architecture x86-64.
+[    6.516237] systemd[1]: Set hostname to <debian>.
+[    6.559710] random: systemd: uninitialized urandom read (16 bytes read)
+[    7.142724] systemd[1]: Listening on udev Kernel Socket.
+[    7.165923] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe.
+[    7.192914] systemd[1]: Listening on RPCbind Server Activation Socket.
+[    7.222246] systemd[1]: Created slice User and Session Slice.
+[    7.246086] systemd[1]: Listening on udev Control Socket.
+[    7.270745] systemd[1]: Listening on Journal Socket (/dev/log).
+[    7.293010] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
+[    7.940345] systemd-journald[114]: Received request to flush runtime journal from PID 1
+[    8.396211] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input0
+[    8.405338] ACPI: Power Button [PWRF]
+[    8.453026] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
+[    8.473019] SCSI subsystem initialized
+[    8.484779] input: PC Speaker as /devices/platform/pcspkr/input/input1
+[    8.496940] igb 0000:02:00.0 enp2s0: renamed from eth1
+[    8.518813] ACPI: bus type USB registered
+[    8.522045] igb 0000:04:00.0 enp4s0: renamed from eth3
+[    8.531450] usbcore: registered new interface driver usbfs
+[    8.538957] usbcore: registered new interface driver hub
+[    8.546653] usbcore: registered new device driver usb
+[    8.553555] igb 0000:03:00.0 enp3s0: renamed from eth2
+[    8.560354] libata version 3.00 loaded.
+[    8.597607] ahci 0000:00:13.0: version 3.0
+[    8.605390] CPU0: Core temperature above threshold, cpu clock throttled (total events = 1)
+[    8.608303] ahci 0000:00:13.0: AHCI 0001.0301 32 slots 2 ports 6 Gbps 0x3 impl SATA mode
+[    8.608320] ahci 0000:00:13.0: flags: 64bit ncq led clo only pio slum part deso sadm sds apst 
+[    8.616250] scsi host0: ahci
+[    8.619960] scsi host1: ahci
+[    8.620970] ata1: SATA max UDMA/133 abar m2048@0xd1414000 port 0xd1414100 irq 139
+[    8.621006] ata2: SATA max UDMA/133 abar m2048@0xd1414000 port 0xd1414180 irq 139
+[    8.625532] xhci_hcd 0000:00:14.0: xHCI Host Controller
+[    8.625626] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 1
+[    8.627254] xhci_hcd 0000:00:14.0: hcc params 0x200077c1 hci version 0x100 quirks 0x01509810
+[    8.627307] xhci_hcd 0000:00:14.0: cache line size of 64 is not supported
+[    8.628603] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
+[    8.628615] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
+[    8.628649] usb usb1: Product: xHCI Host Controller
+[    8.628657] usb usb1: Manufacturer: Linux 4.14.50 xhci-hcd
+[    8.628665] usb usb1: SerialNumber: 0000:00:14.0
+[    8.630750] hub 1-0:1.0: USB hub found
+[    8.630906] hub 1-0:1.0: 7 ports detected
+[    8.634570] xhci_hcd 0000:00:14.0: xHCI Host Controller
+[    8.634625] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 2
+[    8.634679] xhci_hcd 0000:00:14.0: Host supports USB 3.0  SuperSpeed
+[    8.635366] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003
+[    8.635377] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
+[    8.635385] usb usb2: Product: xHCI Host Controller
+[    8.635418] usb usb2: Manufacturer: Linux 4.14.50 xhci-hcd
+[    8.635426] usb usb2: SerialNumber: 0000:00:14.0
+[    8.637323] hub 2-0:1.0: USB hub found
+[    8.637477] hub 2-0:1.0: 6 ports detected
+[    8.775434] CPU0: Core temperature/speed normal
+[    8.795763] SSE version of gcm_enc/dec engaged.
+[    8.936055] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
+[    8.942642] ata2: SATA link down (SStatus 0 SControl 300)
+[    8.948739] ata1.00: ATA-11: Hoodisk SSD, SBFM01.2, max UDMA/133
+[    8.956328] ata1.00: 62533296 sectors, multi 16: LBA48 NCQ (depth 31/32), AA
+[    8.965195] ata1.00: configured for UDMA/133
+[    8.971352] scsi 0:0:0:0: Direct-Access     ATA      Hoodisk SSD      01.2 PQ: 0 ANSI: 5
+[    8.993901] scsi 0:0:0:0: Attached scsi generic sg0 type 0
+[    9.007022] sd 0:0:0:0: [sda] 62533296 512-byte logical blocks: (32.0 GB/29.8 GiB)
+[    9.015402] sd 0:0:0:0: [sda] Write Protect is off
+[    9.020685] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
+[    9.021215] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
+[    9.033215]  sda: sda1 sda2 < sda5 >
+[    9.037975] sd 0:0:0:0: [sda] Attached SCSI disk
+[    9.060451] random: crng init done
+[    9.064142] random: 7 urandom warning(s) missed due to ratelimiting
+[   10.752398] IPv6: ADDRCONF(NETDEV_UP): enp2s0: link is not ready
+[   10.805686] IPv6: ADDRCONF(NETDEV_UP): enp2s0: link is not ready
+[   10.823184] IPv6: ADDRCONF(NETDEV_UP): enp3s0: link is not ready
+[   10.876406] IPv6: ADDRCONF(NETDEV_UP): enp3s0: link is not ready
+[   10.894845] IPv6: ADDRCONF(NETDEV_UP): enp4s0: link is not ready
+[   10.948357] IPv6: ADDRCONF(NETDEV_UP): enp4s0: link is not ready
diff --git a/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/payload_config.txt b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/payload_config.txt
new file mode 100644
index 0000000..da4c922
--- /dev/null
+++ b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/payload_config.txt
@@ -0,0 +1,94 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# SeaBIOS Configuration
+#
+
+#
+# General Features
+#
+CONFIG_COREBOOT=y
+# CONFIG_QEMU is not set
+# CONFIG_CSM is not set
+# CONFIG_QEMU_HARDWARE is not set
+CONFIG_THREADS=y
+CONFIG_RELOCATE_INIT=y
+CONFIG_BOOTMENU=y
+CONFIG_BOOTSPLASH=y
+CONFIG_BOOTORDER=y
+CONFIG_HOST_BIOS_GEOMETRY=y
+CONFIG_COREBOOT_FLASH=y
+CONFIG_LZMA=y
+CONFIG_CBFS_LOCATION=0
+CONFIG_MULTIBOOT=y
+CONFIG_ENTRY_EXTRASTACK=y
+CONFIG_MALLOC_UPPERMEMORY=y
+CONFIG_ROM_SIZE=0
+
+#
+# Hardware support
+#
+CONFIG_ATA=y
+# CONFIG_ATA_DMA is not set
+# CONFIG_ATA_PIO32 is not set
+CONFIG_AHCI=y
+CONFIG_SDCARD=y
+CONFIG_MEGASAS=y
+CONFIG_FLOPPY=y
+CONFIG_FLASH_FLOPPY=y
+CONFIG_NVME=y
+CONFIG_PS2PORT=y
+CONFIG_USB=y
+CONFIG_USB_UHCI=y
+CONFIG_USB_OHCI=y
+CONFIG_USB_EHCI=y
+CONFIG_USB_XHCI=y
+CONFIG_USB_MSC=y
+CONFIG_USB_UAS=y
+CONFIG_USB_HUB=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_MOUSE=y
+CONFIG_SERIAL=y
+CONFIG_SERCON=y
+CONFIG_LPT=y
+CONFIG_RTC_TIMER=y
+CONFIG_HARDWARE_IRQ=y
+CONFIG_PMTIMER=y
+CONFIG_TSC_TIMER=y
+
+#
+# BIOS interfaces
+#
+CONFIG_DRIVES=y
+CONFIG_CDROM_BOOT=y
+CONFIG_CDROM_EMU=y
+CONFIG_PCIBIOS=y
+CONFIG_APMBIOS=y
+CONFIG_PNPBIOS=y
+CONFIG_OPTIONROMS=y
+CONFIG_PMM=y
+CONFIG_BOOT=y
+CONFIG_KEYBOARD=y
+CONFIG_KBD_CALL_INT15_4F=y
+CONFIG_MOUSE=y
+CONFIG_S3_RESUME=y
+CONFIG_VGAHOOKS=y
+# CONFIG_DISABLE_A20 is not set
+CONFIG_TCGBIOS=y
+
+#
+# VGA ROM
+#
+CONFIG_NO_VGABIOS=y
+# CONFIG_VGA_GEODEGX2 is not set
+# CONFIG_VGA_GEODELX is not set
+# CONFIG_VGA_COREBOOT is not set
+# CONFIG_BUILD_VGABIOS is not set
+CONFIG_VGA_EXTRA_STACK_SIZE=512
+
+#
+# Debugging
+#
+CONFIG_DEBUG_LEVEL=1
+CONFIG_DEBUG_SERIAL=y
+CONFIG_DEBUG_SERIAL_PORT=0x3f8
+CONFIG_DEBUG_COREBOOT=y
diff --git a/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/revision.txt b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/revision.txt
new file mode 100644
index 0000000..1d000d9
--- /dev/null
+++ b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/revision.txt
@@ -0,0 +1,5 @@
+Local revision: 5dd4f5f206
+Tagged revision: 4.11-1387-g5dd4f5f206
+Upstream revision: 8bee86ef23
+Upstream URL: review.coreboot.org:29418/coreboot
+Timestamp: 2020-03-06T12_54_49Z
diff --git a/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/rom_checksum.txt b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/rom_checksum.txt
new file mode 100644
index 0000000..34045db
--- /dev/null
+++ b/protectli/vault_bsw/4.11-1387-g5dd4f5f206/2020-03-06T12_54_49Z/rom_checksum.txt
@@ -0,0 +1 @@
+d5e9a5d90c71dd73fb2e07b1eb925d0b *build/coreboot.rom