asus/kfsn4-dre/4.0-9735-g54e6aa7/2015-05-21T05:57:48Z
diff --git a/asus/kfsn4-dre/4.0-9735-g54e6aa7/2015-05-21T05:57:48Z/coreboot_console.txt b/asus/kfsn4-dre/4.0-9735-g54e6aa7/2015-05-21T05:57:48Z/coreboot_console.txt
index e1d21c4..070193b 100644
--- a/asus/kfsn4-dre/4.0-9735-g54e6aa7/2015-05-21T05:57:48Z/coreboot_console.txt
+++ b/asus/kfsn4-dre/4.0-9735-g54e6aa7/2015-05-21T05:57:48Z/coreboot_console.txt
@@ -395,7 +395,7 @@
DOMAIN: 0000 passpw: enabled
scan_static_bus for Root Device done
done
-BS: BS_DEV_ENUMERATE times (us): entry 0 run 950 exit 0
+BS: BS_DEV_ENUMERATE times (us): entry 0 run 971 exit 0
POST: 0x73
found VGA at PCI: 01:04.0
Setting up VGA for PCI: 01:04.0
@@ -1014,7 +1014,7 @@
PCI: 00:19.3
PCI: 00:19.4
Done allocating resources.
-BS: BS_DEV_RESOURCES times (us): entry 0 run 2580 exit 0
+BS: BS_DEV_RESOURCES times (us): entry 0 run 2572 exit 0
POST: 0x74
Enabling resources...
PCI: 00:18.0 cmd <- 00
@@ -1072,7 +1072,7 @@
PCI: 03:00.0 subsystem <- 1043/8162
PCI: 03:00.0 cmd <- 02
done.
-BS: BS_DEV_ENABLE times (us): entry 0 run 198 exit 0
+BS: BS_DEV_ENABLE times (us): entry 0 run 194 exit 0
POST: 0x75
Initializing devices...
Root Device init
@@ -1118,33 +1118,33 @@
+#startup loops: 2.
Sending STARTUP #1 to 3.
After apic_write.
-
-MTRR check
-Fixed MTRRs : Enabled
-Variable MTRRs: Enabled
-
-POST: 0x93
Startup point 1.
Waiting for send to finish...
-+Sending STARTUP #2 to 3.
-After apic_write.
-Setting up local apic... apic_id: 0x01 done.
-POST: 0x9b
-CPU model: Quad-Core AMD Opteron(tm) Processor 8347
-Startup point 1.
-Waiting for send to finish...
-+siblings = 03, CPU #1 initialized
-After Startup.
-CPU4: stack_base 0012c000, stack_end 0012cff8
-Asserting INIT.
-Waiting for send to finish...
+
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
-Deasserting INIT.
+Sending STARTUP #2 to 3.
+After apic_write.
+Setting up local apic... apic_id: 0x01 done.
+POST: 0x9b
+Startup point 1.
+Waiting for send to finish...
++CPU model: Quad-Core AMD Opteron(tm) Processor 8347
+siblings = 03, CPU #1 initialized
+After Startup.
+CPU4: stack_base 0012c000, stack_end 0012cff8
+Asserting INIT.
+Waiting for send to finish...
++Deasserting INIT.
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+POST: 0x93
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 4.
@@ -1176,10 +1176,10 @@
POST: 0x93
Startup point 1.
Waiting for send to finish...
-+Setting up local apic...Sending STARTUP #2 to 5.
-After apic_write.
- apic_id: 0x03 done.
++Setting up local apic... apic_id: 0x03 done.
POST: 0x9b
+Sending STARTUP #2 to 5.
+After apic_write.
CPU model: Quad-Core AMD Opteron(tm) Processor 8347
Startup point 1.
Waiting for send to finish...
@@ -1195,14 +1195,14 @@
After apic_write.
Startup point 1.
Waiting for send to finish...
-+
++Sending STARTUP #2 to 6.
+After apic_write.
+
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
-Sending STARTUP #2 to 6.
-After apic_write.
Startup point 1.
Waiting for send to finish...
+Setting up local apic...After Startup.
@@ -1225,20 +1225,20 @@
MTRR check
Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+POST: 0x93
Startup point 1.
Waiting for send to finish...
-+Variable MTRRs: Enabled
-
-After Startup.
-POST: 0x93
++After Startup.
Initializing CPU #0
-CPU: vendor AMD device 100f21
+Setting up local apic...CPU: vendor AMD device 100f21
CPU: family 10, model 02, stepping 01
-Setting up local apic...nodeid = 00, coreid = 00
-POST: 0x60
-Enabling cache
apic_id: 0x05 done.
POST: 0x9b
+nodeid = 00, coreid = 00
+POST: 0x60
+Enabling cache
CPU ID 0x80000001: 100f21
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
CPU model: Quad-Core AMD Opteron(tm) Processor 8347
@@ -1293,7 +1293,7 @@
CPU5: stack: 0012b000 - 0012c000, lowest used address 0012bd10, stack used: 752 bytes
CPU6: stack: 0012a000 - 0012b000, lowest used address 0012ad10, stack used: 752 bytes
CPU7: stack: 00129000 - 0012a000, lowest used address 00129d10, stack used: 752 bytes
-CPU_CLUSTER: 0 init 46131 usecs
+CPU_CLUSTER: 0 init 45874 usecs
POST: 0x75
POST: 0x75
POST: 0x75
@@ -1315,7 +1315,7 @@
POST: 0x75
PCI: 00:18.3 init
NB: Function 3 Misc Control.. done.
-PCI: 00:18.3 init 3 usecs
+PCI: 00:18.3 init 2 usecs
POST: 0x75
PCI: 00:18.4 init
PCI: 00:18.4 init 0 usecs
@@ -1390,7 +1390,7 @@
CBFS: - load entry 0x0 file name (16 bytes)...
CBFS: Found file (offset=0x28, len=2704).
RTC Init
-PCI: 00:01.0 init 1713 usecs
+PCI: 00:01.0 init 1714 usecs
POST: 0x75
POST: 0x75
PCI: 00:02.0 init
@@ -1444,7 +1444,7 @@
POST: 0x75
PNP: 002e.5 init
Keyboard init...
-PNP: 002e.5 init 349517 usecs
+PNP: 002e.5 init 347514 usecs
POST: 0x75
POST: 0x75
POST: 0x75
@@ -1465,7 +1465,7 @@
POST: 0x75
smbus: PCI: 00:01.1[0]->I2C: 01:2f init
ID: 5ca3
-I2C: 01:2f init 96252 usecs
+I2C: 01:2f init 96262 usecs
POST: 0x75
PCI: 01:04.0 init
XGI Z9s: initializing video device
@@ -1476,7 +1476,7 @@
XGI VGA: No or unknown bridge type detected
XGI VGA: Default mode is 800x600x8 (60Hz)
XGI VGA text mode initialized
-PCI: 01:04.0 init 15539 usecs
+PCI: 01:04.0 init 15524 usecs
POST: 0x75
PCI: 02:00.0 init
PCI: 02:00.0 init 0 usecs
@@ -1547,7 +1547,7 @@
APIC: 05: enabled 1
APIC: 06: enabled 1
APIC: 07: enabled 1
-BS: BS_DEV_INIT times (us): entry 0 run 509349 exit 0
+BS: BS_DEV_INIT times (us): entry 0 run 507083 exit 0
POST: 0x76
Finalize devices...
Devices finalized
@@ -1807,7 +1807,7 @@
[ 0x000e6a0c, 00100000, 0x00100000) <- fff72660
dest 000e6a0c, end 00100000, bouncebuffer dfdbf000
Loaded segments
-BS: BS_PAYLOAD_LOAD times (us): entry 0 run 59119 exit 0
+BS: BS_PAYLOAD_LOAD times (us): entry 0 run 59158 exit 0
POST: 0x7b
Jumping to boot code at 000fd55a(dffab000)
POST: 0xf8
@@ -1816,7 +1816,7 @@
lb_start = 0x00100000
lb_size = 0x000f5dac
buffer = 0xdfdbf000
-SeaBIOS (version rel-1.8.0-10-g5ae3dd6-20150525_203309-cb-test-tgt)
+SeaBIOS (version rel-1.8.0-10-g5ae3dd6-20150526_013451-cb-test-tgt)
Found coreboot cbmem console @ dffdb000
Found mainboard ASUS KFSN4-DRE
Relocating init from 0x000e7c30 to 0xdff60c60 (size 41696)
@@ -1831,7 +1831,7 @@
Running option rom at c000:0003
pmm call arg1=0
Turning on vga text mode console
-SeaBIOS (version rel-1.8.0-10-g5ae3dd6-20150525_203309-cb-test-tgt)
+SeaBIOS (version rel-1.8.0-10-g5ae3dd6-20150526_013451-cb-test-tgt)
EHCI init on dev 00:02.1 (regs=0xfc303020)
OHCI init on dev 00:02.0 (regs=0xfc300000)
Found 0 lpt ports