aopen/dxplplusu/4.5-485-g52896c6/2016-12-04T02_03_58Z
diff --git a/aopen/dxplplusu/4.5-485-g52896c6/2016-12-04T02_03_58Z/coreboot_console.txt b/aopen/dxplplusu/4.5-485-g52896c6/2016-12-04T02_03_58Z/coreboot_console.txt
new file mode 100644
index 0000000..6398b3b
--- /dev/null
+++ b/aopen/dxplplusu/4.5-485-g52896c6/2016-12-04T02_03_58Z/coreboot_console.txt
@@ -0,0 +1,1105 @@
+
+
+coreboot-4.5-478-g35d7d58 Fri Dec 2 15:41:14 UTC 2016 ramstage starting...
+Enumerating buses...
+Show all devs... Before device enumeration.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+APIC: 06: enabled 1
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:00.1: enabled 1
+PCI: 00:02.0: enabled 1
+PCI: 00:1c.0: enabled 1
+PCI: 00:1d.0: enabled 1
+PCI: 00:1e.0: enabled 1
+PCI: 00:1f.0: enabled 1
+PCI: 00:04.0: enabled 0
+PCI: 00:06.0: enabled 0
+PCI: 00:1d.0: enabled 1
+PCI: 00:1d.1: enabled 1
+PCI: 00:1d.2: enabled 1
+PCI: 00:1d.7: enabled 1
+PCI: 00:1e.0: enabled 1
+PCI: 00:02.0: enabled 0
+PCI: 00:1f.0: enabled 1
+PNP: 002e.0: enabled 0
+PNP: 002e.3: enabled 0
+PNP: 002e.4: enabled 1
+PNP: 002e.5: enabled 0
+PNP: 002e.7: enabled 0
+PNP: 002e.a: enabled 1
+PCI: 00:1f.1: enabled 1
+PCI: 00:1f.3: enabled 1
+PCI: 00:1f.5: enabled 1
+PCI: 00:1f.6: enabled 0
+Compare with tree...
+Root Device: enabled 1
+ CPU_CLUSTER: 0: enabled 1
+ APIC: 00: enabled 1
+ APIC: 06: enabled 1
+ DOMAIN: 0000: enabled 1
+ PCI: 00:00.0: enabled 1
+ PCI: 00:00.1: enabled 1
+ PCI: 00:02.0: enabled 1
+ PCI: 00:1c.0: enabled 1
+ PCI: 00:1d.0: enabled 1
+ PCI: 00:1e.0: enabled 1
+ PCI: 00:1f.0: enabled 1
+ PCI: 00:04.0: enabled 0
+ PCI: 00:06.0: enabled 0
+ PCI: 00:1d.0: enabled 1
+ PCI: 00:1d.1: enabled 1
+ PCI: 00:1d.2: enabled 1
+ PCI: 00:1d.7: enabled 1
+ PCI: 00:1e.0: enabled 1
+ PCI: 00:02.0: enabled 0
+ PCI: 00:1f.0: enabled 1
+ PNP: 002e.0: enabled 0
+ PNP: 002e.3: enabled 0
+ PNP: 002e.4: enabled 1
+ PNP: 002e.5: enabled 0
+ PNP: 002e.7: enabled 0
+ PNP: 002e.a: enabled 1
+ PCI: 00:1f.1: enabled 1
+ PCI: 00:1f.3: enabled 1
+ PCI: 00:1f.5: enabled 1
+ PCI: 00:1f.6: enabled 0
+Root Device scanning...
+root_dev_scan_bus for Root Device
+CPU_CLUSTER: 0 enabled
+DOMAIN: 0000 enabled
+DOMAIN: 0000 scanning...
+PCI: pci_scan_bus for bus 00
+PCI: 00:00.0 [8086/2550] enabled
+PCI: 00:00.1 [8086/2551] enabled
+Capability: type 0x02 @ 0x60
+Capability: type 0x02 @ 0x60
+PCI: 00:01.0 [8086/2552] enabled
+PCI: 00:02.0 [8086/2553] enabled
+PCI: 00:02.1 [8086/2554] enabled
+PCI: 00:1d.0 [8086/24c2] ops
+PCI: 00:1d.0 [8086/24c2] enabled
+PCI: 00:1d.1 [8086/24c4] ops
+PCI: 00:1d.1 [8086/24c4] enabled
+PCI: 00:1d.2 [8086/24c7] ops
+PCI: 00:1d.2 [8086/24c7] enabled
+PCI: 00:1d.7 [8086/24cd] ops
+PCI: 00:1d.7 [8086/24cd] enabled
+PCI: 00:1e.0 [8086/244e] enabled
+PCI: 00:1f.0 [8086/24c0] bus ops
+PCI: 00:1f.0 [8086/24c0] enabled
+PCI: 00:1f.1 [8086/24cb] ops
+PCI: 00:1f.1 [8086/24cb] enabled
+PCI: 00:1f.3 [8086/24c3] enabled
+PCI: 00:1f.5 [8086/24c5] ops
+PCI: 00:1f.5 [8086/24c5] enabled
+PCI: 00:01.0 scanning...
+do_pci_scan_bridge for PCI: 00:01.0
+PCI: pci_scan_bus for bus 01
+scan_bus: scanning of bus PCI: 00:01.0 took 0 usecs
+PCI: 00:02.0 scanning...
+do_pci_scan_bridge for PCI: 00:02.0
+PCI: pci_scan_bus for bus 02
+PCI: 02:1c.0 [8086/1461] ops
+PCI: 02:1c.0 [8086/1461] enabled
+PCI: 02:1d.0 [8086/1460] bus ops
+PCI: 02:1d.0 [8086/1460] enabled
+PCI: 02:1e.0 [8086/1461] ops
+PCI: 02:1e.0 [8086/1461] enabled
+PCI: 02:1f.0 [8086/1460] bus ops
+PCI: 02:1f.0 [8086/1460] enabled
+PCI: 02:1d.0 scanning...
+do_pci_scan_bridge for PCI: 02:1d.0
+PCI: pci_scan_bus for bus 03
+PCI: 03:03.0 [8086/1010] enabled
+PCI: 03:03.1 [8086/1010] enabled
+PCI: 03:04.0 [8086/100f] enabled
+scan_bus: scanning of bus PCI: 02:1d.0 took 0 usecs
+PCI: 02:1f.0 scanning...
+do_pci_scan_bridge for PCI: 02:1f.0
+PCI: pci_scan_bus for bus 04
+PCI: 04:02.0 [8086/1010] enabled
+PCI: 04:02.1 [8086/1010] enabled
+PCI: 04:03.0 [8086/1010] enabled
+PCI: 04:03.1 [8086/1010] enabled
+PCI: 04:04.0 [9005/801f] enabled
+PCI: 04:04.1 [9005/801f] enabled
+scan_bus: scanning of bus PCI: 02:1f.0 took 0 usecs
+scan_bus: scanning of bus PCI: 00:02.0 took 0 usecs
+PCI: 00:1e.0 scanning...
+do_pci_scan_bridge for PCI: 00:1e.0
+PCI: pci_scan_bus for bus 05
+scan_bus: scanning of bus PCI: 00:1e.0 took 0 usecs
+PCI: 00:1f.0 scanning...
+scan_lpc_bus for PCI: 00:1f.0
+PNP: 002e.0 disabled
+PNP: 002e.3 disabled
+PNP: 002e.4 enabled
+PNP: 002e.5 disabled
+PNP: 002e.7 disabled
+PNP: 002e.a enabled
+scan_lpc_bus for PCI: 00:1f.0 done
+scan_bus: scanning of bus PCI: 00:1f.0 took 0 usecs
+scan_bus: scanning of bus DOMAIN: 0000 took 0 usecs
+root_dev_scan_bus for Root Device done
+scan_bus: scanning of bus Root Device took 0 usecs
+done
+Allocating resources...
+Reading resources...
+Root Device read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0
+PCI: 00:01.0 read_resources bus 1 link: 0
+PCI: 00:01.0 read_resources bus 1 link: 0 done
+PCI: 00:02.0 read_resources bus 2 link: 0
+PCI: 02:1d.0 read_resources bus 3 link: 0
+PCI: 02:1d.0 read_resources bus 3 link: 0 done
+PCI: 02:1f.0 read_resources bus 4 link: 0
+PCI: 02:1f.0 read_resources bus 4 link: 0 done
+PCI: 00:02.0 read_resources bus 2 link: 0 done
+PCI: 00:1e.0 read_resources bus 5 link: 0
+PCI: 00:1e.0 read_resources bus 5 link: 0 done
+PCI: 00:1f.0 read_resources bus 0 link: 0
+PCI: 00:1f.0 read_resources bus 0 link: 0 done
+PCI: 00:1f.5 register 10(00000001), read-only ignoring it
+PCI: 00:1f.5 register 14(00000001), read-only ignoring it
+DOMAIN: 0000 read_resources bus 0 link: 0 done
+Root Device read_resources bus 0 link: 0 done
+Done reading resources.
+Show resources in subtree (Root Device)...After reading.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ APIC: 06
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
+ PCI: 00:00.0
+ PCI: 00:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
+ PCI: 00:00.1
+ PCI: 00:01.0
+ PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
+ PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
+ PCI: 00:02.0 child on link 0 PCI: 02:1c.0
+ PCI: 00:02.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
+ PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 02:1c.0
+ PCI: 02:1c.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+ PCI: 02:1d.0 child on link 0 PCI: 03:03.0
+ PCI: 02:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 02:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 02:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 03:03.0
+ PCI: 03:03.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
+ PCI: 03:03.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
+ PCI: 03:03.1
+ PCI: 03:03.1 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
+ PCI: 03:03.1 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
+ PCI: 03:04.0
+ PCI: 03:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
+ PCI: 03:04.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
+ PCI: 02:1e.0
+ PCI: 02:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+ PCI: 02:1f.0 child on link 0 PCI: 04:02.0
+ PCI: 02:1f.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 02:1f.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 02:1f.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 04:02.0
+ PCI: 04:02.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
+ PCI: 04:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
+ PCI: 04:02.1
+ PCI: 04:02.1 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
+ PCI: 04:02.1 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
+ PCI: 04:03.0
+ PCI: 04:03.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
+ PCI: 04:03.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
+ PCI: 04:03.1
+ PCI: 04:03.1 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
+ PCI: 04:03.1 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
+ PCI: 04:04.0
+ PCI: 04:04.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
+ PCI: 04:04.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 14
+ PCI: 04:04.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 1c
+ PCI: 04:04.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 2200 index 30
+ PCI: 04:04.1
+ PCI: 04:04.1 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
+ PCI: 04:04.1 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 14
+ PCI: 04:04.1 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 1c
+ PCI: 04:04.1 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 2200 index 30
+ PCI: 00:02.1
+ PCI: 00:04.0
+ PCI: 00:06.0
+ PCI: 00:1d.0
+ PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.1
+ PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.2
+ PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.7
+ PCI: 00:1d.7 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
+ PCI: 00:1e.0 child on link 0 PCI: 05:02.0
+ PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
+ PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 05:02.0
+ PCI: 00:1f.0 child on link 0 PNP: 002e.0
+ PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+ PNP: 002e.0
+ PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
+ PNP: 002e.3
+ PNP: 002e.3 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
+ PNP: 002e.4
+ PNP: 002e.4 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.4 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.5
+ PNP: 002e.5 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.5 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.7
+ PNP: 002e.7 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
+ PNP: 002e.7 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
+ PNP: 002e.7 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.7 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
+ PNP: 002e.a
+ PNP: 002e.a resource base e00 size 80 align 7 gran 7 limit fff flags c0000100 index 60
+ PCI: 00:1f.1
+ PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
+ PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
+ PCI: 00:1f.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
+ PCI: 00:1f.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
+ PCI: 00:1f.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
+ PCI: 00:1f.1 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24
+ PCI: 00:1f.3
+ PCI: 00:1f.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1f.5
+ PCI: 00:1f.5 resource base 0 size 200 align 12 gran 9 limit ffffffff flags 200 index 18
+ PCI: 00:1f.5 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 1c
+ PCI: 00:1f.6
+DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
+PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:02.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 02:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 03:03.0 20 * [0x0 - 0x3f] io
+PCI: 03:03.1 20 * [0x40 - 0x7f] io
+PCI: 03:04.0 20 * [0x80 - 0xbf] io
+PCI: 02:1d.0 io: base: c0 size: 1000 align: 12 gran: 12 limit: ffff done
+PCI: 02:1f.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 04:04.0 10 * [0x0 - 0xff] io
+PCI: 04:04.0 1c * [0x400 - 0x4ff] io
+PCI: 04:04.1 10 * [0x800 - 0x8ff] io
+PCI: 04:04.1 1c * [0xc00 - 0xcff] io
+PCI: 04:02.0 20 * [0x1000 - 0x103f] io
+PCI: 04:02.1 20 * [0x1040 - 0x107f] io
+PCI: 04:03.0 20 * [0x1080 - 0x10bf] io
+PCI: 04:03.1 20 * [0x10c0 - 0x10ff] io
+PCI: 02:1f.0 io: base: 1100 size: 2000 align: 12 gran: 12 limit: ffff done
+PCI: 02:1f.0 1c * [0x0 - 0x1fff] io
+PCI: 02:1d.0 1c * [0x2000 - 0x2fff] io
+PCI: 00:02.0 io: base: 3000 size: 3000 align: 12 gran: 12 limit: ffff done
+PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:02.0 1c * [0x0 - 0x2fff] io
+PCI: 00:1d.0 20 * [0x3000 - 0x301f] io
+PCI: 00:1d.1 20 * [0x3020 - 0x303f] io
+PCI: 00:1d.2 20 * [0x3040 - 0x305f] io
+PCI: 00:1f.3 20 * [0x3060 - 0x307f] io
+PCI: 00:1f.1 20 * [0x3080 - 0x308f] io
+PCI: 00:1f.1 10 * [0x3090 - 0x3097] io
+PCI: 00:1f.1 18 * [0x3098 - 0x309f] io
+PCI: 00:1f.1 14 * [0x30a0 - 0x30a3] io
+PCI: 00:1f.1 1c * [0x30a4 - 0x30a7] io
+DOMAIN: 0000 io: base: 30a8 size: 30a8 align: 12 gran: 0 limit: ffff done
+DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
+PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:02.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 02:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 02:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 02:1f.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 02:1f.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:02.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:02.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 02:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 03:03.0 10 * [0x0 - 0x1ffff] mem
+PCI: 03:03.1 10 * [0x20000 - 0x3ffff] mem
+PCI: 03:04.0 10 * [0x40000 - 0x5ffff] mem
+PCI: 02:1d.0 mem: base: 60000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 02:1f.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 04:04.0 30 * [0x0 - 0x7ffff] mem
+PCI: 04:04.1 30 * [0x80000 - 0xfffff] mem
+PCI: 04:02.0 10 * [0x100000 - 0x11ffff] mem
+PCI: 04:02.1 10 * [0x120000 - 0x13ffff] mem
+PCI: 04:03.0 10 * [0x140000 - 0x15ffff] mem
+PCI: 04:03.1 10 * [0x160000 - 0x17ffff] mem
+PCI: 04:04.0 14 * [0x180000 - 0x181fff] mem
+PCI: 04:04.1 14 * [0x182000 - 0x183fff] mem
+PCI: 02:1f.0 mem: base: 184000 size: 200000 align: 20 gran: 20 limit: ffffffff done
+PCI: 02:1f.0 20 * [0x0 - 0x1fffff] mem
+PCI: 02:1d.0 20 * [0x200000 - 0x2fffff] mem
+PCI: 02:1c.0 10 * [0x300000 - 0x300fff] mem
+PCI: 02:1e.0 10 * [0x301000 - 0x301fff] mem
+PCI: 00:02.0 mem: base: 302000 size: 400000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:00.0 10 * [0x0 - 0xfffffff] prefmem
+PCI: 00:01.0 10 * [0x10000000 - 0x1fffffff] prefmem
+PCI: 00:02.0 20 * [0x20000000 - 0x203fffff] mem
+PCI: 00:1d.7 10 * [0x20400000 - 0x204003ff] mem
+PCI: 00:1f.1 24 * [0x20401000 - 0x204013ff] mem
+PCI: 00:1f.5 18 * [0x20402000 - 0x204021ff] mem
+PCI: 00:1f.5 1c * [0x20403000 - 0x204030ff] mem
+DOMAIN: 0000 mem: base: 20403100 size: 20403100 align: 28 gran: 0 limit: ffffffff done
+avoid_fixed_resources: DOMAIN: 0000
+avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
+constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
+constrain_resources: PCI: 00:1f.0 10000100 base ff800000 limit ffffffff mem (fixed)
+constrain_resources: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
+avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 base d0000000 limit febfffff
+Setting resources...
+DOMAIN: 0000 io: base:1000 size:30a8 align:12 gran:0 limit:ffff
+PCI: 00:02.0 1c * [0x1000 - 0x3fff] io
+PCI: 00:1d.0 20 * [0x4000 - 0x401f] io
+PCI: 00:1d.1 20 * [0x4020 - 0x403f] io
+PCI: 00:1d.2 20 * [0x4040 - 0x405f] io
+PCI: 00:1f.3 20 * [0x4060 - 0x407f] io
+PCI: 00:1f.1 20 * [0x4080 - 0x408f] io
+PCI: 00:1f.1 10 * [0x4090 - 0x4097] io
+PCI: 00:1f.1 18 * [0x4098 - 0x409f] io
+PCI: 00:1f.1 14 * [0x40a0 - 0x40a3] io
+PCI: 00:1f.1 1c * [0x40a4 - 0x40a7] io
+DOMAIN: 0000 io: next_base: 40a8 size: 30a8 align: 12 gran: 0 done
+PCI: 00:01.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:01.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
+PCI: 00:02.0 io: base:1000 size:3000 align:12 gran:12 limit:3fff
+PCI: 02:1f.0 1c * [0x1000 - 0x2fff] io
+PCI: 02:1d.0 1c * [0x3000 - 0x3fff] io
+PCI: 00:02.0 io: next_base: 4000 size: 3000 align: 12 gran: 12 done
+PCI: 02:1d.0 io: base:3000 size:1000 align:12 gran:12 limit:3fff
+PCI: 03:03.0 20 * [0x3000 - 0x303f] io
+PCI: 03:03.1 20 * [0x3040 - 0x307f] io
+PCI: 03:04.0 20 * [0x3080 - 0x30bf] io
+PCI: 02:1d.0 io: next_base: 30c0 size: 1000 align: 12 gran: 12 done
+PCI: 02:1f.0 io: base:1000 size:2000 align:12 gran:12 limit:2fff
+PCI: 04:04.0 10 * [0x1000 - 0x10ff] io
+PCI: 04:04.0 1c * [0x1400 - 0x14ff] io
+PCI: 04:04.1 10 * [0x1800 - 0x18ff] io
+PCI: 04:04.1 1c * [0x1c00 - 0x1cff] io
+PCI: 04:02.0 20 * [0x2000 - 0x203f] io
+PCI: 04:02.1 20 * [0x2040 - 0x207f] io
+PCI: 04:03.0 20 * [0x2080 - 0x20bf] io
+PCI: 04:03.1 20 * [0x20c0 - 0x20ff] io
+PCI: 02:1f.0 io: next_base: 2100 size: 2000 align: 12 gran: 12 done
+PCI: 00:1e.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:1e.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
+DOMAIN: 0000 mem: base:d0000000 size:20403100 align:28 gran:0 limit:febfffff
+PCI: 00:00.0 10 * [0xd0000000 - 0xdfffffff] prefmem
+PCI: 00:01.0 10 * [0xe0000000 - 0xefffffff] prefmem
+PCI: 00:02.0 20 * [0xf0000000 - 0xf03fffff] mem
+PCI: 00:1d.7 10 * [0xf0400000 - 0xf04003ff] mem
+PCI: 00:1f.1 24 * [0xf0401000 - 0xf04013ff] mem
+PCI: 00:1f.5 18 * [0xf0402000 - 0xf04021ff] mem
+PCI: 00:1f.5 1c * [0xf0403000 - 0xf04030ff] mem
+DOMAIN: 0000 mem: next_base: f0403100 size: 20403100 align: 28 gran: 0 done
+PCI: 00:01.0 prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
+PCI: 00:01.0 prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
+PCI: 00:01.0 mem: base:febfffff size:0 align:20 gran:20 limit:febfffff
+PCI: 00:01.0 mem: next_base: febfffff size: 0 align: 20 gran: 20 done
+PCI: 00:02.0 prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
+PCI: 00:02.0 prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
+PCI: 02:1d.0 prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
+PCI: 02:1d.0 prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
+PCI: 02:1f.0 prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
+PCI: 02:1f.0 prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
+PCI: 00:02.0 mem: base:f0000000 size:400000 align:20 gran:20 limit:f03fffff
+PCI: 02:1f.0 20 * [0xf0000000 - 0xf01fffff] mem
+PCI: 02:1d.0 20 * [0xf0200000 - 0xf02fffff] mem
+PCI: 02:1c.0 10 * [0xf0300000 - 0xf0300fff] mem
+PCI: 02:1e.0 10 * [0xf0301000 - 0xf0301fff] mem
+PCI: 00:02.0 mem: next_base: f0302000 size: 400000 align: 20 gran: 20 done
+PCI: 02:1d.0 mem: base:f0200000 size:100000 align:20 gran:20 limit:f02fffff
+PCI: 03:03.0 10 * [0xf0200000 - 0xf021ffff] mem
+PCI: 03:03.1 10 * [0xf0220000 - 0xf023ffff] mem
+PCI: 03:04.0 10 * [0xf0240000 - 0xf025ffff] mem
+PCI: 02:1d.0 mem: next_base: f0260000 size: 100000 align: 20 gran: 20 done
+PCI: 02:1f.0 mem: base:f0000000 size:200000 align:20 gran:20 limit:f01fffff
+PCI: 04:04.0 30 * [0xf0000000 - 0xf007ffff] mem
+PCI: 04:04.1 30 * [0xf0080000 - 0xf00fffff] mem
+PCI: 04:02.0 10 * [0xf0100000 - 0xf011ffff] mem
+PCI: 04:02.1 10 * [0xf0120000 - 0xf013ffff] mem
+PCI: 04:03.0 10 * [0xf0140000 - 0xf015ffff] mem
+PCI: 04:03.1 10 * [0xf0160000 - 0xf017ffff] mem
+PCI: 04:04.0 14 * [0xf0180000 - 0xf0181fff] mem
+PCI: 04:04.1 14 * [0xf0182000 - 0xf0183fff] mem
+PCI: 02:1f.0 mem: next_base: f0184000 size: 200000 align: 20 gran: 20 done
+PCI: 00:1e.0 prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
+PCI: 00:1e.0 prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
+PCI: 00:1e.0 mem: base:febfffff size:0 align:20 gran:20 limit:febfffff
+PCI: 00:1e.0 mem: next_base: febfffff size: 0 align: 20 gran: 20 done
+Root Device assign_resources, bus 0 link: 0
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+PCI: 00:00.0 10 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem
+PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
+PCI: 00:01.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 01 prefmem
+PCI: 00:01.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 01 mem
+PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
+PCI: 00:02.0 1c <- [0x0000001000 - 0x0000003fff] size 0x00003000 gran 0x0c bus 02 io
+PCI: 00:02.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 02 prefmem
+PCI: 00:02.0 20 <- [0x00f0000000 - 0x00f03fffff] size 0x00400000 gran 0x14 bus 02 mem
+PCI: 00:02.0 assign_resources, bus 2 link: 0
+PCI: 02:1c.0 10 <- [0x00f0300000 - 0x00f0300fff] size 0x00001000 gran 0x0c mem
+PCI: 02:1d.0 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 03 io
+PCI: 02:1d.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 03 prefmem
+PCI: 02:1d.0 20 <- [0x00f0200000 - 0x00f02fffff] size 0x00100000 gran 0x14 bus 03 mem
+PCI: 02:1d.0 assign_resources, bus 3 link: 0
+PCI: 03:03.0 10 <- [0x00f0200000 - 0x00f021ffff] size 0x00020000 gran 0x11 mem64
+PCI: 03:03.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io
+PCI: 03:03.1 10 <- [0x00f0220000 - 0x00f023ffff] size 0x00020000 gran 0x11 mem64
+PCI: 03:03.1 20 <- [0x0000003040 - 0x000000307f] size 0x00000040 gran 0x06 io
+PCI: 03:04.0 10 <- [0x00f0240000 - 0x00f025ffff] size 0x00020000 gran 0x11 mem64
+PCI: 03:04.0 20 <- [0x0000003080 - 0x00000030bf] size 0x00000040 gran 0x06 io
+PCI: 02:1d.0 assign_resources, bus 3 link: 0
+PCI: 02:1e.0 10 <- [0x00f0301000 - 0x00f0301fff] size 0x00001000 gran 0x0c mem
+PCI: 02:1f.0 1c <- [0x0000001000 - 0x0000002fff] size 0x00002000 gran 0x0c bus 04 io
+PCI: 02:1f.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 04 prefmem
+PCI: 02:1f.0 20 <- [0x00f0000000 - 0x00f01fffff] size 0x00200000 gran 0x14 bus 04 mem
+PCI: 02:1f.0 assign_resources, bus 4 link: 0
+PCI: 04:02.0 10 <- [0x00f0100000 - 0x00f011ffff] size 0x00020000 gran 0x11 mem64
+PCI: 04:02.0 20 <- [0x0000002000 - 0x000000203f] size 0x00000040 gran 0x06 io
+PCI: 04:02.1 10 <- [0x00f0120000 - 0x00f013ffff] size 0x00020000 gran 0x11 mem64
+PCI: 04:02.1 20 <- [0x0000002040 - 0x000000207f] size 0x00000040 gran 0x06 io
+PCI: 04:03.0 10 <- [0x00f0140000 - 0x00f015ffff] size 0x00020000 gran 0x11 mem64
+PCI: 04:03.0 20 <- [0x0000002080 - 0x00000020bf] size 0x00000040 gran 0x06 io
+PCI: 04:03.1 10 <- [0x00f0160000 - 0x00f017ffff] size 0x00020000 gran 0x11 mem64
+PCI: 04:03.1 20 <- [0x00000020c0 - 0x00000020ff] size 0x00000040 gran 0x06 io
+PCI: 04:04.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
+PCI: 04:04.0 14 <- [0x00f0180000 - 0x00f0181fff] size 0x00002000 gran 0x0d mem64
+PCI: 04:04.0 1c <- [0x0000001400 - 0x00000014ff] size 0x00000100 gran 0x08 io
+PCI: 04:04.0 30 <- [0x00f0000000 - 0x00f007ffff] size 0x00080000 gran 0x13 romem
+PCI: 04:04.1 10 <- [0x0000001800 - 0x00000018ff] size 0x00000100 gran 0x08 io
+PCI: 04:04.1 14 <- [0x00f0182000 - 0x00f0183fff] size 0x00002000 gran 0x0d mem64
+PCI: 04:04.1 1c <- [0x0000001c00 - 0x0000001cff] size 0x00000100 gran 0x08 io
+PCI: 04:04.1 30 <- [0x00f0080000 - 0x00f00fffff] size 0x00080000 gran 0x13 romem
+PCI: 02:1f.0 assign_resources, bus 4 link: 0
+PCI: 00:02.0 assign_resources, bus 2 link: 0
+PCI: 00:1d.0 20 <- [0x0000004000 - 0x000000401f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.1 20 <- [0x0000004020 - 0x000000403f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.2 20 <- [0x0000004040 - 0x000000405f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.7 10 <- [0x00f0400000 - 0x00f04003ff] size 0x00000400 gran 0x0a mem
+PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io
+PCI: 00:1e.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 05 prefmem
+PCI: 00:1e.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 05 mem
+PCI: 00:1e.0 assign_resources, bus 5 link: 0
+PCI: 00:1e.0 assign_resources, bus 5 link: 0
+PCI: 00:1f.0 assign_resources, bus 0 link: 0
+PNP: 002e.4 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
+PNP: 002e.4 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
+PNP: 002e.a 60 <- [0x0000000e00 - 0x0000000e7f] size 0x00000080 gran 0x07 io
+PCI: 00:1f.0 assign_resources, bus 0 link: 0
+PCI: 00:1f.1 10 <- [0x0000004090 - 0x0000004097] size 0x00000008 gran 0x03 io
+PCI: 00:1f.1 14 <- [0x00000040a0 - 0x00000040a3] size 0x00000004 gran 0x02 io
+PCI: 00:1f.1 18 <- [0x0000004098 - 0x000000409f] size 0x00000008 gran 0x03 io
+PCI: 00:1f.1 1c <- [0x00000040a4 - 0x00000040a7] size 0x00000004 gran 0x02 io
+PCI: 00:1f.1 20 <- [0x0000004080 - 0x000000408f] size 0x00000010 gran 0x04 io
+PCI: 00:1f.1 24 <- [0x00f0401000 - 0x00f04013ff] size 0x00000400 gran 0x0a mem
+PCI: 00:1f.3 20 <- [0x0000004060 - 0x000000407f] size 0x00000020 gran 0x05 io
+PCI: 00:1f.5 18 <- [0x00f0402000 - 0x00f04021ff] size 0x00000200 gran 0x09 mem
+PCI: 00:1f.5 1c <- [0x00f0403000 - 0x00f04030ff] size 0x00000100 gran 0x08 mem
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+Root Device assign_resources, bus 0 link: 0
+Done setting resources.
+Show resources in subtree (Root Device)...After assigning values.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ APIC: 06
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 1000 size 30a8 align 12 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base d0000000 size 20403100 align 28 gran 0 limit febfffff flags 40040200 index 10000100
+ DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index a
+ DOMAIN: 0000 resource base c0000 size cff40000 align 0 gran 0 limit 0 flags e0004200 index b
+ DOMAIN: 0000 resource base 100000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index c
+ DOMAIN: 0000 resource base 200000000 size 30000000 align 0 gran 0 limit 0 flags e0004200 index d
+ PCI: 00:00.0
+ PCI: 00:00.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001200 index 10
+ PCI: 00:00.1
+ PCI: 00:01.0
+ PCI: 00:01.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:01.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
+ PCI: 00:01.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20
+ PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001200 index 10
+ PCI: 00:02.0 child on link 0 PCI: 02:1c.0
+ PCI: 00:02.0 resource base 1000 size 3000 align 12 gran 12 limit 3fff flags 60080102 index 1c
+ PCI: 00:02.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
+ PCI: 00:02.0 resource base f0000000 size 400000 align 20 gran 20 limit f03fffff flags 60080202 index 20
+ PCI: 02:1c.0
+ PCI: 02:1c.0 resource base f0300000 size 1000 align 12 gran 12 limit f0300fff flags 60000200 index 10
+ PCI: 02:1d.0 child on link 0 PCI: 03:03.0
+ PCI: 02:1d.0 resource base 3000 size 1000 align 12 gran 12 limit 3fff flags 60080102 index 1c
+ PCI: 02:1d.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
+ PCI: 02:1d.0 resource base f0200000 size 100000 align 20 gran 20 limit f02fffff flags 60080202 index 20
+ PCI: 03:03.0
+ PCI: 03:03.0 resource base f0200000 size 20000 align 17 gran 17 limit f021ffff flags 60000201 index 10
+ PCI: 03:03.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20
+ PCI: 03:03.1
+ PCI: 03:03.1 resource base f0220000 size 20000 align 17 gran 17 limit f023ffff flags 60000201 index 10
+ PCI: 03:03.1 resource base 3040 size 40 align 6 gran 6 limit 307f flags 60000100 index 20
+ PCI: 03:04.0
+ PCI: 03:04.0 resource base f0240000 size 20000 align 17 gran 17 limit f025ffff flags 60000201 index 10
+ PCI: 03:04.0 resource base 3080 size 40 align 6 gran 6 limit 30bf flags 60000100 index 20
+ PCI: 02:1e.0
+ PCI: 02:1e.0 resource base f0301000 size 1000 align 12 gran 12 limit f0301fff flags 60000200 index 10
+ PCI: 02:1f.0 child on link 0 PCI: 04:02.0
+ PCI: 02:1f.0 resource base 1000 size 2000 align 12 gran 12 limit 2fff flags 60080102 index 1c
+ PCI: 02:1f.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
+ PCI: 02:1f.0 resource base f0000000 size 200000 align 20 gran 20 limit f01fffff flags 60080202 index 20
+ PCI: 04:02.0
+ PCI: 04:02.0 resource base f0100000 size 20000 align 17 gran 17 limit f011ffff flags 60000201 index 10
+ PCI: 04:02.0 resource base 2000 size 40 align 6 gran 6 limit 203f flags 60000100 index 20
+ PCI: 04:02.1
+ PCI: 04:02.1 resource base f0120000 size 20000 align 17 gran 17 limit f013ffff flags 60000201 index 10
+ PCI: 04:02.1 resource base 2040 size 40 align 6 gran 6 limit 207f flags 60000100 index 20
+ PCI: 04:03.0
+ PCI: 04:03.0 resource base f0140000 size 20000 align 17 gran 17 limit f015ffff flags 60000201 index 10
+ PCI: 04:03.0 resource base 2080 size 40 align 6 gran 6 limit 20bf flags 60000100 index 20
+ PCI: 04:03.1
+ PCI: 04:03.1 resource base f0160000 size 20000 align 17 gran 17 limit f017ffff flags 60000201 index 10
+ PCI: 04:03.1 resource base 20c0 size 40 align 6 gran 6 limit 20ff flags 60000100 index 20
+ PCI: 04:04.0
+ PCI: 04:04.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10
+ PCI: 04:04.0 resource base f0180000 size 2000 align 13 gran 13 limit f0181fff flags 60000201 index 14
+ PCI: 04:04.0 resource base 1400 size 100 align 8 gran 8 limit 14ff flags 60000100 index 1c
+ PCI: 04:04.0 resource base f0000000 size 80000 align 19 gran 19 limit f007ffff flags 60002200 index 30
+ PCI: 04:04.1
+ PCI: 04:04.1 resource base 1800 size 100 align 8 gran 8 limit 18ff flags 60000100 index 10
+ PCI: 04:04.1 resource base f0182000 size 2000 align 13 gran 13 limit f0183fff flags 60000201 index 14
+ PCI: 04:04.1 resource base 1c00 size 100 align 8 gran 8 limit 1cff flags 60000100 index 1c
+ PCI: 04:04.1 resource base f0080000 size 80000 align 19 gran 19 limit f00fffff flags 60002200 index 30
+ PCI: 00:02.1
+ PCI: 00:04.0
+ PCI: 00:06.0
+ PCI: 00:1d.0
+ PCI: 00:1d.0 resource base 4000 size 20 align 5 gran 5 limit 401f flags 60000100 index 20
+ PCI: 00:1d.1
+ PCI: 00:1d.1 resource base 4020 size 20 align 5 gran 5 limit 403f flags 60000100 index 20
+ PCI: 00:1d.2
+ PCI: 00:1d.2 resource base 4040 size 20 align 5 gran 5 limit 405f flags 60000100 index 20
+ PCI: 00:1d.7
+ PCI: 00:1d.7 resource base f0400000 size 400 align 12 gran 10 limit f04003ff flags 60000200 index 10
+ PCI: 00:1e.0 child on link 0 PCI: 05:02.0
+ PCI: 00:1e.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1e.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
+ PCI: 00:1e.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20
+ PCI: 05:02.0
+ PCI: 00:1f.0 child on link 0 PNP: 002e.0
+ PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+ PNP: 002e.0
+ PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
+ PNP: 002e.3
+ PNP: 002e.3 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
+ PNP: 002e.4
+ PNP: 002e.4 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 002e.4 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.5
+ PNP: 002e.5 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.5 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.7
+ PNP: 002e.7 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
+ PNP: 002e.7 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
+ PNP: 002e.7 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.7 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
+ PNP: 002e.a
+ PNP: 002e.a resource base e00 size 80 align 7 gran 7 limit fff flags e0000100 index 60
+ PCI: 00:1f.1
+ PCI: 00:1f.1 resource base 4090 size 8 align 3 gran 3 limit 4097 flags 60000100 index 10
+ PCI: 00:1f.1 resource base 40a0 size 4 align 2 gran 2 limit 40a3 flags 60000100 index 14
+ PCI: 00:1f.1 resource base 4098 size 8 align 3 gran 3 limit 409f flags 60000100 index 18
+ PCI: 00:1f.1 resource base 40a4 size 4 align 2 gran 2 limit 40a7 flags 60000100 index 1c
+ PCI: 00:1f.1 resource base 4080 size 10 align 4 gran 4 limit 408f flags 60000100 index 20
+ PCI: 00:1f.1 resource base f0401000 size 400 align 12 gran 10 limit f04013ff flags 60000200 index 24
+ PCI: 00:1f.3
+ PCI: 00:1f.3 resource base 4060 size 20 align 5 gran 5 limit 407f flags 60000100 index 20
+ PCI: 00:1f.5
+ PCI: 00:1f.5 resource base f0402000 size 200 align 12 gran 9 limit f04021ff flags 60000200 index 18
+ PCI: 00:1f.5 resource base f0403000 size 100 align 12 gran 8 limit f04030ff flags 60000200 index 1c
+ PCI: 00:1f.6
+Done allocating resources.
+Enabling resources...
+PCI: 00:00.0 subsystem <- 0000/0000
+PCI: 00:00.0 cmd <- 06
+PCI: 00:00.1 subsystem <- 0000/0000
+PCI: 00:00.1 cmd <- 00
+PCI: 00:01.0 bridge ctrl <- 0003
+PCI: 00:01.0 cmd <- 02
+PCI: 00:02.0 bridge ctrl <- 0003
+PCI: 00:02.0 cmd <- 07
+PCI: 00:02.1 cmd <- 00
+PCI: 00:1d.0 cmd <- 01
+PCI: 00:1d.1 cmd <- 01
+PCI: 00:1d.2 cmd <- 01
+PCI: 00:1d.7 cmd <- 02
+PCI: 00:1e.0 bridge ctrl <- 0003
+PCI: 00:1e.0 cmd <- 01
+PCI: 00:1f.0 cmd <- 0f
+PCI: 00:1f.1 cmd <- 03
+PCI: 00:1f.3 subsystem <- 0000/0000
+PCI: 00:1f.3 cmd <- 01
+PCI: 00:1f.5 cmd <- 02
+PCI: 02:1c.0 cmd <- 146
+PCI: 02:1d.0 bridge ctrl <- 0003
+PCI: 02:1d.0 cmd <- 07
+PCI: 02:1e.0 cmd <- 146
+PCI: 02:1f.0 bridge ctrl <- 0003
+PCI: 02:1f.0 cmd <- 07
+PCI: 03:03.0 cmd <- 03
+PCI: 03:03.1 cmd <- 03
+PCI: 03:04.0 cmd <- 03
+PCI: 04:02.0 cmd <- 03
+PCI: 04:02.1 cmd <- 03
+PCI: 04:03.0 cmd <- 03
+PCI: 04:03.1 cmd <- 03
+PCI: 04:04.0 cmd <- 03
+PCI: 04:04.1 cmd <- 03
+done.
+Initializing devices...
+Root Device init ...
+CPU_CLUSTER: 0 init ...
+start_eip=0x00001000, code_size=0x00000031
+Initializing SMM handler... ... pmbase = 0x0000
+
+SMI_STS:
+PM1_STS: WAK PRBTNOR BM
+GPE0_STS:
+ALT_GP_SMI_STS: GPI15 GPI14 GPI13 GPI12 GPI11 GPI10 GPI9 GPI8 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0
+TCO_STS: SMLINK_SLV BOOT SECOND_TO INTRD_DET DMISERR DMISMI DMISCI BIOSWR NEWCENTURY TIMEOUT TCO_INT SW_TCO NMI2SMI
+ ... raise SMI#
+Initializing CPU #0
+CPU: vendor Intel device f25
+CPU: family 0f, model 02, stepping 05
+Enabling cache
+MTRR: Physical address space:
+0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
+0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
+0x00000000000c0000 - 0x00000000d0000000 size 0xcff40000 type 6
+0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
+0x0000000100000000 - 0x0000000230000000 size 0x130000000 type 6
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+call enable_fixed_mtrr()
+CPU physical address size: 36 bits
+MTRR: default type WB/UC MTRR counts: 2/6.
+MTRR: WB selected as default type.
+MTRR: 0 base 0x00000000d0000000 mask 0x0000000ff0000000 type 0
+MTRR: 1 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+CBFS: 'Master Header Locator' located CBFS at [100:7ffc0)
+CBFS: Locating 'cpu_microcode_blob.bin'
+CBFS: Found @ offset 4840 size 12000
+microcode: sig=0xf25 pf=0x1 revision=0x0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+microcode: updated to revision 0x29 date=2004-08-11
+Setting up local APIC... apic_id: 0x00 done.
+CPU: 0 2 siblings
+CPU: 0 has sibling 1
+CPU #0 initialized
+CPU1: stack_base 00122000, stack_end 00122ff8
+Asserting INIT.
+Waiting for send to finish...
++Deasserting INIT.
+Waiting for send to finish...
++#startup loops: 2.
+Sending STARTUP #1 to 6.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++Sending STARTUP #2 to 6.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++After Startup.
+Initializing CPU #1
+CPU: vendor Intel device f25
+CPU: family 0f, model 02, stepping 05
+Enabling cache
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+call enable_fixed_mtrr()
+CPU physical address size: 36 bits
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+CBFS: 'Master Header Locator' located CBFS at [100:7ffc0)
+CBFS: Locating 'cpu_microcode_blob.bin'
+CBFS: Found @ offset 4840 size 12000
+microcode: sig=0xf25 pf=0x1 revision=0x0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+microcode: updated to revision 0x29 date=2004-08-11
+Setting up local APIC... apic_id: 0x06 done.
+CPU: 6 2 siblings
+CPU: 6 has sibling 7
+CPU #1 initialized
+CPU2: stack_base 00121000, stack_end 00121ff8
+Asserting INIT.
+Waiting for send to finish...
++Deasserting INIT.
+Waiting for send to finish...
++#startup loops: 2.
+Sending STARTUP #1 to 1.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++Sending STARTUP #2 to 1.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++After Startup.
+Initializing CPU #2
+CPU: vendor Intel device f25
+CPU: family 0f, model 02, stepping 05
+Enabling cache
+Setting up local APIC... apic_id: 0x01 done.
+CPU: 1 2 siblings
+CPU #2 initialized
+CPU3: stack_base 00120000, stack_end 00120ff8
+Asserting INIT.
+Waiting for send to finish...
++Deasserting INIT.
+Waiting for send to finish...
++#startup loops: 2.
+Sending STARTUP #1 to 7.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++Sending STARTUP #2 to 7.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++After Startup.
+Initializing CPU #3
+Waiting for 1 CPUS to stop
+CPU: vendor Intel device f25
+CPU: family 0f, model 02, stepping 05
+Enabling cache
+Setting up local APIC... apic_id: 0x07 done.
+CPU: 7 2 siblings
+CPU #3 initialized
+All AP CPUs stopped (1468 loops)
+CPU0: stack: 00123000 - 00124000, lowest used address 00123ae0, stack used: 1312 bytes
+CPU1: stack: 00122000 - 00123000, lowest used address 00122d08, stack used: 760 bytes
+CPU2: stack: 00121000 - 00122000, lowest used address 00121de8, stack used: 536 bytes
+CPU3: stack: 00120000 - 00121000, lowest used address 00120de8, stack used: 536 bytes
+PCI: 00:00.0 init ...
+PCI: 00:00.1 init ...
+PCI: 00:02.1 init ...
+PCI: 00:1d.0 init ...
+USB: Setting up controller.. done.
+PCI: 00:1d.1 init ...
+USB: Setting up controller.. done.
+PCI: 00:1d.2 init ...
+USB: Setting up controller.. done.
+PCI: 00:1d.7 init ...
+USB: Setting up controller.. done.
+PCI: 00:1f.0 init ...
+IOAPIC Southbridge enabled 2186
+IOAPIC: Initializing IOAPIC at 0xfec00000
+IOAPIC: Bootstrap Processor Local APIC = 0x00
+IOAPIC: ID = 0x02
+IOAPIC: Dumping registers
+ reg 0x0000: 0x02000000
+ reg 0x0001: 0x00178020
+ reg 0x0002: 0x00000000
+Set power on after power failure.
+NMI sources disabled.
+RTC Init
+RTC: Clear requested zeroing cmos
+Enabling HPET at 0xfed00000
+HPET enabled at 0xfed00000
+PCI: 00:1f.1 init ...
+IDE0: Primary IDE interface is enabled
+IDE1: Secondary IDE interface is enabled
+PCI: 00:1f.3 init ...
+PCI: 00:1f.5 init ...
+Initializing AC'97 Audio.
+No primary codec. Disabling AC'97 Audio.
+PCI: 02:1c.0 init ...
+IOAPIC 3 at 02:1c.0 MBAR = f0300000 DataAddr = f0300010
+PCI: 02:1d.0 init ...
+PCI: 02:1e.0 init ...
+IOAPIC 4 at 02:1e.0 MBAR = f0301000 DataAddr = f0301010
+PCI: 02:1f.0 init ...
+PCI: 03:03.0 init ...
+PCI: 03:03.1 init ...
+PCI: 03:04.0 init ...
+PCI: 04:02.0 init ...
+PCI: 04:02.1 init ...
+PCI: 04:03.0 init ...
+PCI: 04:03.1 init ...
+PCI: 04:04.0 init ...
+PCI: 04:04.1 init ...
+PNP: 002e.4 init ...
+PNP: 002e.a init ...
+Devices initialized
+Show all devs... After init.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+APIC: 06: enabled 1
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:00.1: enabled 1
+PCI: 00:02.0: enabled 1
+PCI: 02:1c.0: enabled 1
+PCI: 02:1d.0: enabled 1
+PCI: 02:1e.0: enabled 1
+PCI: 02:1f.0: enabled 1
+PCI: 00:04.0: enabled 0
+PCI: 00:06.0: enabled 0
+PCI: 00:1d.0: enabled 1
+PCI: 00:1d.1: enabled 1
+PCI: 00:1d.2: enabled 1
+PCI: 00:1d.7: enabled 1
+PCI: 00:1e.0: enabled 1
+PCI: 05:02.0: enabled 0
+PCI: 00:1f.0: enabled 1
+PNP: 002e.0: enabled 0
+PNP: 002e.3: enabled 0
+PNP: 002e.4: enabled 1
+PNP: 002e.5: enabled 0
+PNP: 002e.7: enabled 0
+PNP: 002e.a: enabled 1
+PCI: 00:1f.1: enabled 1
+PCI: 00:1f.3: enabled 1
+PCI: 00:1f.5: enabled 1
+PCI: 00:1f.6: enabled 0
+PCI: 00:01.0: enabled 1
+PCI: 00:02.1: enabled 1
+PCI: 03:03.0: enabled 1
+PCI: 03:03.1: enabled 1
+PCI: 03:04.0: enabled 1
+PCI: 04:02.0: enabled 1
+PCI: 04:02.1: enabled 1
+PCI: 04:03.0: enabled 1
+PCI: 04:03.1: enabled 1
+PCI: 04:04.0: enabled 1
+PCI: 04:04.1: enabled 1
+APIC: 01: enabled 1
+APIC: 07: enabled 1
+CBMEM:
+IMD: root @ cffff000 254 entries.
+IMD: root @ cfffec00 62 entries.
+Moving GDT to cfffea00...ok
+Finalize devices...
+Devices finalized
+CBFS: 'Master Header Locator' located CBFS at [100:7ffc0)
+CBFS: Locating 'fallback/dsdt.aml'
+CBFS: Found @ offset 21640 size eff
+CBFS: 'Master Header Locator' located CBFS at [100:7ffc0)
+CBFS: Locating 'fallback/slic'
+CBFS: 'fallback/slic' not found.
+ACPI: Writing ACPI tables at cffb1000.
+ACPI: * FACS
+ACPI: * DSDT
+ACPI: * FADT
+ACPI: added table 1/32, length now 40
+ACPI: * SSDT
+ACPI: added table 2/32, length now 44
+ACPI: * MCFG
+ACPI: * TCPA
+TCPA log created at cffa1000
+ACPI: added table 3/32, length now 48
+ACPI: * MADT
+ACPI: added table 4/32, length now 52
+current = cffb23c0
+ACPI: done.
+ACPI tables: 5056 bytes.
+smbios_write_tables: cffa0000
+Root Device (AOpen DXPL Plus-U)
+CPU_CLUSTER: 0 (Intel E7505 Northbridge)
+APIC: 00 (unknown)
+APIC: 06 (unknown)
+DOMAIN: 0000 (Intel E7505 Northbridge)
+PCI: 00:00.0 (Intel E7505 Northbridge)
+PCI: 00:00.1 (Intel E7505 Northbridge)
+PCI: 00:02.0 (Intel E7505 Northbridge)
+PCI: 02:1c.0 (unknown)
+PCI: 02:1d.0 (unknown)
+PCI: 02:1e.0 (unknown)
+PCI: 02:1f.0 (unknown)
+PCI: 00:04.0 (Intel E7505 Northbridge)
+PCI: 00:06.0 (Intel E7505 Northbridge)
+PCI: 00:1d.0 (Intel ICH4/ICH4-M (82801Dx) Series Southbridge)
+PCI: 00:1d.1 (Intel ICH4/ICH4-M (82801Dx) Series Southbridge)
+PCI: 00:1d.2 (Intel ICH4/ICH4-M (82801Dx) Series Southbridge)
+PCI: 00:1d.7 (Intel ICH4/ICH4-M (82801Dx) Series Southbridge)
+PCI: 00:1e.0 (Intel ICH4/ICH4-M (82801Dx) Series Southbridge)
+PCI: 05:02.0 (Intel ICH4/ICH4-M (82801Dx) Series Southbridge)
+PCI: 00:1f.0 (Intel ICH4/ICH4-M (82801Dx) Series Southbridge)
+PNP: 002e.0 (SMSC LPC47M10x Super I/O)
+PNP: 002e.3 (SMSC LPC47M10x Super I/O)
+PNP: 002e.4 (SMSC LPC47M10x Super I/O)
+PNP: 002e.5 (SMSC LPC47M10x Super I/O)
+PNP: 002e.7 (SMSC LPC47M10x Super I/O)
+PNP: 002e.a (SMSC LPC47M10x Super I/O)
+PCI: 00:1f.1 (Intel ICH4/ICH4-M (82801Dx) Series Southbridge)
+PCI: 00:1f.3 (Intel ICH4/ICH4-M (82801Dx) Series Southbridge)
+PCI: 00:1f.5 (Intel ICH4/ICH4-M (82801Dx) Series Southbridge)
+PCI: 00:1f.6 (Intel ICH4/ICH4-M (82801Dx) Series Southbridge)
+PCI: 00:01.0 (unknown)
+PCI: 00:02.1 (unknown)
+PCI: 03:03.0 (unknown)
+PCI: 03:03.1 (unknown)
+PCI: 03:04.0 (unknown)
+PCI: 04:02.0 (unknown)
+PCI: 04:02.1 (unknown)
+PCI: 04:03.0 (unknown)
+PCI: 04:03.1 (unknown)
+PCI: 04:04.0 (unknown)
+PCI: 04:04.1 (unknown)
+APIC: 01 (unknown)
+APIC: 07 (unknown)
+SMBIOS tables: 346 bytes.
+Writing table forward entry at 0x00000500
+Wrote coreboot table at: 00000500, 0x10 bytes, checksum dfe0
+Writing coreboot table at 0xcffd5000
+ 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
+ 1. 0000000000001000-000000000009ffff: RAM
+ 2. 00000000000c0000-00000000cff9ffff: RAM
+ 3. 00000000cffa0000-00000000cfffffff: CONFIGURATION TABLES
+ 4. 0000000100000000-000000022fffffff: RAM
+CBFS: 'Master Header Locator' located CBFS at [100:7ffc0)
+FMAP: Found "FLASH" version 1.1 at 0.
+FMAP: base = fff80000 size = 80000 #areas = 3
+Wrote coreboot table at: cffd5000, 0x218 bytes, checksum 7e41
+coreboot table: 560 bytes.
+IMD ROOT 0. cffff000 00001000
+IMD SMALL 1. cfffe000 00001000
+CONSOLE 2. cffde000 00020000
+TIME STAMP 3. cffdd000 00000400
+COREBOOT 4. cffd5000 00008000
+ACPI 5. cffb1000 00024000
+TCPA LOG 6. cffa1000 00010000
+SMBIOS 7. cffa0000 00000800
+IMD small region:
+ IMD ROOT 0. cfffec00 00000400
+ GDT 1. cfffea00 00000200
+CBFS: 'Master Header Locator' located CBFS at [100:7ffc0)
+CBFS: Locating 'fallback/payload'
+CBFS: Found @ offset 225c0 size eee9
+Loading segment from ROM address 0xfffa26f8
+ code (compression=1)
+ New segment dstaddr 0xe4060 memsize 0x1bfa0 srcaddr 0xfffa2730 filesize 0xeeb1
+Loading segment from ROM address 0xfffa2714
+ Entry Point 0x000ff06e
+Bounce Buffer at cff07000, 623712 bytes
+Loading Segment: addr: 0x00000000000e4060 memsz: 0x000000000001bfa0 filesz: 0x000000000000eeb1
+lb: [0x0000000000100000, 0x000000000014c230)
+Post relocation: addr: 0x00000000000e4060 memsz: 0x000000000001bfa0 filesz: 0x000000000000eeb1
+using LZMA
+[ 0x000e4060, 00100000, 0x00100000) <- fffa2730
+dest 000e4060, end 00100000, bouncebuffer cff07000
+Loaded segments
+Jumping to boot code at 000ff06e(cffd5000)
+CPU0: stack: 00123000 - 00124000, lowest used address 00123ae0, stack used: 1312 bytes
+entry = 0x000ff06e
+lb_start = 0x00100000
+lb_size = 0x0004c230
+buffer = 0xcff07000
+SeaBIOS (version rel-1.9.3-0-ge2fc41e)
+BUILD: gcc: (coreboot toolchain v1.39 April 16th, 2016) 5.3.0 binutils: (GNU Binutils) 2.26.20160125
+Found coreboot cbmem console @ cffde000
+Found mainboard AOpen DXPL Plus-U
+Relocating init from 0x000e5480 to 0xcff54bc0 (size 45984)
+Found CBFS header at 0xfff80138
+multiboot: eax=0, ebx=0
+Found 27 PCI devices (max PCI bus is 05)
+Copying SMBIOS entry point from 0xcffa0000 to 0x000f0800
+Copying ACPI RSDP from 0xcffb1000 to 0x000f07d0
+Using pmtimer, ioport 0x408
+Scan for VGA option rom
+EHCI init on dev 00:1d.7 (regs=0xf0400020)
+WARNING - Timeout at i8042_flush:71!
+Found 0 lpt ports
+Found 1 serial ports
+ATA controller 1 at 1f0/3f4/0 (irq 14 dev f9)
+UHCI init on dev 00:1d.0 (io=4000)
+ATA controller 2 at 170/374/0 (irq 15 dev f9)
+UHCI init on dev 00:1d.1 (io=4020)
+UHCI init on dev 00:1d.2 (io=4040)
+Searching bootorder for: /pci@i0cf8/usb@1d,7/storage@1/*@0/*@0,0
+Searching bootorder for: /pci@i0cf8/usb@1d,7/usb-*@1
+USB MSC vendor='Generic' product='Flash Disk' rev='8.07' type=0 removable=1
+USB MSC blksize=512 sectors=7987200
+All threads complete.
+Scan for option roms
+
+Press ESC for boot menu.
+
+Searching bootorder for: HALT
+drive 0x000f0760: PCHS=0/0/0 translation=lba LCHS=990/128/63 s=7987200
+Space available for UMB: c0000-ef000, f0000-f0760
+Returned 253952 bytes of ZoneHigh
+e820 map has 6 items:
+ 0: 0000000000000000 - 000000000009fc00 = 1 RAM
+ 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
+ 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
+ 3: 0000000000100000 - 00000000cff9e000 = 1 RAM
+ 4: 00000000cff9e000 - 00000000d0000000 = 2 RESERVED
+ 5: 0000000100000000 - 0000000230000000 = 1 RAM
+enter handle_19:
+ NULL
+Booting from Hard Disk...
+Booting from 0000:7c00
+