commit 613198e23d9a93926686df30071c4d62a3f81ebf
author Paul Menzel <paulepanter@users.sourceforge.net> Thu May 03 08:44:35 2018 +0200
committer Paul Menzel <paulepanter@users.sourceforge.net> Sat May 05 13:55:04 2018 +0200
tree e7615cb61cb8918fcad2f01acaf78a5d5733e914
parent a1495f1d62fc3c81a3c2e27b675d6e9a98f4bda7

asrock/e350m1/4.7-808-g851dde8255/2018-04-23T20_58_58Z

Built with the coreboot toolchain v1.50.

gcc: (coreboot toolchain v1.50 October 15th, 2017) 6.3.0 binutils: (GNU Binutils) 2.29.1

asrock/e350m1/4.7-808-g851dde8255/2018-04-23T20_58_58Z/config.short.txt

diff --git a/asrock/e350m1/4.7-808-g851dde8255/2018-04-23T20_58_58Z/config.short.txt b/asrock/e350m1/4.7-808-g851dde8255/2018-04-23T20_58_58Z/config.short.txt
new file mode 100644
index 0000000..04224ea
--- /dev/null
+++ b/asrock/e350m1/4.7-808-g851dde8255/2018-04-23T20_58_58Z/config.short.txt
@@ -0,0 +1,14 @@
+# This image was built using coreboot TIMELESS
+CONFIG_VENDOR_ASROCK=y
+CONFIG_VGA_BIOS=y
+CONFIG_VGA_BIOS_FILE="pci1002,9802.rom.lzma"
+CONFIG_BOARD_ASROCK_E350M1=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_NO_POST=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_CONSOLE_SERIAL is not set
+CONFIG_SEABIOS_MASTER=y
+CONFIG_COREINFO_SECONDARY_PAYLOAD=y
+CONFIG_MEMTEST_SECONDARY_PAYLOAD=y
+CONFIG_NVRAMCUI_SECONDARY_PAYLOAD=y
+CONFIG_TINT_SECONDARY_PAYLOAD=y