blob: ce9ed2860fab18e5727e4cd6a0df1559bedb921b [file] [log] [blame]
coreboot-4.9-1851-g2b99a01e0d Thu May 30 03:46:20 UTC 2019 romstage starting (log level: 8)...
APIC 00: CPU Family_Model = 00610f31
APIC 00: ** Enter AmdInitReset [00020007]
Fch OEM config in INIT RESET
AmdInitReset() returned AGESA_SUCCESS
APIC 00: Heap in LocalCache (2) at 0x00400000
APIC 00: ** Exit AmdInitReset [00020007]
APIC 00: ** Enter AmdInitEarly [00020002]
AmdInitEarly() returned AGESA_SUCCESS
APIC 00: Heap in LocalCache (2) at 0x00400000
APIC 00: ** Exit AmdInitEarly [00020002]
APIC 00: ** Enter AmdInitPost [00020006]
-------------READING SPD-----------
iobase: 0x00000B00, SmbusSlave: 0x000000A0, count: 128
-------------FINISHED READING SPD-----------
-------------READING SPD-----------
iobase: 0x00000B00, SmbusSlave: 0x000000A2, count: 128
-------------FINISHED READING SPD-----------
AmdInitPost() returned AGESA_SUCCESS
APIC 00: Heap in TempMem (3) at 0x000b0000
APIC 00: ** Exit AmdInitPost [00020006]
CBMEM:
IMD: root @ affff000 254 entries.
IMD: root @ afffec00 62 entries.
MTRR Range: Start=0 End=80000000 (Size 80000000)
MTRR Range: Start=80000000 End=a0000000 (Size 20000000)
MTRR Range: Start=a0000000 End=b0000000 (Size 10000000)
MTRR Range: Start=ffc00000 End=0 (Size 400000)
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'fallback/postcar'
CBFS: Found @ offset 17ec0 size 3574
Decompressing stage fallback/postcar @ 0xaffbcfc0 (29720 bytes)
Loading module at affbd000 with entry affbd000. filesize: 0x3450 memsize: 0x73d8
Processing 50 relocs. Offset value of 0xadfbd000
coreboot-4.9-1851-g2b99a01e0d Thu May 30 03:46:20 UTC 2019 ramstage starting (log level: 8)...
Normal boot.
APIC 00: ** Enter AmdInitEnv [00020003]
Wiped HEAP at [10000000 - 1002ffff]
Fch OEM config in INIT ENV
AmdInitEnv() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdInitEnv [00020003]
BS: BS_PRE_DEVICE times (us): entry 4595 run 0 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 6 exit 0
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
DOMAIN: 0000: enabled 1
APIC: 10: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 1
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 0
PCI: 00:10.0: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:14.6: enabled 0
PCI: 00:14.7: enabled 0
PCI: 00:15.0: enabled 0
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
PNP: 00ff.1: enabled 1
Compare with tree...
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 10: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 1
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 0
PCI: 00:10.0: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 00ff.1: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:14.6: enabled 0
PCI: 00:14.7: enabled 0
PCI: 00:15.0: enabled 0
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
Mainboard LENOVO G505S Enable.
Root Device scanning...
root_dev_scan_bus for Root Device
setup_bsp_ramtop, TOP MEM: msr.lo = 0xd0000000, msr.hi = 0x00000000
setup_bsp_ramtop, TOP MEM2: msr.lo = 0x2f000000, msr.hi = 0x00000004
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
CPU_CLUSTER: 0 scanning...
PCI: 00:18.5 family15h, core_max=0x10, core_nums=0xf, siblings=0x3
lpaicid_start=0x10 node 0x0 core 0x0 apicid=0x10
CPU: APIC: 10 enabled
lpaicid_start=0x10 node 0x0 core 0x1 apicid=0x11
CPU: APIC: 11 enabled
lpaicid_start=0x10 node 0x0 core 0x2 apicid=0x12
CPU: APIC: 12 enabled
lpaicid_start=0x10 node 0x0 core 0x3 apicid=0x13
CPU: APIC: 13 enabled
scan_bus: scanning of bus CPU_CLUSTER: 0 took 13 usecs
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [1022/1410] enabled
PCI: 00:00.2 [1022/1419] ops
PCI: 00:00.2 [1022/1419] enabled
PCI: 00:01.0 [1002/990b] enabled
PCI: 00:01.1 [1002/9902] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:02.0 subordinate bus PCI Express
PCI: 00:02.0 [1022/1412] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:04.0 subordinate bus PCI Express
PCI: 00:04.0 [1022/1414] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:05.0 subordinate bus PCI Express
PCI: 00:05.0 [1022/1415] enabled
hudson_enable()
PCI: Static device PCI: 00:10.0 not found, disabling it.
hudson_enable()
PCI: 00:11.0 [1022/7801] ops
PCI: 00:11.0 [1022/7801] enabled
hudson_enable()
PCI: 00:12.0 [1022/7807] ops
PCI: 00:12.0 [1022/7807] enabled
hudson_enable()
PCI: 00:12.2 [1022/7808] ops
PCI: 00:12.2 [1022/7808] enabled
hudson_enable()
PCI: 00:13.0 [1022/7807] ops
PCI: 00:13.0 [1022/7807] enabled
hudson_enable()
PCI: 00:13.2 [1022/7808] ops
PCI: 00:13.2 [1022/7808] enabled
hudson_enable()
PCI: 00:14.0 [1022/780b] bus ops
PCI: 00:14.0 [1022/780b] enabled
hudson_enable()
PCI: 00:14.2 [1022/780d] ops
PCI: 00:14.2 [1022/780d] enabled
hudson_enable()
PCI: 00:14.3 [1022/780e] bus ops
PCI: 00:14.3 [1022/780e] enabled
hudson_enable()
PCI: 00:14.4 [1022/780f] bus ops
PCI: 00:14.4 [1022/780f] enabled
hudson_enable()
hudson_enable()
hudson_enable()
hudson_enable()
hudson_enable()
hudson_enable()
hudson_enable()
PCI: 00:16.0 [1022/7807] ops
PCI: 00:16.0 [1022/7807] enabled
PCI: 00:16.2 [1022/7808] ops
PCI: 00:16.2 [1022/7808] enabled
PCI: 00:18.0 [1022/1400] ops
PCI: 00:18.0 [1022/1400] enabled
PCI: 00:18.1 [1022/1401] enabled
PCI: 00:18.2 [1022/1402] enabled
PCI: 00:18.3 [1022/1403] enabled
PCI: 00:18.4 [1022/1404] enabled
PCI: 00:18.5 [1022/1405] enabled
PCI: Leftover static devices:
PCI: 00:03.0
PCI: 00:06.0
PCI: 00:07.0
PCI: 00:08.0
PCI: 00:09.0
PCI: 00:10.0
PCI: 00:14.5
PCI: 00:14.6
PCI: 00:14.7
PCI: 00:15.0
PCI: 00:15.1
PCI: 00:15.2
PCI: 00:15.3
PCI: Check your devicetree.cb.
PCI: 00:02.0 scanning...
do_pci_scan_bridge for PCI: 00:02.0
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [1002/6665] enabled
Capability: type 0x09 @ 0x48
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled L0s and L1
Capability: type 0x09 @ 0x48
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Failed to enable LTR for dev = PCI: 01:00.0
scan_bus: scanning of bus PCI: 00:02.0 took 156 usecs
PCI: 00:04.0 scanning...
do_pci_scan_bridge for PCI: 00:04.0
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 [1969/10a0] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x10 @ 0x58
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
Capability: type 0x01 @ 0x40
Capability: type 0x10 @ 0x58
Failed to enable LTR for dev = PCI: 02:00.0
scan_bus: scanning of bus PCI: 00:04.0 took 182 usecs
PCI: 00:05.0 scanning...
do_pci_scan_bridge for PCI: 00:05.0
PCI: pci_scan_bus for bus 03
PCI: 03:00.0 [168c/0034] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled L0s and L1
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Failed to enable LTR for dev = PCI: 03:00.0
scan_bus: scanning of bus PCI: 00:05.0 took 162 usecs
PCI: 00:14.0 scanning...
scan_generic_bus for PCI: 00:14.0
bus: PCI: 00:14.0[0]->I2C: 01:50 enabled
bus: PCI: 00:14.0[0]->I2C: 01:51 enabled
scan_generic_bus for PCI: 00:14.0 done
scan_bus: scanning of bus PCI: 00:14.0 took 36 usecs
PCI: 00:14.3 scanning...
scan_lpc_bus for PCI: 00:14.3
PNP: 00ff.1 enabled
PNP: 00ff.0 enabled
scan_lpc_bus for PCI: 00:14.3 done
scan_bus: scanning of bus PCI: 00:14.3 took 62 usecs
PCI: 00:14.4 scanning...
do_pci_scan_bridge for PCI: 00:14.4
PCI: pci_scan_bus for bus 04
scan_bus: scanning of bus PCI: 00:14.4 took 40 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 1227 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 1368 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 7527 exit 0
found VGA at PCI: 00:01.0
Setting up VGA for PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
fx_devs=0x1
DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:02.0 read_resources bus 1 link: 0
PCI: 00:02.0 read_resources bus 1 link: 0 done
PCI: 00:04.0 read_resources bus 2 link: 0
PCI: 00:04.0 read_resources bus 2 link: 0 done
PCI: 00:05.0 read_resources bus 3 link: 0
PCI: 00:05.0 read_resources bus 3 link: 0 done
PCI: 00:14.0 read_resources bus 1 link: 0
I2C: 01:50 missing read_resources
I2C: 01:51 missing read_resources
PCI: 00:14.0 read_resources bus 1 link: 0 done
PCI: 00:14.3 read_resources bus 0 link: 0
PNP: 00ff.1 missing read_resources
PCI: 00:14.3 read_resources bus 0 link: 0 done
PCI: 00:14.4 read_resources bus 4 link: 0
PCI: 00:14.4 read_resources bus 4 link: 0 done
Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1
PCI: 00:18.0 read_resources bus 0 link: 1 done
PCI: 00:18.0 read_resources bus 0 link: 2
PCI: 00:18.0 read_resources bus 0 link: 2 done
PCI: 00:18.0 read_resources bus 0 link: 3
PCI: 00:18.0 read_resources bus 0 link: 3 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 10
APIC: 10
APIC: 11
APIC: 12
APIC: 13
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.2
PCI: 00:00.2 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 44
PCI: 00:01.0
PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14
PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18
PCI: 00:01.1
PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10
PCI: 00:02.0 child on link 0 PCI: 01:00.0
PCI: 00:02.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 10
PCI: 01:00.0 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 18
PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 20
PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
PCI: 00:04.0 child on link 0 PCI: 02:00.0
PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10
PCI: 02:00.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 18
PCI: 00:05.0 child on link 0 PCI: 03:00.0
PCI: 00:05.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:05.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:05.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 03:00.0
PCI: 03:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffffffffffff flags 201 index 10
PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
PCI: 00:11.0
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:11.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
PCI: 00:12.0
PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:12.2
PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:13.0
PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:13.2
PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:14.0 child on link 0 I2C: 01:50
I2C: 01:50
I2C: 01:51
PCI: 00:14.2
PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
PCI: 00:14.3 child on link 0 PNP: 00ff.1
PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 00ff.1
PNP: 00ff.0
PCI: 00:14.4
PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:16.0
PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:16.2
PCI: 00:16.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:18.0
PCI: 00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
PCI: 00:18.1
PCI: 00:18.2
PCI: 00:18.3
PCI: 00:18.4
PCI: 00:18.5
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:02.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 01:00.0 20 * [0x0 - 0xff] io
PCI: 00:02.0 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 02:00.0 18 * [0x0 - 0x7f] io
PCI: 00:04.0 io: base: 80 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:05.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:05.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:02.0 1c * [0x0 - 0xfff] io
PCI: 00:04.0 1c * [0x1000 - 0x1fff] io
PCI: 00:01.0 14 * [0x2000 - 0x20ff] io
PCI: 00:11.0 20 * [0x2400 - 0x240f] io
PCI: 00:11.0 10 * [0x2410 - 0x2417] io
PCI: 00:11.0 18 * [0x2418 - 0x241f] io
PCI: 00:11.0 14 * [0x2420 - 0x2423] io
PCI: 00:11.0 1c * [0x2424 - 0x2427] io
DOMAIN: 0000 io: base: 2428 size: 2428 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:02.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 01:00.0 10 * [0x0 - 0xfffffff] prefmem
PCI: 00:02.0 prefmem: base: 10000000 size: 10000000 align: 28 gran: 20 limit: ffffffffffffffff done
PCI: 00:02.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 18 * [0x0 - 0x3ffff] mem
PCI: 01:00.0 30 * [0x40000 - 0x5ffff] mem
PCI: 00:02.0 mem: base: 60000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 10 * [0x0 - 0x3ffff] mem
PCI: 00:04.0 mem: base: 40000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:05.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:05.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:05.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 03:00.0 10 * [0x0 - 0x7ffff] mem
PCI: 03:00.0 30 * [0x80000 - 0x8ffff] mem
PCI: 00:05.0 mem: base: 90000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:01.0 10 * [0x0 - 0xfffffff] prefmem
PCI: 00:02.0 24 * [0x10000000 - 0x1fffffff] prefmem
PCI: 00:02.0 20 * [0x20000000 - 0x200fffff] mem
PCI: 00:04.0 20 * [0x20100000 - 0x201fffff] mem
PCI: 00:05.0 20 * [0x20200000 - 0x202fffff] mem
PCI: 00:00.2 44 * [0x20300000 - 0x2037ffff] mem
PCI: 00:01.0 18 * [0x20380000 - 0x203bffff] mem
PCI: 00:01.1 10 * [0x203c0000 - 0x203c3fff] mem
PCI: 00:14.2 10 * [0x203c4000 - 0x203c7fff] mem
PCI: 00:12.0 10 * [0x203c8000 - 0x203c8fff] mem
PCI: 00:13.0 10 * [0x203c9000 - 0x203c9fff] mem
PCI: 00:16.0 10 * [0x203ca000 - 0x203cafff] mem
PCI: 00:11.0 24 * [0x203cb000 - 0x203cb7ff] mem
PCI: 00:12.2 10 * [0x203cc000 - 0x203cc0ff] mem
PCI: 00:13.2 10 * [0x203cd000 - 0x203cd0ff] mem
PCI: 00:16.2 10 * [0x203ce000 - 0x203ce0ff] mem
DOMAIN: 0000 mem: base: 203ce100 size: 203ce100 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:14.3 10000100 base ff800000 limit ffffffff mem (fixed)
constrain_resources: PCI: 00:14.3 02 base fec10000 limit fec103ff mem (fixed)
constrain_resources: PCI: 00:14.3 03 base fec00000 limit fec00fff mem (fixed)
constrain_resources: PCI: 00:18.0 c0010058 base f8000000 limit fbffffff mem (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base d0000000 limit f7ffffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:2428 align:12 gran:0 limit:ffff
PCI: 00:02.0 1c * [0x1000 - 0x1fff] io
PCI: 00:04.0 1c * [0x2000 - 0x2fff] io
PCI: 00:01.0 14 * [0x3000 - 0x30ff] io
PCI: 00:11.0 20 * [0x3400 - 0x340f] io
PCI: 00:11.0 10 * [0x3410 - 0x3417] io
PCI: 00:11.0 18 * [0x3418 - 0x341f] io
PCI: 00:11.0 14 * [0x3420 - 0x3423] io
PCI: 00:11.0 1c * [0x3424 - 0x3427] io
DOMAIN: 0000 io: next_base: 3428 size: 2428 align: 12 gran: 0 done
PCI: 00:02.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff
PCI: 01:00.0 20 * [0x1000 - 0x10ff] io
PCI: 00:02.0 io: next_base: 1100 size: 1000 align: 12 gran: 12 done
PCI: 00:04.0 io: base:2000 size:1000 align:12 gran:12 limit:2fff
PCI: 02:00.0 18 * [0x2000 - 0x207f] io
PCI: 00:04.0 io: next_base: 2080 size: 1000 align: 12 gran: 12 done
PCI: 00:05.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:05.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:14.4 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:14.4 io: next_base: ffff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:d0000000 size:203ce100 align:28 gran:0 limit:f7ffffff
PCI: 00:01.0 10 * [0xd0000000 - 0xdfffffff] prefmem
PCI: 00:02.0 24 * [0xe0000000 - 0xefffffff] prefmem
PCI: 00:02.0 20 * [0xf0000000 - 0xf00fffff] mem
PCI: 00:04.0 20 * [0xf0100000 - 0xf01fffff] mem
PCI: 00:05.0 20 * [0xf0200000 - 0xf02fffff] mem
PCI: 00:00.2 44 * [0xf0300000 - 0xf037ffff] mem
PCI: 00:01.0 18 * [0xf0380000 - 0xf03bffff] mem
PCI: 00:01.1 10 * [0xf03c0000 - 0xf03c3fff] mem
PCI: 00:14.2 10 * [0xf03c4000 - 0xf03c7fff] mem
PCI: 00:12.0 10 * [0xf03c8000 - 0xf03c8fff] mem
PCI: 00:13.0 10 * [0xf03c9000 - 0xf03c9fff] mem
PCI: 00:16.0 10 * [0xf03ca000 - 0xf03cafff] mem
PCI: 00:11.0 24 * [0xf03cb000 - 0xf03cb7ff] mem
PCI: 00:12.2 10 * [0xf03cc000 - 0xf03cc0ff] mem
PCI: 00:13.2 10 * [0xf03cd000 - 0xf03cd0ff] mem
PCI: 00:16.2 10 * [0xf03ce000 - 0xf03ce0ff] mem
DOMAIN: 0000 mem: next_base: f03ce100 size: 203ce100 align: 28 gran: 0 done
PCI: 00:02.0 prefmem: base:e0000000 size:10000000 align:28 gran:20 limit:efffffff
PCI: 01:00.0 10 * [0xe0000000 - 0xefffffff] prefmem
PCI: 00:02.0 prefmem: next_base: f0000000 size: 10000000 align: 28 gran: 20 done
PCI: 00:02.0 mem: base:f0000000 size:100000 align:20 gran:20 limit:f00fffff
PCI: 01:00.0 18 * [0xf0000000 - 0xf003ffff] mem
PCI: 01:00.0 30 * [0xf0040000 - 0xf005ffff] mem
PCI: 00:02.0 mem: next_base: f0060000 size: 100000 align: 20 gran: 20 done
PCI: 00:04.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:04.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:04.0 mem: base:f0100000 size:100000 align:20 gran:20 limit:f01fffff
PCI: 02:00.0 10 * [0xf0100000 - 0xf013ffff] mem
PCI: 00:04.0 mem: next_base: f0140000 size: 100000 align: 20 gran: 20 done
PCI: 00:05.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:05.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:05.0 mem: base:f0200000 size:100000 align:20 gran:20 limit:f02fffff
PCI: 03:00.0 10 * [0xf0200000 - 0xf027ffff] mem
PCI: 03:00.0 30 * [0xf0280000 - 0xf028ffff] mem
PCI: 00:05.0 mem: next_base: f0290000 size: 100000 align: 20 gran: 20 done
PCI: 00:14.4 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:14.4 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:14.4 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
node 0: mmio_basek=00340000, basek=00400000, limitk=010a0000
add_uma_resource_below_tolm: uma size 0x20000000, memory start 0xb0000000
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:00.2 44 <- [0x00f0300000 - 0x00f037ffff] size 0x00080000 gran 0x13 mem
PCI: 00:01.0 10 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:01.0 14 <- [0x0000003000 - 0x00000030ff] size 0x00000100 gran 0x08 io
PCI: 00:01.0 18 <- [0x00f0380000 - 0x00f03bffff] size 0x00040000 gran 0x12 mem
PCI: 00:01.1 10 <- [0x00f03c0000 - 0x00f03c3fff] size 0x00004000 gran 0x0e mem
PCI: 00:02.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
PCI: 00:02.0 24 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x14 bus 01 prefmem
PCI: 00:02.0 20 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:02.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 01:00.0 18 <- [0x00f0000000 - 0x00f003ffff] size 0x00040000 gran 0x12 mem64
PCI: 01:00.0 20 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 01:00.0 30 <- [0x00f0040000 - 0x00f005ffff] size 0x00020000 gran 0x11 romem
PCI: 00:02.0 assign_resources, bus 1 link: 0
PCI: 00:04.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 02 io
PCI: 00:04.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:04.0 20 <- [0x00f0100000 - 0x00f01fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:04.0 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x00f0100000 - 0x00f013ffff] size 0x00040000 gran 0x12 mem64
PCI: 02:00.0 18 <- [0x0000002000 - 0x000000207f] size 0x00000080 gran 0x07 io
PCI: 00:04.0 assign_resources, bus 2 link: 0
PCI: 00:05.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:05.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:05.0 20 <- [0x00f0200000 - 0x00f02fffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 00:05.0 assign_resources, bus 3 link: 0
PCI: 03:00.0 10 <- [0x00f0200000 - 0x00f027ffff] size 0x00080000 gran 0x13 mem64
PCI: 03:00.0 30 <- [0x00f0280000 - 0x00f028ffff] size 0x00010000 gran 0x10 romem
PCI: 00:05.0 assign_resources, bus 3 link: 0
PCI: 00:11.0 10 <- [0x0000003410 - 0x0000003417] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x0000003420 - 0x0000003423] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x0000003418 - 0x000000341f] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x0000003424 - 0x0000003427] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000003400 - 0x000000340f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f03cb000 - 0x00f03cb7ff] size 0x00000800 gran 0x0b mem
PCI: 00:12.0 10 <- [0x00f03c8000 - 0x00f03c8fff] size 0x00001000 gran 0x0c mem
PCI: 00:12.2 10 <- [0x00f03cc000 - 0x00f03cc0ff] size 0x00000100 gran 0x08 mem
PCI: 00:13.0 10 <- [0x00f03c9000 - 0x00f03c9fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00f03cd000 - 0x00f03cd0ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.2 10 <- [0x00f03c4000 - 0x00f03c7fff] size 0x00004000 gran 0x0e mem64
PCI: 00:14.3 assign_resources, bus 0 link: 0
PCI: 00:14.3 assign_resources, bus 0 link: 0
PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 04 mem
PCI: 00:16.0 10 <- [0x00f03ca000 - 0x00f03cafff] size 0x00001000 gran 0x0c mem
PCI: 00:16.2 10 <- [0x00f03ce000 - 0x00f03ce0ff] size 0x00000100 gran 0x08 mem
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 10
APIC: 10
APIC: 11
APIC: 12
APIC: 13
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 1000 size 2428 align 12 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base d0000000 size 203ce100 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
DOMAIN: 0000 resource base c0000 size cff40000 align 0 gran 0 limit 0 flags e0004200 index 20
DOMAIN: 0000 resource base 100000000 size 32f000000 align 0 gran 0 limit 0 flags e0004200 index 30
DOMAIN: 0000 resource base b0000000 size 20000000 align 0 gran 0 limit 0 flags f0000200 index 7
PCI: 00:00.0
PCI: 00:00.2
PCI: 00:00.2 resource base f0300000 size 80000 align 19 gran 19 limit f037ffff flags 60000200 index 44
PCI: 00:01.0
PCI: 00:01.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001200 index 10
PCI: 00:01.0 resource base 3000 size 100 align 8 gran 8 limit 30ff flags 60000100 index 14
PCI: 00:01.0 resource base f0380000 size 40000 align 18 gran 18 limit f03bffff flags 60000200 index 18
PCI: 00:01.1
PCI: 00:01.1 resource base f03c0000 size 4000 align 14 gran 14 limit f03c3fff flags 60000200 index 10
PCI: 00:02.0 child on link 0 PCI: 01:00.0
PCI: 00:02.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 20 limit efffffff flags 60081202 index 24
PCI: 00:02.0 resource base f0000000 size 100000 align 20 gran 20 limit f00fffff flags 60080202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 10
PCI: 01:00.0 resource base f0000000 size 40000 align 18 gran 18 limit f003ffff flags 60000201 index 18
PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 20
PCI: 01:00.0 resource base f0040000 size 20000 align 17 gran 17 limit f005ffff flags 60002200 index 30
PCI: 00:04.0 child on link 0 PCI: 02:00.0
PCI: 00:04.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
PCI: 00:04.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:04.0 resource base f0100000 size 100000 align 20 gran 20 limit f01fffff flags 60080202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base f0100000 size 40000 align 18 gran 18 limit f013ffff flags 60000201 index 10
PCI: 02:00.0 resource base 2000 size 80 align 7 gran 7 limit 207f flags 60000100 index 18
PCI: 00:05.0 child on link 0 PCI: 03:00.0
PCI: 00:05.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 00:05.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:05.0 resource base f0200000 size 100000 align 20 gran 20 limit f02fffff flags 60080202 index 20
PCI: 03:00.0
PCI: 03:00.0 resource base f0200000 size 80000 align 19 gran 19 limit f027ffff flags 60000201 index 10
PCI: 03:00.0 resource base f0280000 size 10000 align 16 gran 16 limit f028ffff flags 60002200 index 30
PCI: 00:11.0
PCI: 00:11.0 resource base 3410 size 8 align 3 gran 3 limit 3417 flags 60000100 index 10
PCI: 00:11.0 resource base 3420 size 4 align 2 gran 2 limit 3423 flags 60000100 index 14
PCI: 00:11.0 resource base 3418 size 8 align 3 gran 3 limit 341f flags 60000100 index 18
PCI: 00:11.0 resource base 3424 size 4 align 2 gran 2 limit 3427 flags 60000100 index 1c
PCI: 00:11.0 resource base 3400 size 10 align 4 gran 4 limit 340f flags 60000100 index 20
PCI: 00:11.0 resource base f03cb000 size 800 align 12 gran 11 limit f03cb7ff flags 60000200 index 24
PCI: 00:12.0
PCI: 00:12.0 resource base f03c8000 size 1000 align 12 gran 12 limit f03c8fff flags 60000200 index 10
PCI: 00:12.2
PCI: 00:12.2 resource base f03cc000 size 100 align 12 gran 8 limit f03cc0ff flags 60000200 index 10
PCI: 00:13.0
PCI: 00:13.0 resource base f03c9000 size 1000 align 12 gran 12 limit f03c9fff flags 60000200 index 10
PCI: 00:13.2
PCI: 00:13.2 resource base f03cd000 size 100 align 12 gran 8 limit f03cd0ff flags 60000200 index 10
PCI: 00:14.0 child on link 0 I2C: 01:50
I2C: 01:50
I2C: 01:51
PCI: 00:14.2
PCI: 00:14.2 resource base f03c4000 size 4000 align 14 gran 14 limit f03c7fff flags 60000201 index 10
PCI: 00:14.3 child on link 0 PNP: 00ff.1
PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 00ff.1
PNP: 00ff.0
PCI: 00:14.4
PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
PCI: 00:16.0
PCI: 00:16.0 resource base f03ca000 size 1000 align 12 gran 12 limit f03cafff flags 60000200 index 10
PCI: 00:16.2
PCI: 00:16.2 resource base f03ce000 size 100 align 12 gran 8 limit f03ce0ff flags 60000200 index 10
PCI: 00:18.0
PCI: 00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
PCI: 00:18.1
PCI: 00:18.2
PCI: 00:18.3
PCI: 00:18.4
PCI: 00:18.5
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 1338 exit 0
APIC 00: ** Enter AmdInitMid [00020005]
AmdInitMid() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdInitMid [00020005]
Warning: Can't write PCI_INTR 0xC00/0xC01 registers because
'mainboard_picr_data' or 'mainboard_intr_data' tables are NULL
Warning: Can't write PCI IRQ assignments because 'mainboard_pirq_data' structure does not exist
Enabling resources...
PCI: 00:00.0 subsystem <- 1022/1410
PCI: 00:00.0 cmd <- 06
PCI: 00:00.2 subsystem <- 1022/1410
PCI: 00:00.2 cmd <- 06
PCI: 00:01.0 subsystem <- 1022/1410
PCI: 00:01.0 cmd <- 07
PCI: 00:01.1 subsystem <- 1022/1410
PCI: 00:01.1 cmd <- 02
PCI: 00:02.0 bridge ctrl <- 0003
PCI: 00:02.0 cmd <- 07
PCI: 00:04.0 bridge ctrl <- 0003
PCI: 00:04.0 cmd <- 07
PCI: 00:05.0 bridge ctrl <- 0003
PCI: 00:05.0 cmd <- 06
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 subsystem <- 1022/1410
PCI: 00:12.0 cmd <- 02
PCI: 00:12.2 subsystem <- 1022/1410
PCI: 00:12.2 cmd <- 02
PCI: 00:13.0 subsystem <- 1022/1410
PCI: 00:13.0 cmd <- 02
PCI: 00:13.2 subsystem <- 1022/1410
PCI: 00:13.2 cmd <- 02
PCI: 00:14.0 subsystem <- 1022/1410
PCI: 00:14.0 cmd <- 403
PCI: 00:14.2 subsystem <- 1022/1410
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1022/1410
PCI: 00:14.3 cmd <- 0f
PCI: 00:14.4 bridge ctrl <- 0003
PCI: 00:14.4 cmd <- 00
PCI: 00:16.0 cmd <- 02
PCI: 00:16.2 cmd <- 02
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1022/1410
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1022/1410
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 subsystem <- 1022/1410
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 subsystem <- 1022/1410
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 subsystem <- 1022/1410
PCI: 00:18.5 cmd <- 00
PCI: 01:00.0 cmd <- 03
PCI: 02:00.0 cmd <- 03
PCI: 03:00.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 6211 run 68 exit 0
Initializing devices...
Root Device init ...
Root Device init finished in 0 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Initializing CPU #0
CPU: vendor AMD device 610f31
CPU: family 15, model 13, stepping 01
Model 15 Init.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Enabling cache
Setting up local APIC...
apic_id: 0x10 done.
siblings = 03, Initializing SMM for CPU 0
CPU #0 initialized
CPU1: stack_base afed7000, stack_top afed7ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 17.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 17.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
CPU: vendor AMD device 610f31
CPU: family 15, model 13, stepping 01
Model 15 Init.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Enabling cache
Setting up local APIC...
apic_id: 0x11 done.
siblings = 03, Initializing SMM for CPU 1
CPU #1 initialized
CPU2: stack_base afed6000, stack_top afed6ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 18.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 18.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #2
CPU: vendor AMD device 610f31
CPU: family 15, model 13, stepping 01
Model 15 Init.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Enabling cache
Setting up local APIC...
apic_id: 0x12 done.
siblings = 03, Initializing SMM for CPU 2
CPU #2 initialized
CPU3: stack_base afed5000, stack_top afed5ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 19.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 19.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #3
Waiting for 1 CPUS to stop
CPU: vendor AMD device 610f31
CPU: family 15, model 13, stepping 01
Model 15 Init.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Enabling cache
Setting up local APIC...
apic_id: 0x13 done.
siblings = 03, Initializing SMM for CPU 3
CPU #3 initialized
All AP CPUs stopped (41 loops)
CPU0: stack: afed8000 - afed9000, lowest used address afed856c, stack used: 2708 bytes
CPU1: stack: afed7000 - afed8000, lowest used address afed7dac, stack used: 596 bytes
CPU2: stack: afed6000 - afed7000, lowest used address afed6dac, stack used: 596 bytes
CPU3: stack: afed5000 - afed6000, lowest used address afed5dac, stack used: 596 bytes
CPU_CLUSTER: 0 init finished in 36311 usecs
DOMAIN: 0000 init ...
DOMAIN: 0000 init finished in 0 usecs
PCI: 00:00.0 init ...
PCI: 00:00.0 init finished in 0 usecs
PCI: 00:01.0 init ...
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'pci1002,990b.rom'
CBFS: Found @ offset bc0 size f200
In CBFS, ROM address for PCI: 00:01.0 = ffc00e08
PCI expansion ROM, signature 0xaa55, INIT size 0xf200, data ptr 0x01b4
PCI ROM image, vendor ID 1002, device ID 990b,
PCI ROM image, Class Code 030000, Code Type 00
Copying VGA ROM Image from ffc00e08 to 0xc0000, 0xf200 bytes
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'bootsplash.jpg'
CBFS: 'bootsplash.jpg' not found.
Integrated VGA Option ROM was run
PCI: 00:01.0 init finished in 233414 usecs
PCI: 00:01.1 init ...
PCI: 00:01.1 init finished in 0 usecs
PCI: 00:11.0 init ...
PCI: 00:11.0 init finished in 0 usecs
PCI: 00:12.0 init ...
PCI: 00:12.0 init finished in 0 usecs
PCI: 00:12.2 init ...
PCI: 00:12.2 init finished in 0 usecs
PCI: 00:13.0 init ...
PCI: 00:13.0 init finished in 0 usecs
PCI: 00:13.2 init ...
PCI: 00:13.2 init finished in 0 usecs
PCI: 00:14.0 init ...
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x10
IOAPIC: ID = 0x04
IOAPIC: Dumping registers
reg 0x0000: 0x04000000
reg 0x0001: 0x00178021
reg 0x0002: 0x04000000
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x10000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
PCI: 00:14.0 init finished in 17 usecs
PCI: 00:14.2 init ...
PCI: 00:14.2 init finished in 0 usecs
PCI: 00:14.3 init ...
RTC Init
PCI: 00:14.3 init finished in 24 usecs
PCI: 00:14.4 init ...
PCI: 00:14.4 init finished in 0 usecs
PCI: 00:16.0 init ...
PCI: 00:16.0 init finished in 0 usecs
PCI: 00:16.2 init ...
PCI: 00:16.2 init finished in 0 usecs
PCI: 00:18.0 init ...
PCI: 00:18.0 init finished in 0 usecs
PCI: 00:18.1 init ...
PCI: 00:18.1 init finished in 0 usecs
PCI: 00:18.2 init ...
PCI: 00:18.2 init finished in 0 usecs
PCI: 00:18.3 init ...
PCI: 00:18.3 init finished in 0 usecs
PCI: 00:18.4 init ...
PCI: 00:18.4 init finished in 0 usecs
PCI: 00:18.5 init ...
PCI: 00:18.5 init finished in 0 usecs
PCI: 01:00.0 init ...
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'pci1002,6665.rom'
CBFS: Found @ offset fe40 size 8000
In CBFS, ROM address for PCI: 01:00.0 = ffc10088
PCI expansion ROM, signature 0xaa55, INIT size 0x8000, data ptr 0x0224
PCI ROM image, vendor ID 1002, device ID 6665,
PCI ROM image, Class Code 038000, Code Type 00
Copying non-VGA ROM image from ffc10088 to 000d0000, 0x8000 bytes
Not running discrete VGA Option ROM
PCI: 01:00.0 init finished in 4564 usecs
PCI: 02:00.0 init ...
PCI: 02:00.0 init finished in 0 usecs
PCI: 03:00.0 init ...
PCI: 03:00.0 init finished in 0 usecs
PNP: 00ff.0 init ...
Compal ENE932: Initializing keyboard.
PNP: 00ff.0 init finished in 0 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
DOMAIN: 0000: enabled 1
APIC: 10: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 1
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 0
PCI: 00:10.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:14.6: enabled 0
PCI: 00:14.7: enabled 0
PCI: 00:15.0: enabled 0
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
I2C: 01:50: enabled 1
I2C: 01:51: enabled 1
PNP: 00ff.1: enabled 1
APIC: 11: enabled 1
APIC: 12: enabled 1
APIC: 13: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.2: enabled 1
PCI: 01:00.0: enabled 1
PCI: 02:00.0: enabled 1
PCI: 03:00.0: enabled 1
PNP: 00ff.0: enabled 1
BS: BS_DEV_INIT times (us): entry 0 run 274387 exit 0
Finalize devices...
Devices finalized
APIC 00: ** Enter AmdInitLate [00020004]
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
AmdInitLate() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdInitLate [00020004]
APIC 00: ** Enter AmdS3Save [0002000b]
Manufacturer: 1c
SF: Detected EN25QH32 with sector size 0x1000, total 0x400000
SF: Successfully erased 4096 bytes @ 0xffff1000
Manufacturer: 1c
SF: Detected EN25QH32 with sector size 0x1000, total 0x400000
SF: Successfully erased 4096 bytes @ 0xffff0000
AmdS3Save() returned AGESA_SUCCESS
ASSERTION ERROR: file 'src/drivers/amd/agesa/state_machine.c', line 293
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdS3Save [0002000b]
BS: BS_POST_DEVICE times (us): entry 0 run 2 exit 32923
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0
Wrote the mp table end at: 000f0010 - 000f0244
Wrote the mp table end at: afd04010 - afd04244
MP table: 580 bytes.
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 1b480 size 2327
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at afce0000.
ACPI: * FACS
ACPI: * DSDT
ACPI: * FADT
pm_base: 0x0800
ACPI: added table 1/32, length now 40
ACPI: * SSDT
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'pci1002,990b.rom'
CBFS: Found @ offset bc0 size f200
In CBFS, ROM address for PCI: 00:01.0 = ffc00e08
PCI expansion ROM, signature 0xaa55, INIT size 0xf200, data ptr 0x01b4
PCI ROM image, vendor ID 1002, device ID 990b,
PCI ROM image, Class Code 030000, Code Type 00
PCI: 00:01.0: Missing ACPI scope
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: * MADT
ACPI: added table 3/32, length now 48
current = afce27c0
ACPI: * HPET
ACPI: added table 4/32, length now 52
ACPI: added table 5/32, length now 56
ACPI: * IVRS at afce29d0
ACPI: added table 6/32, length now 60
ACPI: * SRAT at afce2a40
AGESA SRAT table NULL. Skipping.
ACPI: * SLIT at afce2a40
AGESA SLIT table NULL. Skipping.
ACPI: * AGESA ALIB SSDT at afce2a40
ACPI: added table 7/32, length now 64
ACPI: * SSDT at afce4920
ACPI: added table 8/32, length now 68
ACPI: * SSDT for PState at afce5318
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'pci1002,6665.rom'
CBFS: Found @ offset fe40 size 8000
In CBFS, ROM address for PCI: 01:00.0 = ffc10088
PCI expansion ROM, signature 0xaa55, INIT size 0x8000, data ptr 0x0224
PCI ROM image, vendor ID 1002, device ID 6665,
PCI ROM image, Class Code 038000, Code Type 00
ACPI: * VFCT at afce5320
Copying initialized VBIOS image from 000d0000
ACPI: added table 9/32, length now 72
ACPI: done.
ACPI tables: 54160 bytes.
smbios_write_tables: afcdf000
EEPROM not found
EEPROM not found
EEPROM not found
EEPROM not found
EEPROM not found
EEPROM not found
EEPROM not found
SMBIOS tables: 529 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum e
Writing coreboot table at 0xafd05000
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000c0000-00000000afcdefff: RAM
3. 00000000afcdf000-00000000afe78fff: CONFIGURATION TABLES
4. 00000000afe79000-00000000affb3fff: RAMSTAGE
5. 00000000affb4000-00000000afffffff: CONFIGURATION TABLES
6. 00000000b0000000-00000000cfffffff: RESERVED
7. 00000000f8000000-00000000fbffffff: RESERVED
8. 0000000100000000-000000042effffff: RAM
Manufacturer: 1c
SF: Detected EN25QH32 with sector size 0x1000, total 0x400000
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
FMAP: Found "FLASH" version 1.1 at 0.
FMAP: base = ffc00000 size = 400000 #areas = 3
Wrote coreboot table at: afd05000, 0x314 bytes, checksum ad96
coreboot table: 812 bytes.
IMD ROOT 0. affff000 00001000
IMD SMALL 1. afffe000 00001000
CONSOLE 2. affde000 00020000
TIME STAMP 3. affdd000 00000910
ROMSTG STCK 4. affc5000 00018000
AFTER CAR 5. affbc000 00009000
57a9e102 6. affb4000 000073d8
RAMSTAGE 7. afe78000 0013c000
57a9e100 8. afd3d000 0013aba8
ACPISCRATCH 9. afd0d000 00030000
COREBOOT 10. afd05000 00008000
SMP TABLE 11. afd04000 00001000
ACPI 12. afce0000 00024000
SMBIOS 13. afcdf000 00000800
IMD small region:
IMD ROOT 0. afffec00 00000400
ROMSTAGE 1. afffebe0 00000004
57a9e002 2. afffebc0 00000018
57a9e000 3. afffeba0 00000018
COREBOOTFWD 4. afffeb60 00000028
BS: BS_WRITE_TABLES times (us): entry 0 run 2149 exit 0
CBFS @ 200 size 3ffe00
CBFS: 'Master Header Locator' located CBFS at [200:400000)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset b0000 size e8f3
Checking segment from ROM address 0xffcb0238
Checking segment from ROM address 0xffcb0254
Loading segment from ROM address 0xffcb0238
code (compression=1)
New segment dstaddr 0x000e49c0 memsize 0x1b640 srcaddr 0xffcb0270 filesize 0xe8bb
Loading Segment: addr: 0x000e49c0 memsz: 0x000000000001b640 filesz: 0x000000000000e8bb
using LZMA
[ 0x000e49c0, 00100000, 0x00100000) <- ffcb0270
Loading segment from ROM address 0xffcb0254
Entry Point 0x000fd2a9
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 13131 exit 0
Jumping to boot code at 000fd2a9(afd05000)
CPU0: stack: afed8000 - afed9000, lowest used address afed856c, stack used: 2708 bytes
SeaBIOS (version rel-1.12.0-23-g0932c20-20190531_094445-amdell)
BUILD: gcc: (coreboot toolchain v1.53 August 16th, 2018) 8.1.0 binutils: (GNU Binutils) 2.30
Found coreboot cbmem console @ affde000
Found mainboard LENOVO LENOVO G505S
Relocating init from 0x000e5e40 to 0xafc93b40 (size 46112)
Found CBFS header at 0xffc00238
multiboot: eax=afecdbc0, ebx=afecdb14
Found 27 PCI devices (max PCI bus is 04)
Copying SMBIOS entry point from 0xafcdf000 to 0x000f1240
Copying ACPI RSDP from 0xafce0000 to 0x000f1210
Copying MPTABLE from 0xafd04000/afd04010 to 0x000f0fc0
Using pmtimer, ioport 0x818
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.12.0-23-g0932c20-20190531_094445-amdell)
EHCI init on dev 00:12.2 (regs=0xf03cc020)
EHCI init on dev 00:13.2 (regs=0xf03cd020)
EHCI init on dev 00:16.2 (regs=0xf03ce020)
OHCI init on dev 00:12.0 (regs=0xf03c8000)
OHCI init on dev 00:13.0 (regs=0xf03c9000)
OHCI init on dev 00:16.0 (regs=0xf03ca000)
AHCI controller at 00:11.0, iobase 0xf03cb000, irq 0
Mapping floppy floppyimg/kolibri to addr 0xafb18000
Searching bootorder for: /rom@floppyimg/kolibri
Mapping floppy floppyimg/freedos to addr 0xafb18000
Searching bootorder for: /rom@floppyimg/freedos
Mapping floppy floppyimg/michalos to addr 0xafb18000
Searching bootorder for: /rom@floppyimg/michalos
Mapping floppy floppyimg/snowdrop to addr 0xafb18000
Searching bootorder for: /rom@floppyimg/snowdrop
Mapping floppy floppyimg/fiwix to addr 0xafb18000
Searching bootorder for: /rom@floppyimg/fiwix
Mapping floppy floppyimg/memtest to addr 0xafb18000
Searching bootorder for: /rom@floppyimg/memtest
Mapping floppy floppyimg/tatos to addr 0xafb18000
Searching bootorder for: /rom@floppyimg/tatos
Mapping floppy floppyimg/plop to addr 0xafb18000
Searching bootorder for: /rom@floppyimg/plop
Mapping floppy floppyimg/floppybird to addr 0xafb18000
Searching bootorder for: /rom@floppyimg/floppybird
Found 0 lpt ports
Found 0 serial ports
Searching bootorder for: /rom@img/tint
Searching bootorder for: /rom@img/coreinfo
Searching bootorder for: /pci@i0cf8/*@11/drive@0/disk@0
AHCI/0: Set transfer mode to UDMA-6
AHCI/0: registering: "AHCI/0: MY Hard-Disk (? GiBytes)"
Searching bootorder for: /pci@i0cf8/*@11/drive@1/disk@0
AHCI/1: registering: "DVD/CD [AHCI/1: MY DVD/CD]"
PS2 keyboard initialized
All threads complete.
Scan for option roms
Press ESC or \ / slash for boot menu.
Select boot device: // press ENTER after your numpad input (if any)
1. Ramdisk [kolibri]
2. Ramdisk [freedos]
3. Ramdisk [michalos]
4. Ramdisk [snowdrop]
5. Ramdisk [fiwix]
6. Ramdisk [memtest]
7. Ramdisk [tatos]
8. Ramdisk [plop]
9. Ramdisk [floppybird]
0. DVD/CD [AHCI/1: MY DVD/CD]
q. AHCI/0: MY Hard-Disk (? GiBytes)
w. Payload [tint]
e. Payload [coreinfo]
> q(11)
Searching bootorder for: HALT
drive 0x000f0da0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=234441648
Space available for UMB: cf800-ee800, f0000-f0d20
Returned 241664 bytes of ZoneHigh
e820 map has 9 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 00000000afb18000 = 1 RAM
4: 00000000afb18000 - 00000000afc80000 = 2 RESERVED
5: 00000000afc80000 - 00000000afcda000 = 1 RAM
6: 00000000afcda000 - 00000000d0000000 = 2 RESERVED
7: 00000000f8000000 - 00000000fc000000 = 2 RESERVED
8: 0000000100000000 - 000000042f000000 = 1 RAM
enter handle_19:
NULL
Booting from Hard Disk...
Booting from 0000:7c00