pcengines/apu1/4.4-422-g9aba60e/2016-06-05T08_06_37Z
diff --git a/pcengines/apu1/4.4-422-g9aba60e/2016-06-05T08_06_37Z/coreboot_console.txt b/pcengines/apu1/4.4-422-g9aba60e/2016-06-05T08_06_37Z/coreboot_console.txt
new file mode 100644
index 0000000..06f46ee
--- /dev/null
+++ b/pcengines/apu1/4.4-422-g9aba60e/2016-06-05T08_06_37Z/coreboot_console.txt
@@ -0,0 +1,1342 @@
+
+
+coreboot-4.4-422-g9aba60e Sun Jun 5 08:06:37 UTC 2016 ramstage starting...
+BS: BS_PRE_DEVICE times (us): entry 0 run 3 exit 0
+SB800 - Smbus.c - alink_ab_indx - Start.
+SB800 - Smbus.c - alink_ab_indx - End.
+BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 7163 exit 0
+Enumerating buses...
+Show all devs... Before device enumeration.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:01.0: enabled 0
+PCI: 00:04.0: enabled 1
+PCI: 00:05.0: enabled 1
+PCI: 00:06.0: enabled 1
+PCI: 00:07.0: enabled 1
+PCI: 00:08.0: enabled 1
+PCI: 00:11.0: enabled 1
+PCI: 00:12.0: enabled 1
+PCI: 00:12.2: enabled 1
+PCI: 00:13.0: enabled 1
+PCI: 00:13.2: enabled 1
+PCI: 00:14.0: enabled 1
+PCI: 00:14.1: enabled 0
+PCI: 00:14.2: enabled 0
+PCI: 00:14.3: enabled 1
+PNP: 002e.0: enabled 0
+PNP: 002e.2: enabled 1
+PNP: 002e.3: enabled 1
+PNP: 002e.10: enabled 0
+PNP: 002e.11: enabled 0
+PNP: 002e.8: enabled 0
+PNP: 002e.f: enabled 0
+PNP: 002e.7: enabled 0
+PNP: 002e.107: enabled 0
+PNP: 002e.607: enabled 0
+PNP: 002e.e: enabled 0
+PCI: 00:14.4: enabled 1
+PCI: 00:14.5: enabled 0
+PCI: 00:15.0: enabled 1
+PCI: 00:15.1: enabled 0
+PCI: 00:15.2: enabled 0
+PCI: 00:15.3: enabled 0
+PCI: 00:16.0: enabled 1
+PCI: 00:16.2: enabled 1
+PCI: 00:18.0: enabled 1
+PCI: 00:18.1: enabled 1
+PCI: 00:18.2: enabled 1
+PCI: 00:18.3: enabled 1
+PCI: 00:18.4: enabled 1
+PCI: 00:18.5: enabled 1
+PCI: 00:18.6: enabled 1
+PCI: 00:18.7: enabled 1
+Compare with tree...
+Root Device: enabled 1
+ CPU_CLUSTER: 0: enabled 1
+ APIC: 00: enabled 1
+ DOMAIN: 0000: enabled 1
+ PCI: 00:00.0: enabled 1
+ PCI: 00:01.0: enabled 0
+ PCI: 00:04.0: enabled 1
+ PCI: 00:05.0: enabled 1
+ PCI: 00:06.0: enabled 1
+ PCI: 00:07.0: enabled 1
+ PCI: 00:08.0: enabled 1
+ PCI: 00:11.0: enabled 1
+ PCI: 00:12.0: enabled 1
+ PCI: 00:12.2: enabled 1
+ PCI: 00:13.0: enabled 1
+ PCI: 00:13.2: enabled 1
+ PCI: 00:14.0: enabled 1
+ PCI: 00:14.1: enabled 0
+ PCI: 00:14.2: enabled 0
+ PCI: 00:14.3: enabled 1
+ PNP: 002e.0: enabled 0
+ PNP: 002e.2: enabled 1
+ PNP: 002e.3: enabled 1
+ PNP: 002e.10: enabled 0
+ PNP: 002e.11: enabled 0
+ PNP: 002e.8: enabled 0
+ PNP: 002e.f: enabled 0
+ PNP: 002e.7: enabled 0
+ PNP: 002e.107: enabled 0
+ PNP: 002e.607: enabled 0
+ PNP: 002e.e: enabled 0
+ PCI: 00:14.4: enabled 1
+ PCI: 00:14.5: enabled 0
+ PCI: 00:15.0: enabled 1
+ PCI: 00:15.1: enabled 0
+ PCI: 00:15.2: enabled 0
+ PCI: 00:15.3: enabled 0
+ PCI: 00:16.0: enabled 1
+ PCI: 00:16.2: enabled 1
+ PCI: 00:18.0: enabled 1
+ PCI: 00:18.1: enabled 1
+ PCI: 00:18.2: enabled 1
+ PCI: 00:18.3: enabled 1
+ PCI: 00:18.4: enabled 1
+ PCI: 00:18.5: enabled 1
+ PCI: 00:18.6: enabled 1
+ PCI: 00:18.7: enabled 1
+Mainboard APU1 Enable.
+Root Device scanning...
+root_dev_scan_bus for Root Device
+setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000
+setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000001
+CPU_CLUSTER: 0 enabled
+DOMAIN: 0000 enabled
+CPU_CLUSTER: 0 scanning...
+ AP siblings=1
+CPU: APIC: 00 enabled
+CPU: APIC: 01 enabled
+scan_bus: scanning of bus CPU_CLUSTER: 0 took 7973 usecs
+DOMAIN: 0000 scanning...
+PCI: pci_scan_bus for bus 00
+PCI: 00:00.0 [1022/1510] ops
+PCI: 00:00.0 [1022/1510] enabled
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+Capability: type 0x05 @ 0xa0
+Capability: type 0x0d @ 0xb0
+Capability: type 0x08 @ 0xb8
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+PCI: 00:04.0 subordinate bus PCI Express
+PCI: 00:04.0 [1022/1512] enabled
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+Capability: type 0x05 @ 0xa0
+Capability: type 0x0d @ 0xb0
+Capability: type 0x08 @ 0xb8
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+PCI: 00:05.0 subordinate bus PCI Express
+PCI: 00:05.0 [1022/1513] enabled
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+Capability: type 0x05 @ 0xa0
+Capability: type 0x0d @ 0xb0
+Capability: type 0x08 @ 0xb8
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+PCI: 00:06.0 subordinate bus PCI Express
+PCI: 00:06.0 [1022/1514] enabled
+PCI: Static device PCI: 00:07.0 not found, disabling it.
+PCI: Static device PCI: 00:08.0 not found, disabling it.
+PCI: 00:11.0 [1002/4390] enabled
+PCI: 00:12.0 [1002/4397] ops
+PCI: 00:12.0 [1002/4397] enabled
+PCI: 00:12.2 [1002/4396] ops
+PCI: 00:12.2 [1002/4396] enabled
+PCI: 00:13.0 [1002/4397] ops
+PCI: 00:13.0 [1002/4397] enabled
+PCI: 00:13.2 [1002/4396] ops
+PCI: 00:13.2 [1002/4396] enabled
+IOAPIC: Clearing IOAPIC at fec00000
+IOAPIC: 24 interrupts
+IOAPIC: reg 0x00000000 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
+IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
+IOAPIC: Initializing IOAPIC at 0xfec00000
+IOAPIC: Bootstrap Processor Local APIC = 0x00
+IOAPIC: ID = 0x02
+IOAPIC: Dumping registers
+ reg 0x0000: 0x02000000
+ reg 0x0001: 0x00178021
+ reg 0x0002: 0x02000000
+IOAPIC: 24 interrupts
+IOAPIC: Enabling interrupts on FSB
+IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
+IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
+IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
+PCI: 00:14.0 [1002/4385] enabled
+PCI: 00:14.3 [1002/439d] bus ops
+PCI: 00:14.3 [1002/439d] enabled
+PCI: 00:14.4 [1002/4384] enabled
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+Capability: type 0x0d @ 0xb0
+Capability: type 0x08 @ 0xb8
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+PCI: 00:15.0 subordinate bus PCI Express
+PCI: 00:15.0 [1002/43a0] enabled
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+Capability: type 0x0d @ 0xb0
+Capability: type 0x08 @ 0xb8
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+PCI: 00:15.1 subordinate bus PCI Express
+PCI: 00:15.1 [1002/43a1] disabled
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+Capability: type 0x0d @ 0xb0
+Capability: type 0x08 @ 0xb8
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+PCI: 00:15.2 subordinate bus PCI Express
+PCI: 00:15.2 [1002/43a2] disabled
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+Capability: type 0x0d @ 0xb0
+Capability: type 0x08 @ 0xb8
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+PCI: 00:15.3 subordinate bus PCI Express
+PCI: 00:15.3 [1002/43a3] disabled
+PCI: 00:16.0 [1002/4397] ops
+PCI: 00:16.0 [1002/4397] enabled
+PCI: 00:16.2 [1002/4396] ops
+PCI: 00:16.2 [1002/4396] enabled
+PCI: 00:18.0 [1022/1700] enabled
+PCI: 00:18.1 [1022/1701] enabled
+PCI: 00:18.2 [1022/1702] enabled
+PCI: 00:18.3 [1022/1703] enabled
+PCI: 00:18.4 [1022/1704] enabled
+PCI: 00:18.5 [1022/1718] enabled
+PCI: 00:18.6 [1022/1716] enabled
+PCI: 00:18.7 [1022/1719] enabled
+PCI: 00:04.0 scanning...
+do_pci_scan_bridge for PCI: 00:04.0
+PCI: pci_scan_bus for bus 01
+PCI: 01:00.0 [10ec/8168] enabled
+Capability: type 0x01 @ 0x40
+Capability: type 0x05 @ 0x50
+Capability: type 0x10 @ 0x70
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+scan_bus: scanning of bus PCI: 00:04.0 took 24297 usecs
+PCI: 00:05.0 scanning...
+do_pci_scan_bridge for PCI: 00:05.0
+PCI: pci_scan_bus for bus 02
+PCI: 02:00.0 [10ec/8168] enabled
+Capability: type 0x01 @ 0x40
+Capability: type 0x05 @ 0x50
+Capability: type 0x10 @ 0x70
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+scan_bus: scanning of bus PCI: 00:05.0 took 24288 usecs
+PCI: 00:06.0 scanning...
+do_pci_scan_bridge for PCI: 00:06.0
+PCI: pci_scan_bus for bus 03
+PCI: 03:00.0 [10ec/8168] enabled
+Capability: type 0x01 @ 0x40
+Capability: type 0x05 @ 0x50
+Capability: type 0x10 @ 0x70
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+scan_bus: scanning of bus PCI: 00:06.0 took 24295 usecs
+PCI: 00:14.3 scanning...
+scan_lpc_bus for PCI: 00:14.3
+PNP: 002e.0 disabled
+PNP: 002e.2 enabled
+PNP: 002e.3 enabled
+PNP: 002e.10 disabled
+PNP: 002e.11 disabled
+PNP: 002e.8 disabled
+PNP: 002e.f disabled
+PNP: 002e.7 disabled
+PNP: 002e.107 disabled
+PNP: 002e.607 disabled
+PNP: 002e.e disabled
+PNP: 002e.14 enabled
+scan_lpc_bus for PCI: 00:14.3 done
+scan_bus: scanning of bus PCI: 00:14.3 took 31841 usecs
+PCI: 00:14.4 scanning...
+do_pci_scan_bridge for PCI: 00:14.4
+PCI: pci_scan_bus for bus 04
+scan_bus: scanning of bus PCI: 00:14.4 took 8208 usecs
+PCI: 00:15.0 scanning...
+do_pci_scan_bridge for PCI: 00:15.0
+PCI: pci_scan_bus for bus 05
+scan_bus: scanning of bus PCI: 00:15.0 took 8196 usecs
+scan_bus: scanning of bus DOMAIN: 0000 took 700602 usecs
+root_dev_scan_bus for Root Device done
+scan_bus: scanning of bus Root Device took 743486 usecs
+done
+BS: BS_DEV_ENUMERATE times (us): entry 0 run 971533 exit 0
+Allocating resources...
+Reading resources...
+Root Device read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
+
+Fam14h - domain_read_resources
+DOMAIN: 0000 read_resources bus 0 link: 0
+
+Fam14h - nb_read_resources
+PCI: 00:04.0 read_resources bus 1 link: 0
+PCI: 00:04.0 read_resources bus 1 link: 0 done
+PCI: 00:05.0 read_resources bus 2 link: 0
+PCI: 00:05.0 read_resources bus 2 link: 0 done
+PCI: 00:06.0 read_resources bus 3 link: 0
+PCI: 00:06.0 read_resources bus 3 link: 0 done
+SB800 - Lpc.c - lpc_read_resources - Start.
+SB800 - Lpc.c - lpc_read_resources - End.
+PCI: 00:14.3 read_resources bus 0 link: 0
+PCI: 00:14.3 read_resources bus 0 link: 0 done
+PCI: 00:14.4 read_resources bus 4 link: 0
+PCI: 00:14.4 read_resources bus 4 link: 0 done
+PCI: 00:15.0 register 10(ffffffff), read-only ignoring it
+PCI: 00:15.0 register 14(ffffffff), read-only ignoring it
+PCI: 00:15.0 register 38(ffffffff), read-only ignoring it
+PCI: 00:15.0 read_resources bus 5 link: 0
+PCI: 00:15.0 read_resources bus 5 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0 done
+Root Device read_resources bus 0 link: 0 done
+Done reading resources.
+Show resources in subtree (Root Device)...After reading.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ APIC: 01
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
+ PCI: 00:00.0
+ PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
+ PCI: 00:01.0
+ PCI: 00:04.0 child on link 0 PCI: 01:00.0
+ PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
+ PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 01:00.0
+ PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
+ PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
+ PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
+ PCI: 00:05.0 child on link 0 PCI: 02:00.0
+ PCI: 00:05.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
+ PCI: 00:05.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:05.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 02:00.0
+ PCI: 02:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
+ PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
+ PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
+ PCI: 00:06.0 child on link 0 PCI: 03:00.0
+ PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
+ PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 03:00.0
+ PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
+ PCI: 03:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
+ PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
+ PCI: 00:07.0
+ PCI: 00:08.0
+ PCI: 00:11.0
+ PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
+ PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
+ PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
+ PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
+ PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
+ PCI: 00:11.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24
+ PCI: 00:12.0
+ PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+ PCI: 00:12.2
+ PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
+ PCI: 00:13.0
+ PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+ PCI: 00:13.2
+ PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
+ PCI: 00:14.0
+ PCI: 00:14.1
+ PCI: 00:14.2
+ PCI: 00:14.3 child on link 0 PNP: 002e.0
+ PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
+ PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+ PNP: 002e.0
+ PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
+ PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 002e.2
+ PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.3
+ PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.10
+ PNP: 002e.10 resource base 3e8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.10 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.11
+ PNP: 002e.11 resource base 2e8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.11 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.8
+ PNP: 002e.f
+ PNP: 002e.7
+ PNP: 002e.107
+ PNP: 002e.607
+ PNP: 002e.e
+ PNP: 002e.14
+ PCI: 00:14.4
+ PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
+ PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 00:14.5
+ PCI: 00:15.0
+ PCI: 00:15.1
+ PCI: 00:15.2
+ PCI: 00:15.3
+ PCI: 00:16.0
+ PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+ PCI: 00:16.2
+ PCI: 00:16.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
+ PCI: 00:18.0
+ PCI: 00:18.1
+ PCI: 00:18.2
+ PCI: 00:18.3
+ PCI: 00:18.4
+ PCI: 00:18.5
+ PCI: 00:18.6
+ PCI: 00:18.7
+DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
+PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
+PCI: 01:00.0 10 * [0x0 - 0xff] io
+PCI: 00:04.0 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
+PCI: 00:05.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
+PCI: 02:00.0 10 * [0x0 - 0xff] io
+PCI: 00:05.0 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
+PCI: 00:06.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
+PCI: 03:00.0 10 * [0x0 - 0xff] io
+PCI: 00:06.0 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
+PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:04.0 1c * [0x0 - 0xfff] io
+PCI: 00:05.0 1c * [0x1000 - 0x1fff] io
+PCI: 00:06.0 1c * [0x2000 - 0x2fff] io
+PCI: 00:11.0 20 * [0x3000 - 0x300f] io
+PCI: 00:11.0 10 * [0x3010 - 0x3017] io
+PCI: 00:11.0 18 * [0x3018 - 0x301f] io
+PCI: 00:11.0 14 * [0x3020 - 0x3023] io
+PCI: 00:11.0 1c * [0x3024 - 0x3027] io
+DOMAIN: 0000 io: base: 3028 size: 3028 align: 12 gran: 0 limit: ffff done
+DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
+PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 01:00.0 20 * [0x0 - 0x3fff] prefmem
+PCI: 00:04.0 prefmem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 01:00.0 18 * [0x0 - 0xfff] mem
+PCI: 00:04.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:05.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 02:00.0 20 * [0x0 - 0x3fff] prefmem
+PCI: 00:05.0 prefmem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:05.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 02:00.0 18 * [0x0 - 0xfff] mem
+PCI: 00:05.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:06.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 03:00.0 20 * [0x0 - 0x3fff] prefmem
+PCI: 00:06.0 prefmem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:06.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 03:00.0 18 * [0x0 - 0xfff] mem
+PCI: 00:06.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:04.0 24 * [0x0 - 0xfffff] prefmem
+PCI: 00:04.0 20 * [0x100000 - 0x1fffff] mem
+PCI: 00:05.0 24 * [0x200000 - 0x2fffff] prefmem
+PCI: 00:05.0 20 * [0x300000 - 0x3fffff] mem
+PCI: 00:06.0 24 * [0x400000 - 0x4fffff] prefmem
+PCI: 00:06.0 20 * [0x500000 - 0x5fffff] mem
+PCI: 00:12.0 10 * [0x600000 - 0x600fff] mem
+PCI: 00:13.0 10 * [0x601000 - 0x601fff] mem
+PCI: 00:16.0 10 * [0x602000 - 0x602fff] mem
+PCI: 00:11.0 24 * [0x603000 - 0x6033ff] mem
+PCI: 00:12.2 10 * [0x604000 - 0x6040ff] mem
+PCI: 00:13.2 10 * [0x605000 - 0x6050ff] mem
+PCI: 00:16.2 10 * [0x606000 - 0x6060ff] mem
+DOMAIN: 0000 mem: base: 606100 size: 606100 align: 20 gran: 0 limit: ffffffff done
+avoid_fixed_resources: DOMAIN: 0000
+avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
+constrain_resources: PCI: 00:00.0 c0010058 base f8000000 limit fbffffff mem (fixed)
+constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
+avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 base f7900000 limit f7ffffff
+Setting resources...
+DOMAIN: 0000 io: base:1000 size:3028 align:12 gran:0 limit:ffff
+PCI: 00:04.0 1c * [0x1000 - 0x1fff] io
+PCI: 00:05.0 1c * [0x2000 - 0x2fff] io
+PCI: 00:06.0 1c * [0x3000 - 0x3fff] io
+PCI: 00:11.0 20 * [0x4000 - 0x400f] io
+PCI: 00:11.0 10 * [0x4010 - 0x4017] io
+PCI: 00:11.0 18 * [0x4018 - 0x401f] io
+PCI: 00:11.0 14 * [0x4020 - 0x4023] io
+PCI: 00:11.0 1c * [0x4024 - 0x4027] io
+DOMAIN: 0000 io: next_base: 4028 size: 3028 align: 12 gran: 0 done
+PCI: 00:04.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff
+PCI: 01:00.0 10 * [0x1000 - 0x10ff] io
+PCI: 00:04.0 io: next_base: 1100 size: 1000 align: 12 gran: 12 done
+PCI: 00:05.0 io: base:2000 size:1000 align:12 gran:12 limit:2fff
+PCI: 02:00.0 10 * [0x2000 - 0x20ff] io
+PCI: 00:05.0 io: next_base: 2100 size: 1000 align: 12 gran: 12 done
+PCI: 00:06.0 io: base:3000 size:1000 align:12 gran:12 limit:3fff
+PCI: 03:00.0 10 * [0x3000 - 0x30ff] io
+PCI: 00:06.0 io: next_base: 3100 size: 1000 align: 12 gran: 12 done
+PCI: 00:14.4 io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:14.4 io: next_base: ffff size: 0 align: 12 gran: 12 done
+DOMAIN: 0000 mem: base:f7900000 size:606100 align:20 gran:0 limit:f7ffffff
+PCI: 00:04.0 24 * [0xf7900000 - 0xf79fffff] prefmem
+PCI: 00:04.0 20 * [0xf7a00000 - 0xf7afffff] mem
+PCI: 00:05.0 24 * [0xf7b00000 - 0xf7bfffff] prefmem
+PCI: 00:05.0 20 * [0xf7c00000 - 0xf7cfffff] mem
+PCI: 00:06.0 24 * [0xf7d00000 - 0xf7dfffff] prefmem
+PCI: 00:06.0 20 * [0xf7e00000 - 0xf7efffff] mem
+PCI: 00:12.0 10 * [0xf7f00000 - 0xf7f00fff] mem
+PCI: 00:13.0 10 * [0xf7f01000 - 0xf7f01fff] mem
+PCI: 00:16.0 10 * [0xf7f02000 - 0xf7f02fff] mem
+PCI: 00:11.0 24 * [0xf7f03000 - 0xf7f033ff] mem
+PCI: 00:12.2 10 * [0xf7f04000 - 0xf7f040ff] mem
+PCI: 00:13.2 10 * [0xf7f05000 - 0xf7f050ff] mem
+PCI: 00:16.2 10 * [0xf7f06000 - 0xf7f060ff] mem
+DOMAIN: 0000 mem: next_base: f7f06100 size: 606100 align: 20 gran: 0 done
+PCI: 00:04.0 prefmem: base:f7900000 size:100000 align:20 gran:20 limit:f79fffff
+PCI: 01:00.0 20 * [0xf7900000 - 0xf7903fff] prefmem
+PCI: 00:04.0 prefmem: next_base: f7904000 size: 100000 align: 20 gran: 20 done
+PCI: 00:04.0 mem: base:f7a00000 size:100000 align:20 gran:20 limit:f7afffff
+PCI: 01:00.0 18 * [0xf7a00000 - 0xf7a00fff] mem
+PCI: 00:04.0 mem: next_base: f7a01000 size: 100000 align: 20 gran: 20 done
+PCI: 00:05.0 prefmem: base:f7b00000 size:100000 align:20 gran:20 limit:f7bfffff
+PCI: 02:00.0 20 * [0xf7b00000 - 0xf7b03fff] prefmem
+PCI: 00:05.0 prefmem: next_base: f7b04000 size: 100000 align: 20 gran: 20 done
+PCI: 00:05.0 mem: base:f7c00000 size:100000 align:20 gran:20 limit:f7cfffff
+PCI: 02:00.0 18 * [0xf7c00000 - 0xf7c00fff] mem
+PCI: 00:05.0 mem: next_base: f7c01000 size: 100000 align: 20 gran: 20 done
+PCI: 00:06.0 prefmem: base:f7d00000 size:100000 align:20 gran:20 limit:f7dfffff
+PCI: 03:00.0 20 * [0xf7d00000 - 0xf7d03fff] prefmem
+PCI: 00:06.0 prefmem: next_base: f7d04000 size: 100000 align: 20 gran: 20 done
+PCI: 00:06.0 mem: base:f7e00000 size:100000 align:20 gran:20 limit:f7efffff
+PCI: 03:00.0 18 * [0xf7e00000 - 0xf7e00fff] mem
+PCI: 00:06.0 mem: next_base: f7e01000 size: 100000 align: 20 gran: 20 done
+PCI: 00:14.4 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
+PCI: 00:14.4 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
+PCI: 00:14.4 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
+PCI: 00:14.4 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
+Root Device assign_resources, bus 0 link: 0
+
+Fam14h - domain_set_resources
+ amsr - incoming dev = 00130080
+adsr: (before) basek = 0, limitk = 11effffff.
+adsr: (after) basek = 0, limitk = 47bfff, sizek = 47c000.
+adsr - 0xa0000 to 0xbffff resource.
+adsr: mmio_basek=00380000, basek=00000300, limitk=0047bfff
+0: mmio_basek=00380000, basek=00400000, limitk=0047bfff
+ adsr - mmio_basek = 380000.
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+
+Fam14h - nb_set_resources
+
+Fam14h - create_vga_resource
+
+Fam14h - set_resource
+PCI: 00:00.0 c0010058 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x00 mem <mmconfig>
+PCI: 00:04.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
+PCI: 00:04.0 24 <- [0x00f7900000 - 0x00f79fffff] size 0x00100000 gran 0x14 bus 01 prefmem
+PCI: 00:04.0 20 <- [0x00f7a00000 - 0x00f7afffff] size 0x00100000 gran 0x14 bus 01 mem
+PCI: 00:04.0 assign_resources, bus 1 link: 0
+PCI: 01:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
+PCI: 01:00.0 18 <- [0x00f7a00000 - 0x00f7a00fff] size 0x00001000 gran 0x0c mem64
+PCI: 01:00.0 20 <- [0x00f7900000 - 0x00f7903fff] size 0x00004000 gran 0x0e prefmem64
+PCI: 00:04.0 assign_resources, bus 1 link: 0
+PCI: 00:05.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 02 io
+PCI: 00:05.0 24 <- [0x00f7b00000 - 0x00f7bfffff] size 0x00100000 gran 0x14 bus 02 prefmem
+PCI: 00:05.0 20 <- [0x00f7c00000 - 0x00f7cfffff] size 0x00100000 gran 0x14 bus 02 mem
+PCI: 00:05.0 assign_resources, bus 2 link: 0
+PCI: 02:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
+PCI: 02:00.0 18 <- [0x00f7c00000 - 0x00f7c00fff] size 0x00001000 gran 0x0c mem64
+PCI: 02:00.0 20 <- [0x00f7b00000 - 0x00f7b03fff] size 0x00004000 gran 0x0e prefmem64
+PCI: 00:05.0 assign_resources, bus 2 link: 0
+PCI: 00:06.0 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 03 io
+PCI: 00:06.0 24 <- [0x00f7d00000 - 0x00f7dfffff] size 0x00100000 gran 0x14 bus 03 prefmem
+PCI: 00:06.0 20 <- [0x00f7e00000 - 0x00f7efffff] size 0x00100000 gran 0x14 bus 03 mem
+PCI: 00:06.0 assign_resources, bus 3 link: 0
+PCI: 03:00.0 10 <- [0x0000003000 - 0x00000030ff] size 0x00000100 gran 0x08 io
+PCI: 03:00.0 18 <- [0x00f7e00000 - 0x00f7e00fff] size 0x00001000 gran 0x0c mem64
+PCI: 03:00.0 20 <- [0x00f7d00000 - 0x00f7d03fff] size 0x00004000 gran 0x0e prefmem64
+PCI: 00:06.0 assign_resources, bus 3 link: 0
+PCI: 00:11.0 10 <- [0x0000004010 - 0x0000004017] size 0x00000008 gran 0x03 io
+PCI: 00:11.0 14 <- [0x0000004020 - 0x0000004023] size 0x00000004 gran 0x02 io
+PCI: 00:11.0 18 <- [0x0000004018 - 0x000000401f] size 0x00000008 gran 0x03 io
+PCI: 00:11.0 1c <- [0x0000004024 - 0x0000004027] size 0x00000004 gran 0x02 io
+PCI: 00:11.0 20 <- [0x0000004000 - 0x000000400f] size 0x00000010 gran 0x04 io
+PCI: 00:11.0 24 <- [0x00f7f03000 - 0x00f7f033ff] size 0x00000400 gran 0x0a mem
+PCI: 00:12.0 10 <- [0x00f7f00000 - 0x00f7f00fff] size 0x00001000 gran 0x0c mem
+PCI: 00:12.2 10 <- [0x00f7f04000 - 0x00f7f040ff] size 0x00000100 gran 0x08 mem
+PCI: 00:13.0 10 <- [0x00f7f01000 - 0x00f7f01fff] size 0x00001000 gran 0x0c mem
+PCI: 00:13.2 10 <- [0x00f7f05000 - 0x00f7f050ff] size 0x00000100 gran 0x08 mem
+SB800 - Lpc.c - lpc_set_resources - Start.
+PCI: 00:14.3 assign_resources, bus 0 link: 0
+PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
+PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
+PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
+PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
+PCI: 00:14.3 assign_resources, bus 0 link: 0
+SB800 - Lpc.c - lpc_set_resources - End.
+PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
+PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 04 prefmem
+PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 04 mem
+PCI: 00:16.0 10 <- [0x00f7f02000 - 0x00f7f02fff] size 0x00001000 gran 0x0c mem
+PCI: 00:16.2 10 <- [0x00f7f06000 - 0x00f7f060ff] size 0x00000100 gran 0x08 mem
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+ adsr - leaving this lovely routine.
+Root Device assign_resources, bus 0 link: 0
+Done setting resources.
+Show resources in subtree (Root Device)...After assigning values.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ APIC: 01
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 1000 size 3028 align 12 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base f7900000 size 606100 align 20 gran 0 limit f7ffffff flags 40040200 index 10000100
+ DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
+ DOMAIN: 0000 resource base c0000 size dff40000 align 0 gran 0 limit 0 flags e0004200 index 20
+ DOMAIN: 0000 resource base 100000000 size 1efffc00 align 0 gran 0 limit 0 flags e0004200 index 30
+ PCI: 00:00.0
+ PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
+ PCI: 00:01.0
+ PCI: 00:04.0 child on link 0 PCI: 01:00.0
+ PCI: 00:04.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
+ PCI: 00:04.0 resource base f7900000 size 100000 align 20 gran 20 limit f79fffff flags 60081202 index 24
+ PCI: 00:04.0 resource base f7a00000 size 100000 align 20 gran 20 limit f7afffff flags 60080202 index 20
+ PCI: 01:00.0
+ PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10
+ PCI: 01:00.0 resource base f7a00000 size 1000 align 12 gran 12 limit f7a00fff flags 60000201 index 18
+ PCI: 01:00.0 resource base f7900000 size 4000 align 14 gran 14 limit f7903fff flags 60001201 index 20
+ PCI: 00:05.0 child on link 0 PCI: 02:00.0
+ PCI: 00:05.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
+ PCI: 00:05.0 resource base f7b00000 size 100000 align 20 gran 20 limit f7bfffff flags 60081202 index 24
+ PCI: 00:05.0 resource base f7c00000 size 100000 align 20 gran 20 limit f7cfffff flags 60080202 index 20
+ PCI: 02:00.0
+ PCI: 02:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 10
+ PCI: 02:00.0 resource base f7c00000 size 1000 align 12 gran 12 limit f7c00fff flags 60000201 index 18
+ PCI: 02:00.0 resource base f7b00000 size 4000 align 14 gran 14 limit f7b03fff flags 60001201 index 20
+ PCI: 00:06.0 child on link 0 PCI: 03:00.0
+ PCI: 00:06.0 resource base 3000 size 1000 align 12 gran 12 limit 3fff flags 60080102 index 1c
+ PCI: 00:06.0 resource base f7d00000 size 100000 align 20 gran 20 limit f7dfffff flags 60081202 index 24
+ PCI: 00:06.0 resource base f7e00000 size 100000 align 20 gran 20 limit f7efffff flags 60080202 index 20
+ PCI: 03:00.0
+ PCI: 03:00.0 resource base 3000 size 100 align 8 gran 8 limit 30ff flags 60000100 index 10
+ PCI: 03:00.0 resource base f7e00000 size 1000 align 12 gran 12 limit f7e00fff flags 60000201 index 18
+ PCI: 03:00.0 resource base f7d00000 size 4000 align 14 gran 14 limit f7d03fff flags 60001201 index 20
+ PCI: 00:07.0
+ PCI: 00:08.0
+ PCI: 00:11.0
+ PCI: 00:11.0 resource base 4010 size 8 align 3 gran 3 limit 4017 flags 60000100 index 10
+ PCI: 00:11.0 resource base 4020 size 4 align 2 gran 2 limit 4023 flags 60000100 index 14
+ PCI: 00:11.0 resource base 4018 size 8 align 3 gran 3 limit 401f flags 60000100 index 18
+ PCI: 00:11.0 resource base 4024 size 4 align 2 gran 2 limit 4027 flags 60000100 index 1c
+ PCI: 00:11.0 resource base 4000 size 10 align 4 gran 4 limit 400f flags 60000100 index 20
+ PCI: 00:11.0 resource base f7f03000 size 400 align 12 gran 10 limit f7f033ff flags 60000200 index 24
+ PCI: 00:12.0
+ PCI: 00:12.0 resource base f7f00000 size 1000 align 12 gran 12 limit f7f00fff flags 60000200 index 10
+ PCI: 00:12.2
+ PCI: 00:12.2 resource base f7f04000 size 100 align 12 gran 8 limit f7f040ff flags 60000200 index 10
+ PCI: 00:13.0
+ PCI: 00:13.0 resource base f7f01000 size 1000 align 12 gran 12 limit f7f01fff flags 60000200 index 10
+ PCI: 00:13.2
+ PCI: 00:13.2 resource base f7f05000 size 100 align 12 gran 8 limit f7f050ff flags 60000200 index 10
+ PCI: 00:14.0
+ PCI: 00:14.1
+ PCI: 00:14.2
+ PCI: 00:14.3 child on link 0 PNP: 002e.0
+ PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
+ PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+ PNP: 002e.0
+ PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
+ PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 002e.2
+ PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.3
+ PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.10
+ PNP: 002e.10 resource base 3e8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.10 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.11
+ PNP: 002e.11 resource base 2e8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.11 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.8
+ PNP: 002e.f
+ PNP: 002e.7
+ PNP: 002e.107
+ PNP: 002e.607
+ PNP: 002e.e
+ PNP: 002e.14
+ PCI: 00:14.4
+ PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
+ PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
+ PCI: 00:14.5
+ PCI: 00:15.0
+ PCI: 00:15.1
+ PCI: 00:15.2
+ PCI: 00:15.3
+ PCI: 00:16.0
+ PCI: 00:16.0 resource base f7f02000 size 1000 align 12 gran 12 limit f7f02fff flags 60000200 index 10
+ PCI: 00:16.2
+ PCI: 00:16.2 resource base f7f06000 size 100 align 12 gran 8 limit f7f060ff flags 60000200 index 10
+ PCI: 00:18.0
+ PCI: 00:18.1
+ PCI: 00:18.2
+ PCI: 00:18.3
+ PCI: 00:18.4
+ PCI: 00:18.5
+ PCI: 00:18.6
+ PCI: 00:18.7
+Done allocating resources.
+BS: BS_DEV_RESOURCES times (us): entry 0 run 2194755 exit 0
+PCI_INTR tables: Writing registers C00/C01 for PIC mode PCI IRQ routing:
+ PCI_INTR_INDEX PCI_INTR_DATA
+ 0x00 INTA# : 0x0A
+ 0x01 INTB# : 0x0B
+ 0x02 INTC# : 0x0A
+ 0x03 INTD# : 0x0B
+ 0x04 INTE# : 0x0A
+ 0x05 INTF# : 0x0B
+ 0x06 INTG# : 0x0A
+ 0x07 INTH# : 0x0B
+ 0x08 Misc : 0x00
+ 0x09 Misc0 : 0xF1
+ 0x0A Misc1 : 0x00
+ 0x0B Misc2 : 0x00
+ 0x0C Ser IRQ INTA : 0x1F
+ 0x0D Ser IRQ INTB : 0x1F
+ 0x0E Ser IRQ INTC : 0x1F
+ 0x0F Ser IRQ INTD : 0x1F
+ 0x10 SCI : 0x1F
+ 0x11 SMBUS0 : 0x1F
+ 0x12 ASF : 0x1F
+ 0x13 HDA : 0x0A
+ 0x14 FC : 0x1F
+ 0x15 GEC : 0x1F
+ 0x16 PerMon : 0x1F
+ 0x20 IMC INT0 : 0x1F
+ 0x21 IMC INT1 : 0x1F
+ 0x22 IMC INT2 : 0x1F
+ 0x23 IMC INT3 : 0x1F
+ 0x24 IMC INT4 : 0x1F
+ 0x25 IMC INT5 : 0x1F
+ 0x30 Dev18.0 INTA : 0x0A
+ 0x31 Dev18.2 INTB : 0x0B
+ 0x32 Dev19.0 INTA : 0x0A
+ 0x33 Dev19.2 INTB : 0x0B
+ 0x34 Dev22.0 INTA : 0x0A
+ 0x35 Dev22.2 INTB : 0x0B
+ 0x36 Dev20.5 INTC : 0x0A
+ 0x40 IDE : 0x0B
+ 0x41 SATA : 0x0B
+ 0x50 GPPInt0 : 0x0A
+ 0x51 GPPInt1 : 0x0B
+ 0x52 GPPInt2 : 0x0A
+ 0x53 GPPInt3 : 0x0B
+PCI_INTR tables: Writing registers C00/C01 for APIC mode PCI IRQ routing:
+ PCI_INTR_INDEX PCI_INTR_DATA
+ 0x00 INTA# : 0x10
+ 0x01 INTB# : 0x11
+ 0x02 INTC# : 0x12
+ 0x03 INTD# : 0x13
+ 0x04 INTE# : 0x14
+ 0x05 INTF# : 0x15
+ 0x06 INTG# : 0x16
+ 0x07 INTH# : 0x17
+ 0x08 Misc : 0x00
+ 0x09 Misc0 : 0x00
+ 0x0A Misc1 : 0x00
+ 0x0B Misc2 : 0x00
+ 0x0C Ser IRQ INTA : 0x1F
+ 0x0D Ser IRQ INTB : 0x1F
+ 0x0E Ser IRQ INTC : 0x1F
+ 0x0F Ser IRQ INTD : 0x1F
+ 0x10 SCI : 0x09
+ 0x11 SMBUS0 : 0x1F
+ 0x12 ASF : 0x1F
+ 0x13 HDA : 0x10
+ 0x14 FC : 0x1F
+ 0x15 GEC : 0x12
+ 0x16 PerMon : 0x1F
+ 0x20 IMC INT0 : 0x1F
+ 0x21 IMC INT1 : 0x1F
+ 0x22 IMC INT2 : 0x1F
+ 0x23 IMC INT3 : 0x1F
+ 0x24 IMC INT4 : 0x1F
+ 0x25 IMC INT5 : 0x1F
+ 0x30 Dev18.0 INTA : 0x12
+ 0x31 Dev18.2 INTB : 0x11
+ 0x32 Dev19.0 INTA : 0x12
+ 0x33 Dev19.2 INTB : 0x11
+ 0x34 Dev22.0 INTA : 0x12
+ 0x35 Dev22.2 INTB : 0x11
+ 0x36 Dev20.5 INTC : 0x12
+ 0x40 IDE : 0x11
+ 0x41 SATA : 0x13
+ 0x50 GPPInt0 : 0x10
+ 0x51 GPPInt1 : 0x11
+ 0x52 GPPInt2 : 0x12
+ 0x53 GPPInt3 : 0x13
+PCI_CFG IRQ: Write PCI config space IRQ assignments
+PCI IRQ: Found device 0:04.00 using PIN A
+ Found this device in pirq_data table entry 1
+ Orig INT_PIN : 1 (PIN A)
+ PCI_INTR idx : 0x00 (INTA# )
+ INT_LINE : 0xA (IRQ 10)
+PCI IRQ: Found device 0:05.00 using PIN A
+ Found this device in pirq_data table entry 2
+ Orig INT_PIN : 1 (PIN A)
+ PCI_INTR idx : 0x00 (INTA# )
+ INT_LINE : 0xA (IRQ 10)
+PCI IRQ: Found device 0:06.00 using PIN A
+ Found this device in pirq_data table entry 3
+ Orig INT_PIN : 1 (PIN A)
+ PCI_INTR idx : 0x00 (INTA# )
+ INT_LINE : 0xA (IRQ 10)
+PCI IRQ: Found device 0:11.00 using PIN A
+ Found this device in pirq_data table entry 5
+ Orig INT_PIN : 1 (PIN A)
+ PCI_INTR idx : 0x41 (SATA )
+ INT_LINE : 0xB (IRQ 11)
+PCI IRQ: Found device 0:12.00 using PIN A
+ Found this device in pirq_data table entry 6
+ Orig INT_PIN : 1 (PIN A)
+ PCI_INTR idx : 0x30 (Dev18.0 INTA)
+ INT_LINE : 0xA (IRQ 10)
+PCI IRQ: Found device 0:12.02 using PIN B
+ Found this device in pirq_data table entry 7
+ Orig INT_PIN : 2 (PIN B)
+ PCI_INTR idx : 0x31 (Dev18.2 INTB)
+ INT_LINE : 0xB (IRQ 11)
+PCI IRQ: Found device 0:13.00 using PIN A
+ Found this device in pirq_data table entry 8
+ Orig INT_PIN : 1 (PIN A)
+ PCI_INTR idx : 0x32 (Dev19.0 INTA)
+ INT_LINE : 0xA (IRQ 10)
+PCI IRQ: Found device 0:13.02 using PIN B
+ Found this device in pirq_data table entry 9
+ Orig INT_PIN : 2 (PIN B)
+ PCI_INTR idx : 0x33 (Dev19.2 INTB)
+ INT_LINE : 0xB (IRQ 11)
+PCI IRQ: Found device 0:16.00 using PIN A
+ Found this device in pirq_data table entry 16
+ Orig INT_PIN : 1 (PIN A)
+ PCI_INTR idx : 0x34 (Dev22.0 INTA)
+ INT_LINE : 0xA (IRQ 10)
+PCI IRQ: Found device 0:16.02 using PIN B
+ Found this device in pirq_data table entry 17
+ Orig INT_PIN : 2 (PIN B)
+ PCI_INTR idx : 0x35 (Dev22.2 INTB)
+ INT_LINE : 0xB (IRQ 11)
+PCI IRQ: Found device 1:00.00 using PIN A
+ With INT_PIN swizzled to PIN A
+ Attached to bridge device 0:04h.00h
+ Found this device in pirq_data table entry 1
+ Orig INT_PIN : 1 (PIN A)
+ PCI_INTR idx : 0x00 (INTA# )
+ INT_LINE : 0xA (IRQ 10)
+PCI IRQ: Found device 2:00.00 using PIN A
+ With INT_PIN swizzled to PIN A
+ Attached to bridge device 0:05h.00h
+ Found this device in pirq_data table entry 2
+ Orig INT_PIN : 1 (PIN A)
+ PCI_INTR idx : 0x00 (INTA# )
+ INT_LINE : 0xA (IRQ 10)
+PCI IRQ: Found device 3:00.00 using PIN A
+ With INT_PIN swizzled to PIN A
+ Attached to bridge device 0:06h.00h
+ Found this device in pirq_data table entry 3
+ Orig INT_PIN : 1 (PIN A)
+ PCI_INTR idx : 0x00 (INTA# )
+ INT_LINE : 0xA (IRQ 10)
+PCI_CFG IRQ: Finished writing PCI config space IRQ assignments
+Enabling resources...
+
+Fam14h - domain_enable_resources
+agesawrapper_amdinitmid() returned AGESA_SUCCESS
+ ader - leaving domain_enable_resources.
+PCI: 00:00.0 cmd <- 06
+PCI: 00:04.0 bridge ctrl <- 0003
+PCI: 00:04.0 cmd <- 07
+PCI: 00:05.0 bridge ctrl <- 0003
+PCI: 00:05.0 cmd <- 07
+PCI: 00:06.0 bridge ctrl <- 0003
+PCI: 00:06.0 cmd <- 07
+PCI: 00:11.0 subsystem <- 1022/1510
+PCI: 00:11.0 cmd <- 03
+PCI: 00:12.0 subsystem <- 1022/1510
+PCI: 00:12.0 cmd <- 02
+PCI: 00:12.2 subsystem <- 1022/1510
+PCI: 00:12.2 cmd <- 02
+PCI: 00:13.0 subsystem <- 1022/1510
+PCI: 00:13.0 cmd <- 02
+PCI: 00:13.2 subsystem <- 1022/1510
+PCI: 00:13.2 cmd <- 02
+PCI: 00:14.0 subsystem <- 1022/1510
+PCI: 00:14.0 cmd <- 403
+PCI: 00:14.3 subsystem <- 1022/1510
+PCI: 00:14.3 cmd <- 0f
+PCI: 00:14.4 bridge ctrl <- 0003
+PCI: 00:14.4 cmd <- 21
+PCI: 00:15.0 bridge ctrl <- ffff
+PCI: 00:15.0 cmd <- ffff
+PCI: 00:16.0 subsystem <- 1022/1510
+PCI: 00:16.0 cmd <- 02
+PCI: 00:16.2 subsystem <- 1022/1510
+PCI: 00:16.2 cmd <- 02
+PCI: 00:18.0 subsystem <- 1022/1510
+PCI: 00:18.0 cmd <- 00
+PCI: 00:18.1 subsystem <- 1022/1510
+PCI: 00:18.1 cmd <- 00
+PCI: 00:18.2 subsystem <- 1022/1510
+PCI: 00:18.2 cmd <- 00
+PCI: 00:18.3 subsystem <- 1022/1510
+PCI: 00:18.3 cmd <- 00
+PCI: 00:18.4 subsystem <- 1022/1510
+PCI: 00:18.4 cmd <- 00
+PCI: 00:18.5 subsystem <- 1022/1510
+PCI: 00:18.5 cmd <- 00
+PCI: 00:18.6 subsystem <- 1022/1510
+PCI: 00:18.6 cmd <- 00
+PCI: 00:18.7 subsystem <- 1022/1510
+PCI: 00:18.7 cmd <- 00
+PCI: 01:00.0 cmd <- 03
+PCI: 02:00.0 cmd <- 03
+PCI: 03:00.0 cmd <- 03
+done.
+BS: BS_DEV_ENABLE times (us): entry 416494 run 145610 exit 0
+Initializing devices...
+Root Device init ...
+Root Device init finished in 1923 usecs
+CPU_CLUSTER: 0 init ...
+start_eip=0x00001000, code_size=0x00000031
+Initializing CPU #0
+CPU: vendor AMD device 500f20
+CPU: family 14, model 02, stepping 00
+Model 14 Init.
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+Enabling cache
+Setting up local apic... apic_id: 0x00 done.
+model_14_init done.
+CPU #0 initialized
+CPU1: stack_base 00133000, stack_end 00133ff8
+Asserting INIT.
+Waiting for send to finish...
++Deasserting INIT.
+Waiting for send to finish...
++#startup loops: 2.
+Sending STARTUP #1 to 1.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++Sending STARTUP #2 to 1.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++After Startup.
+Initializing CPU #1
+Waiting for 1 CPUS to stop
+CPU: vendor AMD device 500f20
+CPU: family 14, model 02, stepping 00
+Model 14 Init.
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+Enabling cache
+Setting up local apic... apic_id: 0x01 done.
+model_14_init done.
+CPU #1 initialized
+All AP CPUs stopped (2221 loops)
+CPU0: stack: 00134000 - 00135000, lowest used address 001349ec, stack used: 1556 bytes
+CPU1: stack: 00133000 - 00134000, lowest used address 00133e08, stack used: 504 bytes
+CPU_CLUSTER: 0 init finished in 120056 usecs
+DOMAIN: 0000 init ...
+DOMAIN: 0000 init finished in 2008 usecs
+PCI: 00:00.0 init ...
+Northbridge init
+PCI: 00:00.0 init finished in 3590 usecs
+PCI: 00:11.0 init ...
+PCI: 00:11.0 init finished in 2015 usecs
+PCI: 00:14.0 init ...
+PCI: 00:14.0 init finished in 2009 usecs
+PCI: 00:14.3 init ...
+SB800 - Late.c - lpc_init - Start.
+RTC Init
+SB800 - Late.c - lpc_init - End.
+PCI: 00:14.3 init finished in 9050 usecs
+PCI: 00:18.0 init ...
+PCI: 00:18.0 init finished in 2011 usecs
+PCI: 00:18.1 init ...
+PCI: 00:18.1 init finished in 2010 usecs
+PCI: 00:18.2 init ...
+PCI: 00:18.2 init finished in 2008 usecs
+PCI: 00:18.3 init ...
+PCI: 00:18.3 init finished in 2008 usecs
+PCI: 00:18.4 init ...
+PCI: 00:18.4 init finished in 2010 usecs
+PCI: 00:18.5 init ...
+PCI: 00:18.5 init finished in 2016 usecs
+PCI: 00:18.6 init ...
+PCI: 00:18.6 init finished in 2009 usecs
+PCI: 00:18.7 init ...
+PCI: 00:18.7 init finished in 2016 usecs
+PCI: 01:00.0 init ...
+PCI: 01:00.0 init finished in 2009 usecs
+PCI: 02:00.0 init ...
+PCI: 02:00.0 init finished in 2008 usecs
+PCI: 03:00.0 init ...
+PCI: 03:00.0 init finished in 2009 usecs
+PNP: 002e.2 init ...
+PNP: 002e.2 init finished in 1954 usecs
+PNP: 002e.3 init ...
+PNP: 002e.3 init finished in 1947 usecs
+PNP: 002e.14 init ...
+PNP: 002e.14 init finished in 2014 usecs
+Devices initialized
+Show all devs... After init.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:01.0: enabled 0
+PCI: 00:04.0: enabled 1
+PCI: 00:05.0: enabled 1
+PCI: 00:06.0: enabled 1
+PCI: 00:07.0: enabled 0
+PCI: 00:08.0: enabled 0
+PCI: 00:11.0: enabled 1
+PCI: 00:12.0: enabled 1
+PCI: 00:12.2: enabled 1
+PCI: 00:13.0: enabled 1
+PCI: 00:13.2: enabled 1
+PCI: 00:14.0: enabled 1
+PCI: 00:14.1: enabled 0
+PCI: 00:14.2: enabled 0
+PCI: 00:14.3: enabled 1
+PNP: 002e.0: enabled 0
+PNP: 002e.2: enabled 1
+PNP: 002e.3: enabled 1
+PNP: 002e.10: enabled 0
+PNP: 002e.11: enabled 0
+PNP: 002e.8: enabled 0
+PNP: 002e.f: enabled 0
+PNP: 002e.7: enabled 0
+PNP: 002e.107: enabled 0
+PNP: 002e.607: enabled 0
+PNP: 002e.e: enabled 0
+PCI: 00:14.4: enabled 1
+PCI: 00:14.5: enabled 0
+PCI: 00:15.0: enabled 1
+PCI: 00:15.1: enabled 0
+PCI: 00:15.2: enabled 0
+PCI: 00:15.3: enabled 0
+PCI: 00:16.0: enabled 1
+PCI: 00:16.2: enabled 1
+PCI: 00:18.0: enabled 1
+PCI: 00:18.1: enabled 1
+PCI: 00:18.2: enabled 1
+PCI: 00:18.3: enabled 1
+PCI: 00:18.4: enabled 1
+PCI: 00:18.5: enabled 1
+PCI: 00:18.6: enabled 1
+PCI: 00:18.7: enabled 1
+APIC: 01: enabled 1
+PCI: 01:00.0: enabled 1
+PCI: 02:00.0: enabled 1
+PCI: 03:00.0: enabled 1
+PNP: 002e.14: enabled 1
+BS: BS_DEV_INIT times (us): entry 0 run 365788 exit 0
+CBMEM:
+IMD: root @ dffff000 254 entries.
+IMD: root @ dfffec00 62 entries.
+Moving GDT to dfffea00...ok
+Finalize devices...
+Devices finalized
+agesawrapper_amdinitlate() returned AGESA_SUCCESS
+agesawrapper_amdS3Save() returned AGESA_SUCCESS
+SF: Detected MX25L1605D with sector size 0x1000, total 0x200000
+SF: Successfully erased 4096 bytes @ 0xffff1000
+SF: Detected MX25L1605D with sector size 0x1000, total 0x200000
+SF: Successfully erased 4096 bytes @ 0xffff0000
+BS: BS_POST_DEVICE times (us): entry 9369 run 3502 exit 116583
+BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3 exit 0
+Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
+Writing IRQ routing tables to 0xdfc8c000...write_pirq_routing_table done.
+PIRQ table: 48 bytes.
+Wrote the mp table end at: 000f0410 - 000f05cc
+Wrote the mp table end at: dfc8b010 - dfc8b1cc
+MP table: 460 bytes.
+CBFS: 'Master Header Locator' located CBFS at [100:1fffc0)
+CBFS: Locating 'fallback/dsdt.aml'
+CBFS: Found @ offset 42600 size 2677
+CBFS: 'Master Header Locator' located CBFS at [100:1fffc0)
+CBFS: Locating 'fallback/slic'
+CBFS: 'fallback/slic' not found.
+ACPI: Writing ACPI tables at dfc67000.
+ACPI: * FACS
+ACPI: * DSDT
+ACPI: * FADT
+ACPI_BLK_BASE: 0x0800
+ACPI: added table 1/32, length now 40
+ACPI: * SSDT
+ACPI: added table 2/32, length now 44
+ACPI: * MCFG
+ACPI: * TCPA
+TCPA log created at dfc57000
+ACPI: added table 3/32, length now 48
+ACPI: * MADT
+ACPI: added table 4/32, length now 52
+current = dfc69af0
+ACPI: added table 5/32, length now 56
+ACPI: * SRAT at dfc69c88
+ AGESA SRAT table NULL. Skipping.
+ACPI: * SLIT at dfc69c88
+ AGESA SLIT table NULL. Skipping.
+ACPI: * AGESA ALIB SSDT at dfc69c90
+ACPI: added table 6/32, length now 60
+ACPI: * AGESA SSDT Pstate at dfc6b320
+ACPI: added table 7/32, length now 64
+ACPI: * HPET
+ACPI: added table 8/32, length now 68
+ACPI: done.
+ACPI tables: 18032 bytes.
+smbios_write_tables: dfc56000
+Root Device (PC Engines APU1)
+CPU_CLUSTER: 0 (AMD Family 14h Root Complex)
+APIC: 00 (AMD CPU Family 14h)
+DOMAIN: 0000 (AMD Family 14h Root Complex)
+PCI: 00:00.0 (AMD Family 14h Northbridge)
+PCI: 00:01.0 (AMD Family 14h Northbridge)
+PCI: 00:04.0 (AMD Family 14h Northbridge)
+PCI: 00:05.0 (AMD Family 14h Northbridge)
+PCI: 00:06.0 (AMD Family 14h Northbridge)
+PCI: 00:07.0 (AMD Family 14h Northbridge)
+PCI: 00:08.0 (AMD Family 14h Northbridge)
+PCI: 00:11.0 (ATI SB800)
+PCI: 00:12.0 (ATI SB800)
+PCI: 00:12.2 (ATI SB800)
+PCI: 00:13.0 (ATI SB800)
+PCI: 00:13.2 (ATI SB800)
+PCI: 00:14.0 (ATI SB800)
+PCI: 00:14.1 (ATI SB800)
+PCI: 00:14.2 (ATI SB800)
+PCI: 00:14.3 (ATI SB800)
+PNP: 002e.0 (Nuvoton NCT5104D Super I/O)
+PNP: 002e.2 (Nuvoton NCT5104D Super I/O)
+PNP: 002e.3 (Nuvoton NCT5104D Super I/O)
+PNP: 002e.10 (Nuvoton NCT5104D Super I/O)
+PNP: 002e.11 (Nuvoton NCT5104D Super I/O)
+PNP: 002e.8 (Nuvoton NCT5104D Super I/O)
+PNP: 002e.f (Nuvoton NCT5104D Super I/O)
+PNP: 002e.7 (Nuvoton NCT5104D Super I/O)
+PNP: 002e.107 (Nuvoton NCT5104D Super I/O)
+PNP: 002e.607 (Nuvoton NCT5104D Super I/O)
+PNP: 002e.e (Nuvoton NCT5104D Super I/O)
+PCI: 00:14.4 (ATI SB800)
+PCI: 00:14.5 (ATI SB800)
+PCI: 00:15.0 (ATI SB800)
+PCI: 00:15.1 (ATI SB800)
+PCI: 00:15.2 (ATI SB800)
+PCI: 00:15.3 (ATI SB800)
+PCI: 00:16.0 (ATI SB800)
+PCI: 00:16.2 (ATI SB800)
+PCI: 00:18.0 (AMD Family 14h Northbridge)
+PCI: 00:18.1 (AMD Family 14h Northbridge)
+PCI: 00:18.2 (AMD Family 14h Northbridge)
+PCI: 00:18.3 (AMD Family 14h Northbridge)
+PCI: 00:18.4 (AMD Family 14h Northbridge)
+PCI: 00:18.5 (AMD Family 14h Northbridge)
+PCI: 00:18.6 (AMD Family 14h Northbridge)
+PCI: 00:18.7 (AMD Family 14h Northbridge)
+APIC: 01 (unknown)
+PCI: 01:00.0 (unknown)
+PCI: 02:00.0 (unknown)
+PCI: 03:00.0 (unknown)
+PNP: 002e.14 (unknown)
+SMBIOS tables: 319 bytes.
+Writing table forward entry at 0x00000500
+Wrote coreboot table at: 00000500, 0x10 bytes, checksum 5015
+Writing coreboot table at 0xdfc8d000
+ 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
+ 1. 0000000000001000-000000000009ffff: RAM
+ 2. 00000000000c0000-00000000dfc55fff: RAM
+ 3. 00000000dfc56000-00000000dfffffff: CONFIGURATION TABLES
+ 4. 00000000f8000000-00000000fbffffff: RESERVED
+ 5. 0000000100000000-000000011effffff: RAM
+CBFS: 'Master Header Locator' located CBFS at [100:1fffc0)
+FMAP: Found "FLASH" version 1.1 at 0.
+FMAP: base = ffe00000 size = 200000 #areas = 3
+Wrote coreboot table at: dfc8d000, 0x2b4 bytes, checksum f322
+coreboot table: 716 bytes.
+IMD ROOT 0. dffff000 00001000
+IMD SMALL 1. dfffe000 00001000
+CONSOLE 2. dffde000 00020000
+TIME STAMP 3. dffdd000 00000400
+ROMSTG STCK 4. dffc5000 00018000
+ACPISCRATCH 5. dff95000 00030000
+ACPI RESUME 6. dfc95000 00300000
+COREBOOT 7. dfc8d000 00008000
+IRQ TABLE 8. dfc8c000 00001000
+SMP TABLE 9. dfc8b000 00001000
+ACPI 10. dfc67000 00024000
+TCPA LOG 11. dfc57000 00010000
+SMBIOS 12. dfc56000 00000800
+IMD small region:
+ IMD ROOT 0. dfffec00 00000400
+ GDT 1. dfffea00 00000200
+Mainboard APU1 Final.
+BS: BS_WRITE_TABLES times (us): entry 0 run 394611 exit 0
+CBFS: 'Master Header Locator' located CBFS at [100:1fffc0)
+CBFS: Locating 'fallback/payload'
+CBFS: Found @ offset 44e00 size eee2
+Loading segment from rom address 0xffe44f38
+ code (compression=1)
+ New segment dstaddr 0xe4060 memsize 0x1bfa0 srcaddr 0xffe44f70 filesize 0xeeaa
+Loading segment from rom address 0xffe44f54
+ Entry Point 0x000ff06e
+Bounce Buffer at dfa21000, 2311712 bytes
+Loading Segment: addr: 0x00000000000e4060 memsz: 0x000000000001bfa0 filesz: 0x000000000000eeaa
+lb: [0x0000000000100000, 0x000000000021a310)
+Post relocation: addr: 0x00000000000e4060 memsz: 0x000000000001bfa0 filesz: 0x000000000000eeaa
+using LZMA
+[ 0x000e4060, 00100000, 0x00100000) <- ffe44f70
+dest 000e4060, end 00100000, bouncebuffer dfa21000
+Loaded segments
+BS: BS_PAYLOAD_LOAD times (us): entry 0 run 102675 exit 0
+Jumping to boot code at 000ff06e(dfc8d000)
+CPU0: stack: 00134000 - 00135000, lowest used address 001349ec, stack used: 1556 bytes
+entry = 0x000ff06e
+lb_start = 0x00100000
+lb_size = 0x0011a310
+buffer = 0xdfa21000
+SeaBIOS (version rel-1.9.1-0-gb3ef39f-dirty-20160605_120936-kinetic)
+BUILD: gcc: (coreboot toolchain v1.38 April 3rd, 2016) 5.2.0 binutils: (GNU Binutils) 2.25
+Found coreboot cbmem console @ dffde000
+Found mainboard PC Engines APU1
+Relocating init from 0x000e5480 to 0xdfc0abe0 (size 45952)
+Found CBFS header at 0xffe00138
+multiboot: eax=0, ebx=0
+Found 25 PCI devices (max PCI bus is 04)
+Copying SMBIOS entry point from 0xdfc56000 to 0x000f07e0
+Copying ACPI RSDP from 0xdfc67000 to 0x000f07b0
+Copying MPTABLE from 0xdfc8b000/dfc8b010 to 0x000f05e0
+Copying PIR from 0xdfc8c000 to 0x000f05b0
+Using pmtimer, ioport 0x808
+Scan for VGA option rom
+EHCI init on dev 00:12.2 (regs=0xf7f04020)
+WARNING - Timeout at i8042_flush:71!
+EHCI init on dev 00:13.2 (regs=0xf7f05020)
+Found 1 lpt ports
+Found 2 serial ports
+AHCI controller at 11.0, iobase f7f03000, irq 11
+EHCI init on dev 00:16.2 (regs=0xf7f06020)
+OHCI init on dev 00:12.0 (regs=0xf7f00000)
+OHCI init on dev 00:13.0 (regs=0xf7f01000)
+OHCI init on dev 00:16.0 (regs=0xf7f02000)
+Searching bootorder for: /pci@i0cf8/usb@12,2/storage@5/*@0/*@0,0
+Searching bootorder for: /pci@i0cf8/usb@12,2/usb-*@5
+USB MSC vendor='JetFlash' product='TS4GJF2A/120' rev='0.00' type=0 removable=1
+USB MSC blksize=512 sectors=8028160
+Searching bootorder for: /pci@i0cf8/usb@16,2/storage@1/*@0/*@0,0
+Searching bootorder for: /pci@i0cf8/usb@16,2/usb-*@1
+USB MSC vendor='Multiple' product='Card Reader' rev='1.00' type=0 removable=1
+Device reports MEDIUM NOT PRESENT
+scsi_is_ready returned -1
+Unable to configure USB MSC drive.
+Unable to configure USB MSC device.
+All threads complete.
+Scan for option roms
+
+Press ESC for boot menu.
+
+Searching bootorder for: HALT
+drive 0x000f0560: PCHS=0/0/0 translation=lba LCHS=995/128/63 s=8028160
+Space available for UMB: c0000-ee800, f0000-f0560
+Returned 253952 bytes of ZoneHigh
+e820 map has 7 items:
+ 0: 0000000000000000 - 000000000009fc00 = 1 RAM
+ 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
+ 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
+ 3: 0000000000100000 - 00000000dfc54000 = 1 RAM
+ 4: 00000000dfc54000 - 00000000e0000000 = 2 RESERVED
+ 5: 00000000f8000000 - 00000000fc000000 = 2 RESERVED
+ 6: 0000000100000000 - 000000011f000000 = 1 RAM
+enter handle_19:
+ NULL
+Booting from Hard Disk...
+Booting from 0000:7c00
+