blob: 7a5f2265667f4b7cbeba7660db42793361223c4e [file] [log] [blame]
Manufacturing Mode : YES
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Initializing
ME: Current Operation State : Bring up
ME: Current Operation Mode : Debug or Disabled by AltDisableBit
ME: Error Code : No Error
ME: Progress Phase : BUP Phase
ME: Power Management Event : Pseudo-global reset
ME: Progress Phase State : Check to see if straps say ME DISABLED
ME: Wrong mode : 2
ME: FWS2: 0x160a0140
ME: Bist in progress: 0x0
ME: ICC Status : 0x0
ME: Invoke MEBx : 0x0
ME: CPU replaced : 0x0
ME: MBP ready : 0x0
ME: MFS failure : 0x1
ME: Warm reset req : 0x0
ME: CPU repl valid : 0x1
ME: (Reserved) : 0x0
ME: FW update req : 0x0
ME: (Reserved) : 0x0
ME: Current state : 0xa
ME: Current PM event: 0x6
ME: Progress code : 0x1
PASSED! Tell ME that DRAM is ready
ME: ME is reporting as disabled, so not waiting for a response.
ME: FWS2: 0x160a0140
ME: Bist in progress: 0x0
ME: ICC Status : 0x0
ME: Invoke MEBx : 0x0
ME: CPU replaced : 0x0
ME: MBP ready : 0x0
ME: MFS failure : 0x1
ME: Warm reset req : 0x0
ME: CPU repl valid : 0x1
ME: (Reserved) : 0x0
ME: FW update req : 0x0
ME: (Reserved) : 0x0
ME: Current state : 0xa
ME: Current PM event: 0x6
ME: Progress code : 0x1
ME: Requested BIOS Action: No DID Ack received
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : NO
ME: Manufacturing Mode : YES
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Initializing
ME: Current Operation State : Bring up
ME: Current Operation Mode : Debug or Disabled by AltDisableBit
ME: Error Code : No Error
ME: Progress Phase : BUP Phase
ME: Power Management Event : Pseudo-global reset
ME: Progress Phase State : Check to see if straps say ME DISABLED
memcfg DDR3 ref clock 133 MHz
memcfg DDR3 clock 1596 MHz
memcfg channel assignment: A: 0, B 1, C 2
memcfg channel[0] config (00620020):
ECC inactive
enhanced interleave mode on
rank interleave on
DIMMA 8192 MB width x8 dual rank, selected
DIMMB 0 MB width x8 single rank
memcfg channel[1] config (00620020):
ECC inactive
enhanced interleave mode on
rank interleave on
DIMMA 8192 MB width x8 dual rank, selected
DIMMB 0 MB width x8 single rank
CBMEM:
IMD: root @ 7ffff000 254 entries.
IMD: root @ 7fffec00 62 entries.
CBMEM entry for DIMM info: 0x7fffe880
POST: 0x3b
POST: 0x3c
POST: 0x3d
TPM initialization.
TPM: Init
Found TPM SLB9635 TT 1.2 by Infineon
TPM: Open
TPM: Startup
TPM: command 0x99 returned 0x0
TPM: OK.
POST: 0x3f
MTRR Range: Start=ff000000 End=0 (Size 1000000)
MTRR Range: Start=0 End=1000000 (Size 1000000)
MTRR Range: Start=7f800000 End=80000000 (Size 800000)
MTRR Range: Start=80000000 End=80800000 (Size 800000)
CBFS: 'Master Header Locator' located CBFS at [40000:ffffc0)
CBFS: Locating 'fallback/ramstage'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 162a4
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 163c0
CBFS: File @ offset 163c0 size 5800
CBFS: Unmatched 'cpu_microcode_blob.bin' at 163c0
CBFS: Checking offset 1bc40
CBFS: File @ offset 1bc40 size 17c8e
CBFS: Found @ offset 1bc40 size 17c8e
Decompressing stage fallback/ramstage @ 0x7ff91fc0 (285040 bytes)
Loading module at 7ff92000 with entry 7ff92000. filesize: 0x33330 memsize: 0x45930
Processing 3154 relocs. Offset value of 0x7fe92000
coreboot-4.7-444-gc8f3984239 Sun Mar 18 13:24:26 UTC 2018 ramstage starting...
POST: 0x39
Capability: type 0x01 @ 0x50
Capability: type 0x01 @ 0x50
Capability: type 0x0a @ 0x58
usbdebug: Failed hardware init
POST: 0x80
Normal boot.
POST: 0x70
BS: BS_PRE_DEVICE times (us): entry 0 run 3 exit 0
POST: 0x71
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 4 exit 0
POST: 0x72
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:16.0: enabled 0
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 0
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 0
PNP: 0c31.0: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
Compare with tree...
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:16.0: enabled 0
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 0
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 0
PNP: 0c31.0: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
Root Device scanning...
root_dev_scan_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [8086/0154] ops
PCI: 00:00.0 [8086/0154] enabled
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
PCI: 00:01.0 subordinate bus PCI Express
PCI: 00:01.0 [8086/0151] disabled
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/0166] enabled
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3930
memalign 7ffd3930
PCI: 00:04.0 [8086/0153] enabled
PCI: 00:14.0 [8086/0000] ops
PCI: 00:14.0 [8086/1e31] enabled
PCI: 00:16.0: Disabling device
PCI: 00:16.0 [8086/1e3a] ops
PCI: 00:16.0 [8086/1e3a] disabled
PCI: 00:16.1: Disabling device
PCI: 00:16.2: Disabling device
PCI: 00:16.3: Disabling device
PCI: 00:19.0 [8086/1502] enabled
PCI: 00:1a.0 [8086/0000] ops
PCI: 00:1a.0 [8086/1e2d] enabled
PCI: 00:1b.0 [8086/0000] ops
PCI: 00:1b.0 [8086/1e20] enabled
PCH: PCIe Root Port coalescing is enabled
PCI: 00:1c.0 [8086/0000] bus ops
PCI: 00:1c.0 [8086/1e10] enabled
PCI: 00:1c.1: Disabling device
PCH: Remap PCIe function 2 to 1
PCI: 00:1c.2 [8086/0000] bus ops
PCI: 00:1c.2 [8086/1e14] enabled
PCH: Remap PCIe function 3 to 1
PCI: 00:1c.3 [8086/0000] bus ops
PCI: 00:1c.3 [8086/1e16] enabled
PCI: 00:1c.4: Disabling device
PCI: 00:1c.4: check set enabled
PCI: 00:1c.5: Disabling device
PCI: 00:1c.6: Disabling device
PCI: 00:1c.7: Disabling device
PCH: RPFN 0x76543210 -> 0xfedc21b0
PCH: PCIe map 1c.1 -> 1c.3
PCH: PCIe map 1c.2 -> 1c.1
PCH: PCIe map 1c.3 -> 1c.2
PCI: 00:1d.0 [8086/0000] ops
PCI: 00:1d.0 [8086/1e26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1e.0 [8086/2448] bus ops
PCI: 00:1e.0 [8086/2448] disabled
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/1e55] enabled
PCI: 00:1f.2 [8086/0000] ops
CBFS: 'Master Header Locator' located CBFS at [40000:ffffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 162a4
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 163c0
CBFS: File @ offset 163c0 size 5800
CBFS: Unmatched 'cpu_microcode_blob.bin' at 163c0
CBFS: Checking offset 1bc40
CBFS: File @ offset 1bc40 size 17c8e
CBFS: Unmatched 'fallback/ramstage' at 1bc40
CBFS: Checking offset 33940
CBFS: File @ offset 33940 size 6c00
CBFS: Unmatched 'vgaroms/seavgabios.bin' at 33940
CBFS: Checking offset 3a5c0
CBFS: File @ offset 3a5c0 size 46e
CBFS: Unmatched 'config' at 3a5c0
CBFS: Checking offset 3aa80
CBFS: File @ offset 3aa80 size 23f
CBFS: Unmatched 'revision' at 3aa80
CBFS: Checking offset 3ad00
CBFS: File @ offset 3ad00 size 100
CBFS: Unmatched 'cmos.default' at 3ad00
CBFS: Checking offset 3ae40
CBFS: File @ offset 3ae40 size 4ac
CBFS: Found @ offset 3ae40 size 4ac
PCI: 00:1f.2 [8086/1e01] enabled
PCI: 00:1f.3 [8086/0000] bus ops
PCI: 00:1f.3 [8086/1e22] enabled
PCI: 00:1f.5: Disabling device
PCI: 00:1f.6: Disabling device
PCI: 00:1f.6 [8086/1e24] disabled No operations
POST: 0x25
PCI: 00:1c.0 scanning...
do_pci_scan_bridge for PCI: 00:1c.0
memalign Enter, boundary 8, size 36, free_mem_ptr 7ffd39c8
memalign 7ffd39c8
PCI: pci_scan_bus for bus 01
POST: 0x24
POST: 0x25
POST: 0x55
scan_bus: scanning of bus PCI: 00:1c.0 took 69 usecs
PCI: 00:1c.1 scanning...
do_pci_scan_bridge for PCI: 00:1c.1
memalign Enter, boundary 8, size 36, free_mem_ptr 7ffd39ec
memalign 7ffd39f0
PCI: pci_scan_bus for bus 02
POST: 0x24
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3a14
memalign 7ffd3a18
PCI: 02:00.0 [197b/2392] enabled
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3ab0
memalign 7ffd3ab0
PCI: 02:00.2 [197b/2391] enabled
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3b48
memalign 7ffd3b48
PCI: 02:00.3 [197b/2393] enabled
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3be0
memalign 7ffd3be0
PCI: 02:00.4 [197b/2394] enabled
POST: 0x25
POST: 0x55
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Failed to enable LTR for dev = PCI: 02:00.0
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Failed to enable LTR for dev = PCI: 02:00.2
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Failed to enable LTR for dev = PCI: 02:00.3
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Failed to enable LTR for dev = PCI: 02:00.4
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3c78
memalign 7ffd3c78
scan_bus: scanning of bus PCI: 00:1c.1 took 842 usecs
PCI: 00:1c.2 scanning...
do_pci_scan_bridge for PCI: 00:1c.2
memalign Enter, boundary 8, size 36, free_mem_ptr 7ffd3d10
memalign 7ffd3d10
PCI: pci_scan_bus for bus 03
POST: 0x24
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3d34
memalign 7ffd3d38
PCI: 03:00.0 [168c/0030] enabled
POST: 0x25
POST: 0x55
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled L0s and L1
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Failed to enable LTR for dev = PCI: 03:00.0
scan_bus: scanning of bus PCI: 00:1c.2 took 278 usecs
PCI: 00:1f.0 scanning...
scan_lpc_bus for PCI: 00:1f.0
KBC1126: initialize fan control.KBC1126: fan control initialized.
PNP: 00ff.1 disabled
memalign Enter, boundary 8, size 2560, free_mem_ptr 7ffd3dd0
memalign 7ffd3dd0
PNP: 0c31.0 enabled
scan_lpc_bus for PCI: 00:1f.0 done
scan_bus: scanning of bus PCI: 00:1f.0 took 7874 usecs
PCI: 00:1f.3 scanning...
scan_generic_bus for PCI: 00:1f.3
scan_generic_bus for PCI: 00:1f.3 done
scan_bus: scanning of bus PCI: 00:1f.3 took 10 usecs
POST: 0x55
scan_bus: scanning of bus DOMAIN: 0000 took 9659 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 9679 usecs
done
FMAP: Found "FLASH" version 1.1 at 20000.
FMAP: base = ff000000 size = 1000000 #areas = 4
FMAP: area RW_MRC_CACHE found @ 30000 (65536 bytes)
MRC: No data in cbmem for 'RW_MRC_CACHE'.
BS: BS_DEV_ENUMERATE times (us): entry 0 run 9892 exit 45
POST: 0x73
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
More than one caller of pci_ehci_read_resources from PCI: 00:1a.0
PCI: 00:1c.0 read_resources bus 1 link: 0
PCI: 00:1c.0 read_resources bus 1 link: 0 done
PCI: 00:1c.1 read_resources bus 2 link: 0
PCI: 00:1c.1 read_resources bus 2 link: 0 done
PCI: 00:1c.2 read_resources bus 3 link: 0
PCI: 00:1c.2 read_resources bus 3 link: 0 done
PCI: 00:1d.0 EHCI BAR hook registered
PCI: 00:1f.0 read_resources bus 0 link: 0
PCI: 00:1f.0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: acac
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
PCI: 00:01.0
PCI: 00:02.0
PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
PCI: 00:04.0
PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
PCI: 00:16.0
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:19.0
PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
PCI: 00:1a.0
PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
PCI: 00:1b.0
PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
PCI: 00:1c.0
PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:1c.3
PCI: 00:1c.1 child on link 0 PCI: 02:00.0
PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
PCI: 02:00.2
PCI: 02:00.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 02:00.3
PCI: 02:00.3 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 02:00.4
PCI: 02:00.4 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
NONE
NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10
NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14
NONE resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18
PCI: 00:1c.2 child on link 0 PCI: 03:00.0
PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 03:00.0
PCI: 03:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
PCI: 00:1c.4
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.7
PCI: 00:1d.0
PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
PCI: 00:1e.0
PCI: 00:1f.0 child on link 0 PNP: 00ff.1
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PCI: 00:1f.0 resource base fe00 size fc align 0 gran 0 limit 0 flags c0040100 index 10000200
PNP: 00ff.1
PNP: 0c31.0
PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0
PCI: 00:1f.2
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
PCI: 00:1f.3
PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
PCI: 00:1f.5
PCI: 00:1f.6
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
NONE 18 * [0x0 - 0xfff] io
PCI: 00:1c.1 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 1c * [0x0 - 0xfff] io
PCI: 00:02.0 20 * [0x1000 - 0x103f] io
PCI: 00:19.0 18 * [0x1040 - 0x105f] io
PCI: 00:1f.2 20 * [0x1060 - 0x107f] io
PCI: 00:1f.2 10 * [0x1080 - 0x1087] io
PCI: 00:1f.2 18 * [0x1088 - 0x108f] io
PCI: 00:1f.2 14 * [0x1090 - 0x1093] io
PCI: 00:1f.2 1c * [0x1094 - 0x1097] io
DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
NONE 14 * [0x0 - 0x7fffff] prefmem
PCI: 00:1c.1 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
NONE 10 * [0x0 - 0x7fffff] mem
PCI: 02:00.0 30 * [0x800000 - 0x80ffff] mem
PCI: 02:00.0 10 * [0x810000 - 0x8100ff] mem
PCI: 02:00.2 10 * [0x811000 - 0x8110ff] mem
PCI: 02:00.3 10 * [0x812000 - 0x8120ff] mem
PCI: 02:00.4 10 * [0x813000 - 0x8130ff] mem
PCI: 00:1c.1 mem: base: 813100 size: 900000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 03:00.0 10 * [0x0 - 0x1ffff] mem
PCI: 03:00.0 30 * [0x20000 - 0x2ffff] mem
PCI: 00:1c.2 mem: base: 30000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
PCI: 00:1c.1 20 * [0x10000000 - 0x108fffff] mem
PCI: 00:1c.1 24 * [0x10c00000 - 0x113fffff] prefmem
PCI: 00:02.0 10 * [0x11400000 - 0x117fffff] mem
PCI: 00:1c.2 20 * [0x11800000 - 0x118fffff] mem
PCI: 00:19.0 10 * [0x11900000 - 0x1191ffff] mem
PCI: 00:14.0 10 * [0x11920000 - 0x1192ffff] mem
PCI: 00:04.0 10 * [0x11930000 - 0x11937fff] mem
PCI: 00:1b.0 10 * [0x11938000 - 0x1193bfff] mem
PCI: 00:19.0 14 * [0x1193c000 - 0x1193cfff] mem
PCI: 00:1f.2 24 * [0x1193d000 - 0x1193d7ff] mem
PCI: 00:1a.0 10 * [0x1193e000 - 0x1193e3ff] mem
PCI: 00:1d.0 10 * [0x1193f000 - 0x1193f3ff] mem
PCI: 00:1f.3 10 * [0x11940000 - 0x119400ff] mem
DOMAIN: 0000 mem: base: 11940100 size: 11940100 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:1f.0 10000200 base 0000fe00 limit 0000fefb io (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000fdff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base d0000000 limit efffffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:1098 align:12 gran:0 limit:fdff
PCI: 00:1c.1 1c * [0x1000 - 0x1fff] io
PCI: 00:02.0 20 * [0x2000 - 0x203f] io
PCI: 00:19.0 18 * [0x2040 - 0x205f] io
PCI: 00:1f.2 20 * [0x2060 - 0x207f] io
PCI: 00:1f.2 10 * [0x2080 - 0x2087] io
PCI: 00:1f.2 18 * [0x2088 - 0x208f] io
PCI: 00:1f.2 14 * [0x2090 - 0x2093] io
PCI: 00:1f.2 1c * [0x2094 - 0x2097] io
DOMAIN: 0000 io: next_base: 2098 size: 1098 align: 12 gran: 0 done
PCI: 00:1c.0 io: base:fdff size:0 align:12 gran:12 limit:fdff
PCI: 00:1c.0 io: next_base: fdff size: 0 align: 12 gran: 12 done
PCI: 00:1c.1 io: base:1000 size:1000 align:12 gran:12 limit:1fff
NONE 18 * [0x1000 - 0x1fff] io
PCI: 00:1c.1 io: next_base: 2000 size: 1000 align: 12 gran: 12 done
PCI: 00:1c.2 io: base:fdff size:0 align:12 gran:12 limit:fdff
PCI: 00:1c.2 io: next_base: fdff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:d0000000 size:11940100 align:28 gran:0 limit:efffffff
PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem
PCI: 00:1c.1 20 * [0xe0000000 - 0xe08fffff] mem
PCI: 00:1c.1 24 * [0xe0c00000 - 0xe13fffff] prefmem
PCI: 00:02.0 10 * [0xe1400000 - 0xe17fffff] mem
PCI: 00:1c.2 20 * [0xe1800000 - 0xe18fffff] mem
PCI: 00:19.0 10 * [0xe1900000 - 0xe191ffff] mem
PCI: 00:14.0 10 * [0xe1920000 - 0xe192ffff] mem
PCI: 00:04.0 10 * [0xe1930000 - 0xe1937fff] mem
PCI: 00:1b.0 10 * [0xe1938000 - 0xe193bfff] mem
PCI: 00:19.0 14 * [0xe193c000 - 0xe193cfff] mem
PCI: 00:1f.2 24 * [0xe193d000 - 0xe193d7ff] mem
PCI: 00:1a.0 10 * [0xe193e000 - 0xe193e3ff] mem
PCI: 00:1d.0 10 * [0xe193f000 - 0xe193f3ff] mem
PCI: 00:1f.3 10 * [0xe1940000 - 0xe19400ff] mem
DOMAIN: 0000 mem: next_base: e1940100 size: 11940100 align: 28 gran: 0 done
PCI: 00:1c.0 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:1c.0 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:1c.0 mem: next_base: efffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.1 prefmem: base:e0c00000 size:800000 align:22 gran:20 limit:e13fffff
NONE 14 * [0xe0c00000 - 0xe13fffff] prefmem
PCI: 00:1c.1 prefmem: next_base: e1400000 size: 800000 align: 22 gran: 20 done
PCI: 00:1c.1 mem: base:e0000000 size:900000 align:22 gran:20 limit:e08fffff
NONE 10 * [0xe0000000 - 0xe07fffff] mem
PCI: 02:00.0 30 * [0xe0800000 - 0xe080ffff] mem
PCI: 02:00.0 10 * [0xe0810000 - 0xe08100ff] mem
PCI: 02:00.2 10 * [0xe0811000 - 0xe08110ff] mem
PCI: 02:00.3 10 * [0xe0812000 - 0xe08120ff] mem
PCI: 02:00.4 10 * [0xe0813000 - 0xe08130ff] mem
PCI: 00:1c.1 mem: next_base: e0813100 size: 900000 align: 22 gran: 20 done
PCI: 00:1c.2 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:1c.2 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.2 mem: base:e1800000 size:100000 align:20 gran:20 limit:e18fffff
PCI: 03:00.0 10 * [0xe1800000 - 0xe181ffff] mem
PCI: 03:00.0 30 * [0xe1820000 - 0xe182ffff] mem
PCI: 00:1c.2 mem: next_base: e1830000 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
TOUUD 0x47d600000 TOLUD 0x82a00000 TOM 0x400000000
MEBASE 0x7ffff00000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0x80000000 size 8M
Available memory below 4GB: 2048M
Available memory above 4GB: 14294M
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:02.0 10 <- [0x00e1400000 - 0x00e17fffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000002000 - 0x000000203f] size 0x00000040 gran 0x06 io
PCI: 00:04.0 10 <- [0x00e1930000 - 0x00e1937fff] size 0x00008000 gran 0x0f mem64
PCI: 00:14.0 10 <- [0x00e1920000 - 0x00e192ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:19.0 10 <- [0x00e1900000 - 0x00e191ffff] size 0x00020000 gran 0x11 mem
PCI: 00:19.0 14 <- [0x00e193c000 - 0x00e193cfff] size 0x00001000 gran 0x0c mem
PCI: 00:19.0 18 <- [0x0000002040 - 0x000000205f] size 0x00000020 gran 0x05 io
PCI: 00:1a.0 10 <- [0x00e193e000 - 0x00e193e3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x00e1938000 - 0x00e193bfff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:1c.1 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 02 io
PCI: 00:1c.1 24 <- [0x00e0c00000 - 0x00e13fffff] size 0x00800000 gran 0x14 bus 02 prefmem
PCI: 00:1c.1 20 <- [0x00e0000000 - 0x00e08fffff] size 0x00900000 gran 0x14 bus 02 mem
PCI: 00:1c.1 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x00e0810000 - 0x00e08100ff] size 0x00000100 gran 0x08 mem
PCI: 02:00.0 30 <- [0x00e0800000 - 0x00e080ffff] size 0x00010000 gran 0x10 romem
PCI: 02:00.2 10 <- [0x00e0811000 - 0x00e08110ff] size 0x00000100 gran 0x08 mem
PCI: 02:00.3 10 <- [0x00e0812000 - 0x00e08120ff] size 0x00000100 gran 0x08 mem
PCI: 02:00.4 10 <- [0x00e0813000 - 0x00e08130ff] size 0x00000100 gran 0x08 mem
NONE missing set_resources
PCI: 00:1c.1 assign_resources, bus 2 link: 0
PCI: 00:1c.2 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:1c.2 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:1c.2 20 <- [0x00e1800000 - 0x00e18fffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 00:1c.2 assign_resources, bus 3 link: 0
PCI: 03:00.0 10 <- [0x00e1800000 - 0x00e181ffff] size 0x00020000 gran 0x11 mem64
PCI: 03:00.0 30 <- [0x00e1820000 - 0x00e182ffff] size 0x00010000 gran 0x10 romem
PCI: 00:1c.2 assign_resources, bus 3 link: 0
PCI: 00:1d.0 EHCI Debug Port hook triggered
PCI: 00:1d.0 10 <- [0x00e193f000 - 0x00e193f3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1d.0 10 <- [0x00e193f000 - 0x00e193f3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1d.0 EHCI Debug Port relocated
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x0000002080 - 0x0000002087] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000002090 - 0x0000002093] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000002088 - 0x000000208f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000002094 - 0x0000002097] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000002060 - 0x000000207f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00e193d000 - 0x00e193d7ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x00e1940000 - 0x00e19400ff] size 0x00000100 gran 0x08 mem64
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: acac
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 1000 size 1098 align 12 gran 0 limit fdff flags 40040100 index 10000000
DOMAIN: 0000 resource base d0000000 size 11940100 align 28 gran 0 limit efffffff flags 40040200 index 10000100
DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
DOMAIN: 0000 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4
DOMAIN: 0000 resource base 100000000 size 37d600000 align 0 gran 0 limit 0 flags e0004200 index 5
DOMAIN: 0000 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8
DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
PCI: 00:00.0
PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
PCI: 00:01.0
PCI: 00:02.0
PCI: 00:02.0 resource base e1400000 size 400000 align 22 gran 22 limit e17fffff flags 60000201 index 10
PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 18
PCI: 00:02.0 resource base 2000 size 40 align 6 gran 6 limit 203f flags 60000100 index 20
PCI: 00:04.0
PCI: 00:04.0 resource base e1930000 size 8000 align 15 gran 15 limit e1937fff flags 60000201 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base e1920000 size 10000 align 16 gran 16 limit e192ffff flags 60000201 index 10
PCI: 00:16.0
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:19.0
PCI: 00:19.0 resource base e1900000 size 20000 align 17 gran 17 limit e191ffff flags 60000200 index 10
PCI: 00:19.0 resource base e193c000 size 1000 align 12 gran 12 limit e193cfff flags 60000200 index 14
PCI: 00:19.0 resource base 2040 size 20 align 5 gran 5 limit 205f flags 60000100 index 18
PCI: 00:1a.0
PCI: 00:1a.0 resource base e193e000 size 400 align 12 gran 10 limit e193e3ff flags 60000200 index 10
PCI: 00:1b.0
PCI: 00:1b.0 resource base e1938000 size 4000 align 14 gran 14 limit e193bfff flags 60000201 index 10
PCI: 00:1c.0
PCI: 00:1c.0 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c
PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20
PCI: 00:1c.3
PCI: 00:1c.1 child on link 0 PCI: 02:00.0
PCI: 00:1c.1 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
PCI: 00:1c.1 resource base e0c00000 size 800000 align 22 gran 20 limit e13fffff flags 60081202 index 24
PCI: 00:1c.1 resource base e0000000 size 900000 align 22 gran 20 limit e08fffff flags 60080202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base e0810000 size 100 align 12 gran 8 limit e08100ff flags 60000200 index 10
PCI: 02:00.0 resource base e0800000 size 10000 align 16 gran 16 limit e080ffff flags 60002200 index 30
PCI: 02:00.2
PCI: 02:00.2 resource base e0811000 size 100 align 12 gran 8 limit e08110ff flags 60000200 index 10
PCI: 02:00.3
PCI: 02:00.3 resource base e0812000 size 100 align 12 gran 8 limit e08120ff flags 60000200 index 10
PCI: 02:00.4
PCI: 02:00.4 resource base e0813000 size 100 align 12 gran 8 limit e08130ff flags 60000200 index 10
NONE
NONE resource base e0000000 size 800000 align 22 gran 22 limit e07fffff flags 40000200 index 10
NONE resource base e0c00000 size 800000 align 22 gran 22 limit e13fffff flags 40001200 index 14
NONE resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 40000100 index 18
PCI: 00:1c.2 child on link 0 PCI: 03:00.0
PCI: 00:1c.2 resource base fdff size 0 align 12 gran 12 limit fdff flags 60080102 index 1c
PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
PCI: 00:1c.2 resource base e1800000 size 100000 align 20 gran 20 limit e18fffff flags 60080202 index 20
PCI: 03:00.0
PCI: 03:00.0 resource base e1800000 size 20000 align 17 gran 17 limit e181ffff flags 60000201 index 10
PCI: 03:00.0 resource base e1820000 size 10000 align 16 gran 16 limit e182ffff flags 60002200 index 30
PCI: 00:1c.4
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.7
PCI: 00:1d.0
PCI: 00:1d.0 resource base e193f000 size 400 align 12 gran 10 limit e193f3ff flags 60000200 index 10
PCI: 00:1e.0
PCI: 00:1f.0 child on link 0 PNP: 00ff.1
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PCI: 00:1f.0 resource base fe00 size fc align 0 gran 0 limit 0 flags c0040100 index 10000200
PNP: 00ff.1
PNP: 0c31.0
PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0
PCI: 00:1f.2
PCI: 00:1f.2 resource base 2080 size 8 align 3 gran 3 limit 2087 flags 60000100 index 10
PCI: 00:1f.2 resource base 2090 size 4 align 2 gran 2 limit 2093 flags 60000100 index 14
PCI: 00:1f.2 resource base 2088 size 8 align 3 gran 3 limit 208f flags 60000100 index 18
PCI: 00:1f.2 resource base 2094 size 4 align 2 gran 2 limit 2097 flags 60000100 index 1c
PCI: 00:1f.2 resource base 2060 size 20 align 5 gran 5 limit 207f flags 60000100 index 20
PCI: 00:1f.2 resource base e193d000 size 800 align 12 gran 11 limit e193d7ff flags 60000200 index 24
PCI: 00:1f.3
PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
PCI: 00:1f.3 resource base e1940000 size 100 align 12 gran 8 limit e19400ff flags 60000201 index 10
PCI: 00:1f.5
PCI: 00:1f.6
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 4045 exit 0
POST: 0x74
Enabling resources...
PCI: 00:00.0 subsystem <- 103c/18df
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 103c/18df
PCI: 00:02.0 cmd <- 03
PCI: 00:04.0 cmd <- 02
PCI: 00:14.0 subsystem <- 103c/18df
PCI: 00:14.0 cmd <- 102
PCI: 00:19.0 subsystem <- 103c/18df
PCI: 00:19.0 cmd <- 103
PCI: 00:1a.0 subsystem <- 103c/18df
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 103c/18df
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 103c/18df
PCI: 00:1c.0 cmd <- 100
PCI: 00:1c.1 bridge ctrl <- 0003
PCI: 00:1c.1 subsystem <- 103c/18df
PCI: 00:1c.1 cmd <- 107
PCI: 00:1c.2 bridge ctrl <- 0003
PCI: 00:1c.2 subsystem <- 103c/18df
PCI: 00:1c.2 cmd <- 106
PCI: 00:1d.0 subsystem <- 103c/18df
PCI: 00:1d.0 cmd <- 106
pch_decode_init
PCI: 00:1f.0 subsystem <- 103c/18df
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 103c/18df
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 103c/18df
PCI: 00:1f.3 cmd <- 103
PCI: 02:00.0 cmd <- 06
PCI: 02:00.2 cmd <- 06
PCI: 02:00.3 cmd <- 06
PCI: 02:00.4 cmd <- 06
PCI: 03:00.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 201 exit 0
read 6000 from 07e4
wrote 00000004 to 0890
read 03040003 from 0894
read 00000000 from 0880
wrote 00000000 to 0880
POST: 0x75
Initializing devices...
Root Device init ...
Root Device init finished in 2 usecs
POST: 0x75
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Setting up SMI for CPU
Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
Processing 12 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 00038000. Will call 7ffad20e(7ffd38a0)
Installing SMM handler to 0x80000000
Loading module at 80010000 with entry 80011591. filesize: 0x3618 memsize: 0x7640
Processing 213 relocs. Offset value of 0x80010000
Loading module at 80008000 with entry 80008000. filesize: 0x1a8 memsize: 0x1a8
Processing 12 relocs. Offset value of 0x80008000
SMM Module: placing jmp sequence at 80007c00 rel16 0x03fd
SMM Module: placing jmp sequence at 80007800 rel16 0x07fd
SMM Module: placing jmp sequence at 80007400 rel16 0x0bfd
SMM Module: stub loaded at 80008000. Will call 80011591(00000000)
Initializing southbridge SMI... ... pmbase = 0x0500
SMI_STS: TCO MCSMI PM1
PM1_STS: TMROF
GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO10 GPIO9 GPIO8 GPIO7 GPIO6 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 EL_SCI/BATLOW TCO_SCI
ALT_GP_SMI_STS: GPI15 GPI14 GPI11 GPI10 GPI9 GPI8 GPI7 GPI6 GPI4 GPI3 GPI2 GPI1 GPI0
TCO_STS: TIMEOUT
In relocation handler: cpu 0
New SMBASE=0x80000000 IEDBASE=0x80400000 @ 0003fc00
Writing SMRR. base = 0x80000006, mask=0xff800800
... raise SMI#
Relocation complete.
Locking SMM.
Initializing CPU #0
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
POST: 0x60
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [40000:ffffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 162a4
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 163c0
CBFS: File @ offset 163c0 size 5800
CBFS: Found @ offset 163c0 size 5800
microcode: sig=0x306a9 pf=0x10 revision=0x1b
CPU: Intel(R) Core(TM) i5-3437U CPU @ 1.90GHz.
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd47d0
memalign 7ffd47d0
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd47e8
memalign 7ffd47e8
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4800
memalign 7ffd4800
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4818
memalign 7ffd4818
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4830
memalign 7ffd4830
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4848
memalign 7ffd4848
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4860
memalign 7ffd4860
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4878
memalign 7ffd4878
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4890
memalign 7ffd4890
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd48a8
memalign 7ffd48a8
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd48c0
memalign 7ffd48c0
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd48d8
memalign 7ffd48d8
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd48f0
memalign 7ffd48f0
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4908
memalign 7ffd4908
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4920
memalign 7ffd4920
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4938
memalign 7ffd4938
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4950
memalign 7ffd4950
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4968
memalign 7ffd4968
memalign Enter, boundary 8, size 24, free_mem_ptr 7ffd4980
memalign 7ffd4980
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6
0x0000000080000000 - 0x00000000d0000000 size 0x50000000 type 0
0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
0x0000000100000000 - 0x000000047d600000 size 0x37d600000 type 6
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 4/8.
MTRR: WB selected as default type.
MTRR: 0 base 0x0000000080000000 mask 0x0000000fc0000000 type 0
MTRR: 1 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0
MTRR: 2 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
MTRR: 3 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
Setting up local APIC... apic_id: 0x00 done.
VMX is locked, so set_vmx will do nothing
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 1900
Turbo is available but hidden
Turbo has been enabled
CPU: 0 has 2 cores, 2 threads per core
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd4998
memalign 7ffd4998
CPU: 0 has core 1
CPU1: stack_base 7ffcc000, stack_end 7ffccff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
In relocation handler: cpu 1
New SMBASE=0x7ffffc00 IEDBASE=0x80400000 @ 0003fc00
Writing SMRR. base = 0x80000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd4a30
CPU: vendor Intel device 306a9
memalign 7ffd4a30
CPU: family 06, model 3a, stepping 09
CPU: 0 has core 2
POST: 0x60
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [40000:ffffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 162a4
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 163c0
CBFS: File @ offset 163c0 size 5800
CBFS: Found @ offset 163c0 size 5800
microcode: sig=0x306a9 pf=0x10 revision=0x1b
CPU: Intel(R) Core(TM) i5-3437U CPU @ 1.90GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
Setting up local APIC... apic_id: 0x01 done.
VMX is locked, so set_vmx will do nothing
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 1900
CPU #1 initialized
CPU2: stack_base 7ffcb000, stack_end 7ffcbff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 2.
After apic_write.
In relocation handler: cpu 2
Startup point 1.
Waiting for send to finish...
+New SMBASE=0x7ffff800 IEDBASE=0x80400000 @ 0003fc00
Sending STARTUP #2 to 2.
After apic_write.
Writing SMRR. base = 0x80000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+After Startup.
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd4ac8
memalign 7ffd4ac8
CPU: 0 has core 3
Initializing CPU #2
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
POST: 0x60
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [40000:ffffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 162a4
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 163c0
CBFS: File @ offset 163c0 size 5800
CBFS: Found @ offset 163c0 size 5800
microcode: sig=0x306a9 pf=0x10 revision=0x0
microcode: updated to revision 0x1b date=2014-05-29
CPU: Intel(R) Core(TM) i5-3437U CPU @ 1.90GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
Setting up local APIC... apic_id: 0x02 done.
VMX is locked, so set_vmx will do nothing
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 1900
CPU #2 initialized
CPU3: stack_base 7ffca000, stack_end 7ffcaff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 3.
After apic_write.
In relocation handler: cpu 3
New SMBASE=0x7ffff400 IEDBASE=0x80400000 @ 0003fc00
Writing SMRR. base = 0x80000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU #0 initialized
Waiting for 1 CPUS to stop
Initializing CPU #3
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
POST: 0x60
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [40000:ffffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 162a4
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 163c0
CBFS: File @ offset 163c0 size 5800
CBFS: Found @ offset 163c0 size 5800
microcode: sig=0x306a9 pf=0x10 revision=0x1b
CPU: Intel(R) Core(TM) i5-3437U CPU @ 1.90GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
*** Pre-CBMEM romstage console overflowed, log truncated! ***
6cd01860
SRFTP [46a4] = 41f88200
Done dimm mapping
Update PCI-E configuration space:
PCI(0, 0, 0)[a0] = 0
PCI(0, 0, 0)[a4] = 4
PCI(0, 0, 0)[bc] = 82a00000
PCI(0, 0, 0)[a8] = 7d600000
PCI(0, 0, 0)[ac] = 4
PCI(0, 0, 0)[b8] = 80000000
PCI(0, 0, 0)[b0] = 80a00000
PCI(0, 0, 0)[b4] = 80800000
Done memory map
RCOMP...done
COMP2 done
COMP1 done
FORCE RCOMP and wait 20us...done
Done io registers
CPE
CP5b
CP5c
OTHP [400c] = 8b4
OTHP [440c] = 8b4
t123: 1767, 6000, 7620
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : NO
ME: Manufacturing Mode : YES
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Initializing
ME: Current Operation State : Bring up
ME: Current Operation Mode : Debug or Disabled by AltDisableBit
ME: Error Code : No Error
ME: Progress Phase : BUP Phase
ME: Power Management Event : Pseudo-global reset
ME: Progress Phase State : Check to see if straps say ME DISABLED
ME: Wrong mode : 2
ME: FWS2: 0x160a0140
ME: Bist in progress: 0x0
ME: ICC Status : 0x0
ME: Invoke MEBx : 0x0
ME: CPU replaced : 0x0
ME: MBP ready : 0x0
ME: MFS failure : 0x1
ME: Warm reset req : 0x0
ME: CPU repl valid : 0x1
ME: (Reserved) : 0x0
ME: FW update req : 0x0
ME: (Reserved) : 0x0
ME: Current state : 0xa
ME: Current PM event: 0x6
ME: Progress code : 0x1
PASSED! Tell ME that DRAM is ready
ME: ME is reporting as disabled, so not waiting for a response.
ME: FWS2: 0x160a0140
ME: Bist in progress: 0x0
ME: ICC Status : 0x0
ME: Invoke MEBx : 0x0
ME: CPU replaced : 0x0
ME: MBP ready : 0x0
ME: MFS failure : 0x1
ME: Warm reset req : 0x0
ME: CPU repl valid : 0x1
ME: (Reserved) : 0x0
ME: FW update req : 0x0
ME: (Reserved) : 0x0
ME: Current state : 0xa
ME: Current PM event: 0x6
ME: Progress code : 0x1
ME: Requested BIOS Action: No DID Ack received
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : NO
ME: Manufacturing Mode : YES
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Initializing
ME: Current Operation State : Bring up
ME: Current Operation Mode : Debug or Disabled by AltDisableBit
ME: Error Code : No Error
ME: Progress Phase : BUP Phase
ME: Power Management Event : Pseudo-global reset
ME: Progress Phase State : Check to see if straps say ME DISABLED
memcfg DDR3 ref clock 133 MHz
memcfg DDR3 clock 1596 MHz
memcfg channel assignment: A: 0, B 1, C 2
memcfg channel[0] config (00620020):
ECC inactive
enhanced interleave mode on
rank interleave on
DIMMA 8192 MB width x8 dual rank, selected
DIMMB 0 MB width x8 single rank
memcfg channel[1] config (00620020):
ECC inactive
enhanced interleave mode on
rank interleave on
DIMMA 8192 MB width x8 dual rank, selected
DIMMB 0 MB width x8 single rank
CBMEM:
IMD: root @ 7ffff000 254 entries.
IMD: root @ 7fffec00 62 entries.
CBMEM entry for DIMM info: 0x7fffe880
POST: 0x3b
POST: 0x3c
POST: 0x3d
TPM initialization.
TPM: Init
Found TPM SLB9635 TT 1.2 by Infineon
TPM: Open
TPM: Startup
TPM: command 0x99 returned 0x0
TPM: OK.
POST: 0x3f
MTRR Range: Start=ff000000 End=0 (Size 1000000)
MTRR Range: Start=0 End=1000000 (Size 1000000)
MTRR Range: Start=7f800000 End=80000000 (Size 800000)
MTRR Range: Start=80000000 End=80800000 (Size 800000)
CBFS: 'Master Header Locator' located CBFS at [40000:ffffc0)
CBFS: Locating 'fallback/ramstage'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 162a4
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 163c0
CBFS: File @ offset 163c0 size 5800
CBFS: Unmatched 'cpu_microcode_blob.bin' at 163c0
CBFS: Checking offset 1bc40
CBFS: File @ offset 1bc40 size 17c8e
CBFS: Found @ offset 1bc40 size 17c8e
Decompressing stage fallback/ramstage @ 0x7ff91fc0 (285040 bytes)
Loading module at 7ff92000 with entry 7ff92000. filesize: 0x33330 memsize: 0x45930
Processing 3154 relocs. Offset value of 0x7fe92000
coreboot-4.7-444-gc8f3984239 Sun Mar 18 13:24:26 UTC 2018 ramstage starting...
POST: 0x39
Capability: type 0x01 @ 0x50
Capability: type 0x01 @ 0x50
Capability: type 0x0a @ 0x58
usbdebug: Failed hardware init
POST: 0x80
Normal boot.
POST: 0x70
BS: BS_PRE_DEVICE times (us): entry 0 run 3 exit 0
POST: 0x71
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 4 exit 0
POST: 0x72
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:16.0: enabled 0
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 0
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 0
PNP: 0c31.0: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
Compare with tree...
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:16.0: enabled 0
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 0
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 0
PNP: 0c31.0: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
Root Device scanning...
root_dev_scan_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [8086/0154] ops
PCI: 00:00.0 [8086/0154] enabled
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
PCI: 00:01.0 subordinate bus PCI Express
PCI: 00:01.0 [8086/0151] disabled
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/0166] enabled
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3930
memalign 7ffd3930
PCI: 00:04.0 [8086/0153] enabled
PCI: 00:14.0 [8086/0000] ops
PCI: 00:14.0 [8086/1e31] enabled
PCI: 00:16.0: Disabling device
PCI: 00:16.0 [8086/1e3a] ops
PCI: 00:16.0 [8086/1e3a] disabled
PCI: 00:16.1: Disabling device
PCI: 00:16.2: Disabling device
PCI: 00:16.3: Disabling device
PCI: 00:19.0 [8086/1502] enabled
PCI: 00:1a.0 [8086/0000] ops
PCI: 00:1a.0 [8086/1e2d] enabled
PCI: 00:1b.0 [8086/0000] ops
PCI: 00:1b.0 [8086/1e20] enabled
PCH: PCIe Root Port coalescing is enabled
PCI: 00:1c.0 [8086/0000] bus ops
PCI: 00:1c.0 [8086/1e10] enabled
PCI: 00:1c.1: Disabling device
PCH: Remap PCIe function 2 to 1
PCI: 00:1c.2 [8086/0000] bus ops
PCI: 00:1c.2 [8086/1e14] enabled
PCH: Remap PCIe function 3 to 1
PCI: 00:1c.3 [8086/0000] bus ops
PCI: 00:1c.3 [8086/1e16] enabled
PCI: 00:1c.4: Disabling device
PCI: 00:1c.4: check set enabled
PCI: 00:1c.5: Disabling device
PCI: 00:1c.6: Disabling device
PCI: 00:1c.7: Disabling device
PCH: RPFN 0x76543210 -> 0xfedc21b0
PCH: PCIe map 1c.1 -> 1c.3
PCH: PCIe map 1c.2 -> 1c.1
PCH: PCIe map 1c.3 -> 1c.2
PCI: 00:1d.0 [8086/0000] ops
PCI: 00:1d.0 [8086/1e26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1e.0 [8086/2448] bus ops
PCI: 00:1e.0 [8086/2448] disabled
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/1e55] enabled
PCI: 00:1f.2 [8086/0000] ops
CBFS: 'Master Header Locator' located CBFS at [40000:ffffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Checking offset 0
CBFS: File @ offset 0 size 20
CBFS: Unmatched 'cbfs master header' at 0
CBFS: Checking offset 80
CBFS: File @ offset 80 size 162a4
CBFS: Unmatched 'fallback/romstage' at 80
CBFS: Checking offset 163c0
CBFS: File @ offset 163c0 size 5800
CBFS: Unmatched 'cpu_microcode_blob.bin' at 163c0
CBFS: Checking offset 1bc40
CBFS: File @ offset 1bc40 size 17c8e
CBFS: Unmatched 'fallback/ramstage' at 1bc40
CBFS: Checking offset 33940
CBFS: File @ offset 33940 size 6c00
CBFS: Unmatched 'vgaroms/seavgabios.bin' at 33940
CBFS: Checking offset 3a5c0
CBFS: File @ offset 3a5c0 size 46e
CBFS: Unmatched 'config' at 3a5c0
CBFS: Checking offset 3aa80
CBFS: File @ offset 3aa80 size 23f
CBFS: Unmatched 'revision' at 3aa80
CBFS: Checking offset 3ad00
CBFS: File @ offset 3ad00 size 100
CBFS: Unmatched 'cmos.default' at 3ad00
CBFS: Checking offset 3ae40
CBFS: File @ offset 3ae40 size 4ac
CBFS: Found @ offset 3ae40 size 4ac
PCI: 00:1f.2 [8086/1e01] enabled
PCI: 00:1f.3 [8086/0000] bus ops
PCI: 00:1f.3 [8086/1e22] enabled
PCI: 00:1f.5: Disabling device
PCI: 00:1f.6: Disabling device
PCI: 00:1f.6 [8086/1e24] disabled No operations
POST: 0x25
PCI: 00:1c.0 scanning...
do_pci_scan_bridge for PCI: 00:1c.0
memalign Enter, boundary 8, size 36, free_mem_ptr 7ffd39c8
memalign 7ffd39c8
PCI: pci_scan_bus for bus 01
POST: 0x24
POST: 0x25
POST: 0x55
scan_bus: scanning of bus PCI: 00:1c.0 took 68 usecs
PCI: 00:1c.1 scanning...
do_pci_scan_bridge for PCI: 00:1c.1
memalign Enter, boundary 8, size 36, free_mem_ptr 7ffd39ec
memalign 7ffd39f0
PCI: pci_scan_bus for bus 02
POST: 0x24
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3a14
memalign 7ffd3a18
PCI: 02:00.0 [197b/2392] enabled
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3ab0
memalign 7ffd3ab0
PCI: 02:00.2 [197b/2391] enabled
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3b48
memalign 7ffd3b48
PCI: 02:00.3 [197b/2393] enabled
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3be0
memalign 7ffd3be0
PCI: 02:00.4 [197b/2394] enabled
POST: 0x25
POST: 0x55
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled None
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Failed to enable LTR for dev = PCI: 02:00.0
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Failed to enable LTR for dev = PCI: 02:00.2
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Failed to enable LTR for dev = PCI: 02:00.3
Capability: type 0x01 @ 0xa4
Capability: type 0x10 @ 0x80
Failed to enable LTR for dev = PCI: 02:00.4
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3c78
memalign 7ffd3c78
scan_bus: scanning of bus PCI: 00:1c.1 took 843 usecs
PCI: 00:1c.2 scanning...
do_pci_scan_bridge for PCI: 00:1c.2
memalign Enter, boundary 8, size 36, free_mem_ptr 7ffd3d10
memalign 7ffd3d10
PCI: pci_scan_bus for bus 03
POST: 0x24
memalign Enter, boundary 8, size 152, free_mem_ptr 7ffd3d34
memalign 7ffd3d38
PCI: 03:00.0 [168c/0030] enabled
POST: 0x25
POST: 0x55
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled L0s and L1
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Failed to enable LTR for dev = PCI: 03:00.0
scan_bus: scanning of bus PCI: 00:1c.2 took 279 usecs
PCI: 00:1f.0 scanning...
scan_lpc_bus for PCI: 00:1f.0
KBC1126: initialize fan control.KBC1126: fan control initialized.
PNP: 00ff.1 disabled
memalign Enter, boundary 8, size 2560, free_mem_ptr 7ffd3dd0
memalign 7ffd3dd0
PNP: 0c31.0 enabled
scan_lpc_bus for PCI: 00:1f.0 done
scan_bus: scanning of bus PCI: 00:1f.0 took 7961 usecs
PCI: 00:1f.3 scanning...
scan_generic_bus for PCI: 00:1f.3
scan_generic_bus for PCI: 00:1f.3 done
scan_bus: scanning of bus PCI: 00:1f.3 took 10 usecs
POST: 0x55
scan_bus: scanning of bus DOMAIN: 0000 took 9745 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 9765 usecs
done
FMAP: Found "FLASH" version 1.1 at 20000.
FMAP: base = ff000000 size = 1000000 #areas = 4
FMAP: area RW_MRC_CACHE found @ 30000 (65536 bytes)
MRC: No data in cbmem for 'RW_MRC_CACHE'.
BS: BS_DEV_ENUMERATE times (us): entry 0 run 9979 exit 45
POST: 0x73
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
More than one caller of pci_ehci_read_resources from PCI: 00:1a.0
PCI: 00:1c.0 read_resources bus 1 link: 0
PCI: 00:1c.0 read_resources bus 1 link: 0 done
PCI: 00:1c.1 read_resources bus 2 link: 0
PCI: 00:1c.1 read_resources bus 2 link: 0 done
PCI: 00:1c.2 read_resources bus 3 link: 0
PCI: 00:1c.2 read_resources bus 3 link: 0 done
PCI: 00:1d.0 EHCI BAR hook registered
PCI: 00:1f.0 read_resources bus 0 link: 0
PCI: 00:1f.0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: acac
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
PCI: 00:01.0
PCI: 00:02.0
PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
PCI: 00:04.0
PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
PCI: 00:16.0
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:19.0
PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
PCI: 00:1a.0
PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
PCI: 00:1b.0
PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
PCI: 00:1c.0
PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:1c.3
PCI: 00:1c.1 child on link 0 PCI: 02:00.0
PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
PCI: 02:00.2
PCI: 02:00.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 02:00.3
PCI: 02:00.3 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 02:00.4
PCI: 02:00.4 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
NONE
NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10
NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14
NONE resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18
PCI: 00:1c.2 child on link 0 PCI: 03:00.0
PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 03:00.0
PCI: 03:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
PCI: 00:1c.4
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.7
PCI: 00:1d.0
PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
PCI: 00:1e.0
PCI: 00:1f.0 child on link 0 PNP: 00ff.1
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PCI: 00:1f.0 resource base fe00 size fc align 0 gran 0 limit 0 flags c0040100 index 10000200
PNP: 00ff.1
PNP: 0c31.0
PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0
PCI: 00:1f.2
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
PCI: 00:1f.3
PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
PCI: 00:1f.5
PCI: 00:1f.6
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
NONE 18 * [0x0 - 0xfff] io
PCI: 00:1c.1 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 1c * [0x0 - 0xfff] io
PCI: 00:02.0 20 * [0x1000 - 0x103f] io
PCI: 00:19.0 18 * [0x1040 - 0x105f] io
PCI: 00:1f.2 20 * [0x1060 - 0x107f] io
PCI: 00:1f.2 10 * [0x1080 - 0x1087] io
PCI: 00:1f.2 18 * [0x1088 - 0x108f] io
PCI: 00:1f.2 14 * [0x1090 - 0x1093] io
PCI: 00:1f.2 1c * [0x1094 - 0x1097] io
DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
NONE 14 * [0x0 - 0x7fffff] prefmem
PCI: 00:1c.1 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
NONE 10 * [0x0 - 0x7fffff] mem
PCI: 02:00.0 30 * [0x800000 - 0x80ffff] mem
PCI: 02:00.0 10 * [0x810000 - 0x8100ff] mem
PCI: 02:00.2 10 * [0x811000 - 0x8110ff] mem
PCI: 02:00.3 10 * [0x812000 - 0x8120ff] mem
PCI: 02:00.4 10 * [0x813000 - 0x8130ff] mem
PCI: 00:1c.1 mem: base: 813100 size: 900000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 03:00.0 10 * [0x0 - 0x1ffff] mem
PCI: 03:00.0 30 * [0x20000 - 0x2ffff] mem
PCI: 00:1c.2 mem: base: 30000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
PCI: 00:1c.1 20 * [0x10000000 - 0x108fffff] mem
PCI: 00:1c.1 24 * [0x10c00000 - 0x113fffff] prefmem
PCI: 00:02.0 10 * [0x11400000 - 0x117fffff] mem
PCI: 00:1c.2 20 * [0x11800000 - 0x118fffff] mem
PCI: 00:19.0 10 * [0x11900000 - 0x1191ffff] mem
PCI: 00:14.0 10 * [0x11920000 - 0x1192ffff] mem
PCI: 00:04.0 10 * [0x11930000 - 0x11937fff] mem
PCI: 00:1b.0 10 * [0x11938000 - 0x1193bfff] mem
PCI: 00:19.0 14 * [0x1193c000 - 0x1193cfff] mem
PCI: 00:1f.2 24 * [0x1193d000 - 0x1193d7ff] mem
PCI: 00:1a.0 10 * [0x1193e000 - 0x1193e3ff] mem
PCI: 00:1d.0 10 * [0x1193f000 - 0x1193f3ff] mem
PCI: 00:1f.3 10 * [0x11940000 - 0x119400ff] mem
DOMAIN: 0000 mem: base: 11940100 size: 11940100 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:1f.0 10000200 base 0000fe00 limit 0000fefb io (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000fdff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base d0000000 limit efffffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:1098 align:12 gran:0 limit:fdff
PCI: 00:1c.1 1c * [0x1000 - 0x1fff] io
PCI: 00:02.0 20 * [0x2000 - 0x203f] io
PCI: 00:19.0 18 * [0x2040 - 0x205f] io
PCI: 00:1f.2 20 * [0x2060 - 0x207f] io
PCI: 00:1f.2 10 * [0x2080 - 0x2087] io
PCI: 00:1f.2 18 * [0x2088 - 0x208f] io
PCI: 00:1f.2 14 * [0x2090 - 0x2093] io
PCI: 00:1f.2 1c * [0x2094 - 0x2097] io
DOMAIN: 0000 io: next_base: 2098 size: 1098 align: 12 gran: 0 done
PCI: 00:1c.0 io: base:fdff size:0 align:12 gran:12 limit:fdff
PCI: 00:1c.0 io: next_base: fdff size: 0 align: 12 gran: 12 done
PCI: 00:1c.1 io: base:1000 size:1000 align:12 gran:12 limit:1fff
NONE 18 * [0x1000 - 0x1fff] io
PCI: 00:1c.1 io: next_base: 2000 size: 1000 align: 12 gran: 12 done
PCI: 00:1c.2 io: base:fdff size:0 align:12 gran:12 limit:fdff
PCI: 00:1c.2 io: next_base: fdff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:d0000000 size:11940100 align:28 gran:0 limit:efffffff
PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem
PCI: 00:1c.1 20 * [0xe0000000 - 0xe08fffff] mem
PCI: 00:1c.1 24 * [0xe0c00000 - 0xe13fffff] prefmem
PCI: 00:02.0 10 * [0xe1400000 - 0xe17fffff] mem
PCI: 00:1c.2 20 * [0xe1800000 - 0xe18fffff] mem
PCI: 00:19.0 10 * [0xe1900000 - 0xe191ffff] mem
PCI: 00:14.0 10 * [0xe1920000 - 0xe192ffff] mem
PCI: 00:04.0 10 * [0xe1930000 - 0xe1937fff] mem
PCI: 00:1b.0 10 * [0xe1938000 - 0xe193bfff] mem
PCI: 00:19.0 14 * [0xe193c000 - 0xe193cfff] mem
PCI: 00:1f.2 24 * [0xe193d000 - 0xe193d7ff] mem
PCI: 00:1a.0 10 * [0xe193e000 - 0xe193e3ff] mem
PCI: 00:1d.0 10 * [0xe193f000 - 0xe193f3ff] mem
PCI: 00:1f.3 10 * [0xe1940000 - 0xe19400ff] mem
DOMAIN: 0000 mem: next_base: e1940100 size: 11940100 align: 28 gran: 0 done
PCI: 00:1c.0 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:1c.0 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:1c.0 mem: next_base: efffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.1 prefmem: base:e0c00000 size:800000 align:22 gran:20 limit:e13fffff
NONE 14 * [0xe0c00000 - 0xe13fffff] prefmem
PCI: 00:1c.1 prefmem: next_base: e1400000 size: 800000 align: 22 gran: 20 done
PCI: 00:1c.1 mem: base:e0000000 size:900000 align:22 gran:20 limit:e08fffff
NONE 10 * [0xe0000000 - 0xe07fffff] mem
PCI: 02:00.0 30 * [0xe0800000 - 0xe080ffff] mem
PCI: 02:00.0 10 * [0xe0810000 - 0xe08100ff] mem
PCI: 02:00.2 10 * [0xe0811000 - 0xe08110ff] mem
PCI: 02:00.3 10 * [0xe0812000 - 0xe08120ff] mem
PCI: 02:00.4 10 * [0xe0813000 - 0xe08130ff] mem
PCI: 00:1c.1 mem: next_base: e0813100 size: 900000 align: 22 gran: 20 done
PCI: 00:1c.2 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:1c.2 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.2 mem: base:e1800000 size:100000 align:20 gran:20 limit:e18fffff
PCI: 03:00.0 10 * [0xe1800000 - 0xe181ffff] mem
PCI: 03:00.0 30 * [0xe1820000 - 0xe182ffff] mem
PCI: 00:1c.2 mem: next_base: e1830000 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
TOUUD 0x47d600000 TOLUD 0x82a00000 TOM 0x400000000
MEBASE 0x7ffff00000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0x80000000 size 8M
Available memory below 4GB: 2048M
Available memory above 4GB: 14294M
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:02.0 10 <- [0x00e1400000 - 0x00e17fffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000002000 - 0x000000203f] size 0x00000040 gran 0x06 io
PCI: 00:04.0 10 <- [0x00e1930000 - 0x00e1937fff] size 0x00008000 gran 0x0f mem64
PCI: 00:14.0 10 <- [0x00e1920000 - 0x00e192ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:19.0 10 <- [0x00e1900000 - 0x00e191ffff] size 0x00020000 gran 0x11 mem
PCI: 00:19.0 14 <- [0x00e193c000 - 0x00e193cfff] size 0x00001000 gran 0x0c mem
PCI: 00:19.0 18 <- [0x0000002040 - 0x000000205f] size 0x00000020 gran 0x05 io
PCI: 00:1a.0 10 <- [0x00e193e000 - 0x00e193e3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x00e1938000 - 0x00e193bfff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:1c.1 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 02 io
PCI: 00:1c.1 24 <- [0x00e0c00000 - 0x00e13fffff] size 0x00800000 gran 0x14 bus 02 prefmem
PCI: 00:1c.1 20 <- [0x00e0000000 - 0x00e08fffff] size 0x00900000 gran 0x14 bus 02 mem
PCI: 00:1c.1 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x00e0810000 - 0x00e08100ff] size 0x00000100 gran 0x08 mem
PCI: 02:00.0 30 <- [0x00e0800000 - 0x00e080ffff] size 0x00010000 gran 0x10 romem
PCI: 02:00.2 10 <- [0x00e0811000 - 0x00e08110ff] size 0x00000100 gran 0x08 mem
PCI: 02:00.3 10 <- [0x00e0812000 - 0x00e08120ff] size 0x00000100 gran 0x08 mem
PCI: 02:00.4 10 <- [0x00e0813000 - 0x00e08130ff] size 0x00000100 gran 0x08 mem
NONE missing set_resources
PCI: 00:1c.1 assign_resources, bus 2 link: 0
PCI: 00:1c.2 1c <- [0x000000fdff - 0x000000fdfe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:1c.2 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:1c.2 20 <- [0x00e1800000 - 0x00e18fffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 00:1c.2 assign_resources, bus 3 link: 0
PCI: 03:00.0 10 <- [0x00e1800000 - 0x00e181ffff] size 0x00020000 gran 0x11 mem64
PCI: 03:00.0 30 <- [0x00e1820000 - 0x00e182ffff] size 0x00010000 gran 0x10 romem
PCI: 00:1c.2 assign_resources, bus 3 link: 0
PCI: 00:1d.0 EHCI Debug Port hook triggered
PCI: 00:1d.0 10 <- [0x00e193f000 - 0x00e193f3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1d.0 10 <- [0x00e193f000 - 0x00e193f3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1d.0 EHCI Debug Port relocated
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x0000002080 - 0x0000002087] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000002090 - 0x0000002093] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000002088 - 0x000000208f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000002094 - 0x0000002097] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000002060 - 0x000000207f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00e193d000 - 0x00e193d7ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x00e1940000 - 0x00e19400ff] size 0x00000100 gran 0x08 mem64
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: acac
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 1000 size 1098 align 12 gran 0 limit fdff flags 40040100 index 10000000
DOMAIN: