Revert "lenovo/t400/4.5-1564-g6fa36c9c2c-dirty/2017-04-16T13_28_27Z"
This reverts commit e5454d36ca2f96e452a228db9a1485bff2e8f32e.
The commit in question deletes a lot of unrelated files, and needs to be
reverted.
diff --git a/purism/librem13/4.5-1441-g1e05435/2017-03-31T11_40_12Z/coreboot_console.txt b/purism/librem13/4.5-1441-g1e05435/2017-03-31T11_40_12Z/coreboot_console.txt
new file mode 100644
index 0000000..74dd1ea
--- /dev/null
+++ b/purism/librem13/4.5-1441-g1e05435/2017-03-31T11_40_12Z/coreboot_console.txt
@@ -0,0 +1,1175 @@
+
+
+coreboot-4.5-1441-g1e05435-dirty Fri Mar 31 11:40:12 UTC 2017 romstage starting...
+PM1_STS: 8100
+PM1_EN: 0100
+PM1_CNT: 00001c00
+TCO_STS: 0000 0002
+GPE0_STS: 00ec0000 00000085 00040000 00000000
+GPE0_EN: 00000000 00000000 00000000 00000000
+GEN_PMCON: 0200 2080 1809
+Previous Sleep State: S5
+CPU: Intel(R) Core(TM) i5-5200U CPU @ 2.20GHz
+CPU: ID 306d4, Broadwell E0 or F0, ucode: 0000001f
+CPU: AES supported, TXT NOT supported, VT supported
+MCH: device id 1604 (rev 09) is Broadwell F0
+PCH: device id 9cc3 (rev 03) is Broadwell U Premium
+IGD: device id 1616 (rev 09) is Broadwell U GT2
+CPU: frequency set to 2200 MHz
+ME: FW Partition Table : OK
+ME: Bringup Loader Failure : NO
+ME: Firmware Init Complete : NO
+ME: Manufacturing Mode : YES
+ME: Boot Options Present : NO
+ME: Update In Progress : NO
+ME: Current Working State : Initializing
+ME: Current Operation State : Bring up
+ME: Current Operation Mode : Normal
+ME: Error Code : Debug Failure
+ME: Progress Phase : BUP Phase
+ME: Power Management Event : Clean Moff->Mx wake
+ME: Progress Phase State : 0x7b
+ERROR: ME failed to respond
+FMAP: Found "FLASH" version 1.1 at 200000.
+FMAP: base = ff800000 size = 800000 #areas = 3
+CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
+CBFS: Locating 'mrc.bin'
+CBFS: Found @ offset 59fec0 size 36998
+Starting Memory Reference Code
+Initializing Policy
+Installing common PPI
+MRC: Starting...
+Initializing Memory
+MRC: Done.
+MRC Version 2.6.0 Build 0
+memcfg DDR3 clock 1600 MHz
+memcfg channel assignment: A: 0, B 1, C 2
+memcfg channel[0] config (00620020):
+ enhanced interleave mode on
+ rank interleave on
+ DIMMA 8192 MB width x8 or x32 dual rank, selected
+ DIMMB 0 MB width x8 or x32 single rank
+memcfg channel[1] config (00600000):
+ enhanced interleave mode on
+ rank interleave on
+ DIMMA 0 MB width x8 or x32 single rank, selected
+ DIMMB 0 MB width x8 or x32 single rank
+CBMEM:
+IMD: root @ 7cfff000 254 entries.
+IMD: root @ 7cffec00 62 entries.
+External stage cache:
+IMD: root @ 7d3ff000 254 entries.
+IMD: root @ 7d3fec00 62 entries.
+MRC data at ff7d0d9c 6246 bytes
+create cbmem for dimm information
+CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
+CBFS: Locating 'fallback/ramstage'
+CBFS: Found @ offset 1b640 size 142e1
+Decompressing stage fallback/ramstage @ 0x7cf93fc0 (268144 bytes)
+Loading module at 7cf94000 with entry 7cf94000. filesize: 0x2b440 memsize: 0x41730
+Processing 2882 relocs. Offset value of 0x7ce94000
+
+
+coreboot-4.5-1441-g1e05435-dirty Fri Mar 31 11:40:12 UTC 2017 ramstage starting...
+Normal boot.
+BS: BS_PRE_DEVICE times (us): entry 5 run 4 exit 5
+CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
+CBFS: Locating 'fallback/refcode'
+CBFS: Found @ offset 2f980 size 1274b
+Decompressing stage fallback/refcode @ 0x7cf5efc0 (201528 bytes)
+Loading module at 7cf5f000 with entry 7cf5f000. filesize: 0x29b38 memsize: 0x312f8
+Processing 1695 relocs. Offset value of 0x7cf5f000
+Initializing Policy
+Installing common PPI
+PEI: Starting...
+Initializing System Agent
+Initializing PCH
+PEI: Done.
+BS: BS_DEV_INIT_CHIPS times (us): entry 5 run 44879 exit 4
+Enumerating buses...
+Show all devs... Before device enumeration.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:02.0: enabled 1
+PCI: 00:03.0: enabled 1
+PCI: 00:13.0: enabled 0
+PCI: 00:14.0: enabled 1
+PCI: 00:15.0: enabled 0
+PCI: 00:15.1: enabled 0
+PCI: 00:15.2: enabled 0
+PCI: 00:15.3: enabled 0
+PCI: 00:15.4: enabled 0
+PCI: 00:15.5: enabled 0
+PCI: 00:15.6: enabled 0
+PCI: 00:16.0: enabled 1
+PCI: 00:16.1: enabled 0
+PCI: 00:16.2: enabled 0
+PCI: 00:16.3: enabled 0
+PCI: 00:17.0: enabled 0
+PCI: 00:19.0: enabled 0
+PCI: 00:1b.0: enabled 1
+PCI: 00:1c.0: enabled 1
+PCI: 00:1c.1: enabled 1
+PCI: 00:1c.2: enabled 1
+PCI: 00:1c.3: enabled 1
+PCI: 00:1c.4: enabled 0
+PCI: 00:1c.5: enabled 0
+PCI: 00:1d.0: enabled 0
+PCI: 00:1e.0: enabled 0
+PCI: 00:1f.0: enabled 1
+PNP: 0c09.0: enabled 1
+PCI: 00:1f.2: enabled 1
+PCI: 00:1f.3: enabled 1
+PCI: 00:1f.6: enabled 0
+Compare with tree...
+Root Device: enabled 1
+ CPU_CLUSTER: 0: enabled 1
+ APIC: 00: enabled 1
+ DOMAIN: 0000: enabled 1
+ PCI: 00:00.0: enabled 1
+ PCI: 00:02.0: enabled 1
+ PCI: 00:03.0: enabled 1
+ PCI: 00:13.0: enabled 0
+ PCI: 00:14.0: enabled 1
+ PCI: 00:15.0: enabled 0
+ PCI: 00:15.1: enabled 0
+ PCI: 00:15.2: enabled 0
+ PCI: 00:15.3: enabled 0
+ PCI: 00:15.4: enabled 0
+ PCI: 00:15.5: enabled 0
+ PCI: 00:15.6: enabled 0
+ PCI: 00:16.0: enabled 1
+ PCI: 00:16.1: enabled 0
+ PCI: 00:16.2: enabled 0
+ PCI: 00:16.3: enabled 0
+ PCI: 00:17.0: enabled 0
+ PCI: 00:19.0: enabled 0
+ PCI: 00:1b.0: enabled 1
+ PCI: 00:1c.0: enabled 1
+ PCI: 00:1c.1: enabled 1
+ PCI: 00:1c.2: enabled 1
+ PCI: 00:1c.3: enabled 1
+ PCI: 00:1c.4: enabled 0
+ PCI: 00:1c.5: enabled 0
+ PCI: 00:1d.0: enabled 0
+ PCI: 00:1e.0: enabled 0
+ PCI: 00:1f.0: enabled 1
+ PNP: 0c09.0: enabled 1
+ PCI: 00:1f.2: enabled 1
+ PCI: 00:1f.3: enabled 1
+ PCI: 00:1f.6: enabled 0
+Root Device scanning...
+root_dev_scan_bus for Root Device
+CPU_CLUSTER: 0 enabled
+DOMAIN: 0000 enabled
+DOMAIN: 0000 scanning...
+PCI: pci_scan_bus for bus 00
+PCI: 00:00.0 [8086/0000] ops
+PCI: 00:00.0 [8086/1604] enabled
+PCI: 00:02.0 [8086/0000] ops
+PCI: 00:02.0 [8086/1616] enabled
+PCI: 00:03.0 [8086/0000] ops
+PCI: 00:03.0 [8086/160c] enabled
+PCI: 00:13.0: Disabling device
+PCI: 00:14.0 [8086/0000] ops
+PCI: 00:14.0 [8086/9cb1] enabled
+PCI: 00:15.0: Disabling device
+PCI: 00:15.1: Disabling device
+PCI: 00:15.2: Disabling device
+PCI: 00:15.3: Disabling device
+PCI: 00:15.4: Disabling device
+PCI: 00:15.5: Disabling device
+PCI: 00:15.6: Disabling device
+PCI: 00:16.0 [8086/0000] ops
+PCI: 00:16.0 [8086/9cba] enabled
+PCI: 00:16.1: Disabling device
+PCI: 00:16.2: Disabling device
+PCI: 00:16.3: Disabling device
+PCI: 00:17.0: Disabling device
+PCI: 00:19.0: Disabling device
+PCI: 00:1b.0 [8086/0000] ops
+PCI: 00:1b.0 [8086/9ca0] enabled
+PCI: 00:1c.0 [8086/0000] bus ops
+PCIe Root Port 1 ASPM is disabled
+PCI: 00:1c.0 [8086/9c90] enabled
+PCI: 00:1c.1 [8086/0000] bus ops
+PCI: 00:1c.1 [8086/9c92] disabled
+PCI: 00:1c.2 [8086/0000] bus ops
+PCIe Root Port 3 ASPM is disabled
+PCI: 00:1c.2 [8086/9c94] enabled
+PCI: 00:1c.3 [8086/0000] bus ops
+PCIe Root Port 4 ASPM is disabled
+PCI: 00:1c.3 [8086/9c96] enabled
+PCI: 00:1c.4 [8086/0000] bus ops
+PCI: 00:1c.4 [8086/9c98] disabled
+PCI: 00:1c.5 [8086/0000] bus ops
+PCI: 00:1c.1: Disabling device
+PCI: 00:1c.1: Timeout waiting for 328h
+PCI: 00:1c.4: Disabling device
+PCI: 00:1c.5: Disabling device
+PCI: 00:1c.5: Timeout waiting for 328h
+PCH: RPFN 0x00543210 -> 0x00dc3290
+PCI: 00:1c.5 [8086/9c9a] disabled
+PCI: 00:1e.0: Disabling device
+PCI: 00:1f.0 [8086/0000] bus ops
+PCI: 00:1f.0 [8086/9cc3] enabled
+PCI: 00:1f.2 [8086/0000] ops
+PCI: 00:1f.2 [8086/9c83] enabled
+PCI: 00:1f.3 [8086/0000] bus ops
+PCI: 00:1f.3 [8086/9ca2] enabled
+PCI: 00:1f.6: Disabling device
+PCI: 00:1c.0 scanning...
+do_pci_scan_bridge for PCI: 00:1c.0
+PCI: pci_scan_bus for bus 01
+scan_bus: scanning of bus PCI: 00:1c.0 took 39 usecs
+PCI: 00:1c.2 scanning...
+do_pci_scan_bridge for PCI: 00:1c.2
+PCI: pci_scan_bus for bus 02
+PCI: 02:00.0 [10ec/8168] enabled
+Capability: type 0x01 @ 0x40
+Capability: type 0x05 @ 0x50
+Capability: type 0x10 @ 0x70
+Capability: type 0x10 @ 0x40
+Enabling Common Clock Configuration
+ASPM: Enabled L1
+scan_bus: scanning of bus PCI: 00:1c.2 took 212 usecs
+PCI: 00:1c.3 scanning...
+do_pci_scan_bridge for PCI: 00:1c.3
+PCI: pci_scan_bus for bus 03
+PCI: 03:00.0 [168c/0034] enabled
+Capability: type 0x01 @ 0x40
+Capability: type 0x05 @ 0x50
+Capability: type 0x10 @ 0x70
+Capability: type 0x10 @ 0x40
+Enabling Common Clock Configuration
+PCIE CLK PM is not supported by endpointASPM: Enabled L0s and L1
+scan_bus: scanning of bus PCI: 00:1c.3 took 211 usecs
+PCI: 00:1f.0 scanning...
+scan_lpc_bus for PCI: 00:1f.0
+PNP: 0c09.0 enabled
+scan_lpc_bus for PCI: 00:1f.0 done
+scan_bus: scanning of bus PCI: 00:1f.0 took 14 usecs
+PCI: 00:1f.3 scanning...
+scan_generic_bus for PCI: 00:1f.3
+scan_generic_bus for PCI: 00:1f.3 done
+scan_bus: scanning of bus PCI: 00:1f.3 took 12 usecs
+scan_bus: scanning of bus DOMAIN: 0000 took 11500 usecs
+root_dev_scan_bus for Root Device done
+scan_bus: scanning of bus Root Device took 11524 usecs
+done
+BS: BS_DEV_ENUMERATE times (us): entry 5 run 11696 exit 5
+found VGA at PCI: 00:02.0
+Setting up VGA for PCI: 00:02.0
+Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
+Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
+Allocating resources...
+Reading resources...
+Root Device read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0
+mc_add_fixed_mmio_resources: Adding PCIEXBAR @ 60 0xf0000000-0xf3ffffff.
+mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff.
+mc_add_fixed_mmio_resources: Adding DMIBAR @ 68 0xfed18000-0xfed18fff.
+mc_add_fixed_mmio_resources: Adding EPBAR @ 40 0xfed19000-0xfed19fff.
+mc_add_fixed_mmio_resources: Adding GDXCBAR @ 5420 0xfed84000-0xfed84fff.
+mc_add_fixed_mmio_resources: Adding EDRAMBAR @ 5408 0xfed80000-0xfed83fff.
+MC MAP: TOM: 0x200000000
+MC MAP: TOUUD: 0x280000000
+MC MAP: MESEG_BASE: 0x7ffff00000
+MC MAP: MESEG_LIMIT: 0xfffff
+MC MAP: REMAP_BASE: 0x200000000
+MC MAP: REMAP_LIMIT: 0x27fffffff
+MC MAP: TOLUD: 0x80000000
+MC MAP: BGSM: 0x7d800000
+MC MAP: BDSM: 0x7e000000
+MC MAP: TESGMB: 0x7d000000
+MC MAP: GGC: 0x1c1
+PCI: 00:1c.0 read_resources bus 1 link: 0
+PCI: 00:1c.0 read_resources bus 1 link: 0 done
+PCI: 00:1c.2 read_resources bus 2 link: 0
+PCI: 00:1c.2 read_resources bus 2 link: 0 done
+PCI: 00:1c.3 read_resources bus 3 link: 0
+PCI: 00:1c.3 read_resources bus 3 link: 0 done
+PCI: 00:1f.0 read_resources bus 0 link: 0
+PNP: 0c09.0 missing read_resources
+PCI: 00:1f.0 read_resources bus 0 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0 done
+Root Device read_resources bus 0 link: 0 done
+Done reading resources.
+Show resources in subtree (Root Device)...After reading.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
+ PCI: 00:00.0
+ PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
+ PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 48
+ PCI: 00:00.0 resource base fed18000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 68
+ PCI: 00:00.0 resource base fed19000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 40
+ PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 5420
+ PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5408
+ PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0
+ PCI: 00:00.0 resource base c0000 size 7cf40000 align 0 gran 0 limit 0 flags e0004200 index 1
+ PCI: 00:00.0 resource base 7d000000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 2
+ PCI: 00:00.0 resource base 7d800000 size 2800000 align 0 gran 0 limit 0 flags f0000200 index 3
+ PCI: 00:00.0 resource base 100000000 size 180000000 align 0 gran 0 limit 0 flags e0004200 index 4
+ PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 5
+ PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 6
+ PCI: 00:02.0
+ PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
+ PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
+ PCI: 00:03.0
+ PCI: 00:03.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:13.0
+ PCI: 00:14.0
+ PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:15.0
+ PCI: 00:15.1
+ PCI: 00:15.2
+ PCI: 00:15.3
+ PCI: 00:15.4
+ PCI: 00:15.5
+ PCI: 00:15.6
+ PCI: 00:16.0
+ PCI: 00:16.0 resource base 0 size 20 align 12 gran 5 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:16.1
+ PCI: 00:16.2
+ PCI: 00:16.3
+ PCI: 00:17.0
+ PCI: 00:19.0
+ PCI: 00:1b.0
+ PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:1c.0
+ PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 00:1c.1
+ PCI: 00:1c.2 child on link 0 PCI: 02:00.0
+ PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 02:00.0
+ PCI: 02:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
+ PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
+ PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
+ PCI: 00:1c.3 child on link 0 PCI: 03:00.0
+ PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 03:00.0
+ PCI: 03:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffffffffffff flags 201 index 10
+ PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
+ PCI: 00:1c.4
+ PCI: 00:1c.5
+ PCI: 00:1d.0
+ PCI: 00:1e.0
+ PCI: 00:1f.0 child on link 0 PNP: 0c09.0
+ PCI: 00:1f.0 resource base fec00000 size 1400000 align 0 gran 0 limit 0 flags c0000200 index 31fe
+ PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
+ PCI: 00:1f.0 resource base 1400 size 400 align 0 gran 0 limit 0 flags c0000100 index 48
+ PCI: 00:1f.0 resource base 1000 size 100 align 0 gran 0 limit 0 flags c0000100 index 40
+ PNP: 0c09.0
+ PCI: 00:1f.2
+ PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
+ PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
+ PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
+ PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
+ PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1f.2 resource base 0 size 8000 align 15 gran 15 limit ffffffff flags 200 index 24
+ PCI: 00:1f.3
+ PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
+ PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:1f.6
+DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
+PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 02:00.0 10 * [0x0 - 0xff] io
+PCI: 00:1c.2 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.2 1c * [0x0 - 0xfff] io
+PCI: 00:02.0 20 * [0x1000 - 0x103f] io
+PCI: 00:1f.2 20 * [0x1040 - 0x105f] io
+PCI: 00:1f.2 10 * [0x1060 - 0x1067] io
+PCI: 00:1f.2 18 * [0x1068 - 0x106f] io
+PCI: 00:1f.2 14 * [0x1070 - 0x1073] io
+PCI: 00:1f.2 1c * [0x1074 - 0x1077] io
+DOMAIN: 0000 io: base: 1078 size: 1078 align: 12 gran: 0 limit: ffff done
+DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
+PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 02:00.0 20 * [0x0 - 0x3fff] prefmem
+PCI: 00:1c.2 prefmem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 02:00.0 18 * [0x0 - 0xfff] mem
+PCI: 00:1c.2 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 03:00.0 10 * [0x0 - 0x7ffff] mem
+PCI: 03:00.0 30 * [0x80000 - 0x8ffff] mem
+PCI: 00:1c.3 mem: base: 90000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
+PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
+PCI: 00:1c.2 24 * [0x11000000 - 0x110fffff] prefmem
+PCI: 00:1c.2 20 * [0x11100000 - 0x111fffff] mem
+PCI: 00:1c.3 20 * [0x11200000 - 0x112fffff] mem
+PCI: 00:14.0 10 * [0x11300000 - 0x1130ffff] mem
+PCI: 00:1f.2 24 * [0x11310000 - 0x11317fff] mem
+PCI: 00:03.0 10 * [0x11318000 - 0x1131bfff] mem
+PCI: 00:1b.0 10 * [0x1131c000 - 0x1131ffff] mem
+PCI: 00:1f.3 10 * [0x11320000 - 0x113200ff] mem
+PCI: 00:16.0 10 * [0x11321000 - 0x1132101f] mem
+DOMAIN: 0000 mem: base: 11321020 size: 11321020 align: 28 gran: 0 limit: ffffffff done
+avoid_fixed_resources: DOMAIN: 0000
+avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
+constrain_resources: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
+constrain_resources: PCI: 00:00.0 00 base 00000000 limit 0009ffff mem (fixed)
+constrain_resources: PCI: 00:00.0 01 base 000c0000 limit 7cffffff mem (fixed)
+constrain_resources: PCI: 00:00.0 02 base 7d000000 limit 7d7fffff mem (fixed)
+constrain_resources: PCI: 00:00.0 03 base 7d800000 limit 7fffffff mem (fixed)
+constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
+constrain_resources: PCI: 00:1f.0 48 base 00001400 limit 000017ff io (fixed)
+avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001800 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 base d0000000 limit efffffff
+Setting resources...
+DOMAIN: 0000 io: base:1800 size:1078 align:12 gran:0 limit:ffff
+PCI: 00:1c.2 1c * [0x2000 - 0x2fff] io
+PCI: 00:02.0 20 * [0x3000 - 0x303f] io
+PCI: 00:1f.2 20 * [0x3040 - 0x305f] io
+PCI: 00:1f.2 10 * [0x3060 - 0x3067] io
+PCI: 00:1f.2 18 * [0x3068 - 0x306f] io
+PCI: 00:1f.2 14 * [0x3070 - 0x3073] io
+PCI: 00:1f.2 1c * [0x3074 - 0x3077] io
+DOMAIN: 0000 io: next_base: 3078 size: 1078 align: 12 gran: 0 done
+PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
+PCI: 00:1c.2 io: base:2000 size:1000 align:12 gran:12 limit:2fff
+PCI: 02:00.0 10 * [0x2000 - 0x20ff] io
+PCI: 00:1c.2 io: next_base: 2100 size: 1000 align: 12 gran: 12 done
+PCI: 00:1c.3 io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:1c.3 io: next_base: ffff size: 0 align: 12 gran: 12 done
+DOMAIN: 0000 mem: base:d0000000 size:11321020 align:28 gran:0 limit:efffffff
+PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem
+PCI: 00:02.0 10 * [0xe0000000 - 0xe0ffffff] mem
+PCI: 00:1c.2 24 * [0xe1000000 - 0xe10fffff] prefmem
+PCI: 00:1c.2 20 * [0xe1100000 - 0xe11fffff] mem
+PCI: 00:1c.3 20 * [0xe1200000 - 0xe12fffff] mem
+PCI: 00:14.0 10 * [0xe1300000 - 0xe130ffff] mem
+PCI: 00:1f.2 24 * [0xe1310000 - 0xe1317fff] mem
+PCI: 00:03.0 10 * [0xe1318000 - 0xe131bfff] mem
+PCI: 00:1b.0 10 * [0xe131c000 - 0xe131ffff] mem
+PCI: 00:1f.3 10 * [0xe1320000 - 0xe13200ff] mem
+PCI: 00:16.0 10 * [0xe1321000 - 0xe132101f] mem
+DOMAIN: 0000 mem: next_base: e1321020 size: 11321020 align: 28 gran: 0 done
+PCI: 00:1c.0 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.0 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.0 mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.0 mem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.2 prefmem: base:e1000000 size:100000 align:20 gran:20 limit:e10fffff
+PCI: 02:00.0 20 * [0xe1000000 - 0xe1003fff] prefmem
+PCI: 00:1c.2 prefmem: next_base: e1004000 size: 100000 align: 20 gran: 20 done
+PCI: 00:1c.2 mem: base:e1100000 size:100000 align:20 gran:20 limit:e11fffff
+PCI: 02:00.0 18 * [0xe1100000 - 0xe1100fff] mem
+PCI: 00:1c.2 mem: next_base: e1101000 size: 100000 align: 20 gran: 20 done
+PCI: 00:1c.3 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
+PCI: 00:1c.3 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.3 mem: base:e1200000 size:100000 align:20 gran:20 limit:e12fffff
+PCI: 03:00.0 10 * [0xe1200000 - 0xe127ffff] mem
+PCI: 03:00.0 30 * [0xe1280000 - 0xe128ffff] mem
+PCI: 00:1c.3 mem: next_base: e1290000 size: 100000 align: 20 gran: 20 done
+Root Device assign_resources, bus 0 link: 0
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+PCI: 00:02.0 10 <- [0x00e0000000 - 0x00e0ffffff] size 0x01000000 gran 0x18 mem64
+PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
+PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io
+PCI: 00:03.0 10 <- [0x00e1318000 - 0x00e131bfff] size 0x00004000 gran 0x0e mem64
+PCI: 00:14.0 10 <- [0x00e1300000 - 0x00e130ffff] size 0x00010000 gran 0x10 mem64
+PCI: 00:16.0 10 <- [0x00e1321000 - 0x00e132101f] size 0x00000020 gran 0x05 mem64
+PCI: 00:1b.0 10 <- [0x00e131c000 - 0x00e131ffff] size 0x00004000 gran 0x0e mem64
+PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
+PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
+PCI: 00:1c.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 mem
+PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 02 io
+PCI: 00:1c.2 24 <- [0x00e1000000 - 0x00e10fffff] size 0x00100000 gran 0x14 bus 02 prefmem
+PCI: 00:1c.2 20 <- [0x00e1100000 - 0x00e11fffff] size 0x00100000 gran 0x14 bus 02 mem
+PCI: 00:1c.2 assign_resources, bus 2 link: 0
+PCI: 02:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
+PCI: 02:00.0 18 <- [0x00e1100000 - 0x00e1100fff] size 0x00001000 gran 0x0c mem64
+PCI: 02:00.0 20 <- [0x00e1000000 - 0x00e1003fff] size 0x00004000 gran 0x0e prefmem64
+PCI: 00:1c.2 assign_resources, bus 2 link: 0
+PCI: 00:1c.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
+PCI: 00:1c.3 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem
+PCI: 00:1c.3 20 <- [0x00e1200000 - 0x00e12fffff] size 0x00100000 gran 0x14 bus 03 mem
+PCI: 00:1c.3 assign_resources, bus 3 link: 0
+PCI: 03:00.0 10 <- [0x00e1200000 - 0x00e127ffff] size 0x00080000 gran 0x13 mem64
+PCI: 03:00.0 30 <- [0x00e1280000 - 0x00e128ffff] size 0x00010000 gran 0x10 romem
+PCI: 00:1c.3 assign_resources, bus 3 link: 0
+PCI: 00:1f.0 assign_resources, bus 0 link: 0
+PCI: 00:1f.0 assign_resources, bus 0 link: 0
+PCI: 00:1f.2 10 <- [0x0000003060 - 0x0000003067] size 0x00000008 gran 0x03 io
+PCI: 00:1f.2 14 <- [0x0000003070 - 0x0000003073] size 0x00000004 gran 0x02 io
+PCI: 00:1f.2 18 <- [0x0000003068 - 0x000000306f] size 0x00000008 gran 0x03 io
+PCI: 00:1f.2 1c <- [0x0000003074 - 0x0000003077] size 0x00000004 gran 0x02 io
+PCI: 00:1f.2 20 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io
+PCI: 00:1f.2 24 <- [0x00e1310000 - 0x00e1317fff] size 0x00008000 gran 0x0f mem
+PCI: 00:1f.3 10 <- [0x00e1320000 - 0x00e13200ff] size 0x00000100 gran 0x08 mem64
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+Root Device assign_resources, bus 0 link: 0
+Done setting resources.
+Show resources in subtree (Root Device)...After assigning values.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 1800 size 1078 align 12 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base d0000000 size 11321020 align 28 gran 0 limit efffffff flags 40040200 index 10000100
+ PCI: 00:00.0
+ PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
+ PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 48
+ PCI: 00:00.0 resource base fed18000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 68
+ PCI: 00:00.0 resource base fed19000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 40
+ PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 5420
+ PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5408
+ PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0
+ PCI: 00:00.0 resource base c0000 size 7cf40000 align 0 gran 0 limit 0 flags e0004200 index 1
+ PCI: 00:00.0 resource base 7d000000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 2
+ PCI: 00:00.0 resource base 7d800000 size 2800000 align 0 gran 0 limit 0 flags f0000200 index 3
+ PCI: 00:00.0 resource base 100000000 size 180000000 align 0 gran 0 limit 0 flags e0004200 index 4
+ PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 5
+ PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 6
+ PCI: 00:02.0
+ PCI: 00:02.0 resource base e0000000 size 1000000 align 24 gran 24 limit e0ffffff flags 60000201 index 10
+ PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 18
+ PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20
+ PCI: 00:03.0
+ PCI: 00:03.0 resource base e1318000 size 4000 align 14 gran 14 limit e131bfff flags 60000201 index 10
+ PCI: 00:13.0
+ PCI: 00:14.0
+ PCI: 00:14.0 resource base e1300000 size 10000 align 16 gran 16 limit e130ffff flags 60000201 index 10
+ PCI: 00:15.0
+ PCI: 00:15.1
+ PCI: 00:15.2
+ PCI: 00:15.3
+ PCI: 00:15.4
+ PCI: 00:15.5
+ PCI: 00:15.6
+ PCI: 00:16.0
+ PCI: 00:16.0 resource base e1321000 size 20 align 12 gran 5 limit e132101f flags 60000201 index 10
+ PCI: 00:16.1
+ PCI: 00:16.2
+ PCI: 00:16.3
+ PCI: 00:17.0
+ PCI: 00:19.0
+ PCI: 00:1b.0
+ PCI: 00:1b.0 resource base e131c000 size 4000 align 14 gran 14 limit e131ffff flags 60000201 index 10
+ PCI: 00:1c.0
+ PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20
+ PCI: 00:1c.1
+ PCI: 00:1c.2 child on link 0 PCI: 02:00.0
+ PCI: 00:1c.2 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
+ PCI: 00:1c.2 resource base e1000000 size 100000 align 20 gran 20 limit e10fffff flags 60081202 index 24
+ PCI: 00:1c.2 resource base e1100000 size 100000 align 20 gran 20 limit e11fffff flags 60080202 index 20
+ PCI: 02:00.0
+ PCI: 02:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 10
+ PCI: 02:00.0 resource base e1100000 size 1000 align 12 gran 12 limit e1100fff flags 60000201 index 18
+ PCI: 02:00.0 resource base e1000000 size 4000 align 14 gran 14 limit e1003fff flags 60001201 index 20
+ PCI: 00:1c.3 child on link 0 PCI: 03:00.0
+ PCI: 00:1c.3 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1c.3 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
+ PCI: 00:1c.3 resource base e1200000 size 100000 align 20 gran 20 limit e12fffff flags 60080202 index 20
+ PCI: 03:00.0
+ PCI: 03:00.0 resource base e1200000 size 80000 align 19 gran 19 limit e127ffff flags 60000201 index 10
+ PCI: 03:00.0 resource base e1280000 size 10000 align 16 gran 16 limit e128ffff flags 60002200 index 30
+ PCI: 00:1c.4
+ PCI: 00:1c.5
+ PCI: 00:1d.0
+ PCI: 00:1e.0
+ PCI: 00:1f.0 child on link 0 PNP: 0c09.0
+ PCI: 00:1f.0 resource base fec00000 size 1400000 align 0 gran 0 limit 0 flags c0000200 index 31fe
+ PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
+ PCI: 00:1f.0 resource base 1400 size 400 align 0 gran 0 limit 0 flags c0000100 index 48
+ PCI: 00:1f.0 resource base 1000 size 100 align 0 gran 0 limit 0 flags c0000100 index 40
+ PNP: 0c09.0
+ PCI: 00:1f.2
+ PCI: 00:1f.2 resource base 3060 size 8 align 3 gran 3 limit 3067 flags 60000100 index 10
+ PCI: 00:1f.2 resource base 3070 size 4 align 2 gran 2 limit 3073 flags 60000100 index 14
+ PCI: 00:1f.2 resource base 3068 size 8 align 3 gran 3 limit 306f flags 60000100 index 18
+ PCI: 00:1f.2 resource base 3074 size 4 align 2 gran 2 limit 3077 flags 60000100 index 1c
+ PCI: 00:1f.2 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 20
+ PCI: 00:1f.2 resource base e1310000 size 8000 align 15 gran 15 limit e1317fff flags 60000200 index 24
+ PCI: 00:1f.3
+ PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
+ PCI: 00:1f.3 resource base e1320000 size 100 align 12 gran 8 limit e13200ff flags 60000201 index 10
+ PCI: 00:1f.6
+Done allocating resources.
+BS: BS_DEV_RESOURCES times (us): entry 4 run 3310 exit 5
+Enabling resources...
+PCI: 00:00.0 subsystem <- 0000/0000
+PCI: 00:00.0 cmd <- 06
+PCI: 00:02.0 subsystem <- 0000/0000
+PCI: 00:02.0 cmd <- 03
+PCI: 00:03.0 subsystem <- 0000/0000
+PCI: 00:03.0 cmd <- 02
+PCI: 00:14.0 subsystem <- 0000/0000
+PCI: 00:14.0 cmd <- 102
+PCI: 00:16.0 subsystem <- 0000/0000
+PCI: 00:16.0 cmd <- 02
+PCI: 00:1b.0 subsystem <- 0000/0000
+PCI: 00:1b.0 cmd <- 02
+PCI: 00:1c.0 bridge ctrl <- 0003
+PCI: 00:1c.0 subsystem <- 0000/0000
+PCI: 00:1c.0 cmd <- 00
+PCI: 00:1c.2 bridge ctrl <- 0003
+PCI: 00:1c.2 subsystem <- 0000/0000
+PCI: 00:1c.2 cmd <- 07
+PCI: 00:1c.3 bridge ctrl <- 0003
+PCI: 00:1c.3 subsystem <- 0000/0000
+PCI: 00:1c.3 cmd <- 06
+PCI: 00:1f.0 subsystem <- 0000/0000
+PCI: 00:1f.0 cmd <- 107
+PCI: 00:1f.2 subsystem <- 0000/0000
+PCI: 00:1f.2 cmd <- 103
+PCI: 00:1f.3 subsystem <- 0000/0000
+PCI: 00:1f.3 cmd <- 103
+PCI: 02:00.0 cmd <- 03
+PCI: 03:00.0 cmd <- 02
+done.
+BS: BS_DEV_ENABLE times (us): entry 4 run 148 exit 5
+Initializing devices...
+Root Device init ...
+Root Device init finished in 6 usecs
+CPU_CLUSTER: 0 init ...
+MTRR: Physical address space:
+0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
+0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
+0x00000000000c0000 - 0x000000007d800000 size 0x7d740000 type 6
+0x000000007d800000 - 0x00000000d0000000 size 0x52800000 type 0
+0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
+0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
+0x0000000100000000 - 0x0000000280000000 size 0x180000000 type 6
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0606060606060606
+MTRR: Fixed MSR 0x269 0x0606060606060606
+MTRR: Fixed MSR 0x26a 0x0606060606060606
+MTRR: Fixed MSR 0x26b 0x0606060606060606
+MTRR: Fixed MSR 0x26c 0x0606060606060606
+MTRR: Fixed MSR 0x26d 0x0606060606060606
+MTRR: Fixed MSR 0x26e 0x0606060606060606
+MTRR: Fixed MSR 0x26f 0x0606060606060606
+call enable_fixed_mtrr()
+CPU physical address size: 39 bits
+MTRR: default type WB/UC MTRR counts: 6/6.
+MTRR: UC selected as default type.
+MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
+MTRR: 1 base 0x000000007d800000 mask 0x0000007fff800000 type 0
+MTRR: 2 base 0x000000007e000000 mask 0x0000007ffe000000 type 0
+MTRR: 3 base 0x00000000d0000000 mask 0x0000007ff0000000 type 1
+MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
+MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+Initializing VR config.
+PCODE: 24MHz BLCK calibration response: 0
+PCODE: 24MHz BLCK calibration value: 0x85000000
+PCH Power: PCODE Levels 0x3f245102 0x0058f38a
+CPU has 2 cores, 4 threads enabled.
+Setting up SMI for CPU
+Will perform SMM setup.
+CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
+CBFS: Locating 'cpu_microcode_blob.bin'
+CBFS: Found @ offset a180 size 11440
+microcode: sig=0x306d4 pf=0x40 revision=0x1f
+CPU: Intel(R) Core(TM) i5-5200U CPU @ 2.20GHz.
+Loading module at 00030000 with entry 00030000. filesize: 0x130 memsize: 0x130
+Processing 16 relocs. Offset value of 0x00030000
+Attempting to start 3 APs
+Waiting for 10ms after sending INIT.
+Waiting for 1st SIPI to complete...done.
+Waiting for 2nd SIPI to complete...AP: slot 1 apic_id 1.
+done.
+AP: slot 2 apic_id 2.
+AP: slot 3 apic_id 3.
+Loading module at 00038000 with entry 00038000. filesize: 0x160 memsize: 0x160
+Processing 10 relocs. Offset value of 0x00038000
+SMM Module: stub loaded at 00038000. Will call 7cfac1d6(00000000)
+Installing SMM handler to 0x7d000000
+Loading module at 7d010000 with entry 7d010070. filesize: 0x948 memsize: 0x4960
+Processing 32 relocs. Offset value of 0x7d010000
+Loading module at 7d008000 with entry 7d008000. filesize: 0x160 memsize: 0x160
+Processing 10 relocs. Offset value of 0x7d008000
+SMM Module: placing jmp sequence at 7d007c00 rel16 0x03fd
+SMM Module: placing jmp sequence at 7d007800 rel16 0x07fd
+SMM Module: placing jmp sequence at 7d007400 rel16 0x0bfd
+SMM Module: stub loaded at 7d008000. Will call 7d010070(00000000)
+Initializing Southbridge SMI... ... pmbase = 0x1000
+
+SMI_STS: TCO PM1
+PM1_STS: WAK PWRBTN
+New SMBASE 0x7d000000
+In relocation handler: CPU 0
+New SMBASE=0x7d000000 IEDBASE=0x7d400000
+Writing SMRR. base = 0x7d000006, mask=0xff800800
+Relocation complete.
+New SMBASE 0x7cfffc00
+In relocation handler: CPU 1
+New SMBASE=0x7cfffc00 IEDBASE=0x7d400000
+Writing SMRR. base = 0x7d000006, mask=0xff800800
+Relocation complete.
+New SMBASE 0x7cfff400
+In relocation handler: CPU 3
+New SMBASE=0x7cfff400 IEDBASE=0x7d400000
+Writing SMRR. base = 0x7d000006, mask=0xff800800
+Relocation complete.
+New SMBASE 0x7cfff800
+In relocation handler: CPU 2
+New SMBASE=0x7cfff800 IEDBASE=0x7d400000
+Writing SMRR. base = 0x7d000006, mask=0xff800800
+Relocation complete.
+Initializing CPU #0
+CPU: vendor Intel device 306d4
+CPU: family 06, model 3d, stepping 04
+Setting up local APIC... apic_id: 0x00 done.
+VMX status: enabled, locked
+cpu: energy policy set to 6
+Turbo is available but hidden
+Turbo has been enabled
+CPU #0 initialized
+Initializing CPU #1
+Initializing CPU #3
+CPU: vendor Intel device 306d4
+CPU: family 06, model 3d, stepping 04
+Initializing CPU #2
+CPU: vendor Intel device 306d4
+CPU: vendor Intel device 306d4
+CPU: family 06, model 3d, stepping 04
+CPU: family 06, model 3d, stepping 04
+Setting up local APIC...Setting up local APIC... apic_id: 0x01 done.
+Setting up local APIC... apic_id: 0x03 done.
+VMX status: enabled, locked
+VMX status: enabled, locked
+ apic_id: 0x02 done.
+VMX status: enabled, locked
+cpu: energy policy set to 6
+CPU #1 initialized
+cpu: energy policy set to 6
+CPU #3 initialized
+cpu: energy policy set to 6
+CPU #2 initialized
+cpu: frequency set to 2700
+Enabling SMIs.
+Locking SMM.
+CPU_CLUSTER: 0 init finished in 19193 usecs
+PCI: 00:00.0 init ...
+Set BIOS_RESET_CPL
+CPU TDP: 15 Watts
+PCI: 00:00.0 init finished in 1014 usecs
+PCI: 00:02.0 init ...
+CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
+CBFS: Locating 'pci8086,1616.rom'
+CBFS: Found @ offset 45cc0 size 10000
+In CBFS, ROM address for PCI: 00:02.0 = ffa45e08
+PCI expansion ROM, signature 0xaa55, INIT size 0x10000, data ptr 0x0040
+PCI ROM image, vendor ID 8086, device ID 0406,
+PCI ROM image, Class Code 030000, Code Type 00
+Copying VGA ROM Image from ffa45e08 to 0xc0000, 0x10000 bytes
+Real mode stub @00000600: 867 bytes
+Calling Option ROM...
+intel_vga_int15_handler: AX=5f34 BX=0190 CX=0002 DX=0010
+intel_vga_int15_handler: AX=5f51 BX=c000 CX=0000 DX=03da
+intel_vga_int15_handler: AX=5f40 BX=0000 CX=0004 DX=0008
+DISPLAY=0
+intel_vga_int15_handler: AX=5f52 BX=c00a CX=000f DX=0008
+Unknown INT15 function 5f52!
+int15 call returned error.
+intel_vga_int15_handler: AX=5f49 BX=1ab0 CX=0000 DX=1e1c
+Unknown INT15 function 5f49!
+int15 call returned error.
+intel_vga_int15_handler: AX=5f49 BX=00ff CX=0300 DX=0040
+Unknown INT15 function 5f49!
+int15 call returned error.
+intel_vga_int15_handler: AX=5f14 BX=078f CX=0091 DX=0008
+Unknown INT15 function 5f14!
+int15 call returned error.
+intel_vga_int15_handler: AX=5f35 BX=c000 CX=0002 DX=03da
+... Option ROM returned.
+VBE: Getting information about VESA mode 411b
+VBE: resolution: 1280x1024@32
+VBE: framebuffer: d0000000
+VBE: Setting VESA mode 411b
+intel_vga_int15_handler: AX=5f14 BX=078f CX=0001 DX=0101
+Unknown INT15 function 5f14!
+int15 call returned error.
+CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
+CBFS: Locating 'bootsplash.jpg'
+CBFS: Found @ offset 42740 size 351d
+VGA Option ROM was run
+PCI: 00:02.0 init finished in 252626 usecs
+PCI: 00:03.0 init ...
+Mini-HD: base = e1318000
+HDA: Initializing codec #0
+HDA: codec viddid: 80862808
+HDA: No verb table entry found
+PCI: 00:03.0 init finished in 3018 usecs
+PCI: 00:14.0 init ...
+PCI: 00:14.0 init finished in 5 usecs
+PCI: 00:16.0 init ...
+ME: FW Partition Table : OK
+ME: Bringup Loader Failure : NO
+ME: Firmware Init Complete : NO
+ME: Manufacturing Mode : YES
+ME: Boot Options Present : NO
+ME: Update In Progress : NO
+ME: Current Working State : Initializing
+ME: Current Operation State : Bring up
+ME: Current Operation Mode : Normal
+ME: Error Code : Debug Failure
+ME: Progress Phase : BUP Phase
+ME: Power Management Event : Clean Moff->Mx wake
+ME: Progress Phase State : 0x7b
+intel_me_path: mbp is not ready!
+ME: BIOS path: Error
+ME: MBP not ready
+PCI: 00:16.0 init finished in 84 usecs
+PCI: 00:1b.0 init ...
+HDA: base = e131c000
+HDA: codec_mask = 01
+HDA: Initializing codec #0
+HDA: codec viddid: 10ec0269
+HDA: verb loaded.
+PCI: 00:1b.0 init finished in 5070 usecs
+PCI: 00:1c.0 init ...
+Initializing PCH PCIe bridge.
+PCI: 00:1c.0 init finished in 8 usecs
+PCI: 00:1c.2 init ...
+Initializing PCH PCIe bridge.
+PCI: 00:1c.2 init finished in 8 usecs
+PCI: 00:1c.3 init ...
+Initializing PCH PCIe bridge.
+PCI: 00:1c.3 init finished in 8 usecs
+PCI: 00:1f.0 init ...
+RTC Init
+IOAPIC: Initializing IOAPIC at 0xfec00000
+IOAPIC: Bootstrap Processor Local APIC = 0x00
+IOAPIC: ID = 0x02
+IOAPIC: Dumping registers
+ reg 0x0000: 0x02000000
+ reg 0x0001: 0x00170020
+ reg 0x0002: 0x00000000
+Set power off after power failure.
+PCH PM init
+Disabling ACPI via APMC:
+done.
+PCI: 00:1f.0 init finished in 247 usecs
+PCI: 00:1f.2 init ...
+SATA: Initializing controller in AHCI mode.
+ABAR: e1310000
+PCI: 00:1f.2 init finished in 135 usecs
+PCI: 00:1f.3 init ...
+PCI: 00:1f.3 init finished in 7 usecs
+PCI: 02:00.0 init ...
+PCI: 02:00.0 init finished in 2 usecs
+PCI: 03:00.0 init ...
+PCI: 03:00.0 init finished in 2 usecs
+Devices initialized
+Show all devs... After init.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:02.0: enabled 1
+PCI: 00:03.0: enabled 1
+PCI: 00:13.0: enabled 0
+PCI: 00:14.0: enabled 1
+PCI: 00:15.0: enabled 0
+PCI: 00:15.1: enabled 0
+PCI: 00:15.2: enabled 0
+PCI: 00:15.3: enabled 0
+PCI: 00:15.4: enabled 0
+PCI: 00:15.5: enabled 0
+PCI: 00:15.6: enabled 0
+PCI: 00:16.0: enabled 1
+PCI: 00:16.1: enabled 0
+PCI: 00:16.2: enabled 0
+PCI: 00:16.3: enabled 0
+PCI: 00:17.0: enabled 0
+PCI: 00:19.0: enabled 0
+PCI: 00:1b.0: enabled 1
+PCI: 00:1c.0: enabled 1
+PCI: 00:1c.1: enabled 0
+PCI: 00:1c.2: enabled 1
+PCI: 00:1c.3: enabled 1
+PCI: 00:1c.4: enabled 0
+PCI: 00:1c.5: enabled 0
+PCI: 00:1d.0: enabled 0
+PCI: 00:1e.0: enabled 0
+PCI: 00:1f.0: enabled 1
+PNP: 0c09.0: enabled 1
+PCI: 00:1f.2: enabled 1
+PCI: 00:1f.3: enabled 1
+PCI: 00:1f.6: enabled 0
+PCI: 02:00.0: enabled 1
+PCI: 03:00.0: enabled 1
+APIC: 01: enabled 1
+APIC: 02: enabled 1
+APIC: 03: enabled 1
+BS: BS_DEV_INIT times (us): entry 11 run 281508 exit 2
+Finalize devices...
+PCI: 00:16.0 final
+Devices finalized
+BS: BS_POST_DEVICE times (us): entry 2 run 23 exit 2
+BS: BS_OS_RESUME_CHECK times (us): entry 2 run 2 exit 2
+FMAP: Found "FLASH" version 1.1 at 200000.
+FMAP: base = ff800000 size = 800000 #areas = 3
+MRC: Checking cached data update for 'RW_MRC_CACHE'.
+Manufacturer: c2
+SF: Detected MX25L6405D with sector size 0x1000, total 0x800000
+MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
+CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
+CBFS: Locating 'fallback/dsdt.aml'
+CBFS: Found @ offset 55d40 size 34e1
+CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
+CBFS: Locating 'fallback/slic'
+CBFS: 'fallback/slic' not found.
+ACPI: Writing ACPI tables at 7cf22000.
+ACPI: * FACS
+ACPI: * DSDT
+ACPI: * FADT
+SCI is IRQ9
+ACPI: added table 1/32, length now 40
+ACPI: * SSDT
+Found 1 CPU(s) with 4 core(s) each.
+PSS: 2201MHz power 15000 control 0x1b00 status 0x1b00
+PSS: 2200MHz power 15000 control 0x1600 status 0x1600
+PSS: 1700MHz power 10919 control 0x1100 status 0x1100
+PSS: 1300MHz power 7965 control 0xd00 status 0xd00
+PSS: 900MHz power 5257 control 0x900 status 0x900
+PSS: 500MHz power 2778 control 0x500 status 0x500
+PSS: 2201MHz power 15000 control 0x1b00 status 0x1b00
+PSS: 2200MHz power 15000 control 0x1600 status 0x1600
+PSS: 1700MHz power 10919 control 0x1100 status 0x1100
+PSS: 1300MHz power 7965 control 0xd00 status 0xd00
+PSS: 900MHz power 5257 control 0x900 status 0x900
+PSS: 500MHz power 2778 control 0x500 status 0x500
+PSS: 2201MHz power 15000 control 0x1b00 status 0x1b00
+PSS: 2200MHz power 15000 control 0x1600 status 0x1600
+PSS: 1700MHz power 10919 control 0x1100 status 0x1100
+PSS: 1300MHz power 7965 control 0xd00 status 0xd00
+PSS: 900MHz power 5257 control 0x900 status 0x900
+PSS: 500MHz power 2778 control 0x500 status 0x500
+PSS: 2201MHz power 15000 control 0x1b00 status 0x1b00
+PSS: 2200MHz power 15000 control 0x1600 status 0x1600
+PSS: 1700MHz power 10919 control 0x1100 status 0x1100
+PSS: 1300MHz power 7965 control 0xd00 status 0xd00
+PSS: 900MHz power 5257 control 0x900 status 0x900
+PSS: 500MHz power 2778 control 0x500 status 0x500
+ACPI: added table 2/32, length now 44
+ACPI: * MCFG
+ACPI: added table 3/32, length now 48
+ACPI: * TCPA
+TCPA log created at 7cf12000
+ACPI: added table 4/32, length now 52
+ACPI: * MADT
+SCI is IRQ9
+ACPI: added table 5/32, length now 56
+current = 7cf26a50
+ACPI: * HPET
+ACPI: added table 6/32, length now 60
+ACPI: done.
+ACPI tables: 19088 bytes.
+smbios_write_tables: 7cf11000
+Create SMBIOS type 17
+Root Device (Purism Librem 13)
+CPU_CLUSTER: 0 (Intel Broadwell)
+APIC: 00 (Intel Broadwell)
+DOMAIN: 0000 (Intel Broadwell)
+PCI: 00:00.0 (Intel Broadwell)
+PCI: 00:02.0 (Intel Broadwell)
+PCI: 00:03.0 (Intel Broadwell)
+PCI: 00:13.0 (Intel Broadwell)
+PCI: 00:14.0 (Intel Broadwell)
+PCI: 00:15.0 (Intel Broadwell)
+PCI: 00:15.1 (Intel Broadwell)
+PCI: 00:15.2 (Intel Broadwell)
+PCI: 00:15.3 (Intel Broadwell)
+PCI: 00:15.4 (Intel Broadwell)
+PCI: 00:15.5 (Intel Broadwell)
+PCI: 00:15.6 (Intel Broadwell)
+PCI: 00:16.0 (Intel Broadwell)
+PCI: 00:16.1 (Intel Broadwell)
+PCI: 00:16.2 (Intel Broadwell)
+PCI: 00:16.3 (Intel Broadwell)
+PCI: 00:17.0 (Intel Broadwell)
+PCI: 00:19.0 (Intel Broadwell)
+PCI: 00:1b.0 (Intel Broadwell)
+PCI: 00:1c.0 (Intel Broadwell)
+PCI: 00:1c.1 (Intel Broadwell)
+PCI: 00:1c.2 (Intel Broadwell)
+PCI: 00:1c.3 (Intel Broadwell)
+PCI: 00:1c.4 (Intel Broadwell)
+PCI: 00:1c.5 (Intel Broadwell)
+PCI: 00:1d.0 (Intel Broadwell)
+PCI: 00:1e.0 (Intel Broadwell)
+PCI: 00:1f.0 (Intel Broadwell)
+PNP: 0c09.0 (unknown)
+PCI: 00:1f.2 (Intel Broadwell)
+PCI: 00:1f.3 (Intel Broadwell)
+PCI: 00:1f.6 (Intel Broadwell)
+PCI: 02:00.0 (unknown)
+PCI: 03:00.0 (unknown)
+APIC: 01 (unknown)
+APIC: 02 (unknown)
+APIC: 03 (unknown)
+SMBIOS tables: 472 bytes.
+Writing table forward entry at 0x00000500
+Wrote coreboot table at: 00000500, 0x10 bytes, checksum 22ea
+Writing coreboot table at 0x7cf46000
+ 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
+ 1. 0000000000001000-000000000009ffff: RAM
+ 2. 00000000000a0000-00000000000fffff: RESERVED
+ 3. 0000000000100000-000000007cf10fff: RAM
+ 4. 000000007cf11000-000000007cffffff: CONFIGURATION TABLES
+ 5. 000000007d000000-000000007fffffff: RESERVED
+ 6. 00000000f0000000-00000000f3ffffff: RESERVED
+ 7. 00000000fed10000-00000000fed19fff: RESERVED
+ 8. 00000000fed80000-00000000fed84fff: RESERVED
+ 9. 0000000100000000-000000027fffffff: RAM
+CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
+Wrote coreboot table at: 7cf46000, 0x3a4 bytes, checksum e114
+coreboot table: 956 bytes.
+IMD ROOT 0. 7cfff000 00001000
+IMD SMALL 1. 7cffe000 00001000
+CONSOLE 2. 7cfde000 00020000
+TIME STAMP 3. 7cfdd000 00000400
+MRC DATA 4. 7cfdb000 00001876
+ROMSTG STCK 5. 7cfd6000 00005000
+RAMSTAGE 6. 7cf93000 00043000
+ACPI GNVS 7. 7cf91000 00001051
+REFCODE 8. 7cf5e000 00033000
+SMM BACKUP 9. 7cf4e000 00010000
+COREBOOT 10. 7cf46000 00008000
+ACPI 11. 7cf22000 00024000
+TCPA LOG 12. 7cf12000 00010000
+SMBIOS 13. 7cf11000 00000800
+IMD small region:
+ IMD ROOT 0. 7cffec00 00000400
+ CAR GLOBALS 1. 7cffea80 00000180
+ POWER STATE 2. 7cffea40 0000003c
+ MEM INFO 3. 7cffe8e0 00000141
+ ROMSTAGE 4. 7cffe8c0 00000004
+ GNVS PTR 5. 7cffe8a0 00000004
+BS: BS_WRITE_TABLES times (us): entry 6480 run 2328 exit 2
+CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
+CBFS: Locating 'fallback/payload'
+CBFS: Found @ offset 59280 size f664
+Loading segment from ROM address 0xffa593b8
+ code (compression=1)
+ New segment dstaddr 0xe31e0 memsize 0x1ce20 srcaddr 0xffa593f0 filesize 0xf62c
+Loading segment from ROM address 0xffa593d4
+ Entry Point 0x000ff06e
+Payload being loaded at below 1MiB without region being marked as RAM usable.
+Loading Segment: addr: 0x00000000000e31e0 memsz: 0x000000000001ce20 filesz: 0x000000000000f62c
+lb: [0x000000007cf94000, 0x000000007cfd5730)
+Post relocation: addr: 0x00000000000e31e0 memsz: 0x000000000001ce20 filesz: 0x000000000000f62c
+using LZMA
+[ 0x000e31e0, 00100000, 0x00100000) <- ffa593f0
+dest 000e31e0, end 00100000, bouncebuffer ffffffff
+Loaded segments
+Finalizing chipset.
+Finalizing SMM.
+BS: BS_PAYLOAD_LOAD times (us): entry 2 run 15914 exit 29
+Jumping to boot code at 000ff06e(7cf46000)
+CPU0: stack: 7cfc7000 - 7cfc8000, lowest used address 7cfc7290, stack used: 3440 bytes
+SeaBIOS (version rel-1.10.1-0-g8891697)
+BUILD: gcc: (coreboot toolchain v1.43 August 31st, 2016) 5.3.0 binutils: (GNU Binutils) 2.26.1
+Found coreboot cbmem console @ 7cfde000
+Found mainboard Purism Librem 13
+Relocating init from 0x000e4740 to 0x7cec4e20 (size 49472)
+Found CBFS header at 0xffa00138
+multiboot: eax=7cfbefe0, ebx=7cfbef34
+boot order:
+1: /pci@i0cf8/*@1f,2/drive@3/disk@0
+2: /pci@i0cf8/*@1f,2/drive@0/disk@0
+3: /rom@img/memtest
+4:
+Found 13 PCI devices (max PCI bus is 03)
+Copying SMBIOS entry point from 0x7cf11000 to 0x000f0860
+Copying ACPI RSDP from 0x7cf22000 to 0x000f0830
+Using pmtimer, ioport 0x1008
+Scan for VGA option rom
+Running option rom at c000:0003
+Turning on vga text mode console
+SeaBIOS (version rel-1.10.1-0-g8891697)
+XHCI init on dev 00:14.0: regs @ 0xe1300000, 15 ports, 32 slots, 32 byte contexts
+XHCI protocol USB 2.00, 11 ports (offset 1), def 3018
+XHCI protocol USB 3.00, 4 ports (offset 12), def 1000
+XHCI extcap 0xc1 @ 0xe1308040
+XHCI extcap 0xc0 @ 0xe1308070
+XHCI extcap 0x1 @ 0xe1308460
+XHCI extcap 0xa @ 0xe1308480
+AHCI controller at 00:1f.2, iobase 0xe1310000, irq 10
+Found 0 lpt ports
+Found 0 serial ports
+Searching bootorder for: /rom@img/memtest
+Searching bootorder for: /pci@i0cf8/*@1f,2/drive@3/disk@0
+AHCI/3: Set transfer mode to UDMA-6
+AHCI/3: registering: "AHCI/3: Samsung SSD 850 EVO M.2 250GB ATA-9 Hard-Disk (232 GiBytes)"
+Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
+AHCI/0: Set transfer mode to UDMA-6
+AHCI/0: registering: "AHCI/0: Hitachi HTS545050A7E380 ATA-8 Hard-Disk (465 GiBytes)"
+PS2 keyboard initialized
+XHCI port #4: 0x00200603, powered, enabled, pls 0, speed 1 [Full]
+xhci_realloc_pipe: reconf ctl endpoint pkt size: 8 -> 64
+XHCI port #5: 0x00200603, powered, enabled, pls 0, speed 1 [Full]
+WARNING - Timeout at xhci_event_wait:698!
+xhci_alloc_pipe: address device: failed (cc -1)
+WARNING - Timeout at xhci_event_wait:698!
+xhci_alloc_pipe: disable failed (cc -1)
+XHCI no devices found
+All threads complete.
+Scan for option roms
+
+Press ESC for boot menu.
+
+Turning on vga text mode console
+SeaBIOS (version rel-1.10.1-0-g8891697)
+Searching bootorder for: HALT
+drive 0x000f07c0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=488397168
+drive 0x000f0770: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=976773168
+Space available for UMB: d0000-ee800, f0000-f0770
+Returned 188416 bytes of ZoneHigh
+e820 map has 9 items:
+ 0: 0000000000000000 - 000000000009fc00 = 1 RAM
+ 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
+ 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
+ 3: 0000000000100000 - 000000007ceff000 = 1 RAM
+ 4: 000000007ceff000 - 0000000080000000 = 2 RESERVED
+ 5: 00000000f0000000 - 00000000f4000000 = 2 RESERVED
+ 6: 00000000fed10000 - 00000000fed1a000 = 2 RESERVED
+ 7: 00000000fed80000 - 00000000fed85000 = 2 RESERVED
+ 8: 0000000100000000 - 0000000280000000 = 1 RAM
+enter handle_19:
+ NULL
+Booting from Hard Disk...
+Booting from 0000:7c00
+