Revert "lenovo/t400/4.5-1564-g6fa36c9c2c-dirty/2017-04-16T13_28_27Z"
This reverts commit e5454d36ca2f96e452a228db9a1485bff2e8f32e.
The commit in question deletes a lot of unrelated files, and needs to be
reverted.
diff --git a/msi/ms7135/4.3-821-g4488d73/2016-04-25T17_51_55Z/coreboot_console.txt b/msi/ms7135/4.3-821-g4488d73/2016-04-25T17_51_55Z/coreboot_console.txt
new file mode 100644
index 0000000..1a310dc
--- /dev/null
+++ b/msi/ms7135/4.3-821-g4488d73/2016-04-25T17_51_55Z/coreboot_console.txt
@@ -0,0 +1,1044 @@
+
+
+coreboot-4.3-821-g4488d73 Mon Apr 25 17:51:55 UTC 2016 ramstage starting...
+Enumerating buses...
+Show all devs... Before device enumeration.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+DOMAIN: 0000: enabled 1
+PCI: 00:18.0: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:01.0: enabled 1
+PNP: 004e.0: enabled 1
+PNP: 004e.1: enabled 1
+PNP: 004e.2: enabled 1
+PNP: 004e.3: enabled 1
+PNP: 004e.5: enabled 1
+PNP: 004e.7: enabled 0
+PNP: 004e.8: enabled 0
+PNP: 004e.9: enabled 0
+PNP: 004e.a: enabled 0
+PNP: 004e.b: enabled 1
+PCI: 00:01.1: enabled 1
+PCI: 00:02.0: enabled 1
+PCI: 00:02.1: enabled 1
+PCI: 00:04.0: enabled 1
+PCI: 00:04.1: enabled 0
+PCI: 00:06.0: enabled 1
+PCI: 00:07.0: enabled 1
+PCI: 00:08.0: enabled 1
+PCI: 00:09.0: enabled 1
+PCI: 00:0a.0: enabled 1
+PCI: 00:0b.0: enabled 0
+PCI: 00:0c.0: enabled 0
+PCI: 00:0d.0: enabled 1
+PCI: 00:0e.0: enabled 1
+PCI: 00:18.1: enabled 1
+PCI: 00:18.2: enabled 1
+PCI: 00:18.3: enabled 1
+Compare with tree...
+Root Device: enabled 1
+ CPU_CLUSTER: 0: enabled 1
+ APIC: 00: enabled 1
+ DOMAIN: 0000: enabled 1
+ PCI: 00:18.0: enabled 1
+ PCI: 00:00.0: enabled 1
+ PCI: 00:01.0: enabled 1
+ PNP: 004e.0: enabled 1
+ PNP: 004e.1: enabled 1
+ PNP: 004e.2: enabled 1
+ PNP: 004e.3: enabled 1
+ PNP: 004e.5: enabled 1
+ PNP: 004e.7: enabled 0
+ PNP: 004e.8: enabled 0
+ PNP: 004e.9: enabled 0
+ PNP: 004e.a: enabled 0
+ PNP: 004e.b: enabled 1
+ PCI: 00:01.1: enabled 1
+ PCI: 00:02.0: enabled 1
+ PCI: 00:02.1: enabled 1
+ PCI: 00:04.0: enabled 1
+ PCI: 00:04.1: enabled 0
+ PCI: 00:06.0: enabled 1
+ PCI: 00:07.0: enabled 1
+ PCI: 00:08.0: enabled 1
+ PCI: 00:09.0: enabled 1
+ PCI: 00:0a.0: enabled 1
+ PCI: 00:0b.0: enabled 0
+ PCI: 00:0c.0: enabled 0
+ PCI: 00:0d.0: enabled 1
+ PCI: 00:0e.0: enabled 1
+ PCI: 00:18.1: enabled 1
+ PCI: 00:18.2: enabled 1
+ PCI: 00:18.3: enabled 1
+Root Device scanning...
+root_dev_scan_bus for Root Device
+setup_bsp_ramtop, TOP MEM: msr.lo = 0x20000000, msr.hi = 0x00000000
+setup_bsp_ramtop, TOP MEM2: msr.lo = 0x00000000, msr.hi = 0x00000000
+CPU_CLUSTER: 0 enabled
+DOMAIN: 0000 enabled
+CPU_CLUSTER: 0 scanning...
+ PCI: 00:18.3 siblings=0
+ Found Rev E or Rev F later single core
+CPU: APIC: 00 enabled
+scan_bus: scanning of bus CPU_CLUSTER: 0 took 0 usecs
+DOMAIN: 0000 scanning...
+PCI: pci_scan_bus for bus 00
+PCI: 00:18.0 [1022/1100] bus ops
+PCI: 00:18.0 [1022/1100] enabled
+PCI: 00:18.1 [1022/1101] enabled
+PCI: 00:18.2 [1022/1102] enabled
+PCI: 00:18.3 [1022/1103] ops
+PCI: 00:18.3 [1022/1103] enabled
+PCI: 00:18.0 scanning...
+do_hypertransport_scan_chain for bus 00
+PCI: 00:00.0 [10de/005e] ops
+PCI: 00:00.0 [10de/005e] enabled
+Capability: type 0x08 @ 0x44
+flags: 0x01e0
+PCI: 00:00.0 count: 000f static_count: 000f
+PCI: 00:00.0 [10de/005e] enabled next_unitid: 000f
+PCI: pci_scan_bus for bus 00
+PCI: 00:00.0 [10de/005e] enabled
+PCI: 00:01.0 [10de/0050] bus ops
+PCI: 00:01.0 [10de/0050] enabled
+PCI: 00:01.1 [10de/0052] bus ops
+PCI: 00:01.1 [10de/0052] enabled
+PCI: 00:02.0 [10de/005a] ops
+PCI: 00:02.0 [10de/005a] enabled
+PCI: 00:02.1 [10de/005b] ops
+PCI: 00:02.1 [10de/005b] enabled
+PCI: 00:04.0 [10de/0059] ops
+PCI: 00:04.0 [10de/0059] enabled
+PCI: 00:04.1 [10de/0058] ops
+PCI: 00:04.1 [10de/0058] disabled
+PCI: 00:06.0 [10de/0053] ops
+PCI: 00:06.0 [10de/0053] enabled
+PCI: 00:07.0 [10de/0054] ops
+PCI: 00:07.0 [10de/0054] enabled
+PCI: 00:08.0 [10de/0055] ops
+PCI: 00:08.0 [10de/0055] enabled
+PCI: 00:09.0 [10de/005c] bus ops
+PCI: 00:09.0 [10de/005c] enabled
+PCI: 00:0a.0 [10de/0057] ops
+PCI: 00:0a.0 [10de/0057] enabled
+PCI: 00:0d.0 [10de/005d] bus ops
+PCI: 00:0d.0 [10de/005d] enabled
+PCI: 00:0e.0 [10de/005d] bus ops
+PCI: 00:0e.0 [10de/005d] enabled
+PCI: 00:01.0 scanning...
+scan_lpc_bus for PCI: 00:01.0
+PNP: 004e.0 enabled
+PNP: 004e.1 enabled
+PNP: 004e.2 enabled
+PNP: 004e.3 enabled
+PNP: 004e.5 enabled
+PNP: 004e.7 disabled
+PNP: 004e.8 disabled
+PNP: 004e.9 disabled
+PNP: 004e.a disabled
+PNP: 004e.b enabled
+scan_lpc_bus for PCI: 00:01.0 done
+scan_bus: scanning of bus PCI: 00:01.0 took 0 usecs
+PCI: 00:01.1 scanning...
+scan_smbus for PCI: 00:01.1
+scan_smbus for PCI: 00:01.1 done
+scan_bus: scanning of bus PCI: 00:01.1 took 0 usecs
+PCI: 00:09.0 scanning...
+do_pci_scan_bridge for PCI: 00:09.0
+PCI: pci_scan_bus for bus 01
+PCI: 01:00.0 [10de/0181] enabled
+scan_bus: scanning of bus PCI: 00:09.0 took 0 usecs
+PCI: 00:0d.0 scanning...
+do_pci_scan_bridge for PCI: 00:0d.0
+PCI: pci_scan_bus for bus 02
+PCI: 02:00.0 [1b73/1000] enabled
+scan_bus: scanning of bus PCI: 00:0d.0 took 0 usecs
+PCI: 00:0e.0 scanning...
+do_pci_scan_bridge for PCI: 00:0e.0
+PCI: pci_scan_bus for bus 03
+scan_bus: scanning of bus PCI: 00:0e.0 took 0 usecs
+scan_bus: scanning of bus PCI: 00:18.0 took 0 usecs
+DOMAIN: 0000 passpw: enabled
+scan_bus: scanning of bus DOMAIN: 0000 took 0 usecs
+root_dev_scan_bus for Root Device done
+scan_bus: scanning of bus Root Device took 0 usecs
+done
+found VGA at PCI: 01:00.0
+Setting up VGA for PCI: 01:00.0
+Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:09.0
+Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0
+Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
+Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
+Allocating resources...
+Reading resources...
+Root Device read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0
+VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device
+PCI: 00:18.0 read_resources bus 0 link: 0
+PCI: 00:01.0 read_resources bus 0 link: 0
+PCI: 00:01.0 read_resources bus 0 link: 0 done
+PCI: 00:09.0 read_resources bus 1 link: 0
+PCI: 00:09.0 read_resources bus 1 link: 0 done
+PCI: 00:0d.0 read_resources bus 2 link: 0
+PCI: 00:0d.0 read_resources bus 2 link: 0 done
+PCI: 00:0e.0 read_resources bus 3 link: 0
+PCI: 00:0e.0 read_resources bus 3 link: 0 done
+PCI: 00:18.0 read_resources bus 0 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0 done
+Root Device read_resources bus 0 link: 0 done
+Done reading resources.
+Show resources in subtree (Root Device)...After reading.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ DOMAIN: 0000 child on link 0 PCI: 00:18.0
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
+ PCI: 00:18.0 child on link 0 PCI: 00:00.0
+ PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 0
+ PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 2
+ PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80200 index 1
+ PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit ffffffff flags c0000200 index 4
+ PCI: 00:00.0
+ PCI: 00:01.0 child on link 0 PNP: 004e.0
+ PCI: 00:01.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 10
+ PCI: 00:01.0 resource base fec00000 size 1000 align 12 gran 12 limit ffffffff flags c0000200 index 14
+ PCI: 00:01.0 resource base fed00000 size 1000 align 12 gran 12 limit ffffffff flags c0000200 index 44
+ PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 60
+ PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 64
+ PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 68
+ PCI: 00:01.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:01.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PNP: 004e.0
+ PNP: 004e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 004e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 004e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
+ PNP: 004e.1
+ PNP: 004e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 004e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 004e.1 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
+ PNP: 004e.2
+ PNP: 004e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 004e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 004e.3
+ PNP: 004e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 004e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1
+ PNP: 004e.5
+ PNP: 004e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
+ PNP: 004e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
+ PNP: 004e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 004e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
+ PNP: 004e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0
+ PNP: 004e.7
+ PNP: 004e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
+ PNP: 004e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62
+ PNP: 004e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 004e.8
+ PNP: 004e.9
+ PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30
+ PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0
+ PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1
+ PNP: 004e.a
+ PNP: 004e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 004e.b
+ PNP: 004e.b resource base 290 size 8 align 3 gran 3 limit fff flags c0000100 index 60
+ PNP: 004e.b resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PCI: 00:01.1
+ PCI: 00:01.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 10
+ PCI: 00:01.1 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
+ PCI: 00:01.1 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 24
+ PCI: 00:02.0
+ PCI: 00:02.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+ PCI: 00:02.1
+ PCI: 00:02.1 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
+ PCI: 00:04.0
+ PCI: 00:04.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
+ PCI: 00:04.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14
+ PCI: 00:04.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
+ PCI: 00:04.1
+ PCI: 00:06.0
+ PCI: 00:06.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
+ PCI: 00:07.0
+ PCI: 00:07.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
+ PCI: 00:07.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
+ PCI: 00:07.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
+ PCI: 00:07.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
+ PCI: 00:07.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
+ PCI: 00:07.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 24
+ PCI: 00:08.0
+ PCI: 00:08.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
+ PCI: 00:08.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
+ PCI: 00:08.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
+ PCI: 00:08.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
+ PCI: 00:08.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
+ PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 24
+ PCI: 00:09.0 child on link 0 PCI: 01:00.0
+ PCI: 00:09.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
+ PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 01:00.0
+ PCI: 01:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff flags 200 index 10
+ PCI: 01:00.0 resource base 0 size 8000000 align 27 gran 27 limit ffffffff flags 1200 index 14
+ PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
+ PCI: 00:0a.0
+ PCI: 00:0a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+ PCI: 00:0a.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 14
+ PCI: 00:0b.0
+ PCI: 00:0c.0
+ PCI: 00:0d.0 child on link 0 PCI: 02:00.0
+ PCI: 00:0d.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
+ PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 02:00.0
+ PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 200 index 10
+ PCI: 00:0e.0
+ PCI: 00:0e.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
+ PCI: 00:0e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:0e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 00:18.1
+ PCI: 00:18.2
+ PCI: 00:18.3
+ PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94
+DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
+PCI: 00:18.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:09.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:09.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
+PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
+PCI: 00:0e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
+PCI: 00:0e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
+PCI: 00:01.0 60 * [0x0 - 0xff] io
+PCI: 00:01.0 64 * [0x400 - 0x4ff] io
+PCI: 00:01.0 68 * [0x800 - 0x8ff] io
+PCI: 00:04.0 10 * [0xc00 - 0xcff] io
+PCI: 00:04.0 14 * [0x1000 - 0x10ff] io
+PCI: 00:01.0 10 * [0x1400 - 0x147f] io
+PCI: 00:01.1 20 * [0x1480 - 0x14bf] io
+PCI: 00:01.1 24 * [0x14c0 - 0x14ff] io
+PCI: 00:01.1 10 * [0x1800 - 0x181f] io
+PCI: 00:06.0 20 * [0x1820 - 0x182f] io
+PCI: 00:07.0 20 * [0x1830 - 0x183f] io
+PCI: 00:08.0 20 * [0x1840 - 0x184f] io
+PCI: 00:07.0 10 * [0x1850 - 0x1857] io
+PCI: 00:07.0 18 * [0x1858 - 0x185f] io
+PCI: 00:08.0 10 * [0x1860 - 0x1867] io
+PCI: 00:08.0 18 * [0x1868 - 0x186f] io
+PCI: 00:0a.0 14 * [0x1870 - 0x1877] io
+PCI: 00:07.0 14 * [0x1878 - 0x187b] io
+PCI: 00:07.0 1c * [0x187c - 0x187f] io
+PCI: 00:08.0 14 * [0x1880 - 0x1883] io
+PCI: 00:08.0 1c * [0x1884 - 0x1887] io
+PCI: 00:18.0 io: base: 1888 size: 2000 align: 12 gran: 12 limit: ffff done
+PCI: 00:18.0 00 * [0x0 - 0x1fff] io
+DOMAIN: 0000 io: base: 2000 size: 2000 align: 12 gran: 0 limit: ffff done
+DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
+PCI: 00:18.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
+PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 01:00.0 14 * [0x0 - 0x7ffffff] prefmem
+PCI: 00:09.0 prefmem: base: 8000000 size: 8000000 align: 27 gran: 20 limit: ffffffff done
+PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:0e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:0e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:09.0 24 * [0x0 - 0x7ffffff] prefmem
+PCI: 00:18.0 prefmem: base: 8000000 size: 8000000 align: 27 gran: 20 limit: ffffffff done
+PCI: 00:18.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:09.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 01:00.0 10 * [0x0 - 0xffffff] mem
+PCI: 01:00.0 30 * [0x1000000 - 0x101ffff] mem
+PCI: 00:09.0 mem: base: 1020000 size: 1100000 align: 24 gran: 20 limit: ffffffff done
+PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 02:00.0 10 * [0x0 - 0xffff] mem
+PCI: 00:0d.0 mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:0e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:0e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:09.0 20 * [0x0 - 0x10fffff] mem
+PCI: 00:0d.0 20 * [0x1100000 - 0x11fffff] mem
+PCI: 00:02.0 10 * [0x1200000 - 0x1200fff] mem
+PCI: 00:04.0 18 * [0x1201000 - 0x1201fff] mem
+PCI: 00:07.0 24 * [0x1202000 - 0x1202fff] mem
+PCI: 00:08.0 24 * [0x1203000 - 0x1203fff] mem
+PCI: 00:0a.0 10 * [0x1204000 - 0x1204fff] mem
+PCI: 00:02.1 10 * [0x1205000 - 0x12050ff] mem
+PCI: 00:18.0 mem: base: 1205100 size: 1300000 align: 24 gran: 20 limit: ffffffff done
+PCI: 00:18.0 02 * [0x0 - 0x7ffffff] prefmem
+PCI: 00:18.3 94 * [0x8000000 - 0xbffffff] mem
+PCI: 00:18.0 01 * [0xc000000 - 0xd2fffff] mem
+DOMAIN: 0000 mem: base: d300000 size: d300000 align: 27 gran: 0 limit: ffffffff done
+avoid_fixed_resources: DOMAIN: 0000
+avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
+constrain_resources: PCI: 00:18.0 04 base 000a0000 limit 000bffff mem (fixed)
+constrain_resources: PCI: 00:01.0 14 base fec00000 limit fec00fff mem (fixed)
+constrain_resources: PCI: 00:01.0 10000000 base 00000000 limit 00000fff io (fixed)
+avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 base f0000000 limit febfffff
+Setting resources...
+DOMAIN: 0000 io: base:1000 size:2000 align:12 gran:0 limit:ffff
+PCI: 00:18.0 00 * [0x1000 - 0x2fff] io
+DOMAIN: 0000 io: next_base: 3000 size: 2000 align: 12 gran: 0 done
+PCI: 00:18.0 io: base:1000 size:2000 align:12 gran:12 limit:2fff
+PCI: 00:01.0 60 * [0x1000 - 0x10ff] io
+PCI: 00:01.0 64 * [0x1400 - 0x14ff] io
+PCI: 00:01.0 68 * [0x1800 - 0x18ff] io
+PCI: 00:04.0 10 * [0x1c00 - 0x1cff] io
+PCI: 00:04.0 14 * [0x2000 - 0x20ff] io
+PCI: 00:01.0 10 * [0x2400 - 0x247f] io
+PCI: 00:01.1 20 * [0x2480 - 0x24bf] io
+PCI: 00:01.1 24 * [0x24c0 - 0x24ff] io
+PCI: 00:01.1 10 * [0x2800 - 0x281f] io
+PCI: 00:06.0 20 * [0x2820 - 0x282f] io
+PCI: 00:07.0 20 * [0x2830 - 0x283f] io
+PCI: 00:08.0 20 * [0x2840 - 0x284f] io
+PCI: 00:07.0 10 * [0x2850 - 0x2857] io
+PCI: 00:07.0 18 * [0x2858 - 0x285f] io
+PCI: 00:08.0 10 * [0x2860 - 0x2867] io
+PCI: 00:08.0 18 * [0x2868 - 0x286f] io
+PCI: 00:0a.0 14 * [0x2870 - 0x2877] io
+PCI: 00:07.0 14 * [0x2878 - 0x287b] io
+PCI: 00:07.0 1c * [0x287c - 0x287f] io
+PCI: 00:08.0 14 * [0x2880 - 0x2883] io
+PCI: 00:08.0 1c * [0x2884 - 0x2887] io
+PCI: 00:18.0 io: next_base: 2888 size: 2000 align: 12 gran: 12 done
+PCI: 00:09.0 io: base:2fff size:0 align:12 gran:12 limit:2fff
+PCI: 00:09.0 io: next_base: 2fff size: 0 align: 12 gran: 12 done
+PCI: 00:0d.0 io: base:2fff size:0 align:12 gran:12 limit:2fff
+PCI: 00:0d.0 io: next_base: 2fff size: 0 align: 12 gran: 12 done
+PCI: 00:0e.0 io: base:2fff size:0 align:12 gran:12 limit:2fff
+PCI: 00:0e.0 io: next_base: 2fff size: 0 align: 12 gran: 12 done
+DOMAIN: 0000 mem: base:f0000000 size:d300000 align:27 gran:0 limit:febfffff
+PCI: 00:18.0 02 * [0xf0000000 - 0xf7ffffff] prefmem
+PCI: 00:18.3 94 * [0xf8000000 - 0xfbffffff] mem
+PCI: 00:18.0 01 * [0xfc000000 - 0xfd2fffff] mem
+DOMAIN: 0000 mem: next_base: fd300000 size: d300000 align: 27 gran: 0 done
+PCI: 00:18.0 prefmem: base:f0000000 size:8000000 align:27 gran:20 limit:f7ffffff
+PCI: 00:09.0 24 * [0xf0000000 - 0xf7ffffff] prefmem
+PCI: 00:18.0 prefmem: next_base: f8000000 size: 8000000 align: 27 gran: 20 done
+PCI: 00:09.0 prefmem: base:f0000000 size:8000000 align:27 gran:20 limit:f7ffffff
+PCI: 01:00.0 14 * [0xf0000000 - 0xf7ffffff] prefmem
+PCI: 00:09.0 prefmem: next_base: f8000000 size: 8000000 align: 27 gran: 20 done
+PCI: 00:0d.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
+PCI: 00:0d.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
+PCI: 00:0e.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
+PCI: 00:0e.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
+PCI: 00:18.0 mem: base:fc000000 size:1300000 align:24 gran:20 limit:fd2fffff
+PCI: 00:09.0 20 * [0xfc000000 - 0xfd0fffff] mem
+PCI: 00:0d.0 20 * [0xfd100000 - 0xfd1fffff] mem
+PCI: 00:02.0 10 * [0xfd200000 - 0xfd200fff] mem
+PCI: 00:04.0 18 * [0xfd201000 - 0xfd201fff] mem
+PCI: 00:07.0 24 * [0xfd202000 - 0xfd202fff] mem
+PCI: 00:08.0 24 * [0xfd203000 - 0xfd203fff] mem
+PCI: 00:0a.0 10 * [0xfd204000 - 0xfd204fff] mem
+PCI: 00:02.1 10 * [0xfd205000 - 0xfd2050ff] mem
+PCI: 00:18.0 mem: next_base: fd205100 size: 1300000 align: 24 gran: 20 done
+PCI: 00:09.0 mem: base:fc000000 size:1100000 align:24 gran:20 limit:fd0fffff
+PCI: 01:00.0 10 * [0xfc000000 - 0xfcffffff] mem
+PCI: 01:00.0 30 * [0xfd000000 - 0xfd01ffff] mem
+PCI: 00:09.0 mem: next_base: fd020000 size: 1100000 align: 24 gran: 20 done
+PCI: 00:0d.0 mem: base:fd100000 size:100000 align:20 gran:20 limit:fd1fffff
+PCI: 02:00.0 10 * [0xfd100000 - 0xfd10ffff] mem
+PCI: 00:0d.0 mem: next_base: fd110000 size: 100000 align: 20 gran: 20 done
+PCI: 00:0e.0 mem: base:fd2fffff size:0 align:20 gran:20 limit:fd2fffff
+PCI: 00:0e.0 mem: next_base: fd2fffff size: 0 align: 20 gran: 20 done
+Root Device assign_resources, bus 0 link: 0
+0: mmio_basek=003c0000, basek=00000300, limitk=00080000
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+amdk8_set_resource, enabling legacy VGA IO forwarding for PCI: 00:18.0 link 0x0
+PCI: 00:18.0 1d8 <- [0x0000001000 - 0x0000002fff] size 0x00002000 gran 0x0c io <node 0 link 0>
+PCI: 00:18.0 1b8 <- [0x00f0000000 - 0x00f7ffffff] size 0x08000000 gran 0x14 prefmem <node 0 link 0>
+PCI: 00:18.0 1b0 <- [0x00fc000000 - 0x00fd2fffff] size 0x01300000 gran 0x14 mem <node 0 link 0>
+PCI: 00:18.0 1a8 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem <node 0 link 0>
+PCI: 00:18.0 assign_resources, bus 0 link: 0
+PCI: 00:01.0 10 <- [0x0000002400 - 0x000000247f] size 0x00000080 gran 0x07 io
+PCI: 00:01.0 60 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
+PCI: 00:01.0 64 <- [0x0000001400 - 0x00000014ff] size 0x00000100 gran 0x08 io
+PCI: 00:01.0 68 <- [0x0000001800 - 0x00000018ff] size 0x00000100 gran 0x08 io
+PCI: 00:01.0 assign_resources, bus 0 link: 0
+PNP: 004e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io
+PNP: 004e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq
+PNP: 004e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq
+PNP: 004e.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io
+PNP: 004e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
+PNP: 004e.1 74 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 drq
+PNP: 004e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
+PNP: 004e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
+PNP: 004e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
+PNP: 004e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
+ERROR: PNP: 004e.3 f1 irq size: 0x0000000001 not assigned
+PNP: 004e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
+PNP: 004e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
+PNP: 004e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
+PNP: 004e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
+ERROR: PNP: 004e.5 f0 irq size: 0x0000000001 not assigned
+PNP: 004e.b 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io
+PNP: 004e.b 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq
+PCI: 00:01.0 assign_resources, bus 0 link: 0
+PCI: 00:01.0 14 <- [0x00fec00000 - 0x00fec00fff] size 0x00001000 gran 0x0c mem
+PCI: 00:01.0 44 <- [0x00fed00000 - 0x00fed00fff] size 0x00001000 gran 0x0c mem
+PCI: 00:01.1 10 <- [0x0000002800 - 0x000000281f] size 0x00000020 gran 0x05 io
+PCI: 00:01.1 20 <- [0x0000002480 - 0x00000024bf] size 0x00000040 gran 0x06 io
+PCI: 00:01.1 24 <- [0x00000024c0 - 0x00000024ff] size 0x00000040 gran 0x06 io
+PCI: 00:02.0 10 <- [0x00fd200000 - 0x00fd200fff] size 0x00001000 gran 0x0c mem
+PCI: 00:02.1 10 <- [0x00fd205000 - 0x00fd2050ff] size 0x00000100 gran 0x08 mem
+PCI: 00:04.0 10 <- [0x0000001c00 - 0x0000001cff] size 0x00000100 gran 0x08 io
+PCI: 00:04.0 14 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
+PCI: 00:04.0 18 <- [0x00fd201000 - 0x00fd201fff] size 0x00001000 gran 0x0c mem
+PCI: 00:06.0 20 <- [0x0000002820 - 0x000000282f] size 0x00000010 gran 0x04 io
+PCI: 00:07.0 10 <- [0x0000002850 - 0x0000002857] size 0x00000008 gran 0x03 io
+PCI: 00:07.0 14 <- [0x0000002878 - 0x000000287b] size 0x00000004 gran 0x02 io
+PCI: 00:07.0 18 <- [0x0000002858 - 0x000000285f] size 0x00000008 gran 0x03 io
+PCI: 00:07.0 1c <- [0x000000287c - 0x000000287f] size 0x00000004 gran 0x02 io
+PCI: 00:07.0 20 <- [0x0000002830 - 0x000000283f] size 0x00000010 gran 0x04 io
+PCI: 00:07.0 24 <- [0x00fd202000 - 0x00fd202fff] size 0x00001000 gran 0x0c mem
+PCI: 00:08.0 10 <- [0x0000002860 - 0x0000002867] size 0x00000008 gran 0x03 io
+PCI: 00:08.0 14 <- [0x0000002880 - 0x0000002883] size 0x00000004 gran 0x02 io
+PCI: 00:08.0 18 <- [0x0000002868 - 0x000000286f] size 0x00000008 gran 0x03 io
+PCI: 00:08.0 1c <- [0x0000002884 - 0x0000002887] size 0x00000004 gran 0x02 io
+PCI: 00:08.0 20 <- [0x0000002840 - 0x000000284f] size 0x00000010 gran 0x04 io
+PCI: 00:08.0 24 <- [0x00fd203000 - 0x00fd203fff] size 0x00001000 gran 0x0c mem
+PCI: 00:09.0 1c <- [0x0000002fff - 0x0000002ffe] size 0x00000000 gran 0x0c bus 01 io
+PCI: 00:09.0 24 <- [0x00f0000000 - 0x00f7ffffff] size 0x08000000 gran 0x14 bus 01 prefmem
+PCI: 00:09.0 20 <- [0x00fc000000 - 0x00fd0fffff] size 0x01100000 gran 0x14 bus 01 mem
+PCI: 00:09.0 assign_resources, bus 1 link: 0
+PCI: 01:00.0 10 <- [0x00fc000000 - 0x00fcffffff] size 0x01000000 gran 0x18 mem
+PCI: 01:00.0 14 <- [0x00f0000000 - 0x00f7ffffff] size 0x08000000 gran 0x1b prefmem
+PCI: 01:00.0 30 <- [0x00fd000000 - 0x00fd01ffff] size 0x00020000 gran 0x11 romem
+PCI: 00:09.0 assign_resources, bus 1 link: 0
+PCI: 00:0a.0 10 <- [0x00fd204000 - 0x00fd204fff] size 0x00001000 gran 0x0c mem
+PCI: 00:0a.0 14 <- [0x0000002870 - 0x0000002877] size 0x00000008 gran 0x03 io
+PCI: 00:0d.0 1c <- [0x0000002fff - 0x0000002ffe] size 0x00000000 gran 0x0c bus 02 io
+PCI: 00:0d.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
+PCI: 00:0d.0 20 <- [0x00fd100000 - 0x00fd1fffff] size 0x00100000 gran 0x14 bus 02 mem
+PCI: 00:0d.0 assign_resources, bus 2 link: 0
+PCI: 02:00.0 10 <- [0x00fd100000 - 0x00fd10ffff] size 0x00010000 gran 0x10 mem
+PCI: 00:0d.0 assign_resources, bus 2 link: 0
+PCI: 00:0e.0 1c <- [0x0000002fff - 0x0000002ffe] size 0x00000000 gran 0x0c bus 03 io
+PCI: 00:0e.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 prefmem
+PCI: 00:0e.0 20 <- [0x00fd2fffff - 0x00fd2ffffe] size 0x00000000 gran 0x14 bus 03 mem
+PCI: 00:18.0 assign_resources, bus 0 link: 0
+PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem <gart>
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+Root Device assign_resources, bus 0 link: 0
+Done setting resources.
+Show resources in subtree (Root Device)...After assigning values.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ DOMAIN: 0000 child on link 0 PCI: 00:18.0
+ DOMAIN: 0000 resource base 1000 size 2000 align 12 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base f0000000 size d300000 align 27 gran 0 limit febfffff flags 40040200 index 10000100
+ DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
+ DOMAIN: 0000 resource base c0000 size 1ff40000 align 0 gran 0 limit 0 flags e0004200 index 20
+ PCI: 00:18.0 child on link 0 PCI: 00:00.0
+ PCI: 00:18.0 resource base 1000 size 2000 align 12 gran 12 limit 2fff flags 60080100 index 1d8
+ PCI: 00:18.0 resource base f0000000 size 8000000 align 27 gran 20 limit f7ffffff flags 60081200 index 1b8
+ PCI: 00:18.0 resource base fc000000 size 1300000 align 24 gran 20 limit fd2fffff flags 60080200 index 1b0
+ PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit ffffffff flags e0000200 index 1a8
+ PCI: 00:00.0
+ PCI: 00:01.0 child on link 0 PNP: 004e.0
+ PCI: 00:01.0 resource base 2400 size 80 align 7 gran 7 limit 247f flags 60000100 index 10
+ PCI: 00:01.0 resource base fec00000 size 1000 align 12 gran 12 limit ffffffff flags e0000200 index 14
+ PCI: 00:01.0 resource base fed00000 size 1000 align 12 gran 12 limit ffffffff flags e0000200 index 44
+ PCI: 00:01.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 60
+ PCI: 00:01.0 resource base 1400 size 100 align 8 gran 8 limit 14ff flags 60000100 index 64
+ PCI: 00:01.0 resource base 1800 size 100 align 8 gran 8 limit 18ff flags 60000100 index 68
+ PCI: 00:01.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:01.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PNP: 004e.0
+ PNP: 004e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 004e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 004e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
+ PNP: 004e.1
+ PNP: 004e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 004e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 004e.1 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
+ PNP: 004e.2
+ PNP: 004e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 004e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 004e.3
+ PNP: 004e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 004e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1
+ PNP: 004e.5
+ PNP: 004e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
+ PNP: 004e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62
+ PNP: 004e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 004e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72
+ PNP: 004e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0
+ PNP: 004e.7
+ PNP: 004e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
+ PNP: 004e.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62
+ PNP: 004e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 004e.8
+ PNP: 004e.9
+ PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 30
+ PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0
+ PNP: 004e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f1
+ PNP: 004e.a
+ PNP: 004e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 004e.b
+ PNP: 004e.b resource base 290 size 8 align 3 gran 3 limit fff flags e0000100 index 60
+ PNP: 004e.b resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PCI: 00:01.1
+ PCI: 00:01.1 resource base 2800 size 20 align 5 gran 5 limit 281f flags 60000100 index 10
+ PCI: 00:01.1 resource base 2480 size 40 align 6 gran 6 limit 24bf flags 60000100 index 20
+ PCI: 00:01.1 resource base 24c0 size 40 align 6 gran 6 limit 24ff flags 60000100 index 24
+ PCI: 00:02.0
+ PCI: 00:02.0 resource base fd200000 size 1000 align 12 gran 12 limit fd200fff flags 60000200 index 10
+ PCI: 00:02.1
+ PCI: 00:02.1 resource base fd205000 size 100 align 12 gran 8 limit fd2050ff flags 60000200 index 10
+ PCI: 00:04.0
+ PCI: 00:04.0 resource base 1c00 size 100 align 8 gran 8 limit 1cff flags 60000100 index 10
+ PCI: 00:04.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 14
+ PCI: 00:04.0 resource base fd201000 size 1000 align 12 gran 12 limit fd201fff flags 60000200 index 18
+ PCI: 00:04.1
+ PCI: 00:06.0
+ PCI: 00:06.0 resource base 2820 size 10 align 4 gran 4 limit 282f flags 60000100 index 20
+ PCI: 00:07.0
+ PCI: 00:07.0 resource base 2850 size 8 align 3 gran 3 limit 2857 flags 60000100 index 10
+ PCI: 00:07.0 resource base 2878 size 4 align 2 gran 2 limit 287b flags 60000100 index 14
+ PCI: 00:07.0 resource base 2858 size 8 align 3 gran 3 limit 285f flags 60000100 index 18
+ PCI: 00:07.0 resource base 287c size 4 align 2 gran 2 limit 287f flags 60000100 index 1c
+ PCI: 00:07.0 resource base 2830 size 10 align 4 gran 4 limit 283f flags 60000100 index 20
+ PCI: 00:07.0 resource base fd202000 size 1000 align 12 gran 12 limit fd202fff flags 60000200 index 24
+ PCI: 00:08.0
+ PCI: 00:08.0 resource base 2860 size 8 align 3 gran 3 limit 2867 flags 60000100 index 10
+ PCI: 00:08.0 resource base 2880 size 4 align 2 gran 2 limit 2883 flags 60000100 index 14
+ PCI: 00:08.0 resource base 2868 size 8 align 3 gran 3 limit 286f flags 60000100 index 18
+ PCI: 00:08.0 resource base 2884 size 4 align 2 gran 2 limit 2887 flags 60000100 index 1c
+ PCI: 00:08.0 resource base 2840 size 10 align 4 gran 4 limit 284f flags 60000100 index 20
+ PCI: 00:08.0 resource base fd203000 size 1000 align 12 gran 12 limit fd203fff flags 60000200 index 24
+ PCI: 00:09.0 child on link 0 PCI: 01:00.0
+ PCI: 00:09.0 resource base 2fff size 0 align 12 gran 12 limit 2fff flags 60080102 index 1c
+ PCI: 00:09.0 resource base f0000000 size 8000000 align 27 gran 20 limit f7ffffff flags 60081202 index 24
+ PCI: 00:09.0 resource base fc000000 size 1100000 align 24 gran 20 limit fd0fffff flags 60080202 index 20
+ PCI: 01:00.0
+ PCI: 01:00.0 resource base fc000000 size 1000000 align 24 gran 24 limit fcffffff flags 60000200 index 10
+ PCI: 01:00.0 resource base f0000000 size 8000000 align 27 gran 27 limit f7ffffff flags 60001200 index 14
+ PCI: 01:00.0 resource base fd000000 size 20000 align 17 gran 17 limit fd01ffff flags 60002200 index 30
+ PCI: 00:0a.0
+ PCI: 00:0a.0 resource base fd204000 size 1000 align 12 gran 12 limit fd204fff flags 60000200 index 10
+ PCI: 00:0a.0 resource base 2870 size 8 align 3 gran 3 limit 2877 flags 60000100 index 14
+ PCI: 00:0b.0
+ PCI: 00:0c.0
+ PCI: 00:0d.0 child on link 0 PCI: 02:00.0
+ PCI: 00:0d.0 resource base 2fff size 0 align 12 gran 12 limit 2fff flags 60080102 index 1c
+ PCI: 00:0d.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
+ PCI: 00:0d.0 resource base fd100000 size 100000 align 20 gran 20 limit fd1fffff flags 60080202 index 20
+ PCI: 02:00.0
+ PCI: 02:00.0 resource base fd100000 size 10000 align 16 gran 16 limit fd10ffff flags 60000200 index 10
+ PCI: 00:0e.0
+ PCI: 00:0e.0 resource base 2fff size 0 align 12 gran 12 limit 2fff flags 60080102 index 1c
+ PCI: 00:0e.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
+ PCI: 00:0e.0 resource base fd2fffff size 0 align 20 gran 20 limit fd2fffff flags 60080202 index 20
+ PCI: 00:18.1
+ PCI: 00:18.2
+ PCI: 00:18.3
+ PCI: 00:18.3 resource base f8000000 size 4000000 align 26 gran 26 limit fbffffff flags 60000200 index 94
+Done allocating resources.
+Enabling resources...
+PCI: 00:18.0 cmd <- 00
+PCI: 00:18.1 subsystem <- 1462/7135
+PCI: 00:18.1 cmd <- 00
+PCI: 00:18.2 subsystem <- 1462/7135
+PCI: 00:18.2 cmd <- 00
+PCI: 00:18.3 cmd <- 00
+PCI: 00:00.0 subsystem <- 1462/7135
+PCI: 00:00.0 cmd <- 06
+PCI: 00:01.0 subsystem <- 1462/7135
+PCI: 00:01.0 cmd <- 0f
+ck804 lpc decode:PNP: 004e.0, base=0x000003f0, end=0x000003f7
+ck804 lpc decode:PNP: 004e.1, base=0x00000378, end=0x0000037f
+ck804 lpc decode:PNP: 004e.2, base=0x000003f8, end=0x000003ff
+ck804 lpc decode:PNP: 004e.3, base=0x000002f8, end=0x000002ff
+ck804 lpc decode:PNP: 004e.5, base=0x00000060, end=0x00000060
+ck804 lpc decode:PNP: 004e.5, base=0x00000064, end=0x00000064
+ck804 lpc decode:PNP: 004e.b, base=0x00000290, end=0x00000297
+PCI: 00:01.1 subsystem <- 1462/7135
+PCI: 00:01.1 cmd <- 01
+PCI: 00:02.0 subsystem <- 1462/7135
+PCI: 00:02.0 cmd <- 02
+PCI: 00:02.1 subsystem <- 1462/7135
+PCI: 00:02.1 cmd <- 02
+PCI: 00:04.0 subsystem <- 1462/7135
+PCI: 00:04.0 cmd <- 03
+PCI: 00:06.0 subsystem <- 1462/7135
+PCI: 00:06.0 cmd <- 01
+PCI: 00:07.0 subsystem <- 1462/7135
+PCI: 00:07.0 cmd <- 03
+PCI: 00:08.0 subsystem <- 1462/7135
+PCI: 00:08.0 cmd <- 03
+PCI: 00:09.0 bridge ctrl <- 000b
+PCI: 00:09.0 cmd <- 07
+PCI: 00:0a.0 subsystem <- 1462/7135
+PCI: 00:0a.0 cmd <- 03
+PCI: 00:0d.0 bridge ctrl <- 0003
+PCI: 00:0d.0 cmd <- 06
+PCI: 00:0e.0 bridge ctrl <- 0003
+PCI: 00:0e.0 cmd <- 00
+PCI: 01:00.0 cmd <- 03
+PCI: 02:00.0 cmd <- 02
+done.
+Initializing devices...
+Root Device init ...
+CPU_CLUSTER: 0 init ...
+start_eip=0x00001000, code_size=0x00000031
+Initializing CPU #0
+CPU: vendor AMD device 20fc2
+CPU: family 0f, model 2c, stepping 02
+Enabling cache
+CPU ID 0x80000001: 20fc2
+MTRR: Physical address space:
+0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
+0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
+0x00000000000c0000 - 0x0000000020000000 size 0x1ff40000 type 6
+0x0000000020000000 - 0x00000000f0000000 size 0xd0000000 type 0
+0x00000000f0000000 - 0x00000000f8000000 size 0x08000000 type 1
+0x00000000f8000000 - 0x0000000100000000 size 0x08000000 type 0
+MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
+MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
+MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
+MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
+MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
+MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
+MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
+MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
+MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
+MTRR: default type WB/UC MTRR counts: 7/2.
+MTRR: UC selected as default type.
+MTRR: 0 base 0x0000000000000000 mask 0x000000ffe0000000 type 6
+MTRR: 1 base 0x00000000f0000000 mask 0x000000fff8000000 type 1
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+[microcode] rev id not found. Skipping microcode patch!
+CPU model AMD Sempron(tm) Processor 3400+
+Setting up local apic... apic_id: 0x00 done.
+siblings = 00, Scrubbing Disabled
+ECC Disabled
+CPU #0 initialized
+All AP CPUs stopped (0 loops)
+CPU0: stack: 0011e000 - 0011f000, lowest used address 0011ead0, stack used: 1328 bytes
+PCI: 00:18.0 init ...
+PCI: 00:18.1 init ...
+PCI: 00:18.2 init ...
+PCI: 00:18.3 init ...
+NB: Function 3 Misc Control.. done.
+PCI: 00:00.0 init ...
+PCI: 00:01.0 init ...
+IOAPIC: Initializing IOAPIC at 0xfec00000
+IOAPIC: Bootstrap Processor Local APIC = 0x00
+IOAPIC: Dumping registers
+ reg 0x0000: 0x00000000
+ reg 0x0001: 0x00170011
+ reg 0x0002: 0x00000000
+IOAPIC: 24 interrupts
+IOAPIC: Enabling interrupts on FSB
+IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
+IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
+IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
+lpc_init: pm_base = 1000
+set power off after power fail
+RTC Init
+PCI: 00:02.0 init ...
+PCI: 00:02.1 init ...
+PCI: 00:06.0 init ...
+IDE1 IDE0
+PCI: 00:07.0 init ...
+SATA S SATA P
+PCI: 00:08.0 init ...
+SATA S SATA P
+PCI: 00:09.0 init ...
+PCI DOMAIN mem base = 0x00f0000000
+[0x50] <-- 0xf0000000
+PCI: 00:0a.0 init ...
+PCI: 00:0d.0 init ...
+PCI: 00:0e.0 init ...
+PNP: 004e.0 init ...
+PNP: 004e.1 init ...
+PNP: 004e.2 init ...
+PNP: 004e.3 init ...
+PNP: 004e.5 init ...
+PNP: 004e.b init ...
+PCI: 01:00.0 init ...
+PCI: 02:00.0 init ...
+Devices initialized
+Show all devs... After init.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+DOMAIN: 0000: enabled 1
+PCI: 00:18.0: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:01.0: enabled 1
+PNP: 004e.0: enabled 1
+PNP: 004e.1: enabled 1
+PNP: 004e.2: enabled 1
+PNP: 004e.3: enabled 1
+PNP: 004e.5: enabled 1
+PNP: 004e.7: enabled 0
+PNP: 004e.8: enabled 0
+PNP: 004e.9: enabled 0
+PNP: 004e.a: enabled 0
+PNP: 004e.b: enabled 1
+PCI: 00:01.1: enabled 1
+PCI: 00:02.0: enabled 1
+PCI: 00:02.1: enabled 1
+PCI: 00:04.0: enabled 1
+PCI: 00:04.1: enabled 0
+PCI: 00:06.0: enabled 1
+PCI: 00:07.0: enabled 1
+PCI: 00:08.0: enabled 1
+PCI: 00:09.0: enabled 1
+PCI: 00:0a.0: enabled 1
+PCI: 00:0b.0: enabled 0
+PCI: 00:0c.0: enabled 0
+PCI: 00:0d.0: enabled 1
+PCI: 00:0e.0: enabled 1
+PCI: 00:18.1: enabled 1
+PCI: 00:18.2: enabled 1
+PCI: 00:18.3: enabled 1
+PCI: 01:00.0: enabled 1
+PCI: 02:00.0: enabled 1
+CBMEM:
+IMD: root @ 1ffff000 254 entries.
+IMD: root @ 1fffec00 62 entries.
+Moving GDT to 1fffea00...ok
+Finalize devices...
+Devices finalized
+Writing IRQ routing tables to 0xf0000...done.
+Writing IRQ routing tables to 0x1ffd5000...done.
+PIRQ table: 256 bytes.
+Wrote the mp table end at: 000f0410 - 000f05e8
+Wrote the mp table end at: 1ffd4010 - 1ffd41e8
+MP table: 488 bytes.
+CBFS: 'Master Header Locator' located CBFS at [100:7ffc0)
+CBFS: Locating 'fallback/dsdt.aml'
+CBFS: Found @ offset 26a80 size 1784
+CBFS: 'Master Header Locator' located CBFS at [100:7ffc0)
+CBFS: Locating 'fallback/slic'
+CBFS: 'fallback/slic' not found.
+ACPI: Writing ACPI tables at 1ffb0000.
+ACPI: * FACS
+ACPI: * DSDT
+ACPI: * FADT
+pm_base: 0x1000
+ACPI: added table 1/32, length now 40
+ACPI: * SSDT
+P#0 freq 2000 [MHz] voltage 1450 [mV] TDP 59000 [mW]
+P#1 freq 1800 [MHz] voltage 1350 [mV] TDP 49600 [mW]
+P#2 freq 1000 [MHz] voltage 1100 [mV] TDP 20700 [mW]
+PSS: 2000MHz power 59000 control 0xe020290c status 0x10c
+PSS: 1800MHz power 49600 control 0xe0202a0a status 0x20a
+PSS: 1000MHz power 20700 control 0xe0202c82 status 0x482
+1 Processor objects emitted to SSDT
+ACPI: added table 2/32, length now 44
+ACPI: * MCFG
+ACPI: * TCPA
+TCPA log created at 1ffa0000
+ACPI: added table 3/32, length now 48
+ACPI: * MADT
+ACPI: added table 4/32, length now 52
+current = 1ffb1de0
+ACPI: * SRAT @ 1ffb1de0
+SRAT: lapic cpu_index=00, node_id=00, apic_id=00
+set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
+set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=0007fd00
+ACPI: added table 5/32, length now 56
+ACPI: * SLIT @ 1ffb1e70
+ACPI: added table 6/32, length now 60
+ACPI: * HPET
+ACPI: added table 7/32, length now 64
+ACPI: done.
+ACPI tables: 7904 bytes.
+smbios_write_tables: 1ff9f000
+Root Device (MSI MS-7135)
+CPU_CLUSTER: 0 (AMD K8 Root Complex)
+APIC: 00 (unknown)
+DOMAIN: 0000 (AMD K8 Root Complex)
+PCI: 00:18.0 (AMD K8 Northbridge)
+PCI: 00:00.0 (NVIDIA CK804 Southbridge)
+PCI: 00:01.0 (NVIDIA CK804 Southbridge)
+PNP: 004e.0 (Winbond W83627THG Super I/O)
+PNP: 004e.1 (Winbond W83627THG Super I/O)
+PNP: 004e.2 (Winbond W83627THG Super I/O)
+PNP: 004e.3 (Winbond W83627THG Super I/O)
+PNP: 004e.5 (Winbond W83627THG Super I/O)
+PNP: 004e.7 (Winbond W83627THG Super I/O)
+PNP: 004e.8 (Winbond W83627THG Super I/O)
+PNP: 004e.9 (Winbond W83627THG Super I/O)
+PNP: 004e.a (Winbond W83627THG Super I/O)
+PNP: 004e.b (Winbond W83627THG Super I/O)
+PCI: 00:01.1 (NVIDIA CK804 Southbridge)
+PCI: 00:02.0 (NVIDIA CK804 Southbridge)
+PCI: 00:02.1 (NVIDIA CK804 Southbridge)
+PCI: 00:04.0 (NVIDIA CK804 Southbridge)
+PCI: 00:04.1 (NVIDIA CK804 Southbridge)
+PCI: 00:06.0 (NVIDIA CK804 Southbridge)
+PCI: 00:07.0 (NVIDIA CK804 Southbridge)
+PCI: 00:08.0 (NVIDIA CK804 Southbridge)
+PCI: 00:09.0 (NVIDIA CK804 Southbridge)
+PCI: 00:0a.0 (NVIDIA CK804 Southbridge)
+PCI: 00:0b.0 (NVIDIA CK804 Southbridge)
+PCI: 00:0c.0 (NVIDIA CK804 Southbridge)
+PCI: 00:0d.0 (NVIDIA CK804 Southbridge)
+PCI: 00:0e.0 (NVIDIA CK804 Southbridge)
+PCI: 00:18.1 (AMD K8 Northbridge)
+PCI: 00:18.2 (AMD K8 Northbridge)
+PCI: 00:18.3 (AMD K8 Northbridge)
+PCI: 01:00.0 (unknown)
+PCI: 02:00.0 (unknown)
+SMBIOS tables: 316 bytes.
+Writing table forward entry at 0x00000500
+Wrote coreboot table at: 00000500, 0x10 bytes, checksum 7fe1
+Writing coreboot table at 0x1ffd6000
+ 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
+ 1. 0000000000001000-000000000009ffff: RAM
+ 2. 00000000000c0000-000000001ff9efff: RAM
+ 3. 000000001ff9f000-000000001fffffff: CONFIGURATION TABLES
+CBFS: 'Master Header Locator' located CBFS at [100:7ffc0)
+FMAP: Found "FLASH" version 1.1 at 0.
+FMAP: base = fff80000 size = 80000 #areas = 3
+Wrote coreboot table at: 1ffd6000, 0x1fc bytes, checksum aad7
+coreboot table: 532 bytes.
+IMD ROOT 0. 1ffff000 00001000
+IMD SMALL 1. 1fffe000 00001000
+CONSOLE 2. 1ffde000 00020000
+COREBOOT 3. 1ffd6000 00008000
+IRQ TABLE 4. 1ffd5000 00001000
+SMP TABLE 5. 1ffd4000 00001000
+ACPI 6. 1ffb0000 00024000
+TCPA LOG 7. 1ffa0000 00010000
+SMBIOS 8. 1ff9f000 00000800
+IMD small region:
+ IMD ROOT 0. 1fffec00 00000400
+ GDT 1. 1fffea00 00000200
+CBFS: 'Master Header Locator' located CBFS at [100:7ffc0)
+CBFS: Locating 'fallback/payload'
+CBFS: Found @ offset 170c0 size eebe
+Loading segment from rom address 0xfff971f8
+ code (compression=1)
+ New segment dstaddr 0xe4080 memsize 0x1bf80 srcaddr 0xfff97230 filesize 0xee86
+Loading segment from rom address 0xfff97214
+ Entry Point 0x000ff06e
+Bounce Buffer at 1fe82000, 1164320 bytes
+Loading Segment: addr: 0x00000000000e4080 memsz: 0x000000000001bf80 filesz: 0x000000000000ee86
+lb: [0x0000000000100000, 0x000000000018e210)
+Post relocation: addr: 0x00000000000e4080 memsz: 0x000000000001bf80 filesz: 0x000000000000ee86
+using LZMA
+[ 0x000e4080, 00100000, 0x00100000) <- fff97230
+dest 000e4080, end 00100000, bouncebuffer 1fe82000
+Loaded segments
+Jumping to boot code at 000ff06e(1ffd6000)
+CPU0: stack: 0011e000 - 0011f000, lowest used address 0011ead0, stack used: 1328 bytes
+entry = 0x000ff06e
+lb_start = 0x00100000
+lb_size = 0x0008e210
+buffer = 0x1fe82000
+SeaBIOS (version rel-1.9.1-0-gb3ef39f)
+BUILD: gcc: (coreboot toolchain v1.38 April 3rd, 2016) 5.2.0 binutils: (GNU Binutils) 2.25
+Found coreboot cbmem console @ 1ffde000
+Found mainboard MSI MS-7135
+Relocating init from 0x000e54a0 to 0x1ff53be0 (size 45952)
+Found CBFS header at 0xfff80138
+multiboot: eax=0, ebx=0
+Found 19 PCI devices (max PCI bus is 03)
+Copying SMBIOS entry point from 0x1ff9f000 to 0x000f0800
+Copying ACPI RSDP from 0x1ffb0000 to 0x000f07d0
+Copying MPTABLE from 0x1ffd4000/1ffd4010 to 0x000f05e0
+Copying PIR from 0x1ffd5000 to 0x000f04e0
+Using pmtimer, ioport 0x1008
+Scan for VGA option rom
+Running option rom at c000:0003
+Turning on vga text mode console
+SeaBIOS (version rel-1.9.1-0-gb3ef39f)
+XHCI init on dev 02:00.0: regs @ 0xfd100000, 2 ports, 32 slots, 32 byte contexts
+XHCI protocol USB 3.00, 1 ports (offset 1), def 0
+XHCI protocol USB 2.00, 1 ports (offset 2), def 1
+XHCI extcap 0xc1 @ fd108020
+XHCI extcap 0xc0 @ fd108040
+XHCI extcap 0x1 @ fd108300
+XHCI driver does not support page size code -4096
+EHCI init on dev 00:02.1 (regs=0xfd205020)
+OHCI init on dev 00:02.0 (regs=0xfd200000)
+Found 1 lpt ports
+Found 2 serial ports
+ATA controller 1 at 1f0/3f4/0 (irq 14 dev 30)
+ATA controller 2 at 170/374/0 (irq 15 dev 30)
+ATA controller 3 at 2850/2878/0 (irq 0 dev 38)
+ATA controller 4 at 2858/287c/0 (irq 0 dev 38)
+ata0-0: WDC WD800BB-75CAA0 ATA-5 Hard-Disk (74 GiBytes)
+Searching bootorder for: /pci@i0cf8/*@6/drive@0/disk@0
+ATA controller 5 at 2860/2880/0 (irq 0 dev 40)
+ATA controller 6 at 2868/2884/0 (irq 0 dev 40)
+Searching bootorder for: /rom@img/memtest
+Searching bootorder for: /rom@img/nvramcui
+Searching bootorder for: /pci@i0cf8/usb@2,1/storage@7/*@0/*@0,0
+Searching bootorder for: /pci@i0cf8/usb@2,1/usb-*@7
+USB MSC vendor='WD' product='My Book 1140' rev='1019' type=0 removable=0
+USB MSC: unsupported block size 4096
+Unable to configure USB MSC drive.
+Searching bootorder for: /pci@i0cf8/usb@2,1/storage@7/*@0/*@0,1
+Searching bootorder for: /pci@i0cf8/usb@2,1/usb-*@7
+USB MSC vendor='WD' product='SES Device' rev='1019' type=13 removable=0
+ehci_wait_td error - status=80d40
+USB transmission failed
+Unable to configure USB MSC drive.
+Unable to configure USB MSC device.
+PS2 keyboard initialized
+All threads complete.
+Scan for option roms
+Running option rom at cf80:0003
+pmm call arg1=1
+pmm call arg1=0
+pmm call arg1=1
+pmm call arg1=0
+Searching bootorder for: /pci@i0cf8/*@a
+
+Press ESC for boot menu.
+
+Searching bootorder for: HALT
+drive 0x000f0430: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=156250000
+Space available for UMB: d0800-ef000, f0000-f03f0
+Returned 262144 bytes of ZoneHigh
+e820 map has 5 items:
+ 0: 0000000000000000 - 000000000009fc00 = 1 RAM
+ 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
+ 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
+ 3: 0000000000100000 - 000000001ff9f000 = 1 RAM
+ 4: 000000001ff9f000 - 0000000020000000 = 2 RESERVED
+enter handle_19:
+ NULL
+Booting from Hard Disk...
+Booting from 0000:7c00
+