Revert "lenovo/t400/4.5-1564-g6fa36c9c2c-dirty/2017-04-16T13_28_27Z"
This reverts commit e5454d36ca2f96e452a228db9a1485bff2e8f32e.
The commit in question deletes a lot of unrelated files, and needs to be
reverted.
diff --git a/gigabyte/ga-g41m-es2l/4.5-1395-g5029a16/2017-03-27T01_03_16Z/coreboot_console.txt b/gigabyte/ga-g41m-es2l/4.5-1395-g5029a16/2017-03-27T01_03_16Z/coreboot_console.txt
new file mode 100644
index 0000000..55e5775
--- /dev/null
+++ b/gigabyte/ga-g41m-es2l/4.5-1395-g5029a16/2017-03-27T01_03_16Z/coreboot_console.txt
@@ -0,0 +1,1715 @@
+
+
+coreboot-4.5-1037-gae9d21f-dirty Tue Feb 21 05:06:31 UTC 2017 romstage starting...
+SMBus controller enabled.
+CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
+CBFS: Locating 'cmos_layout.bin'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size b294
+CBFS: Unmatched 'fallback/romstage' at 80
+CBFS: Checking offset b380
+CBFS: File @ offset b380 size 29000
+CBFS: Unmatched 'cpu_microcode_blob.bin' at b380
+CBFS: Checking offset 34400
+CBFS: File @ offset 34400 size 10e09
+CBFS: Unmatched 'fallback/ramstage' at 34400
+CBFS: Checking offset 45280
+CBFS: File @ offset 45280 size 6c00
+CBFS: Unmatched 'vgaroms/seavgabios.bin' at 45280
+CBFS: Checking offset 4bf00
+CBFS: File @ offset 4bf00 size 138
+CBFS: Unmatched 'config' at 4bf00
+CBFS: Checking offset 4c080
+CBFS: File @ offset 4c080 size 240
+CBFS: Unmatched 'revision' at 4c080
+CBFS: Checking offset 4c300
+CBFS: File @ offset 4c300 size 11
+CBFS: Unmatched 'rt8168-macaddress' at 4c300
+CBFS: Checking offset 4c380
+CBFS: File @ offset 4c380 size 100
+CBFS: Unmatched 'cmos.default' at 4c380
+CBFS: Checking offset 4c4c0
+CBFS: File @ offset 4c4c0 size 534
+CBFS: Found @ offset 4c4c0 size 534
+PM1_CNT: 00000000
+Initializing memory
+Setting up RAM controller.
+Dimms per channel: 1
+2 CPU cores
+Capable of DDR2 of 800 MHz or lower
+fefffaac: 80 08 08 0e 0a 60 40 00 05 25 40 00 82 08 00 00 .....`@..%@.....
+fefffabc: 0c 08 70 01 02 00 03 30 40 3d 40 3c 1e 3c 2d 01 ..p....0@=@<.<-.
+fefffacc: 17 25 05 12 3c 1e 1e 00 06 3c 7f 80 14 1e 00 00 .%..<....<......
+fefffadc: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 13 c8 ................
+fefffd34: 80 08 08 0e 0a 60 40 00 05 25 40 00 82 08 00 00 .....`@..%@.....
+fefffd44: 0c 08 70 01 02 00 03 30 40 3d 40 3c 1e 3c 2d 01 ..p....0@=@<.<-.
+fefffd54: 17 25 05 12 3c 1e 1e 00 06 3c 7f 80 14 1e 00 00 .%..<....<......
+fefffd64: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 13 c8 ................
+DIMM 0
+ Sides : 1
+ Banks : 1
+ Ranks : 1
+ Rows : 14
+ Cols : 10
+ Page size : 1024
+ Width : 8
+DIMM 2
+ Sides : 1
+ Banks : 1
+ Ranks : 1
+ Rows : 14
+ Cols : 10
+ Page size : 1024
+ Width : 8
+ Config[CH0] : 1
+ Config[CH1] : 1
+Selected timings:
+ FSB: 800MHz
+ DDR: 800MHz
+ CAS: 5
+ tRAS: 18
+ tRP: 6
+ tRCD: 6
+ tWR: 6
+ tRFC: 51
+ tWTR: 4
+ tRRD: 3
+ tRTP: 4
+Done clk crossing
+Done I/O clk
+Done launch
+Done timings
+DimmA populated only in channel 0
+DimmA populated only in channel 1
+RCOMP
+Done ODT
+Done RCOMP update
+Done pre-jedec
+MRS...
+CH0: Found Rank 0
+CH1: Found Rank 0
+MRS done
+Done jedec steps
+Done post-jedec
+Channel 0, Lane 0 addr=0x00000000
+rcven 0.1 coarse=4
+ GOT IT (high -> low transition) coarse=4 medium=0
+rcven 0.2
+ GOT IT (low -> high transition) coarse=5 medium=2
+rcven 0.3
+rcven 0.4
+ GOT IT (high -> low transition) coarse=4 medium=2
+rcven 0.5
+ GOT IT (low -> high transition) coarse=5 medium=2
+rcven 0.6
+rcven 0.7
+Cha
+
+*** Log truncated, 5871 characters dropped. ***
+
+x4x late init complete
+MTRR Range: Start=fff00000 End=0 (Size 100000)
+MTRR Range: Start=0 End=1000000 (Size 1000000)
+MTRR Range: Start=7b800000 End=7bc00000 (Size 400000)
+MTRR Range: Start=7b400000 End=7b800000 (Size 400000)
+CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
+CBFS: Locating 'fallback/ramstage'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size b294
+CBFS: Unmatched 'fallback/romstage' at 80
+CBFS: Checking offset b380
+CBFS: File @ offset b380 size 29000
+CBFS: Unmatched 'cpu_microcode_blob.bin' at b380
+CBFS: Checking offset 34400
+CBFS: File @ offset 34400 size 10e09
+CBFS: Found @ offset 34400 size 10e09
+Decompressing stage fallback/ramstage @ 0x7bb9efc0 (231504 bytes)
+Loading module at 7bb9f000 with entry 7bb9f000. filesize: 0x2bb50 memsize: 0x38810
+Processing 2194 relocs. Offset value of 0x7ba9f000
+CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
+CBFS: Locating 'cmos_layout.bin'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size b294
+CBFS: Unmatched 'fallback/romstage' at 80
+CBFS: Checking offset b380
+CBFS: File @ offset b380 size 29000
+CBFS: Unmatched 'cpu_microcode_blob.bin' at b380
+CBFS: Checking offset 34400
+CBFS: File @ offset 34400 size 10e09
+CBFS: Unmatched 'fallback/ramstage' at 34400
+CBFS: Checking offset 45280
+CBFS: File @ offset 45280 size 6c00
+CBFS: Unmatched 'vgaroms/seavgabios.bin' at 45280
+CBFS: Checking offset 4bf00
+CBFS: File @ offset 4bf00 size 138
+CBFS: Unmatched 'config' at 4bf00
+CBFS: Checking offset 4c080
+CBFS: File @ offset 4c080 size 240
+CBFS: Unmatched 'revision' at 4c080
+CBFS: Checking offset 4c300
+CBFS: File @ offset 4c300 size 11
+CBFS: Unmatched 'rt8168-macaddress' at 4c300
+CB
+
+*** Log truncated, 286 characters dropped. ***
+
+Normal boot.
+Enumerating buses...
+Show all devs... Before device enumeration.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+APIC: acac: enabled 0
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:02.0: enabled 1
+PCI: 00:02.1: enabled 1
+PCI: 00:03.0: enabled 0
+PCI: 00:03.1: enabled 0
+PCI: 00:1b.0: enabled 1
+PCI: 00:1c.0: enabled 1
+PCI: 00:1c.1: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:1c.2: enabled 1
+PCI: 00:1c.3: enabled 1
+PCI: 00:1d.0: enabled 1
+PCI: 00:1d.1: enabled 1
+PCI: 00:1d.2: enabled 1
+PCI: 00:1d.3: enabled 1
+PCI: 00:1d.7: enabled 1
+PCI: 00:1e.0: enabled 1
+PCI: 00:1f.0: enabled 1
+PNP: 002e.0: enabled 1
+PNP: 002e.1: enabled 1
+PNP: 002e.2: enabled 1
+PNP: 002e.3: enabled 1
+PNP: 002e.4: enabled 1
+PNP: 002e.5: enabled 1
+PNP: 002e.6: enabled 1
+PCI: 00:1f.1: enabled 1
+PCI: 00:1f.2: enabled 1
+PCI: 00:1f.3: enabled 1
+PCI: 00:1f.4: enabled 0
+PCI: 00:1f.5: enabled 0
+PCI: 00:1f.6: enabled 0
+Compare with tree...
+Root Device: enabled 1
+ CPU_CLUSTER: 0: enabled 1
+ APIC: 00: enabled 1
+ APIC: acac: enabled 0
+ DOMAIN: 0000: enabled 1
+ PCI: 00:00.0: enabled 1
+ PCI: 00:02.0: enabled 1
+ PCI: 00:02.1: enabled 1
+ PCI: 00:03.0: enabled 0
+ PCI: 00:03.1: enabled 0
+ PCI: 00:1b.0: enabled 1
+ PCI: 00:1c.0: enabled 1
+ PCI: 00:1c.1: enabled 1
+ PCI: 00:00.0: enabled 1
+ PCI: 00:1c.2: enabled 1
+ PCI: 00:1c.3: enabled 1
+ PCI: 00:1d.0: enabled 1
+ PCI: 00:1d.1: enabled 1
+ PCI: 00:1d.2: enabled 1
+ PCI: 00:1d.3: enabled 1
+ PCI: 00:1d.7: enabled 1
+ PCI: 00:1e.0: enabled 1
+ PCI: 00:1f.0: enabled 1
+ PNP: 002e.0: enabled 1
+ PNP: 002e.1: enabled 1
+ PNP: 002e.2: enabled 1
+ PNP: 002e.3: enabled 1
+ PNP: 002e.4: enabled 1
+ PNP: 002e.5: enabled 1
+ PNP: 002e.6: enabled 1
+ PCI: 00:1f.1: enabled 1
+ PCI: 00:1f.2: enabled 1
+ PCI: 00:1f.3: enabled 1
+ PCI: 00:1f.4: enabled 0
+ PCI: 00:1f.5: enabled 0
+ PCI: 00:1f.6: enabled 0
+Root Device scanning...
+root_dev_scan_bus for Root Device
+CPU_CLUSTER: 0 enabled
+DOMAIN: 0000 enabled
+DOMAIN: 0000 scanning...
+PCI: pci_scan_bus for bus 00
+PCI: 00:00.0 [8086/2e30] enabled
+Capability: type 0x0d @ 0x88
+Capability: type 0x01 @ 0x80
+Capability: type 0x05 @ 0x90
+Capability: type 0x10 @ 0xa0
+Capability: type 0x0d @ 0x88
+Capability: type 0x01 @ 0x80
+Capability: type 0x05 @ 0x90
+Capability: type 0x10 @ 0xa0
+PCI: 00:01.0 subordinate bus PCI Express
+PCI: 00:01.0 [8086/2e31] enabled
+PCI: 00:02.0 [8086/0000] ops
+PCI: 00:02.0 [8086/2e32] enabled
+PCI: 00:02.1 [8086/2e33] enabled
+PCI: 00:1b.0 [8086/27d8] ops
+PCI: 00:1b.0 [8086/27d8] enabled
+PCI: 00:1c.0 [8086/0000] bus ops
+PCI: 00:1c.0 [8086/27d0] enabled
+PCI: 00:1c.1 [8086/0000] bus ops
+PCI: 00:1c.1 [8086/27d2] enabled
+PCI: Static device PCI: 00:1c.2 not found, disabling it.
+PCI: Static device PCI: 00:1c.3 not found, disabling it.
+PCI: 00:1d.0 [8086/27c8] ops
+PCI: 00:1d.0 [8086/27c8] enabled
+PCI: 00:1d.1 [8086/27c9] ops
+PCI: 00:1d.1 [8086/27c9] enabled
+PCI: 00:1d.2 [8086/27ca] ops
+PCI: 00:1d.2 [8086/27ca] enabled
+PCI: 00:1d.3 [8086/27cb] ops
+PCI: 00:1d.3 [8086/27cb] enabled
+PCI: 00:1d.7 [8086/27cc] ops
+PCI: 00:1d.7 [8086/27cc] enabled
+PCI: 00:1e.0 [8086/244e] bus ops
+PCI: 00:1e.0 [8086/244e] enabled
+PCI: 00:1f.0 [8086/0000] bus ops
+PCI: 00:1f.0 [8086/27b8] enabled
+PCI: Static device PCI: 00:1f.1 not found, disabling it.
+Set SATA mode early
+PCI: 00:1f.2 [8086/0000] ops
+Set SATA mode early
+PCI: 00:1f.2 [8086/27c0] enabled
+PCI: 00:1f.3 [8086/27da] bus ops
+PCI: 00:1f.3 [8086/27da] enabled
+PCI: 00:01.0 scanning...
+do_pci_scan_bridge for PCI: 00:01.0
+PCI: pci_scan_bus for bus 01
+scan_bus: scanning of bus PCI: 00:01.0 took 0 usecs
+PCI: 00:1c.0 scanning...
+do_pci_scan_bridge for PCI: 00:1c.0
+PCI: pci_scan_bus for bus 02
+scan_bus: scanning of bus PCI: 00:1c.0 took 0 usecs
+PCI: 00:1c.1 scanning...
+do_pci_scan_bridge for PCI: 00:1c.1
+PCI: pci_scan_bus for bus 03
+PCI: 03:00.0 [10ec/8168] ops
+PCI: 03:00.0 [10ec/8168] enabled
+scan_bus: scanning of bus PCI: 00:1c.1 took 0 usecs
+PCI: 00:1e.0 scanning...
+do_pci_scan_bridge for PCI: 00:1e.0
+PCI: pci_scan_bus for bus 04
+scan_bus: scanning of bus PCI: 00:1e.0 took 0 usecs
+PCI: 00:1f.0 scanning...
+scan_lpc_bus for PCI: 00:1f.0
+PNP: 002e.0 enabled
+PNP: 002e.1 enabled
+PNP: 002e.2 enabled
+PNP: 002e.3 enabled
+PNP: 002e.4 enabled
+PNP: 002e.5 enabled
+PNP: 002e.6 enabled
+scan_lpc_bus for PCI: 00:1f.0 done
+scan_bus: scanning of bus PCI: 00:1f.0 took 0 usecs
+PCI: 00:1f.3 scanning...
+scan_generic_bus for PCI: 00:1f.3
+scan_generic_bus for PCI: 00:1f.3 done
+scan_bus: scanning of bus PCI: 00:1f.3 took 0 usecs
+scan_bus: scanning of bus DOMAIN: 0000 took 0 usecs
+root_dev_scan_bus for Root Device done
+scan_bus: scanning of bus Root Device took 0 usecs
+done
+found VGA at PCI: 00:02.0
+Setting up VGA for PCI: 00:02.0
+Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
+Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
+Allocating resources...
+Reading resources...
+Root Device read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
+TOUUD 0x80000000 TOLUD 0x80000000 TOM 0x80000000
+IGD decoded, subtracting 64M UMA and 1M GTT
+Available memory below 4GB: 1982M
+Adding UMA memory area base=0x7be00000 size=0x04200000
+Adding PCIe config bar base=0xe0000000 size=0x10000000
+DOMAIN: 0000 read_resources bus 0 link: 0
+PCI: 00:01.0 read_resources bus 1 link: 0
+PCI: 00:01.0 read_resources bus 1 link: 0 done
+PCI: 00:1c.0 read_resources bus 2 link: 0
+PCI: 00:1c.0 read_resources bus 2 link: 0 done
+PCI: 00:1c.1 read_resources bus 3 link: 0
+PCI: 00:1c.1 read_resources bus 3 link: 0 done
+PCI: 00:1e.0 read_resources bus 4 link: 0
+PCI: 00:1e.0 read_resources bus 4 link: 0 done
+PCI: 00:1f.0 read_resources bus 0 link: 0
+PCI: 00:1f.0 read_resources bus 0 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0 done
+Root Device read_resources bus 0 link: 0 done
+Done reading resources.
+Show resources in subtree (Root Device)...After reading.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ APIC: acac
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
+ DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
+ DOMAIN: 0000 resource base 100000 size 7bd00000 align 0 gran 0 limit 0 flags e0004200 index 4
+ DOMAIN: 0000 resource base 7be00000 size 4200000 align 0 gran 0 limit 0 flags f0000200 index 5
+ DOMAIN: 0000 resource base fed10000 size 12f0000 align 0 gran 0 limit 0 flags f0000200 index 6
+ DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 7
+ PCI: 00:00.0
+ PCI: 00:01.0
+ PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 00:02.0
+ PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
+ PCI: 00:02.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 20
+ PCI: 00:02.1
+ PCI: 00:02.1 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:03.0
+ PCI: 00:03.1
+ PCI: 00:1b.0
+ PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:1c.0
+ PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 00:1c.1 child on link 0 PCI: 03:00.0
+ PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 03:00.0
+ PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
+ PCI: 03:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18
+ PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
+ PCI: 00:1c.2
+ PCI: 00:1c.3
+ PCI: 00:1d.0
+ PCI: 00:1d.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.1
+ PCI: 00:1d.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.2
+ PCI: 00:1d.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.3
+ PCI: 00:1d.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
+ PCI: 00:1d.7
+ PCI: 00:1d.7 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
+ PCI: 00:1e.0
+ PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 00:1f.0 child on link 0 PNP: 002e.0
+ PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+ PNP: 002e.0
+ PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit fff flags c0000100 index 60
+ PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
+ PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index f0
+ PNP: 002e.0 resource base 80 size 1 align 0 gran 0 limit 0 flags c0000400 index f1
+ PNP: 002e.1
+ PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.2
+ PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.3
+ PNP: 002e.3 resource base 378 size 8 align 3 gran 3 limit fff flags c0000100 index 60
+ PNP: 002e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.3 resource base 0 size 8 align 3 gran 3 limit fff flags c0000100 index 62
+ PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
+ PNP: 002e.3 resource base 8 size 1 align 0 gran 0 limit 0 flags c0000400 index f0
+ PNP: 002e.4
+ PNP: 002e.4 resource base 290 size 8 align 3 gran 3 limit fff flags c0000100 index 60
+ PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit fff flags c0000100 index 62
+ PNP: 002e.4 resource base 80 size 1 align 0 gran 0 limit 0 flags c0000400 index f0
+ PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index f1
+ PNP: 002e.4 resource base a size 1 align 0 gran 0 limit 0 flags c0000400 index f2
+ PNP: 002e.4 resource base 80 size 1 align 0 gran 0 limit 0 flags c0000400 index f3
+ PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index f4
+ PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index f5
+ PNP: 002e.4 resource base ff size 1 align 0 gran 0 limit 0 flags c0000400 index f6
+ PNP: 002e.5
+ PNP: 002e.5 resource base 60 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.5 resource base 64 size 8 align 3 gran 3 limit 7ff flags c0000100 index 62
+ PNP: 002e.5 resource base 48 size 1 align 0 gran 0 limit 0 flags c0000400 index f0
+ PNP: 002e.6
+ PNP: 002e.6 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.6 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000400 index 71
+ PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index f0
+ PCI: 00:1f.1
+ PCI: 00:1f.2
+ PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
+ PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
+ PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
+ PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
+ PCI: 00:1f.2 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
+ PCI: 00:1f.3
+ PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
+ PCI: 00:1f.4
+ PCI: 00:1f.5
+ PCI: 00:1f.6
+DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
+PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 03:00.0 10 * [0x0 - 0xff] io
+PCI: 00:1c.1 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
+PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:1e.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:1c.1 1c * [0x0 - 0xfff] io
+PCI: 00:1d.0 20 * [0x1000 - 0x101f] io
+PCI: 00:1d.1 20 * [0x1020 - 0x103f] io
+PCI: 00:1d.2 20 * [0x1040 - 0x105f] io
+PCI: 00:1d.3 20 * [0x1060 - 0x107f] io
+PCI: 00:1f.2 20 * [0x1080 - 0x108f] io
+PCI: 00:02.0 20 * [0x1090 - 0x1097] io
+PCI: 00:1f.2 10 * [0x1098 - 0x109f] io
+PCI: 00:1f.2 18 * [0x10a0 - 0x10a7] io
+PCI: 00:1f.2 14 * [0x10a8 - 0x10ab] io
+PCI: 00:1f.2 1c * [0x10ac - 0x10af] io
+DOMAIN: 0000 io: base: 10b0 size: 10b0 align: 12 gran: 0 limit: ffff done
+DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
+PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 03:00.0 20 * [0x0 - 0x3fff] prefmem
+PCI: 03:00.0 18 * [0x4000 - 0x4fff] prefmem
+PCI: 00:1c.1 prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:1e.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:1e.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
+PCI: 00:02.0 10 * [0x10000000 - 0x103fffff] mem
+PCI: 00:02.1 10 * [0x10400000 - 0x104fffff] mem
+PCI: 00:1c.1 24 * [0x10500000 - 0x105fffff] prefmem
+PCI: 00:1b.0 10 * [0x10600000 - 0x10603fff] mem
+PCI: 00:1d.7 10 * [0x10604000 - 0x106043ff] mem
+DOMAIN: 0000 mem: base: 10604400 size: 10604400 align: 28 gran: 0 limit: ffffffff done
+avoid_fixed_resources: DOMAIN: 0000
+avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
+constrain_resources: DOMAIN: 0000 03 base 00000000 limit 0009ffff mem (fixed)
+constrain_resources: DOMAIN: 0000 04 base 00100000 limit 7bdfffff mem (fixed)
+constrain_resources: DOMAIN: 0000 05 base 7be00000 limit 7fffffff mem (fixed)
+constrain_resources: DOMAIN: 0000 06 base fed10000 limit ffffffff mem (fixed)
+constrain_resources: DOMAIN: 0000 07 base e0000000 limit efffffff mem (fixed)
+constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
+skipping PNP: 002e.6@71 fixed resource, size=0!
+avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
+Setting resources...
+DOMAIN: 0000 io: base:1000 size:10b0 align:12 gran:0 limit:ffff
+PCI: 00:1c.1 1c * [0x1000 - 0x1fff] io
+PCI: 00:1d.0 20 * [0x2000 - 0x201f] io
+PCI: 00:1d.1 20 * [0x2020 - 0x203f] io
+PCI: 00:1d.2 20 * [0x2040 - 0x205f] io
+PCI: 00:1d.3 20 * [0x2060 - 0x207f] io
+PCI: 00:1f.2 20 * [0x2080 - 0x208f] io
+PCI: 00:02.0 20 * [0x2090 - 0x2097] io
+PCI: 00:1f.2 10 * [0x2098 - 0x209f] io
+PCI: 00:1f.2 18 * [0x20a0 - 0x20a7] io
+PCI: 00:1f.2 14 * [0x20a8 - 0x20ab] io
+PCI: 00:1f.2 1c * [0x20ac - 0x20af] io
+DOMAIN: 0000 io: next_base: 20b0 size: 10b0 align: 12 gran: 0 done
+PCI: 00:01.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:01.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
+PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
+PCI: 00:1c.1 io: base:1000 size:1000 align:12 gran:12 limit:1fff
+PCI: 03:00.0 10 * [0x1000 - 0x10ff] io
+PCI: 00:1c.1 io: next_base: 1100 size: 1000 align: 12 gran: 12 done
+PCI: 00:1e.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:1e.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
+DOMAIN: 0000 mem: base:c0000000 size:10604400 align:28 gran:0 limit:dfffffff
+PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
+PCI: 00:02.0 10 * [0xd0000000 - 0xd03fffff] mem
+PCI: 00:02.1 10 * [0xd0400000 - 0xd04fffff] mem
+PCI: 00:1c.1 24 * [0xd0500000 - 0xd05fffff] prefmem
+PCI: 00:1b.0 10 * [0xd0600000 - 0xd0603fff] mem
+PCI: 00:1d.7 10 * [0xd0604000 - 0xd06043ff] mem
+DOMAIN: 0000 mem: next_base: d0604400 size: 10604400 align: 28 gran: 0 done
+PCI: 00:01.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
+PCI: 00:01.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
+PCI: 00:01.0 mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
+PCI: 00:01.0 mem: next_base: dfffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
+PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.0 mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
+PCI: 00:1c.0 mem: next_base: dfffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1c.1 prefmem: base:d0500000 size:100000 align:20 gran:20 limit:d05fffff
+PCI: 03:00.0 20 * [0xd0500000 - 0xd0503fff] prefmem
+PCI: 03:00.0 18 * [0xd0504000 - 0xd0504fff] prefmem
+PCI: 00:1c.1 prefmem: next_base: d0505000 size: 100000 align: 20 gran: 20 done
+PCI: 00:1c.1 mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
+PCI: 00:1c.1 mem: next_base: dfffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1e.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
+PCI: 00:1e.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
+PCI: 00:1e.0 mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
+PCI: 00:1e.0 mem: next_base: dfffffff size: 0 align: 20 gran: 20 done
+Root Device assign_resources, bus 0 link: 0
+DOMAIN: 0000 03 <- [0x0000000000 - 0x000009ffff] size 0x000a0000 gran 0x00 mem
+DOMAIN: 0000 04 <- [0x0000100000 - 0x007bdfffff] size 0x7bd00000 gran 0x00 mem
+DOMAIN: 0000 05 <- [0x007be00000 - 0x007fffffff] size 0x04200000 gran 0x00 mem
+DOMAIN: 0000 06 <- [0x00fed10000 - 0x00ffffffff] size 0x012f0000 gran 0x00 mem
+DOMAIN: 0000 07 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x00 mem
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
+PCI: 00:01.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
+PCI: 00:01.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 mem
+PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d03fffff] size 0x00400000 gran 0x16 mem64
+PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
+PCI: 00:02.0 20 <- [0x0000002090 - 0x0000002097] size 0x00000008 gran 0x03 io
+PCI: 00:02.1 10 <- [0x00d0400000 - 0x00d04fffff] size 0x00100000 gran 0x14 mem64
+PCI: 00:1b.0 10 <- [0x00d0600000 - 0x00d0603fff] size 0x00004000 gran 0x0e mem64
+PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
+PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
+PCI: 00:1c.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 mem
+PCI: 00:1c.1 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 03 io
+PCI: 00:1c.1 24 <- [0x00d0500000 - 0x00d05fffff] size 0x00100000 gran 0x14 bus 03 prefmem
+PCI: 00:1c.1 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 03 mem
+PCI: 00:1c.1 assign_resources, bus 3 link: 0
+PCI: 03:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
+PCI: 03:00.0 18 <- [0x00d0504000 - 0x00d0504fff] size 0x00001000 gran 0x0c prefmem64
+PCI: 03:00.0 20 <- [0x00d0500000 - 0x00d0503fff] size 0x00004000 gran 0x0e prefmem64
+PCI: 00:1c.1 assign_resources, bus 3 link: 0
+PCI: 00:1d.0 20 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.1 20 <- [0x0000002020 - 0x000000203f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.2 20 <- [0x0000002040 - 0x000000205f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.3 20 <- [0x0000002060 - 0x000000207f] size 0x00000020 gran 0x05 io
+PCI: 00:1d.7 10 <- [0x00d0604000 - 0x00d06043ff] size 0x00000400 gran 0x0a mem
+PCI: 00:1e.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
+PCI: 00:1e.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 04 prefmem
+PCI: 00:1e.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 04 mem
+PCI: 00:1f.0 assign_resources, bus 0 link: 0
+PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io
+PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq
+PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq
+PNP: 002e.0 f0 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
+PNP: 002e.0 f1 <- [0x0000000080 - 0x0000000080] size 0x00000001 gran 0x00 irq
+PNP: 002e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
+PNP: 002e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
+PNP: 002e.2 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
+PNP: 002e.2 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
+PNP: 002e.3 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io
+PNP: 002e.3 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
+PNP: 002e.3 62 <- [0x0000000000 - 0x0000000007] size 0x00000008 gran 0x03 io
+PNP: 002e.3 74 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 drq
+PNP: 002e.3 f0 <- [0x0000000008 - 0x0000000008] size 0x00000001 gran 0x00 irq
+PNP: 002e.4 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io
+PNP: 002e.4 70 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
+PNP: 002e.4 62 <- [0x0000000000 - 0x0000000007] size 0x00000008 gran 0x03 io
+PNP: 002e.4 f0 <- [0x0000000080 - 0x0000000080] size 0x00000001 gran 0x00 irq
+PNP: 002e.4 f1 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
+PNP: 002e.4 f2 <- [0x000000000a - 0x000000000a] size 0x00000001 gran 0x00 irq
+PNP: 002e.4 f3 <- [0x0000000080 - 0x0000000080] size 0x00000001 gran 0x00 irq
+PNP: 002e.4 f4 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
+PNP: 002e.4 f5 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
+PNP: 002e.4 f6 <- [0x00000000ff - 0x00000000ff] size 0x00000001 gran 0x00 irq
+PNP: 002e.5 60 <- [0x0000000060 - 0x0000000067] size 0x00000008 gran 0x03 io
+PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
+PNP: 002e.5 62 <- [0x0000000064 - 0x000000006b] size 0x00000008 gran 0x03 io
+PNP: 002e.5 f0 <- [0x0000000048 - 0x0000000048] size 0x00000001 gran 0x00 irq
+PNP: 002e.6 70 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
+PNP: 002e.6 71 <- [0x0000000002 - 0x0000000001] size 0x00000000 gran 0x00 irq
+PNP: 002e.6 f0 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
+PCI: 00:1f.0 assign_resources, bus 0 link: 0
+PCI: 00:1f.2 10 <- [0x0000002098 - 0x000000209f] size 0x00000008 gran 0x03 io
+PCI: 00:1f.2 14 <- [0x00000020a8 - 0x00000020ab] size 0x00000004 gran 0x02 io
+PCI: 00:1f.2 18 <- [0x00000020a0 - 0x00000020a7] size 0x00000008 gran 0x03 io
+PCI: 00:1f.2 1c <- [0x00000020ac - 0x00000020af] size 0x00000004 gran 0x02 io
+PCI: 00:1f.2 20 <- [0x0000002080 - 0x000000208f] size 0x00000010 gran 0x04 io
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+Root Device assign_resources, bus 0 link: 0
+Done setting resources.
+Show resources in subtree (Root Device)...After assigning values.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ APIC: acac
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 1000 size 10b0 align 12 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base c0000000 size 10604400 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
+ DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
+ DOMAIN: 0000 resource base 100000 size 7bd00000 align 0 gran 0 limit 0 flags e0004200 index 4
+ DOMAIN: 0000 resource base 7be00000 size 4200000 align 0 gran 0 limit 0 flags f0000200 index 5
+ DOMAIN: 0000 resource base fed10000 size 12f0000 align 0 gran 0 limit 0 flags f0000200 index 6
+ DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 7
+ PCI: 00:00.0
+ PCI: 00:01.0
+ PCI: 00:01.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:01.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
+ PCI: 00:01.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20
+ PCI: 00:02.0
+ PCI: 00:02.0 resource base d0000000 size 400000 align 22 gran 22 limit d03fffff flags 60000201 index 10
+ PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
+ PCI: 00:02.0 resource base 2090 size 8 align 3 gran 3 limit 2097 flags 60000100 index 20
+ PCI: 00:02.1
+ PCI: 00:02.1 resource base d0400000 size 100000 align 20 gran 20 limit d04fffff flags 60000201 index 10
+ PCI: 00:03.0
+ PCI: 00:03.1
+ PCI: 00:1b.0
+ PCI: 00:1b.0 resource base d0600000 size 4000 align 14 gran 14 limit d0603fff flags 60000201 index 10
+ PCI: 00:1c.0
+ PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
+ PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20
+ PCI: 00:1c.1 child on link 0 PCI: 03:00.0
+ PCI: 00:1c.1 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
+ PCI: 00:1c.1 resource base d0500000 size 100000 align 20 gran 20 limit d05fffff flags 60081202 index 24
+ PCI: 00:1c.1 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20
+ PCI: 03:00.0
+ PCI: 03:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10
+ PCI: 03:00.0 resource base d0504000 size 1000 align 12 gran 12 limit d0504fff flags 60001201 index 18
+ PCI: 03:00.0 resource base d0500000 size 4000 align 14 gran 14 limit d0503fff flags 60001201 index 20
+ PCI: 00:1c.2
+ PCI: 00:1c.3
+ PCI: 00:1d.0
+ PCI: 00:1d.0 resource base 2000 size 20 align 5 gran 5 limit 201f flags 60000100 index 20
+ PCI: 00:1d.1
+ PCI: 00:1d.1 resource base 2020 size 20 align 5 gran 5 limit 203f flags 60000100 index 20
+ PCI: 00:1d.2
+ PCI: 00:1d.2 resource base 2040 size 20 align 5 gran 5 limit 205f flags 60000100 index 20
+ PCI: 00:1d.3
+ PCI: 00:1d.3 resource base 2060 size 20 align 5 gran 5 limit 207f flags 60000100 index 20
+ PCI: 00:1d.7
+ PCI: 00:1d.7 resource base d0604000 size 400 align 12 gran 10 limit d06043ff flags 60000200 index 10
+ PCI: 00:1e.0
+ PCI: 00:1e.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:1e.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
+ PCI: 00:1e.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20
+ PCI: 00:1f.0 child on link 0 PNP: 002e.0
+ PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+ PNP: 002e.0
+ PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit fff flags e0000100 index 60
+ PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
+ PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index f0
+ PNP: 002e.0 resource base 80 size 1 align 0 gran 0 limit 0 flags e0000400 index f1
+ PNP: 002e.1
+ PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.2
+ PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.3
+ PNP: 002e.3 resource base 378 size 8 align 3 gran 3 limit fff flags e0000100 index 60
+ PNP: 002e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.3 resource base 0 size 8 align 3 gran 3 limit fff flags e0000100 index 62
+ PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
+ PNP: 002e.3 resource base 8 size 1 align 0 gran 0 limit 0 flags e0000400 index f0
+ PNP: 002e.4
+ PNP: 002e.4 resource base 290 size 8 align 3 gran 3 limit fff flags e0000100 index 60
+ PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit fff flags e0000100 index 62
+ PNP: 002e.4 resource base 80 size 1 align 0 gran 0 limit 0 flags e0000400 index f0
+ PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index f1
+ PNP: 002e.4 resource base a size 1 align 0 gran 0 limit 0 flags e0000400 index f2
+ PNP: 002e.4 resource base 80 size 1 align 0 gran 0 limit 0 flags e0000400 index f3
+ PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index f4
+ PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index f5
+ PNP: 002e.4 resource base ff size 1 align 0 gran 0 limit 0 flags e0000400 index f6
+ PNP: 002e.5
+ PNP: 002e.5 resource base 60 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.5 resource base 64 size 8 align 3 gran 3 limit 7ff flags e0000100 index 62
+ PNP: 002e.5 resource base 48 size 1 align 0 gran 0 limit 0 flags e0000400 index f0
+ PNP: 002e.6
+ PNP: 002e.6 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.6 resource base 2 size 0 align 0 gran 0 limit 0 flags e0000400 index 71
+ PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index f0
+ PCI: 00:1f.1
+ PCI: 00:1f.2
+ PCI: 00:1f.2 resource base 2098 size 8 align 3 gran 3 limit 209f flags 60000100 index 10
+ PCI: 00:1f.2 resource base 20a8 size 4 align 2 gran 2 limit 20ab flags 60000100 index 14
+ PCI: 00:1f.2 resource base 20a0 size 8 align 3 gran 3 limit 20a7 flags 60000100 index 18
+ PCI: 00:1f.2 resource base 20ac size 4 align 2 gran 2 limit 20af flags 60000100 index 1c
+ PCI: 00:1f.2 resource base 2080 size 10 align 4 gran 4 limit 208f flags 60000100 index 20
+ PCI: 00:1f.3
+ PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
+ PCI: 00:1f.4
+ PCI: 00:1f.5
+ PCI: 00:1f.6
+Done allocating resources.
+Enabling resources...
+PCI: 00:00.0 subsystem <- 1458/5000
+PCI: 00:00.0 cmd <- 06
+PCI: 00:01.0 bridge ctrl <- 0003
+PCI: 00:01.0 cmd <- 00
+PCI: 00:02.0 subsystem <- 1458/d000
+PCI: 00:02.0 cmd <- 03
+PCI: 00:02.1 subsystem <- 1458/d001
+PCI: 00:02.1 cmd <- 02
+PCI: 00:1b.0 subsystem <- 1458/a002
+PCI: 00:1b.0 cmd <- 102
+PCI: 00:1c.0 bridge ctrl <- 0003
+PCI: 00:1c.0 subsystem <- 1458/5000
+PCI: 00:1c.0 cmd <- 100
+PCI: 00:1c.1 bridge ctrl <- 0003
+PCI: 00:1c.1 subsystem <- 1458/5000
+PCI: 00:1c.1 cmd <- 107
+PCI: 00:1d.0 subsystem <- 1458/5004
+PCI: 00:1d.0 cmd <- 01
+PCI: 00:1d.1 subsystem <- 1458/5004
+PCI: 00:1d.1 cmd <- 01
+PCI: 00:1d.2 subsystem <- 1458/5004
+PCI: 00:1d.2 cmd <- 01
+PCI: 00:1d.3 subsystem <- 1458/5004
+PCI: 00:1d.3 cmd <- 01
+PCI: 00:1d.7 subsystem <- 1458/5006
+PCI: 00:1d.7 cmd <- 102
+PCI: 00:1e.0 bridge ctrl <- 0003
+PCI: 00:1e.0 subsystem <- 1458/5000
+PCI: 00:1e.0 cmd <- 100 (NOT WRITTEN!)
+PCI: 00:1f.0 subsystem <- 1458/5001
+PCI: 00:1f.0 cmd <- 107
+PCI: 00:1f.2 subsystem <- 1458/b005
+PCI: 00:1f.2 cmd <- 01
+PCI: 00:1f.3 subsystem <- 1458/5001
+PCI: 00:1f.3 cmd <- 101
+PCI: 03:00.0 cmd <- 103
+done.
+Initializing devices...
+Root Device init ...
+CPU_CLUSTER: 0 init ...
+start_eip=0x00001000, code_size=0x00000031
+Initializing SMM handler... ... pmbase = 0x0500
+
+SMI_STS: TCO PM1
+PM1_STS: PRBTNOR PWRBTN TMROF
+GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO10 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
+ALT_GP_SMI_STS: GPI15 GPI14 GPI11 GPI10 GPI8 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0
+TCO_STS: SECOND_TO TIMEOUT
+ ... raise SMI#
+Initializing CPU #0
+CPU: vendor Intel device 1067a
+CPU: family 06, model 17, stepping 0a
+Enabling cache
+CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
+CBFS: Locating 'cpu_microcode_blob.bin'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size b294
+CBFS: Unmatched 'fallback/romstage' at 80
+CBFS: Checking offset b380
+CBFS: File @ offset b380 size 29000
+CBFS: Found @ offset b380 size 29000
+microcode: sig=0x1067a pf=0x1 revision=0x0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+microcode: updated to revision 0xa0b date=2010-09-28
+CPU: Pentium(R) Dual-Core CPU E5400 @ 2.70GHz.
+MTRR: Physical address space:
+0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
+0x00000000000a0000 - 0x0000000000100000 size 0x00060000 type 0
+0x0000000000100000 - 0x000000007be00000 size 0x7bd00000 type 6
+0x000000007be00000 - 0x00000000c0000000 size 0x44200000 type 0
+0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
+0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
+MTRR addr 0x0-0x10 set to 6 type @ 0
+MTRR addr 0x10-0x20 set to 6 type @ 1
+MTRR addr 0x20-0x30 set to 6 type @ 2
+MTRR addr 0x30-0x40 set to 6 type @ 3
+MTRR addr 0x40-0x50 set to 6 type @ 4
+MTRR addr 0x50-0x60 set to 6 type @ 5
+MTRR addr 0x60-0x70 set to 6 type @ 6
+MTRR addr 0x70-0x80 set to 6 type @ 7
+MTRR addr 0x80-0x84 set to 6 type @ 8
+MTRR addr 0x84-0x88 set to 6 type @ 9
+MTRR addr 0x88-0x8c set to 6 type @ 10
+MTRR addr 0x8c-0x90 set to 6 type @ 11
+MTRR addr 0x90-0x94 set to 6 type @ 12
+MTRR addr 0x94-0x98 set to 6 type @ 13
+MTRR addr 0x98-0x9c set to 6 type @ 14
+MTRR addr 0x9c-0xa0 set to 6 type @ 15
+MTRR addr 0xa0-0xa4 set to 0 type @ 16
+MTRR addr 0xa4-0xa8 set to 0 type @ 17
+MTRR addr 0xa8-0xac set to 0 type @ 18
+MTRR addr 0xac-0xb0 set to 0 type @ 19
+MTRR addr 0xb0-0xb4 set to 0 type @ 20
+MTRR addr 0xb4-0xb8 set to 0 type @ 21
+MTRR addr 0xb8-0xbc set to 0 type @ 22
+MTRR addr 0xbc-0xc0 set to 0 type @ 23
+MTRR addr 0xc0-0xc1 set to 0 type @ 24
+MTRR addr 0xc1-0xc2 set to 0 type @ 25
+MTRR addr 0xc2-0xc3 set to 0 type @ 26
+MTRR addr 0xc3-0xc4 set to 0 type @ 27
+MTRR addr 0xc4-0xc5 set to 0 type @ 28
+MTRR addr 0xc5-0xc6 set to 0 type @ 29
+MTRR addr 0xc6-0xc7 set to 0 type @ 30
+MTRR addr 0xc7-0xc8 set to 0 type @ 31
+MTRR addr 0xc8-0xc9 set to 0 type @ 32
+MTRR addr 0xc9-0xca set to 0 type @ 33
+MTRR addr 0xca-0xcb set to 0 type @ 34
+MTRR addr 0xcb-0xcc set to 0 type @ 35
+MTRR addr 0xcc-0xcd set to 0 type @ 36
+MTRR addr 0xcd-0xce set to 0 type @ 37
+MTRR addr 0xce-0xcf set to 0 type @ 38
+MTRR addr 0xcf-0xd0 set to 0 type @ 39
+MTRR addr 0xd0-0xd1 set to 0 type @ 40
+MTRR addr 0xd1-0xd2 set to 0 type @ 41
+MTRR addr 0xd2-0xd3 set to 0 type @ 42
+MTRR addr 0xd3-0xd4 set to 0 type @ 43
+MTRR addr 0xd4-0xd5 set to 0 type @ 44
+MTRR addr 0xd5-0xd6 set to 0 type @ 45
+MTRR addr 0xd6-0xd7 set to 0 type @ 46
+MTRR addr 0xd7-0xd8 set to 0 type @ 47
+MTRR addr 0xd8-0xd9 set to 0 type @ 48
+MTRR addr 0xd9-0xda set to 0 type @ 49
+MTRR addr 0xda-0xdb set to 0 type @ 50
+MTRR addr 0xdb-0xdc set to 0 type @ 51
+MTRR addr 0xdc-0xdd set to 0 type @ 52
+MTRR addr 0xdd-0xde set to 0 type @ 53
+MTRR addr 0xde-0xdf set to 0 type @ 54
+MTRR addr 0xdf-0xe0 set to 0 type @ 55
+MTRR addr 0xe0-0xe1 set to 0 type @ 56
+MTRR addr 0xe1-0xe2 set to 0 type @ 57
+MTRR addr 0xe2-0xe3 set to 0 type @ 58
+MTRR addr 0xe3-0xe4 set to 0 type @ 59
+MTRR addr 0xe4-0xe5 set to 0 type @ 60
+MTRR addr 0xe5-0xe6 set to 0 type @ 61
+MTRR addr 0xe6-0xe7 set to 0 type @ 62
+MTRR addr 0xe7-0xe8 set to 0 type @ 63
+MTRR addr 0xe8-0xe9 set to 0 type @ 64
+MTRR addr 0xe9-0xea set to 0 type @ 65
+MTRR addr 0xea-0xeb set to 0 type @ 66
+MTRR addr 0xeb-0xec set to 0 type @ 67
+MTRR addr 0xec-0xed set to 0 type @ 68
+MTRR addr 0xed-0xee set to 0 type @ 69
+MTRR addr 0xee-0xef set to 0 type @ 70
+MTRR addr 0xef-0xf0 set to 0 type @ 71
+MTRR addr 0xf0-0xf1 set to 0 type @ 72
+MTRR addr 0xf1-0xf2 set to 0 type @ 73
+MTRR addr 0xf2-0xf3 set to 0 type @ 74
+MTRR addr 0xf3-0xf4 set to 0 type @ 75
+MTRR addr 0xf4-0xf5 set to 0 type @ 76
+MTRR addr 0xf5-0xf6 set to 0 type @ 77
+MTRR addr 0xf6-0xf7 set to 0 type @ 78
+MTRR addr 0xf7-0xf8 set to 0 type @ 79
+MTRR addr 0xf8-0xf9 set to 0 type @ 80
+MTRR addr 0xf9-0xfa set to 0 type @ 81
+MTRR addr 0xfa-0xfb set to 0 type @ 82
+MTRR addr 0xfb-0xfc set to 0 type @ 83
+MTRR addr 0xfc-0xfd set to 0 type @ 84
+MTRR addr 0xfd-0xfe set to 0 type @ 85
+MTRR addr 0xfe-0xff set to 0 type @ 86
+MTRR addr 0xff-0x100 set to 0 type @ 87
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0000000000000000
+MTRR: Fixed MSR 0x269 0x0000000000000000
+MTRR: Fixed MSR 0x26a 0x0000000000000000
+MTRR: Fixed MSR 0x26b 0x0000000000000000
+MTRR: Fixed MSR 0x26c 0x0000000000000000
+MTRR: Fixed MSR 0x26d 0x0000000000000000
+MTRR: Fixed MSR 0x26e 0x0000000000000000
+MTRR: Fixed MSR 0x26f 0x0000000000000000
+call enable_fixed_mtrr()
+CPU physical address size: 36 bits
+MTRR: default type WB/UC MTRR counts: 6/7.
+MTRR: WB selected as default type.
+MTRR: 0 base 0x000000007be00000 mask 0x0000000fffe00000 type 0
+MTRR: 1 base 0x000000007c000000 mask 0x0000000ffc000000 type 0
+MTRR: 2 base 0x0000000080000000 mask 0x0000000fc0000000 type 0
+MTRR: 3 base 0x00000000c0000000 mask 0x0000000ff0000000 type 1
+MTRR: 4 base 0x00000000d0000000 mask 0x0000000ff0000000 type 0
+MTRR: 5 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+Setting up local APIC... apic_id: 0x00 done.
+VMX status: enabled, locked
+writing P-State 3: 0, 0, 6, 0x16, 15000; encoded: 0x0616
+writing P-State 3: 0, 0, 6, 0x16, 15000; encoded: 0x0616
+writing P-State 3: 0, 0, 6, 0x16, 15000; encoded: 0x0616
+writing P-State 2: 0, 0, 8, 0x1b, 21666; encoded: 0x081b
+writing P-State 1: 0, 0, 10, 0x20, 28332; encoded: 0x0a20
+writing P-State 0: 0, 1, 13, 0x25, 35000; encoded: 0x4d25
+CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
+CBFS: Locating 'cmos_layout.bin'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size b294
+CBFS: Unmatched 'fallback/romstage' at 80
+CBFS: Checking offset b380
+CBFS: File @ offset b380 size 29000
+CBFS: Unmatched 'cpu_microcode_blob.bin' at b380
+CBFS: Checking offset 34400
+CBFS: File @ offset 34400 size 10e09
+CBFS: Unmatched 'fallback/ramstage' at 34400
+CBFS: Checking offset 45280
+CBFS: File @ offset 45280 size 6c00
+CBFS: Unmatched 'vgaroms/seavgabios.bin' at 45280
+CBFS: Checking offset 4bf00
+CBFS: File @ offset 4bf00 size 138
+CBFS: Unmatched 'config' at 4bf00
+CBFS: Checking offset 4c080
+CBFS: File @ offset 4c080 size 240
+CBFS: Unmatched 'revision' at 4c080
+CBFS: Checking offset 4c300
+CBFS: File @ offset 4c300 size 11
+CBFS: Unmatched 'rt8168-macaddress' at 4c300
+CBFS: Checking offset 4c380
+CBFS: File @ offset 4c380 size 100
+CBFS: Unmatched 'cmos.default' at 4c380
+CBFS: Checking offset 4c4c0
+CBFS: File @ offset 4c4c0 size 534
+CBFS: Found @ offset 4c4c0 size 534
+WARNING: No CMOS option 'hyper_threading'.
+CPU: 0 2 siblings
+CPU: 0 has sibling 1
+CPU #0 initialized
+CPU1: stack_base 7bbcd000, stack_end 7bbcdff8
+Asserting INIT.
+Waiting for send to finish...
++Deasserting INIT.
+Waiting for send to finish...
++#startup loops: 2.
+Sending STARTUP #1 to 1.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++Sending STARTUP #2 to 1.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++After Startup.
+Initializing CPU #1
+Waiting for 1 CPUS to stop
+CPU: vendor Intel device 1067a
+CPU: family 06, model 17, stepping 0a
+Enabling cache
+CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
+CBFS: Locating 'cpu_microcode_blob.bin'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size b294
+CBFS: Unmatched 'fallback/romstage' at 80
+CBFS: Checking offset b380
+CBFS: File @ offset b380 size 29000
+CBFS: Found @ offset b380 size 29000
+microcode: sig=0x1067a pf=0x1 revision=0x0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+Microcode size field is 0
+microcode: updated to revision 0xa0b date=2010-09-28
+CPU: Pentium(R) Dual-Core CPU E5400 @ 2.70GHz.
+MTRR: Fixed MSR 0x250 0x0606060606060606
+MTRR: Fixed MSR 0x258 0x0606060606060606
+MTRR: Fixed MSR 0x259 0x0000000000000000
+MTRR: Fixed MSR 0x268 0x0000000000000000
+MTRR: Fixed MSR 0x269 0x0000000000000000
+MTRR: Fixed MSR 0x26a 0x0000000000000000
+MTRR: Fixed MSR 0x26b 0x0000000000000000
+MTRR: Fixed MSR 0x26c 0x0000000000000000
+MTRR: Fixed MSR 0x26d 0x0000000000000000
+MTRR: Fixed MSR 0x26e 0x0000000000000000
+MTRR: Fixed MSR 0x26f 0x0000000000000000
+call enable_fixed_mtrr()
+CPU physical address size: 36 bits
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+Setting up local APIC... apic_id: 0x01 done.
+VMX status: enabled, locked
+writing P-State 3: 0, 0, 6, 0x16, 15000; encoded: 0x0616
+writing P-State 3: 0, 0, 6, 0x16, 15000; encoded: 0x0616
+writing P-State 3: 0, 0, 6, 0x16, 15000; encoded: 0x0616
+writing P-State 2: 0, 0, 8, 0x1b, 21666; encoded: 0x081b
+writing P-State 1: 0, 0, 10, 0x20, 28332; encoded: 0x0a20
+writing P-State 0: 0, 1, 13, 0x25, 35000; encoded: 0x4d25
+CPU: 1 2 siblings
+CPU #1 initialized
+CPU 1 going down...
+All AP CPUs stopped (17189 loops)
+CPU0: stack: 7bbce000 - 7bbcf000, lowest used address 7bbceb14, stack used: 1260 bytes
+CPU1: stack: 7bbcd000 - 7bbce000, lowest used address 7bbcdc28, stack used: 984 bytes
+DOMAIN: 0000 init ...
+PCI: 00:00.0 init ...
+PCI: 00:02.0 init ...
+Initializing VGA without OPROM. MMIO 0xd0000000
+EDID:
+00 ff ff ff ff ff ff 00 4c 2d 24 04 34 32 44 54
+2c 13 01 03 0e 34 20 78 2a ee 91 a3 54 4c 99 26
+0f 50 54 bf ef 80 a9 40 81 80 81 40 71 4f 01 01
+01 01 01 01 01 01 28 3c 80 a0 70 b0 23 40 30 20
+36 00 06 44 21 00 00 1a 00 00 00 fd 00 38 4b 1e
+51 11 00 0a 20 20 20 20 20 20 00 00 00 fc 00 53
+79 6e 63 4d 61 73 74 65 72 0a 20 20 00 00 00 ff
+00 48 56 4c 53 41 30 31 37 33 39 0a 20 20 00 55
+Extracted contents:
+header: 00 ff ff ff ff ff ff 00
+serial number: 4c 2d 24 04 34 32 44 54 2c 13
+version: 01 03
+basic params: 0e 34 20 78 2a
+chroma info: ee 91 a3 54 4c 99 26 0f 50 54
+established: bf ef 80
+standard: a9 40 81 80 81 40 71 4f 01 01 01 01 01 01 01 01
+descriptor 1: 28 3c 80 a0 70 b0 23 40 30 20 36 00 06 44 21 00 00 1a
+descriptor 2: 00 00 00 fd 00 38 4b 1e 51 11 00 0a 20 20 20 20 20 20
+descriptor 3: 00 00 00 fc 00 53 79 6e 63 4d 61 73 74 65 72 0a 20 20
+descriptor 4: 00 00 00 ff 00 48 56 4c 53 41 30 31 37 33 39 0a 20 20
+extensions: 00
+checksum: 55
+
+Manufacturer: SAM Model 424 Serial Number 1413755444
+Made week 44 of 2009
+EDID version: 1.3
+Analog display, Input voltage level: 0.7/0.3 V
+Sync: Separate Composite SyncOnGreen
+Maximum image size: 52 cm x 32 cm
+Gamma: 220%
+Check DPMS levels
+DPMS levels: Off
+RGB color display
+First detailed timing is preferred timing
+Established timings supported:
+ 720x400@70Hz
+ 640x480@60Hz
+ 640x480@67Hz
+ 640x480@72Hz
+ 640x480@75Hz
+ 800x600@56Hz
+ 800x600@60Hz
+ 800x600@72Hz
+ 800x600@75Hz
+ 832x624@75Hz
+ 1024x768@60Hz
+ 1024x768@70Hz
+ 1024x768@75Hz
+ 1280x1024@75Hz
+ 1152x870@75Hz
+Standard timings supported:
+ 1600x1200@60Hz
+ 1280x1024@60Hz
+ 1280x960@60Hz
+ 1152x864@75Hz
+Detailed timings
+Hex of detail: 283c80a070b023403020360006442100001a
+Detailed mode (IN HEX): Clock 154000 KHz, 206 mm x 144 mm
+ 0780 07b0 07d0 0820 hborder 0
+ 04b0 04b3 04b9 04d3 vborder 0
+ +hsync -vsync
+Did detailed timing
+Hex of detail: 000000fd00384b1e5111000a202020202020
+Monitor ranges (GTF): 56-75Hz V, 30-81kHz H, max dotclock 170MHz
+Hex of detail: 000000fc0053796e634d61737465720a2020
+Monitor name: SyncMaster
+Hex of detail: 000000ff0048564c534130313733390a2020
+Serial number: HVLSA01739
+Checksum
+Checksum: 0x55 (valid)
+WARNING: EDID block does NOT fully conform to EDID 1.3.
+ Missing name descriptor
+EDID is not nullbringing up panel at resolution 1920 x 1200
+Borders 0 x 0
+Blank 160 x 35
+Sync 32 x 6
+Front porch 48 x 3
+DREF clock
+Polarities 0, 1
+Pixel N=2, M1=22, M2=6, P1=2, P2=10
+Pixel clock 153600 kHz
+PCI: 00:02.1 init ...
+PCI: 00:1b.0 init ...
+Azalia: codec type: Azalia
+Azalia: base = d0600000
+Azalia: codec_mask = 04
+Azalia: Initializing codec #2
+Azalia: codec viddid: 10ec0887
+Azalia: verb_size: 56
+PCI: 00:1c.0 init ...
+Initializing ICH7 PCIe bridge.
+PCI: 00:1c.1 init ...
+Initializing ICH7 PCIe bridge.
+PCI: 00:1d.0 init ...
+UHCI: Setting up controller.. done.
+PCI: 00:1d.1 init ...
+UHCI: Setting up controller.. done.
+PCI: 00:1d.2 init ...
+UHCI: Setting up controller.. done.
+PCI: 00:1d.3 init ...
+UHCI: Setting up controller.. done.
+PCI: 00:1d.7 init ...
+EHCI: Setting up controller.. done.
+PCI: 00:1e.0 init ...
+PCI: 00:1f.0 init ...
+i82801gx: lpc_init
+IOAPIC: Initializing IOAPIC at 0xfec00000
+IOAPIC: Bootstrap Processor Local APIC = 0x00
+IOAPIC: ID = 0x02
+IOAPIC: Dumping registers
+ reg 0x0000: 0x02000000
+ reg 0x0001: 0x00170020
+ reg 0x0002: 0x00170020
+CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
+CBFS: Locating 'cmos_layout.bin'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size b294
+CBFS: Unmatched 'fallback/romstage' at 80
+CBFS: Checking offset b380
+CBFS: File @ offset b380 size 29000
+CBFS: Unmatched 'cpu_microcode_blob.bin' at b380
+CBFS: Checking offset 34400
+CBFS: File @ offset 34400 size 10e09
+CBFS: Unmatched 'fallback/ramstage' at 34400
+CBFS: Checking offset 45280
+CBFS: File @ offset 45280 size 6c00
+CBFS: Unmatched 'vgaroms/seavgabios.bin' at 45280
+CBFS: Checking offset 4bf00
+CBFS: File @ offset 4bf00 size 138
+CBFS: Unmatched 'config' at 4bf00
+CBFS: Checking offset 4c080
+CBFS: File @ offset 4c080 size 240
+CBFS: Unmatched 'revision' at 4c080
+CBFS: Checking offset 4c300
+CBFS: File @ offset 4c300 size 11
+CBFS: Unmatched 'rt8168-macaddress' at 4c300
+CBFS: Checking offset 4c380
+CBFS: File @ offset 4c380 size 100
+CBFS: Unmatched 'cmos.default' at 4c380
+CBFS: Checking offset 4c4c0
+CBFS: File @ offset 4c4c0 size 534
+CBFS: Found @ offset 4c4c0 size 534
+Set power on after power failure.
+CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
+CBFS: Locating 'cmos_layout.bin'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size b294
+CBFS: Unmatched 'fallback/romstage' at 80
+CBFS: Checking offset b380
+CBFS: File @ offset b380 size 29000
+CBFS: Unmatched 'cpu_microcode_blob.bin' at b380
+CBFS: Checking offset 34400
+CBFS: File @ offset 34400 size 10e09
+CBFS: Unmatched 'fallback/ramstage' at 34400
+CBFS: Checking offset 45280
+CBFS: File @ offset 45280 size 6c00
+CBFS: Unmatched 'vgaroms/seavgabios.bin' at 45280
+CBFS: Checking offset 4bf00
+CBFS: File @ offset 4bf00 size 138
+CBFS: Unmatched 'config' at 4bf00
+CBFS: Checking offset 4c080
+CBFS: File @ offset 4c080 size 240
+CBFS: Unmatched 'revision' at 4c080
+CBFS: Checking offset 4c300
+CBFS: File @ offset 4c300 size 11
+CBFS: Unmatched 'rt8168-macaddress' at 4c300
+CBFS: Checking offset 4c380
+CBFS: File @ offset 4c380 size 100
+CBFS: Unmatched 'cmos.default' at 4c380
+CBFS: Checking offset 4c4c0
+CBFS: File @ offset 4c4c0 size 534
+CBFS: Found @ offset 4c4c0 size 534
+NMI sources enabled.
+rtc_failed = 0x0
+RTC Init
+Disabling ACPI via APMC:
+done.
+Locking SMM.
+PCI: 00:1f.2 init ...
+i82801gx_sata: initializing...
+SATA controller in plain mode.
+PCI: 03:00.0 init ...
+CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
+CBFS: Locating 'rt8168-macaddress'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size b294
+CBFS: Unmatched 'fallback/romstage' at 80
+CBFS: Checking offset b380
+CBFS: File @ offset b380 size 29000
+CBFS: Unmatched 'cpu_microcode_blob.bin' at b380
+CBFS: Checking offset 34400
+CBFS: File @ offset 34400 size 10e09
+CBFS: Unmatched 'fallback/ramstage' at 34400
+CBFS: Checking offset 45280
+CBFS: File @ offset 45280 size 6c00
+CBFS: Unmatched 'vgaroms/seavgabios.bin' at 45280
+CBFS: Checking offset 4bf00
+CBFS: File @ offset 4bf00 size 138
+CBFS: Unmatched 'config' at 4bf00
+CBFS: Checking offset 4c080
+CBFS: File @ offset 4c080 size 240
+CBFS: Unmatched 'revision' at 4c080
+CBFS: Checking offset 4c300
+CBFS: File @ offset 4c300 size 11
+CBFS: Found @ offset 4c300 size 11
+r8168: Resetting NIC...done
+r8168: Programming MAC Address...done
+PNP: 002e.0 init ...
+PNP: 002e.1 init ...
+PNP: 002e.2 init ...
+PNP: 002e.3 init ...
+PNP: 002e.4 init ...
+PNP: 002e.5 init ...
+PNP: 002e.6 init ...
+Devices initialized
+Show all devs... After init.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+APIC: acac: enabled 0
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:02.0: enabled 1
+PCI: 00:02.1: enabled 1
+PCI: 00:03.0: enabled 0
+PCI: 00:03.1: enabled 0
+PCI: 00:1b.0: enabled 1
+PCI: 00:1c.0: enabled 1
+PCI: 00:1c.1: enabled 1
+PCI: 03:00.0: enabled 1
+PCI: 00:1c.2: enabled 0
+PCI: 00:1c.3: enabled 0
+PCI: 00:1d.0: enabled 1
+PCI: 00:1d.1: enabled 1
+PCI: 00:1d.2: enabled 1
+PCI: 00:1d.3: enabled 1
+PCI: 00:1d.7: enabled 1
+PCI: 00:1e.0: enabled 1
+PCI: 00:1f.0: enabled 1
+PNP: 002e.0: enabled 1
+PNP: 002e.1: enabled 1
+PNP: 002e.2: enabled 1
+PNP: 002e.3: enabled 1
+PNP: 002e.4: enabled 1
+PNP: 002e.5: enabled 1
+PNP: 002e.6: enabled 1
+PCI: 00:1f.1: enabled 0
+PCI: 00:1f.2: enabled 1
+PCI: 00:1f.3: enabled 1
+PCI: 00:1f.4: enabled 0
+PCI: 00:1f.5: enabled 0
+PCI: 00:1f.6: enabled 0
+PCI: 00:01.0: enabled 1
+APIC: 01: enabled 1
+Finalize devices...
+Devices finalized
+CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
+CBFS: Locating 'fallback/dsdt.aml'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size b294
+CBFS: Unmatched 'fallback/romstage' at 80
+CBFS: Checking offset b380
+CBFS: File @ offset b380 size 29000
+CBFS: Unmatched 'cpu_microcode_blob.bin' at b380
+CBFS: Checking offset 34400
+CBFS: File @ offset 34400 size 10e09
+CBFS: Unmatched 'fallback/ramstage' at 34400
+CBFS: Checking offset 45280
+CBFS: File @ offset 45280 size 6c00
+CBFS: Unmatched 'vgaroms/seavgabios.bin' at 45280
+CBFS: Checking offset 4bf00
+CBFS: File @ offset 4bf00 size 138
+CBFS: Unmatched 'config' at 4bf00
+CBFS: Checking offset 4c080
+CBFS: File @ offset 4c080 size 240
+CBFS: Unmatched 'revision' at 4c080
+CBFS: Checking offset 4c300
+CBFS: File @ offset 4c300 size 11
+CBFS: Unmatched 'rt8168-macaddress' at 4c300
+CBFS: Checking offset 4c380
+CBFS: File @ offset 4c380 size 100
+CBFS: Unmatched 'cmos.default' at 4c380
+CBFS: Checking offset 4c4c0
+CBFS: File @ offset 4c4c0 size 534
+CBFS: Unmatched 'cmos_layout.bin' at 4c4c0
+CBFS: Checking offset 4ca40
+CBFS: File @ offset 4ca40 size 205d
+CBFS: Found @ offset 4ca40 size 205d
+CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
+CBFS: Locating 'fallback/slic'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size b294
+CBFS: Unmatched 'fallback/romstage' at 80
+CBFS: Checking offset b380
+CBFS: File @ offset b380 size 29000
+CBFS: Unmatched 'cpu_microcode_blob.bin' at b380
+CBFS: Checking offset 34400
+CBFS: File @ offset 34400 size 10e09
+CBFS: Unmatched 'fallback/ramstage' at 34400
+CBFS: Checking offset 45280
+CBFS: File @ offset 45280 size 6c00
+CBFS: Unmatched 'vgaroms/seavgabios.bin' at 45280
+CBFS: Checking offset 4bf00
+CBFS: File @ offset 4bf00 size 138
+CBFS: Unmatched 'config' at 4bf00
+CBFS: Checking offset 4c080
+CBFS: File @ offset 4c080 size 240
+CBFS: Unmatched 'revision' at 4c080
+CBFS: Checking offset 4c300
+CBFS: File @ offset 4c300 size 11
+CBFS: Unmatched 'rt8168-macaddress' at 4c300
+CBFS: Checking offset 4c380
+CBFS: File @ offset 4c380 size 100
+CBFS: Unmatched 'cmos.default' at 4c380
+CBFS: Checking offset 4c4c0
+CBFS: File @ offset 4c4c0 size 534
+CBFS: Unmatched 'cmos_layout.bin' at 4c4c0
+CBFS: Checking offset 4ca40
+CBFS: File @ offset 4ca40 size 205d
+CBFS: Unmatched 'fallback/dsdt.aml' at 4ca40
+CBFS: Checking offset 4eb00
+CBFS: File @ offset 4eb00 size f9a4
+CBFS: Unmatched 'fallback/payload' at 4eb00
+CBFS: Checking offset 5e500
+CBFS: File @ offset 5e500 size 674
+CBFS: Unmatched 'payload_config' at 5e500
+CBFS: Checking offset 5ebc0
+CBFS: File @ offset 5ebc0 size ee
+CBFS: Unmatched 'payload_revision' at 5ebc0
+CBFS: Checking offset 5ed00
+CBFS: File @ offset 5ed00 size e600
+CBFS: Unmatched 'pci10ec,8168.rom' at 5ed00
+CBFS: Checking offset 6d380
+CBFS: File @ offset 6d380 size 7103
+CBFS: Unmatched 'bootsplash.jpg' at 6d380
+CBFS: Checking offset 744c0
+CBFS: File @ offset 744c0 size 1
+CBFS: Unmatched 'etc/pci-optionrom-exec' at 744c0
+CBFS: Checking offset 74540
+CBFS: File @ offset 74540 size 8a958
+CBFS: Unmatched '' at 74540
+CBFS: Checking offset feec0
+CBFS: File @ offset feec0 size 1000
+CBFS: 'fallback/slic' not found.
+ACPI: Writing ACPI tables at 7bb39000.
+ACPI: * FACS
+ACPI: * DSDT
+ACPI: * FADT
+ACPI: added table 1/32, length now 40
+ACPI: * SSDT
+Found 1 CPU(s) with 2 core(s) each.
+clocks between 1200 and 2700 MHz.
+adding 4 P-States between busratio 6 and d, incl. P0
+PSS: 2700MHz power 35000 control 0x4d25 status 0x4d25
+PSS: 2000MHz power 28332 control 0xa20 status 0xa20
+PSS: 1600MHz power 21666 control 0x81b status 0x81b
+PSS: 1200MHz power 15000 control 0x616 status 0x616
+clocks between 1200 and 2700 MHz.
+adding 4 P-States between busratio 6 and d, incl. P0
+PSS: 2700MHz power 35000 control 0x4d25 status 0x4d25
+PSS: 2000MHz power 28332 control 0xa20 status 0xa20
+PSS: 1600MHz power 21666 control 0x81b status 0x81b
+PSS: 1200MHz power 15000 control 0x616 status 0x616
+ACPI: added table 2/32, length now 44
+ACPI: * MCFG
+ACPI: added table 3/32, length now 48
+ACPI: * TCPA
+TCPA log created at 7bb29000
+ACPI: added table 4/32, length now 52
+ACPI: * MADT
+ACPI: added table 5/32, length now 56
+current = 7bb3b780
+current = 7bb3b780
+ACPI: * HPET
+ACPI: added table 6/32, length now 60
+ACPI: done.
+ACPI tables: 10176 bytes.
+smbios_write_tables: 7bb28000
+Root Device (GIGABYTE GA-G41M-ES2L)
+CPU_CLUSTER: 0 (Intel 4-Series Northbridge)
+APIC: 00 (unknown)
+APIC: acac (Intel Penryn CPU)
+DOMAIN: 0000 (Intel 4-Series Northbridge)
+PCI: 00:00.0 (Intel 4-Series Northbridge)
+PCI: 00:02.0 (Intel 4-Series Northbridge)
+PCI: 00:02.1 (Intel 4-Series Northbridge)
+PCI: 00:03.0 (Intel 4-Series Northbridge)
+PCI: 00:03.1 (Intel 4-Series Northbridge)
+PCI: 00:1b.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1c.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1c.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 03:00.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1c.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1c.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1d.7 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1e.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1f.0 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PNP: 002e.0 (ITE IT8718F Super I/O)
+PNP: 002e.1 (ITE IT8718F Super I/O)
+PNP: 002e.2 (ITE IT8718F Super I/O)
+PNP: 002e.3 (ITE IT8718F Super I/O)
+PNP: 002e.4 (ITE IT8718F Super I/O)
+PNP: 002e.5 (ITE IT8718F Super I/O)
+PNP: 002e.6 (ITE IT8718F Super I/O)
+PCI: 00:1f.1 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1f.2 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1f.3 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1f.4 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1f.5 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:1f.6 (Intel ICH7/ICH7-M (82801Gx) Series Southbridge)
+PCI: 00:01.0 (unknown)
+APIC: 01 (unknown)
+SMBIOS tables: 365 bytes.
+Writing table forward entry at 0x00000500
+Wrote coreboot table at: 00000500, 0x10 bytes, checksum b428
+Writing coreboot table at 0x7bb5d000
+CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
+CBFS: Locating 'cmos_layout.bin'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size b294
+CBFS: Unmatched 'fallback/romstage' at 80
+CBFS: Checking offset b380
+CBFS: File @ offset b380 size 29000
+CBFS: Unmatched 'cpu_microcode_blob.bin' at b380
+CBFS: Checking offset 34400
+CBFS: File @ offset 34400 size 10e09
+CBFS: Unmatched 'fallback/ramstage' at 34400
+CBFS: Checking offset 45280
+CBFS: File @ offset 45280 size 6c00
+CBFS: Unmatched 'vgaroms/seavgabios.bin' at 45280
+CBFS: Checking offset 4bf00
+CBFS: File @ offset 4bf00 size 138
+CBFS: Unmatched 'config' at 4bf00
+CBFS: Checking offset 4c080
+CBFS: File @ offset 4c080 size 240
+CBFS: Unmatched 'revision' at 4c080
+CBFS: Checking offset 4c300
+CBFS: File @ offset 4c300 size 11
+CBFS: Unmatched 'rt8168-macaddress' at 4c300
+CBFS: Checking offset 4c380
+CBFS: File @ offset 4c380 size 100
+CBFS: Unmatched 'cmos.default' at 4c380
+CBFS: Checking offset 4c4c0
+CBFS: File @ offset 4c4c0 size 534
+CBFS: Found @ offset 4c4c0 size 534
+ 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
+ 1. 0000000000001000-000000000009ffff: RAM
+ 2. 0000000000100000-000000007bb27fff: RAM
+ 3. 000000007bb28000-000000007bbfffff: CONFIGURATION TABLES
+ 4. 000000007bc00000-000000007bdfffff: RAM
+ 5. 000000007be00000-000000007fffffff: RESERVED
+ 6. 00000000e0000000-00000000efffffff: RESERVED
+ 7. 00000000fed10000-00000000ffffffff: RESERVED
+CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
+CBFS: Locating 'cmos_layout.bin'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size b294
+CBFS: Unmatched 'fallback/romstage' at 80
+CBFS: Checking offset b380
+CBFS: File @ offset b380 size 29000
+CBFS: Unmatched 'cpu_microcode_blob.bin' at b380
+CBFS: Checking offset 34400
+CBFS: File @ offset 34400 size 10e09
+CBFS: Unmatched 'fallback/ramstage' at 34400
+CBFS: Checking offset 45280
+CBFS: File @ offset 45280 size 6c00
+CBFS: Unmatched 'vgaroms/seavgabios.bin' at 45280
+CBFS: Checking offset 4bf00
+CBFS: File @ offset 4bf00 size 138
+CBFS: Unmatched 'config' at 4bf00
+CBFS: Checking offset 4c080
+CBFS: File @ offset 4c080 size 240
+CBFS: Unmatched 'revision' at 4c080
+CBFS: Checking offset 4c300
+CBFS: File @ offset 4c300 size 11
+CBFS: Unmatched 'rt8168-macaddress' at 4c300
+CBFS: Checking offset 4c380
+CBFS: File @ offset 4c380 size 100
+CBFS: Unmatched 'cmos.default' at 4c380
+CBFS: Checking offset 4c4c0
+CBFS: File @ offset 4c4c0 size 534
+CBFS: Found @ offset 4c4c0 size 534
+CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
+FMAP: Found "FLASH" version 1.1 at 0.
+FMAP: base = fff00000 size = 100000 #areas = 3
+Wrote coreboot table at: 7bb5d000, 0x854 bytes, checksum b38b
+coreboot table: 2156 bytes.
+IMD ROOT 0. 7bbff000 00001000
+IMD SMALL 1. 7bbfe000 00001000
+CONSOLE 2. 7bbde000 00020000
+TIME STAMP 3. 7bbdd000 00000400
+ROMSTG STCK 4. 7bbd8000 00005000
+RAMSTAGE 5. 7bb9e000 0003a000
+57a9e100 6. 7bb65000 00038810
+COREBOOT 7. 7bb5d000 00008000
+ACPI 8. 7bb39000 00024000
+TCPA LOG 9. 7bb29000 00010000
+SMBIOS 10. 7bb28000 00000800
+IMD small region:
+ IMD ROOT 0. 7bbfec00 00000400
+ CAR GLOBALS 1. 7bbfeac0 00000140
+ ROMSTAGE 2. 7bbfeaa0 00000004
+ 57a9e000 3. 7bbfea80 00000010
+ ACPI GNVS 4. 7bbfe980 00000100
+CBFS: 'Master Header Locator' located CBFS at [100:fffc0)
+CBFS: Locating 'fallback/payload'
+CBFS: Checking offset 0
+CBFS: File @ offset 0 size 20
+CBFS: Unmatched 'cbfs master header' at 0
+CBFS: Checking offset 80
+CBFS: File @ offset 80 size b294
+CBFS: Unmatched 'fallback/romstage' at 80
+CBFS: Checking offset b380
+CBFS: File @ offset b380 size 29000
+CBFS: Unmatched 'cpu_microcode_blob.bin' at b380
+CBFS: Checking offset 34400
+CBFS: File @ offset 34400 size 10e09
+CBFS: Unmatched 'fallback/ramstage' at 34400
+CBFS: Checking offset 45280
+CBFS: File @ offset 45280 size 6c00
+CBFS: Unmatched 'vgaroms/seavgabios.bin' at 45280
+CBFS: Checking offset 4bf00
+CBFS: File @ offset 4bf00 size 138
+CBFS: Unmatched 'config' at 4bf00
+CBFS: Checking offset 4c080
+CBFS: File @ offset 4c080 size 240
+CBFS: Unmatched 'revision' at 4c080
+CBFS: Checking offset 4c300
+CBFS: File @ offset 4c300 size 11
+CBFS: Unmatched 'rt8168-macaddress' at 4c300
+CBFS: Checking offset 4c380
+CBFS: File @ offset 4c380 size 100
+CBFS: Unmatched 'cmos.default' at 4c380
+CBFS: Checking offset 4c4c0
+CBFS: File @ offset 4c4c0 size 534
+CBFS: Unmatched 'cmos_layout.bin' at 4c4c0
+CBFS: Checking offset 4ca40
+CBFS: File @ offset 4ca40 size 205d
+CBFS: Unmatched 'fallback/dsdt.aml' at 4ca40
+CBFS: Checking offset 4eb00
+CBFS: File @ offset 4eb00 size f9a4
+CBFS: Found @ offset 4eb00 size f9a4
+Loading segment from ROM address 0xfff4ec38
+ code (compression=1)
+ New segment dstaddr 0xe23e0 memsize 0x1dc20 srcaddr 0xfff4ec70 filesize 0xf96c
+Loading segment from ROM address 0xfff4ec54
+ Entry Point 0x000ff06e
+Payload being loaded at below 1MiB without region being marked as RAM usable.
+Loading Segment: addr: 0x00000000000e23e0 memsz: 0x000000000001dc20 filesz: 0x000000000000f96c
+lb: [0x000000007bb9f000, 0x000000007bbd7810)
+Post relocation: addr: 0x00000000000e23e0 memsz: 0x000000000001dc20 filesz: 0x000000000000f96c
+using LZMA
+[ 0x000e23e0, 00100000, 0x00100000) <- fff4ec70
+dest 000e23e0, end 00100000, bouncebuffer ffffffff
+Loaded segments
+ICH7 watchdog disabled
+Jumping to boot code at 000ff06e(7bb5d000)
+CPU0: stack: 7bbce000 - 7bbcf000, lowest used address 7bbcea74, stack used: 1420 bytes
+SeaBIOS (version rel-1.10.1-0-g8891697)
+BUILD: gcc: (coreboot toolchain v1.43 August 31st, 2016) 5.3.0 binutils: (GNU Binutils) 2.26.1
+Found coreboot cbmem console @ 7bbde000
+Found mainboard GIGABYTE GA-G41M-ES2L
+Relocating init from 0x000e3940 to 0x7bdb3de0 (size 49504)
+Found CBFS header at 0xfff00138
+multiboot: eax=7bbca540, ebx=7bbca4f8
+Found 17 PCI devices (max PCI bus is 04)
+Copying SMBIOS entry point from 0x7bb28000 to 0x000f7120
+Copying ACPI RSDP from 0x7bb39000 to 0x000f70f0
+Using pmtimer, ioport 0x508
+Scan for VGA option rom
+Running option rom at c000:0003
+pmm call arg1=0
+Turning on vga text mode console
+SeaBIOS (version rel-1.10.1-0-g8891697)
+EHCI init on dev 00:1d.7 (regs=0xd0604020)
+UHCI init on dev 00:1d.0 (io=2000)
+UHCI init on dev 00:1d.1 (io=2020)
+UHCI init on dev 00:1d.2 (io=2040)
+UHCI init on dev 00:1d.3 (io=2060)
+ATA controller 1 at 2098/20a8/0 (irq 0 dev fa)
+ATA controller 2 at 20a0/20ac/0 (irq 0 dev fa)
+Found 0 lpt ports
+Found 1 serial ports
+Got ps2 nak (status=51)
+All threads complete.
+Scan for option roms
+Running option rom at c700:0003
+pmm call arg1=1
+pmm call arg1=0
+pmm call arg1=1
+pmm call arg1=0
+Searching bootorder for: /pci@i0cf8/pci-bridge@1c,1/*@0
+
+Press ESC for boot menu.
+
+Unable to find vesa video mode dimensions 640/480
+failed to find a videomode with 640x480 0bpp (0=any).
+Searching bootorder for: HALT
+Space available for UMB: c8000-ed000, f6940-f70b0
+Returned 262144 bytes of ZoneHigh
+e820 map has 9 items:
+ 0: 0000000000000000 - 000000000009fc00 = 1 RAM
+ 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
+ 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
+ 3: 0000000000100000 - 000000007bb28000 = 1 RAM
+ 4: 000000007bb28000 - 000000007bc00000 = 2 RESERVED
+ 5: 000000007bc00000 - 000000007be00000 = 1 RAM
+ 6: 000000007be00000 - 0000000080000000 = 2 RESERVED
+ 7: 00000000e0000000 - 00000000f0000000 = 2 RESERVED
+ 8: 00000000fed10000 - 0000000100000000 = 2 RESERVED
+enter handle_19:
+ NULL
+Booting from ROM...
+Booting from c700:0373
+