Revert "lenovo/t400/4.5-1564-g6fa36c9c2c-dirty/2017-04-16T13_28_27Z"
This reverts commit e5454d36ca2f96e452a228db9a1485bff2e8f32e.
The commit in question deletes a lot of unrelated files, and needs to be
reverted.
diff --git a/asrock/e350m1/4.0-5412-g566b4f0/2014-02-01T20:44:31Z/coreboot_console.txt b/asrock/e350m1/4.0-5412-g566b4f0/2014-02-01T20:44:31Z/coreboot_console.txt
new file mode 100644
index 0000000..10ae57c
--- /dev/null
+++ b/asrock/e350m1/4.0-5412-g566b4f0/2014-02-01T20:44:31Z/coreboot_console.txt
@@ -0,0 +1,1221 @@
+coreboot-4.0-5412-g566b4f0 Son Feb 2 00:51:07 CET 2014 booting...
+BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0
+BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 9 exit 0
+Enumerating buses...
+Show all devs...Before device enumeration.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:01.0: enabled 1
+PCI: 00:01.1: enabled 1
+PCI: 00:04.0: enabled 1
+PCI: 00:05.0: enabled 0
+PCI: 00:06.0: enabled 0
+PCI: 00:07.0: enabled 0
+PCI: 00:08.0: enabled 0
+PCI: 00:11.0: enabled 1
+PCI: 00:12.0: enabled 1
+PCI: 00:12.2: enabled 1
+PCI: 00:13.0: enabled 1
+PCI: 00:13.2: enabled 1
+PCI: 00:14.0: enabled 1
+I2C: 00:50: enabled 1
+I2C: 00:51: enabled 1
+PCI: 00:14.1: enabled 1
+PCI: 00:14.2: enabled 1
+PCI: 00:14.3: enabled 1
+PNP: 002e.0: enabled 0
+PNP: 002e.1: enabled 0
+PNP: 002e.2: enabled 1
+PNP: 002e.3: enabled 0
+PNP: 002e.5: enabled 1
+PNP: 002e.6: enabled 0
+PNP: 002e.7: enabled 0
+PNP: 002e.8: enabled 0
+PNP: 002e.9: enabled 0
+PNP: 002e.a: enabled 1
+PNP: 002e.b: enabled 1
+PCI: 00:14.4: enabled 1
+PCI: 00:14.5: enabled 1
+PCI: 00:15.0: enabled 1
+PCI: 00:15.1: enabled 1
+PCI: 00:15.2: enabled 1
+PCI: 00:15.3: enabled 0
+PCI: 00:16.0: enabled 0
+PCI: 00:16.2: enabled 0
+PCI: 00:18.0: enabled 1
+PCI: 00:18.1: enabled 1
+PCI: 00:18.2: enabled 1
+PCI: 00:18.3: enabled 1
+PCI: 00:18.4: enabled 1
+PCI: 00:18.5: enabled 1
+PCI: 00:18.6: enabled 1
+PCI: 00:18.7: enabled 1
+Compare with tree...
+Root Device: enabled 1
+ CPU_CLUSTER: 0: enabled 1
+ APIC: 00: enabled 1
+ DOMAIN: 0000: enabled 1
+ PCI: 00:00.0: enabled 1
+ PCI: 00:01.0: enabled 1
+ PCI: 00:01.1: enabled 1
+ PCI: 00:04.0: enabled 1
+ PCI: 00:05.0: enabled 0
+ PCI: 00:06.0: enabled 0
+ PCI: 00:07.0: enabled 0
+ PCI: 00:08.0: enabled 0
+ PCI: 00:11.0: enabled 1
+ PCI: 00:12.0: enabled 1
+ PCI: 00:12.2: enabled 1
+ PCI: 00:13.0: enabled 1
+ PCI: 00:13.2: enabled 1
+ PCI: 00:14.0: enabled 1
+ I2C: 00:50: enabled 1
+ I2C: 00:51: enabled 1
+ PCI: 00:14.1: enabled 1
+ PCI: 00:14.2: enabled 1
+ PCI: 00:14.3: enabled 1
+ PNP: 002e.0: enabled 0
+ PNP: 002e.1: enabled 0
+ PNP: 002e.2: enabled 1
+ PNP: 002e.3: enabled 0
+ PNP: 002e.5: enabled 1
+ PNP: 002e.6: enabled 0
+ PNP: 002e.7: enabled 0
+ PNP: 002e.8: enabled 0
+ PNP: 002e.9: enabled 0
+ PNP: 002e.a: enabled 1
+ PNP: 002e.b: enabled 1
+ PCI: 00:14.4: enabled 1
+ PCI: 00:14.5: enabled 1
+ PCI: 00:15.0: enabled 1
+ PCI: 00:15.1: enabled 1
+ PCI: 00:15.2: enabled 1
+ PCI: 00:15.3: enabled 0
+ PCI: 00:16.0: enabled 0
+ PCI: 00:16.2: enabled 0
+ PCI: 00:18.0: enabled 1
+ PCI: 00:18.1: enabled 1
+ PCI: 00:18.2: enabled 1
+ PCI: 00:18.3: enabled 1
+ PCI: 00:18.4: enabled 1
+ PCI: 00:18.5: enabled 1
+ PCI: 00:18.6: enabled 1
+ PCI: 00:18.7: enabled 1
+Mainboard E350M1 Enable.
+scan_static_bus for Root Device
+setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000
+setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000001
+setup_uma_memory: uma size 0x18000000, memory start 0xc8000000
+CPU_CLUSTER: 0 enabled
+DOMAIN: 0000 enabled
+CPU_CLUSTER: 0 scanning...
+ AP siblings=1
+CPU: APIC: 00 enabled
+CPU: APIC: 01 enabled
+DOMAIN: 0000 scanning...
+PCI: pci_scan_bus for bus 00
+PCI: 00:00.0 [1022/1510] ops
+PCI: 00:00.0 [1022/1510] enabled
+PCI: 00:01.0 [1002/9802] enabled
+PCI: 00:01.1 [1002/1314] enabled
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+Capability: type 0x05 @ 0xa0
+Capability: type 0x0d @ 0xb0
+Capability: type 0x08 @ 0xb8
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+PCI: 00:04.0 subordinate bus PCI Express
+PCI: 00:04.0 [1022/1512] enabled
+sb800_enable() SB800 - Smbus.c - alink_ab_indx - Start.
+SB800 - Smbus.c - alink_ab_indx - End.
+PCI: 00:11.0 [1002/4390] enabled
+sb800_enable() PCI: 00:12.0 [1002/4397] ops
+PCI: 00:12.0 [1002/4397] enabled
+sb800_enable() PCI: 00:12.2 [1002/4396] ops
+PCI: 00:12.2 [1002/4396] enabled
+sb800_enable() PCI: 00:13.0 [1002/4397] ops
+PCI: 00:13.0 [1002/4397] enabled
+sb800_enable() PCI: 00:13.2 [1002/4396] ops
+PCI: 00:13.2 [1002/4396] enabled
+sb800_enable() sm_init().
+IOAPIC: Clearing IOAPIC at 0xfec00000
+IOAPIC: 24 interrupts
+IOAPIC: reg 0x00000000 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
+IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
+IOAPIC: Initializing IOAPIC at 0xfec00000
+IOAPIC: Bootstrap Processor Local APIC = 0x00
+IOAPIC: ID = 0x02
+IOAPIC: Dumping registers
+ reg 0x0000: 0x02000000
+ reg 0x0001: 0x00178021
+ reg 0x0002: 0x02000000
+IOAPIC: 24 interrupts
+IOAPIC: Enabling interrupts on FSB
+IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
+IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
+IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
+IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
+IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
+PCI: 00:14.0 [1002/4385] enabled
+sb800_enable() PCI: Static device PCI: 00:14.1 not found, disabling it.
+sb800_enable() hda enabled
+PCI: 00:14.2 [1002/4383] ops
+PCI: 00:14.2 [1002/4383] enabled
+sb800_enable() PCI: 00:14.3 [1002/439d] bus ops
+PCI: 00:14.3 [1002/439d] enabled
+sb800_enable() PCI: 00:14.4 [1002/4384] bus ops
+PCI: 00:14.4 [1002/4384] enabled
+sb800_enable() PCI: 00:14.5 [1002/4399] ops
+PCI: 00:14.5 [1002/4399] enabled
+sb800_enable() Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+Capability: type 0x0d @ 0xb0
+Capability: type 0x08 @ 0xb8
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+PCI: 00:15.0 subordinate bus PCI Express
+PCI: 00:15.0 [1002/43a0] enabled
+sb800_enable() Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+Capability: type 0x0d @ 0xb0
+Capability: type 0x08 @ 0xb8
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+PCI: 00:15.1 subordinate bus PCI Express
+PCI: 00:15.1 [1002/43a1] enabled
+sb800_enable() Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+Capability: type 0x0d @ 0xb0
+Capability: type 0x08 @ 0xb8
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+PCI: 00:15.2 subordinate bus PCI Express
+PCI: 00:15.2 [1002/43a2] enabled
+sb800_enable() Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+Capability: type 0x0d @ 0xb0
+Capability: type 0x08 @ 0xb8
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+PCI: 00:15.3 subordinate bus PCI Express
+PCI: 00:15.3 [1002/43a3] disabled
+sb800_enable() PCI: 00:16.0 [1002/4397] ops
+PCI: 00:16.0 [1002/4397] disabled
+sb800_enable() PCI: 00:18.0 [1022/1700] enabled
+PCI: 00:18.1 [1022/1701] enabled
+PCI: 00:18.2 [1022/1702] enabled
+PCI: 00:18.3 [1022/1703] enabled
+PCI: 00:18.4 [1022/1704] enabled
+PCI: 00:18.5 [1022/1718] enabled
+PCI: 00:18.6 [1022/1716] enabled
+PCI: 00:18.7 [1022/1719] enabled
+do_pci_scan_bridge for PCI: 00:04.0
+PCI: pci_scan_bus for bus 01
+PCI: 01:00.0 [1912/0015] enabled
+PCI: pci_scan_bus returning with max=001
+Capability: type 0x01 @ 0x50
+Capability: type 0x05 @ 0x70
+Capability: type 0x11 @ 0x90
+Capability: type 0x10 @ 0xa0
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+Enabling Common Clock Configuration
+ASPM: Enabled L0s and L1
+do_pci_scan_bridge returns max 1
+scan_static_bus for PCI: 00:14.3
+PNP: 002e.0 disabled
+PNP: 002e.1 disabled
+PNP: 002e.2 enabled
+PNP: 002e.3 disabled
+PNP: 002e.5 enabled
+PNP: 002e.6 disabled
+PNP: 002e.7 disabled
+PNP: 002e.8 disabled
+PNP: 002e.9 disabled
+PNP: 002e.a enabled
+PNP: 002e.b enabled
+scan_static_bus for PCI: 00:14.3 done
+do_pci_scan_bridge for PCI: 00:14.4
+PCI: pci_scan_bus for bus 02
+PCI: pci_scan_bus returning with max=002
+do_pci_scan_bridge returns max 2
+do_pci_scan_bridge for PCI: 00:15.0
+PCI: pci_scan_bus for bus 03
+PCI: pci_scan_bus returning with max=003
+do_pci_scan_bridge returns max 3
+do_pci_scan_bridge for PCI: 00:15.1
+PCI: pci_scan_bus for bus 04
+PCI: 04:00.0 [10ec/8168] enabled
+PCI: pci_scan_bus returning with max=004
+Capability: type 0x01 @ 0x40
+Capability: type 0x05 @ 0x50
+Capability: type 0x10 @ 0x70
+Capability: type 0x01 @ 0x50
+Capability: type 0x10 @ 0x58
+Enabling Common Clock Configuration
+ASPM: Enabled L0s and L1
+do_pci_scan_bridge returns max 4
+do_pci_scan_bridge for PCI: 00:15.2
+PCI: pci_scan_bus for bus 05
+PCI: pci_scan_bus returning with max=005
+do_pci_scan_bridge returns max 5
+PCI: pci_scan_bus returning with max=005
+scan_static_bus for Root Device done
+done
+BS: BS_DEV_ENUMERATE times (us): entry 0 run 94890 exit 0
+found VGA at PCI: 00:01.0
+Setting up VGA for PCI: 00:01.0
+Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
+Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
+Allocating resources...
+Reading resources...
+Root Device read_resources bus 0 link: 0
+CPU_CLUSTER: 0 read_resources bus 0 link: 0
+APIC: 00 missing read_resources
+APIC: 01 missing read_resources
+CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
+
+Fam14h - domain_read_resources
+DOMAIN: 0000 read_resources bus 0 link: 0
+
+Fam14h - nb_read_resources
+PCI: 00:04.0 read_resources bus 1 link: 0
+PCI: 00:04.0 read_resources bus 1 link: 0 done
+PCI: 00:14.0 read_resources bus 0 link: 0
+I2C: 00:50 missing read_resources
+I2C: 00:51 missing read_resources
+PCI: 00:14.0 read_resources bus 0 link: 0 done
+SB800 - Lpc.c - lpc_read_resources - Start.
+SB800 - Lpc.c - lpc_read_resources - End.
+PCI: 00:14.3 read_resources bus 0 link: 0
+PCI: 00:14.3 read_resources bus 0 link: 0 done
+PCI: 00:14.4 read_resources bus 2 link: 0
+PCI: 00:14.4 read_resources bus 2 link: 0 done
+PCI: 00:15.0 read_resources bus 3 link: 0
+PCI: 00:15.0 read_resources bus 3 link: 0 done
+PCI: 00:15.1 read_resources bus 4 link: 0
+PCI: 00:15.1 read_resources bus 4 link: 0 done
+PCI: 00:15.2 register 10(ffffffff), read-only ignoring it
+PCI: 00:15.2 register 14(ffffffff), read-only ignoring it
+PCI: 00:15.2 register 38(ffffffff), read-only ignoring it
+PCI: 00:15.2 read_resources bus 5 link: 0
+PCI: 00:15.2 read_resources bus 5 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0 done
+Root Device read_resources bus 0 link: 0 done
+Done reading resources.
+Show resources in subtree (Root Device)...After reading.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ APIC: 01
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
+ PCI: 00:00.0
+ PCI: 00:00.0 resource base f8000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
+ PCI: 00:01.0
+ PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
+ PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14
+ PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18
+ PCI: 00:01.1
+ PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10
+ PCI: 00:04.0 child on link 0 PCI: 01:00.0
+ PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
+ PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 01:00.0
+ PCI: 01:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:05.0
+ PCI: 00:06.0
+ PCI: 00:07.0
+ PCI: 00:08.0
+ PCI: 00:11.0
+ PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
+ PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
+ PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
+ PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
+ PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
+ PCI: 00:11.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24
+ PCI: 00:12.0
+ PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+ PCI: 00:12.2
+ PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
+ PCI: 00:13.0
+ PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+ PCI: 00:13.2
+ PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
+ PCI: 00:14.0 child on link 0 I2C: 00:50
+ I2C: 00:50
+ I2C: 00:51
+ PCI: 00:14.1
+ PCI: 00:14.2
+ PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
+ PCI: 00:14.3 child on link 0 PNP: 002e.0
+ PCI: 00:14.3 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 200 index a0
+ PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+ PNP: 002e.0
+ PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
+ PNP: 002e.1
+ PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
+ PNP: 002e.2
+ PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.3
+ PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.5
+ PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
+ PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
+ PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
+ PNP: 002e.6
+ PNP: 002e.6 resource base 100 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 002e.7
+ PNP: 002e.7 resource base 220 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
+ PNP: 002e.7 resource base 300 size 2 align 1 gran 1 limit 7ff flags c0000100 index 62
+ PNP: 002e.7 resource base 9 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.8
+ PNP: 002e.9
+ PNP: 002e.a
+ PNP: 002e.b
+ PNP: 002e.b resource base 290 size 8 align 3 gran 3 limit fff flags c0000100 index 60
+ PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PCI: 00:14.4
+ PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
+ PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
+ PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 00:14.5
+ PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+ PCI: 00:15.0
+ PCI: 00:15.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
+ PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 00:15.1 child on link 0 PCI: 04:00.0
+ PCI: 00:15.1 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
+ PCI: 00:15.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
+ PCI: 00:15.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
+ PCI: 04:00.0
+ PCI: 04:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
+ PCI: 04:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18
+ PCI: 04:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
+ PCI: 00:15.2
+ PCI: 00:15.3
+ PCI: 00:16.0
+ PCI: 00:16.2
+ PCI: 00:18.0
+ PCI: 00:18.1
+ PCI: 00:18.2
+ PCI: 00:18.3
+ PCI: 00:18.4
+ PCI: 00:18.5
+ PCI: 00:18.6
+ PCI: 00:18.7
+DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
+PCI: 00:04.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
+PCI: 00:04.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
+PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
+PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
+PCI: 00:15.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
+PCI: 00:15.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
+PCI: 00:15.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
+PCI: 04:00.0 10 * [0x0 - 0xff] io
+PCI: 00:15.1 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
+PCI: 00:15.1 1c * [0x0 - 0xfff] io
+PCI: 00:01.0 14 * [0x1000 - 0x10ff] io
+PCI: 00:11.0 20 * [0x1400 - 0x140f] io
+PCI: 00:11.0 10 * [0x1410 - 0x1417] io
+PCI: 00:11.0 18 * [0x1418 - 0x141f] io
+PCI: 00:11.0 14 * [0x1420 - 0x1423] io
+PCI: 00:11.0 1c * [0x1424 - 0x1427] io
+DOMAIN: 0000 compute_resources_io: base: 1428 size: 1428 align: 12 gran: 0 limit: ffff done
+DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
+PCI: 00:04.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:04.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:04.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 01:00.0 10 * [0x0 - 0x1fff] mem
+PCI: 00:04.0 compute_resources_mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:15.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 00:15.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:15.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:15.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:15.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
+PCI: 04:00.0 20 * [0x0 - 0x3fff] prefmem
+PCI: 04:00.0 18 * [0x4000 - 0x4fff] prefmem
+PCI: 00:15.1 compute_resources_prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
+PCI: 00:15.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
+PCI: 00:15.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
+PCI: 00:01.0 10 * [0x0 - 0xfffffff] prefmem
+PCI: 00:04.0 20 * [0x10000000 - 0x100fffff] mem
+PCI: 00:15.1 24 * [0x10100000 - 0x101fffff] prefmem
+PCI: 00:01.0 18 * [0x10200000 - 0x1023ffff] mem
+PCI: 00:01.1 10 * [0x10240000 - 0x10243fff] mem
+PCI: 00:14.2 10 * [0x10244000 - 0x10247fff] mem
+PCI: 00:12.0 10 * [0x10248000 - 0x10248fff] mem
+PCI: 00:13.0 10 * [0x10249000 - 0x10249fff] mem
+PCI: 00:14.5 10 * [0x1024a000 - 0x1024afff] mem
+PCI: 00:11.0 24 * [0x1024b000 - 0x1024b3ff] mem
+PCI: 00:12.2 10 * [0x1024b400 - 0x1024b4ff] mem
+PCI: 00:13.2 10 * [0x1024b500 - 0x1024b5ff] mem
+PCI: 00:14.3 a0 * [0x1024b600 - 0x1024b600] mem
+DOMAIN: 0000 compute_resources_mem: base: 1024b601 size: 1024b601 align: 28 gran: 0 limit: ffffffff done
+avoid_fixed_resources: DOMAIN: 0000
+avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
+constrain_resources: DOMAIN: 0000
+constrain_resources: PCI: 00:00.0
+constrain_resources: PCI: 00:01.0
+constrain_resources: PCI: 00:01.1
+constrain_resources: PCI: 00:04.0
+constrain_resources: PCI: 01:00.0
+constrain_resources: PCI: 00:11.0
+constrain_resources: PCI: 00:12.0
+constrain_resources: PCI: 00:12.2
+constrain_resources: PCI: 00:13.0
+constrain_resources: PCI: 00:13.2
+constrain_resources: PCI: 00:14.0
+constrain_resources: I2C: 00:50
+constrain_resources: I2C: 00:51
+constrain_resources: PCI: 00:14.2
+constrain_resources: PCI: 00:14.3
+constrain_resources: PNP: 002e.2
+constrain_resources: PNP: 002e.5
+constrain_resources: PNP: 002e.a
+constrain_resources: PNP: 002e.b
+constrain_resources: PCI: 00:14.4
+constrain_resources: PCI: 00:14.5
+constrain_resources: PCI: 00:15.0
+constrain_resources: PCI: 00:15.1
+constrain_resources: PCI: 04:00.0
+constrain_resources: PCI: 00:15.2
+constrain_resources: PCI: 00:18.0
+constrain_resources: PCI: 00:18.1
+constrain_resources: PCI: 00:18.2
+constrain_resources: PCI: 00:18.3
+constrain_resources: PCI: 00:18.4
+constrain_resources: PCI: 00:18.5
+constrain_resources: PCI: 00:18.6
+constrain_resources: PCI: 00:18.7
+avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff
+ lim->base 00001000 lim->limit 0000ffff
+avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff
+ lim->base 00000000 lim->limit f7ffffff
+Setting resources...
+DOMAIN: 0000 allocate_resources_io: base:1000 size:1428 align:12 gran:0 limit:ffff
+Assigned: PCI: 00:15.1 1c * [0x1000 - 0x1fff] io
+Assigned: PCI: 00:01.0 14 * [0x2000 - 0x20ff] io
+Assigned: PCI: 00:11.0 20 * [0x2400 - 0x240f] io
+Assigned: PCI: 00:11.0 10 * [0x2410 - 0x2417] io
+Assigned: PCI: 00:11.0 18 * [0x2418 - 0x241f] io
+Assigned: PCI: 00:11.0 14 * [0x2420 - 0x2423] io
+Assigned: PCI: 00:11.0 1c * [0x2424 - 0x2427] io
+DOMAIN: 0000 allocate_resources_io: next_base: 2428 size: 1428 align: 12 gran: 0 done
+PCI: 00:04.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:04.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
+PCI: 00:14.4 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:14.4 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
+PCI: 00:15.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
+PCI: 00:15.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
+PCI: 00:15.1 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff
+Assigned: PCI: 04:00.0 10 * [0x1000 - 0x10ff] io
+PCI: 00:15.1 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 12 done
+DOMAIN: 0000 allocate_resources_mem: base:e0000000 size:1024b601 align:28 gran:0 limit:f7ffffff
+Assigned: PCI: 00:01.0 10 * [0xe0000000 - 0xefffffff] prefmem
+Assigned: PCI: 00:04.0 20 * [0xf0000000 - 0xf00fffff] mem
+Assigned: PCI: 00:15.1 24 * [0xf0100000 - 0xf01fffff] prefmem
+Assigned: PCI: 00:01.0 18 * [0xf0200000 - 0xf023ffff] mem
+Assigned: PCI: 00:01.1 10 * [0xf0240000 - 0xf0243fff] mem
+Assigned: PCI: 00:14.2 10 * [0xf0244000 - 0xf0247fff] mem
+Assigned: PCI: 00:12.0 10 * [0xf0248000 - 0xf0248fff] mem
+Assigned: PCI: 00:13.0 10 * [0xf0249000 - 0xf0249fff] mem
+Assigned: PCI: 00:14.5 10 * [0xf024a000 - 0xf024afff] mem
+Assigned: PCI: 00:11.0 24 * [0xf024b000 - 0xf024b3ff] mem
+Assigned: PCI: 00:12.2 10 * [0xf024b400 - 0xf024b4ff] mem
+Assigned: PCI: 00:13.2 10 * [0xf024b500 - 0xf024b5ff] mem
+Assigned: PCI: 00:14.3 a0 * [0xf024b600 - 0xf024b600] mem
+DOMAIN: 0000 allocate_resources_mem: next_base: f024b601 size: 1024b601 align: 28 gran: 0 done
+PCI: 00:04.0 allocate_resources_prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
+PCI: 00:04.0 allocate_resources_prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
+PCI: 00:04.0 allocate_resources_mem: base:f0000000 size:100000 align:20 gran:20 limit:f7ffffff
+Assigned: PCI: 01:00.0 10 * [0xf0000000 - 0xf0001fff] mem
+PCI: 00:04.0 allocate_resources_mem: next_base: f0002000 size: 100000 align: 20 gran: 20 done
+PCI: 00:14.4 allocate_resources_prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
+PCI: 00:14.4 allocate_resources_prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
+PCI: 00:14.4 allocate_resources_mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
+PCI: 00:14.4 allocate_resources_mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
+PCI: 00:15.0 allocate_resources_prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
+PCI: 00:15.0 allocate_resources_prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
+PCI: 00:15.0 allocate_resources_mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
+PCI: 00:15.0 allocate_resources_mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
+PCI: 00:15.1 allocate_resources_prefmem: base:f0100000 size:100000 align:20 gran:20 limit:f7ffffff
+Assigned: PCI: 04:00.0 20 * [0xf0100000 - 0xf0103fff] prefmem
+Assigned: PCI: 04:00.0 18 * [0xf0104000 - 0xf0104fff] prefmem
+PCI: 00:15.1 allocate_resources_prefmem: next_base: f0105000 size: 100000 align: 20 gran: 20 done
+PCI: 00:15.1 allocate_resources_mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
+PCI: 00:15.1 allocate_resources_mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
+Root Device assign_resources, bus 0 link: 0
+
+Fam14h - domain_set_resources
+ amsr - incoming dev = 0027d000
+adsr: (before) basek = 0, limitk = 11effffff.
+adsr: (after) basek = 0, limitk = 47bfff, sizek = 47c000.
+adsr - 0xa0000 to 0xbffff resource.
+adsr: mmio_basek=00380000, basek=00000300, limitk=0047bfff
+0: mmio_basek=00380000, basek=00400000, limitk=0047bfff
+ adsr - mmio_basek = 380000.
+dword=c8000000
+nvram_pos=f8, dword>>(8*i)=0
+nvram_pos=f9, dword>>(8*i)=0
+nvram_pos=fa, dword>>(8*i)=0
+nvram_pos=fb, dword>>(8*i)=c8
+CBMEM region c7fd0000-c7ffffff (cbmem_late_set_table)
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+
+Fam14h - nb_set_resources
+
+Fam14h - create_vga_resource
+
+Fam14h - set_resource
+PCI: 00:00.0 c0010058 <- [0x00f8000000 - 0x00f8ffffff] size 0x01000000 gran 0x00 mem <mmconfig>
+PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
+PCI: 00:01.0 14 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
+PCI: 00:01.0 18 <- [0x00f0200000 - 0x00f023ffff] size 0x00040000 gran 0x12 mem
+PCI: 00:01.1 10 <- [0x00f0240000 - 0x00f0243fff] size 0x00004000 gran 0x0e mem
+PCI: 00:04.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
+PCI: 00:04.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem
+PCI: 00:04.0 20 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14 bus 01 mem
+PCI: 00:04.0 assign_resources, bus 1 link: 0
+PCI: 01:00.0 10 <- [0x00f0000000 - 0x00f0001fff] size 0x00002000 gran 0x0d mem64
+PCI: 00:04.0 assign_resources, bus 1 link: 0
+PCI: 00:11.0 10 <- [0x0000002410 - 0x0000002417] size 0x00000008 gran 0x03 io
+PCI: 00:11.0 14 <- [0x0000002420 - 0x0000002423] size 0x00000004 gran 0x02 io
+PCI: 00:11.0 18 <- [0x0000002418 - 0x000000241f] size 0x00000008 gran 0x03 io
+PCI: 00:11.0 1c <- [0x0000002424 - 0x0000002427] size 0x00000004 gran 0x02 io
+PCI: 00:11.0 20 <- [0x0000002400 - 0x000000240f] size 0x00000010 gran 0x04 io
+PCI: 00:11.0 24 <- [0x00f024b000 - 0x00f024b3ff] size 0x00000400 gran 0x0a mem
+PCI: 00:12.0 10 <- [0x00f0248000 - 0x00f0248fff] size 0x00001000 gran 0x0c mem
+PCI: 00:12.2 10 <- [0x00f024b400 - 0x00f024b4ff] size 0x00000100 gran 0x08 mem
+PCI: 00:13.0 10 <- [0x00f0249000 - 0x00f0249fff] size 0x00001000 gran 0x0c mem
+PCI: 00:13.2 10 <- [0x00f024b500 - 0x00f024b5ff] size 0x00000100 gran 0x08 mem
+PCI: 00:14.2 10 <- [0x00f0244000 - 0x00f0247fff] size 0x00004000 gran 0x0e mem64
+SB800 - Lpc.c - lpc_set_resources - Start.
+PCI: 00:14.3 a0 <- [0x00f024b602 - 0x00f024b602] size 0x00000001 gran 0x00 mem
+PCI: 00:14.3 assign_resources, bus 0 link: 0
+PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
+PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
+PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
+PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
+PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
+PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
+PNP: 002e.b 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io
+PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq
+PCI: 00:14.3 assign_resources, bus 0 link: 0
+SB800 - Lpc.c - lpc_set_resources - End.
+PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
+PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
+PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 mem
+PCI: 00:14.5 10 <- [0x00f024a000 - 0x00f024afff] size 0x00001000 gran 0x0c mem
+PCI: 00:15.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
+PCI: 00:15.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 prefmem
+PCI: 00:15.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 mem
+PCI: 00:15.1 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 04 io
+PCI: 00:15.1 24 <- [0x00f0100000 - 0x00f01fffff] size 0x00100000 gran 0x14 bus 04 prefmem
+PCI: 00:15.1 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 04 mem
+PCI: 00:15.1 assign_resources, bus 4 link: 0
+PCI: 04:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
+PCI: 04:00.0 18 <- [0x00f0104000 - 0x00f0104fff] size 0x00001000 gran 0x0c prefmem64
+PCI: 04:00.0 20 <- [0x00f0100000 - 0x00f0103fff] size 0x00004000 gran 0x0e prefmem64
+PCI: 00:15.1 assign_resources, bus 4 link: 0
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+ adsr - leaving this lovely routine.
+Root Device assign_resources, bus 0 link: 0
+Done setting resources.
+Show resources in subtree (Root Device)...After assigning values.
+ Root Device child on link 0 CPU_CLUSTER: 0
+ CPU_CLUSTER: 0 child on link 0 APIC: 00
+ APIC: 00
+ APIC: 01
+ DOMAIN: 0000 child on link 0 PCI: 00:00.0
+ DOMAIN: 0000 resource base 1000 size 1428 align 12 gran 0 limit ffff flags 40040100 index 10000000
+ DOMAIN: 0000 resource base e0000000 size 1024b601 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
+ DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
+ DOMAIN: 0000 resource base c0000 size dff40000 align 0 gran 0 limit 0 flags e0004200 index 20
+ DOMAIN: 0000 resource base 100000000 size 1efffc00 align 0 gran 0 limit 0 flags e0004200 index 30
+ DOMAIN: 0000 resource base c8000000 size 18000000 align 0 gran 0 limit 0 flags f0000200 index 7
+ PCI: 00:00.0
+ PCI: 00:00.0 resource base f8000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
+ PCI: 00:01.0
+ PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28 limit f7ffffff flags 60001200 index 10
+ PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit ffff flags 60000100 index 14
+ PCI: 00:01.0 resource base f0200000 size 40000 align 18 gran 18 limit f7ffffff flags 60000200 index 18
+ PCI: 00:01.1
+ PCI: 00:01.1 resource base f0240000 size 4000 align 14 gran 14 limit f7ffffff flags 60000200 index 10
+ PCI: 00:04.0 child on link 0 PCI: 01:00.0
+ PCI: 00:04.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:04.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
+ PCI: 00:04.0 resource base f0000000 size 100000 align 20 gran 20 limit f7ffffff flags 60080202 index 20
+ PCI: 01:00.0
+ PCI: 01:00.0 resource base f0000000 size 2000 align 13 gran 13 limit f7ffffff flags 60000201 index 10
+ PCI: 00:05.0
+ PCI: 00:06.0
+ PCI: 00:07.0
+ PCI: 00:08.0
+ PCI: 00:11.0
+ PCI: 00:11.0 resource base 2410 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
+ PCI: 00:11.0 resource base 2420 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
+ PCI: 00:11.0 resource base 2418 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
+ PCI: 00:11.0 resource base 2424 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
+ PCI: 00:11.0 resource base 2400 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
+ PCI: 00:11.0 resource base f024b000 size 400 align 10 gran 10 limit f7ffffff flags 60000200 index 24
+ PCI: 00:12.0
+ PCI: 00:12.0 resource base f0248000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10
+ PCI: 00:12.2
+ PCI: 00:12.2 resource base f024b400 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10
+ PCI: 00:13.0
+ PCI: 00:13.0 resource base f0249000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10
+ PCI: 00:13.2
+ PCI: 00:13.2 resource base f024b500 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10
+ PCI: 00:14.0 child on link 0 I2C: 00:50
+ I2C: 00:50
+ I2C: 00:51
+ PCI: 00:14.1
+ PCI: 00:14.2
+ PCI: 00:14.2 resource base f0244000 size 4000 align 14 gran 14 limit f7ffffff flags 60000201 index 10
+ PCI: 00:14.3 child on link 0 PNP: 002e.0
+ PCI: 00:14.3 resource base f024b602 size 1 align 0 gran 0 limit f7ffffff flags 60000200 index a0
+ PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
+ PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
+ PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+ PNP: 002e.0
+ PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
+ PNP: 002e.1
+ PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
+ PNP: 002e.2
+ PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+ PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.3
+ PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.5
+ PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
+ PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62
+ PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72
+ PNP: 002e.6
+ PNP: 002e.6 resource base 100 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+ PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+ PNP: 002e.7
+ PNP: 002e.7 resource base 220 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
+ PNP: 002e.7 resource base 300 size 2 align 1 gran 1 limit 7ff flags c0000100 index 62
+ PNP: 002e.7 resource base 9 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+ PNP: 002e.8
+ PNP: 002e.9
+ PNP: 002e.a
+ PNP: 002e.b
+ PNP: 002e.b resource base 290 size 8 align 3 gran 3 limit fff flags e0000100 index 60
+ PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+ PCI: 00:14.4
+ PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
+ PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
+ PCI: 00:14.5
+ PCI: 00:14.5 resource base f024a000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10
+ PCI: 00:15.0
+ PCI: 00:15.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:15.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
+ PCI: 00:15.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
+ PCI: 00:15.1 child on link 0 PCI: 04:00.0
+ PCI: 00:15.1 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c
+ PCI: 00:15.1 resource base f0100000 size 100000 align 20 gran 20 limit f7ffffff flags 60081202 index 24
+ PCI: 00:15.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
+ PCI: 04:00.0
+ PCI: 04:00.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 10
+ PCI: 04:00.0 resource base f0104000 size 1000 align 12 gran 12 limit f7ffffff flags 60001201 index 18
+ PCI: 04:00.0 resource base f0100000 size 4000 align 14 gran 14 limit f7ffffff flags 60001201 index 20
+ PCI: 00:15.2
+ PCI: 00:15.3
+ PCI: 00:16.0
+ PCI: 00:16.2
+ PCI: 00:18.0
+ PCI: 00:18.1
+ PCI: 00:18.2
+ PCI: 00:18.3
+ PCI: 00:18.4
+ PCI: 00:18.5
+ PCI: 00:18.6
+ PCI: 00:18.7
+Done allocating resources.
+BS: BS_DEV_RESOURCES times (us): entry 0 run 4830 exit 0
+Enabling resources...
+
+Fam14h - domain_enable_resources
+agesawrapper_amdinitmid passed.
+ ader - leaving domain_enable_resources.
+PCI: 00:00.0 cmd <- 06
+PCI: 00:01.0 subsystem <- 1022/1510
+PCI: 00:01.0 cmd <- 07
+PCI: 00:01.1 subsystem <- 1022/1510
+PCI: 00:01.1 cmd <- 02
+PCI: 00:04.0 bridge ctrl <- 0003
+PCI: 00:04.0 cmd <- 06
+PCI: 00:11.0 subsystem <- 1022/1510
+PCI: 00:11.0 cmd <- 03
+PCI: 00:12.0 subsystem <- 1022/1510
+PCI: 00:12.0 cmd <- 02
+PCI: 00:12.2 subsystem <- 1022/1510
+PCI: 00:12.2 cmd <- 02
+PCI: 00:13.0 subsystem <- 1022/1510
+PCI: 00:13.0 cmd <- 02
+PCI: 00:13.2 subsystem <- 1022/1510
+PCI: 00:13.2 cmd <- 02
+PCI: 00:14.0 subsystem <- 1022/1510
+PCI: 00:14.0 cmd <- 403
+PCI: 00:14.2 subsystem <- 1022/1510
+PCI: 00:14.2 cmd <- 02
+PCI: 00:14.3 subsystem <- 1022/1510
+PCI: 00:14.3 cmd <- 0f
+PCI: 00:14.4 bridge ctrl <- 0003
+PCI: 00:14.4 subsystem <- 1022/1510
+PCI: 00:14.4 cmd <- 21
+PCI: 00:14.5 subsystem <- 1022/1510
+PCI: 00:14.5 cmd <- 02
+PCI: 00:15.0 bridge ctrl <- 0003
+PCI: 00:15.0 cmd <- 00
+PCI: 00:15.1 bridge ctrl <- 0003
+PCI: 00:15.1 cmd <- 07
+PCI: 00:15.2 bridge ctrl <- ffff
+PCI: 00:15.2 cmd <- ffff
+PCI: 00:18.0 subsystem <- 1022/1510
+PCI: 00:18.0 cmd <- 00
+PCI: 00:18.1 subsystem <- 1022/1510
+PCI: 00:18.1 cmd <- 00
+PCI: 00:18.2 subsystem <- 1022/1510
+PCI: 00:18.2 cmd <- 00
+PCI: 00:18.3 subsystem <- 1022/1510
+PCI: 00:18.3 cmd <- 00
+PCI: 00:18.4 subsystem <- 1022/1510
+PCI: 00:18.4 cmd <- 00
+PCI: 00:18.5 subsystem <- 1022/1510
+PCI: 00:18.5 cmd <- 00
+PCI: 00:18.6 subsystem <- 1022/1510
+PCI: 00:18.6 cmd <- 00
+PCI: 00:18.7 subsystem <- 1022/1510
+PCI: 00:18.7 cmd <- 00
+PCI: 01:00.0 cmd <- 02
+W83627HF HWM SMBus enabled
+PCI: 04:00.0 cmd <- 03
+done.
+BS: BS_DEV_ENABLE times (us): entry 0 run 10484 exit 0
+Initializing devices...
+Root Device init
+Root Device init 1 usecs
+CPU_CLUSTER: 0 init
+start_eip=0x00001000, code_size=0x00000031
+Initializing CPU #0
+CPU: vendor AMD device 500f10
+CPU: family 14, model 01, stepping 00
+Model 14 Init.
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+Enabling cache
+Setting up local apic... apic_id: 0x00 done.
+model_14_init done.
+CPU #0 initialized
+CPU1: stack_base 00296000, stack_end 00296ff8
+Asserting INIT.
+Waiting for send to finish...
++Deasserting INIT.
+Waiting for send to finish...
++#startup loops: 2.
+Sending STARTUP #1 to 1.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++Sending STARTUP #2 to 1.
+After apic_write.
+Startup point 1.
+Waiting for send to finish...
++After Startup.
+Initializing CPU #1
+Waiting for 1 CPUS to stop
+CPU: vendor AMD device 500f10
+CPU: family 14, model 01, stepping 00
+Model 14 Init.
+
+MTRR check
+Fixed MTRRs : Enabled
+Variable MTRRs: Enabled
+
+Enabling cache
+Setting up local apic... apic_id: 0x01 done.
+model_14_init done.
+CPU #1 initialized
+All AP CPUs stopped (132 loops)
+CPU1: stack: 00296000 - 00297000, lowest used address 00296dec, stack used: 532 bytes
+CPU_CLUSTER: 0 init 13656 usecs
+PCI: 00:00.0 init
+Northbridge init
+PCI: 00:00.0 init 2 usecs
+PCI: 00:01.0 init
+PCI: 00:01.0 init 1 usecs
+PCI: 00:01.1 init
+PCI: 00:01.1 init 1 usecs
+PCI: 00:11.0 init
+PCI: 00:11.0 init 1 usecs
+PCI: 00:14.0 init
+PCI: 00:14.0 init 1 usecs
+PCI: 00:14.3 init
+SB800 - Late.c - lpc_init - Start.
+RTC Init
+RTC: coreboot checksum invalid
+SB800 - Late.c - lpc_init - End.
+PCI: 00:14.3 init 318 usecs
+PCI: 00:14.4 init
+PCI: 00:14.4 init 3 usecs
+PCI: 00:18.0 init
+PCI: 00:18.0 init 1 usecs
+PCI: 00:18.1 init
+PCI: 00:18.1 init 1 usecs
+PCI: 00:18.2 init
+PCI: 00:18.2 init 1 usecs
+PCI: 00:18.3 init
+PCI: 00:18.3 init 1 usecs
+PCI: 00:18.4 init
+PCI: 00:18.4 init 1 usecs
+PCI: 00:18.5 init
+PCI: 00:18.5 init 1 usecs
+PCI: 00:18.6 init
+PCI: 00:18.6 init 1 usecs
+PCI: 00:18.7 init
+PCI: 00:18.7 init 1 usecs
+PCI: 01:00.0 init
+PCI: 01:00.0 init 1 usecs
+PNP: 002e.2 init
+PNP: 002e.2 init 1 usecs
+PNP: 002e.5 init
+Keyboard init...
+No PS/2 keyboard detected.
+PNP: 002e.5 init 113498 usecs
+PNP: 002e.a init
+PNP: 002e.a init 349 usecs
+PNP: 002e.b init
+base = 0x0295, reg = 0x40, value = 0x83
+base = 0x0295, reg = 0x48, value = 0x2a
+base = 0x0295, reg = 0x4a, value = 0x21
+base = 0x0295, reg = 0x4e, value = 0x80
+base = 0x0295, reg = 0x43, value = 0xff
+base = 0x0295, reg = 0x44, value = 0x3f
+base = 0x0295, reg = 0x4c, value = 0x18
+base = 0x0295, reg = 0x4d, value = 0x95
+PNP: 002e.b init 72 usecs
+PCI: 04:00.0 init
+PCI: 04:00.0 init 1 usecs
+Devices initialized
+Show all devs...After init.
+Root Device: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+DOMAIN: 0000: enabled 1
+PCI: 00:00.0: enabled 1
+PCI: 00:01.0: enabled 1
+PCI: 00:01.1: enabled 1
+PCI: 00:04.0: enabled 1
+PCI: 00:05.0: enabled 0
+PCI: 00:06.0: enabled 0
+PCI: 00:07.0: enabled 0
+PCI: 00:08.0: enabled 0
+PCI: 00:11.0: enabled 1
+PCI: 00:12.0: enabled 1
+PCI: 00:12.2: enabled 1
+PCI: 00:13.0: enabled 1
+PCI: 00:13.2: enabled 1
+PCI: 00:14.0: enabled 1
+I2C: 00:50: enabled 1
+I2C: 00:51: enabled 1
+PCI: 00:14.1: enabled 0
+PCI: 00:14.2: enabled 1
+PCI: 00:14.3: enabled 1
+PNP: 002e.0: enabled 0
+PNP: 002e.1: enabled 0
+PNP: 002e.2: enabled 1
+PNP: 002e.3: enabled 0
+PNP: 002e.5: enabled 1
+PNP: 002e.6: enabled 0
+PNP: 002e.7: enabled 0
+PNP: 002e.8: enabled 0
+PNP: 002e.9: enabled 0
+PNP: 002e.a: enabled 1
+PNP: 002e.b: enabled 1
+PCI: 00:14.4: enabled 1
+PCI: 00:14.5: enabled 1
+PCI: 00:15.0: enabled 1
+PCI: 00:15.1: enabled 1
+PCI: 00:15.2: enabled 1
+PCI: 00:15.3: enabled 0
+PCI: 00:16.0: enabled 0
+PCI: 00:16.2: enabled 0
+PCI: 00:18.0: enabled 1
+PCI: 00:18.1: enabled 1
+PCI: 00:18.2: enabled 1
+PCI: 00:18.3: enabled 1
+PCI: 00:18.4: enabled 1
+PCI: 00:18.5: enabled 1
+PCI: 00:18.6: enabled 1
+PCI: 00:18.7: enabled 1
+APIC: 01: enabled 1
+PCI: 01:00.0: enabled 1
+PCI: 04:00.0: enabled 1
+BS: BS_DEV_INIT times (us): entry 0 run 128759 exit 0
+CBMEM region c7fd0000-c7ffffff (cbmem_check_toc)
+CBMEM region c7fd0000-c7ffffff (cbmem_initialize_empty)
+Adding CBMEM entry as no. 1
+Moving GDT to c7fd0200...ok
+Adding CBMEM entry as no. 2
+Finalize devices...
+Devices finalized
+Adding CBMEM entry as no. 3
+BS: BS_POST_DEVICE times (us): entry 48 run 78 exit 0
+BS: BS_OS_RESUME_CHECK times (us): entry 0 run 2 exit 0
+agesawrapper_amdinitlate: AmdLateParamsPtr = 2003C
+Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
+Adding CBMEM entry as no. 4
+Writing IRQ routing tables to 0xc7fe0600...write_pirq_routing_table done.
+PIRQ table: 48 bytes.
+Wrote the mp table end at: 000f0410 - 000f052c
+Adding CBMEM entry as no. 5
+Wrote the mp table end at: c7fe1610 - c7fe172c
+MP table: 300 bytes.
+Adding CBMEM entry as no. 6
+ACPI: Writing ACPI tables at c7fe2600...
+ACPI: * DSDT at c7fe26c8
+ACPI: * DSDT @ c7fe26c8 Length 2adb
+ACPI: * FACS at c7fe51a8
+ACPI: * FADT at c7fe51e8
+ACPI_BLK_BASE: 0x0800
+ACPI: added table 1/32, length now 40
+ACPI: * HPET at c7fe52e0
+ACPI: added table 2/32, length now 44
+ACPI: * MADT at c7fe5318
+ACPI: added table 3/32, length now 48
+ACPI: added table 4/32, length now 52
+ACPI: * SRAT at c7fe53a0
+ AGESA SRAT table NULL. Skipping.
+ACPI: * SLIT at c7fe53a0
+ AGESA SLIT table NULL. Skipping.
+ACPI: * AGESA ALIB SSDT at c7fe53a0
+ACPI: added table 5/32, length now 56
+ACPI: * AGESA SSDT Pstate at c7fe6a30
+ACPI: added table 6/32, length now 60
+ACPI: * coreboot TOM SSDT2 at c7fe6e10
+ACPI: added table 7/32, length now 64
+ACPI: done.
+ACPI tables: 18517 bytes.
+Adding CBMEM entry as no. 7
+smbios_write_tables: c7feda00
+Root Device (ASROCK E350M1)
+CPU_CLUSTER: 0 (AMD Family 14h Root Complex)
+APIC: 00 (AMD CPU Family 14h)
+DOMAIN: 0000 (AMD Family 14h Root Complex)
+PCI: 00:00.0 (AMD Family 14h Northbridge)
+PCI: 00:01.0 (AMD Family 14h Northbridge)
+PCI: 00:01.1 (AMD Family 14h Northbridge)
+PCI: 00:04.0 (AMD Family 14h Northbridge)
+PCI: 00:05.0 (AMD Family 14h Northbridge)
+PCI: 00:06.0 (AMD Family 14h Northbridge)
+PCI: 00:07.0 (AMD Family 14h Northbridge)
+PCI: 00:08.0 (AMD Family 14h Northbridge)
+PCI: 00:11.0 (ATI SB800)
+PCI: 00:12.0 (ATI SB800)
+PCI: 00:12.2 (ATI SB800)
+PCI: 00:13.0 (ATI SB800)
+PCI: 00:13.2 (ATI SB800)
+PCI: 00:14.0 (ATI SB800)
+I2C: 00:50 (unknown)
+I2C: 00:51 (unknown)
+PCI: 00:14.1 (ATI SB800)
+PCI: 00:14.2 (ATI SB800)
+PCI: 00:14.3 (ATI SB800)
+PNP: 002e.0 (Winbond W83627HF Super I/O)
+PNP: 002e.1 (Winbond W83627HF Super I/O)
+PNP: 002e.2 (Winbond W83627HF Super I/O)
+PNP: 002e.3 (Winbond W83627HF Super I/O)
+PNP: 002e.5 (Winbond W83627HF Super I/O)
+PNP: 002e.6 (Winbond W83627HF Super I/O)
+PNP: 002e.7 (Winbond W83627HF Super I/O)
+PNP: 002e.8 (Winbond W83627HF Super I/O)
+PNP: 002e.9 (Winbond W83627HF Super I/O)
+PNP: 002e.a (Winbond W83627HF Super I/O)
+PNP: 002e.b (Winbond W83627HF Super I/O)
+PCI: 00:14.4 (ATI SB800)
+PCI: 00:14.5 (ATI SB800)
+PCI: 00:15.0 (ATI SB800)
+PCI: 00:15.1 (ATI SB800)
+PCI: 00:15.2 (ATI SB800)
+PCI: 00:15.3 (ATI SB800)
+PCI: 00:16.0 (ATI SB800)
+PCI: 00:16.2 (ATI SB800)
+PCI: 00:18.0 (AMD Family 14h Northbridge)
+PCI: 00:18.1 (AMD Family 14h Northbridge)
+PCI: 00:18.2 (AMD Family 14h Northbridge)
+PCI: 00:18.3 (AMD Family 14h Northbridge)
+PCI: 00:18.4 (AMD Family 14h Northbridge)
+PCI: 00:18.5 (AMD Family 14h Northbridge)
+PCI: 00:18.6 (AMD Family 14h Northbridge)
+PCI: 00:18.7 (AMD Family 14h Northbridge)
+APIC: 01 (unknown)
+PCI: 01:00.0 (unknown)
+PCI: 04:00.0 (unknown)
+SMBIOS tables: 279 bytes.
+Adding CBMEM entry as no. 8
+Writing table forward entry at 0x00000500
+Wrote coreboot table at: 00000500, 0x10 bytes, checksum 55df
+Table forward entry ends at 0x00000528.
+... aligned to 0x00001000
+Writing coreboot table at 0xc7fee200
+rom_table_end = 0xc7fee200
+... aligned to 0xc7ff0000
+ 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
+ 1. 0000000000001000-000000000009ffff: RAM
+ 2. 00000000000c0000-00000000c7fcffff: RAM
+ 3. 00000000c7fd0000-00000000c7ffffff: CONFIGURATION TABLES
+ 4. 00000000c8000000-00000000dfffffff: RESERVED
+ 5. 00000000f8000000-00000000f8ffffff: RESERVED
+ 6. 0000000100000000-000000011effffff: RAM
+Wrote coreboot table at: c7fee200, 0x8e4 bytes, checksum 44ef
+coreboot table: 2300 bytes.
+FREE SPACE 0. c7ff6200 00009e00
+GDT 1. c7fd0200 00000200
+CONSOLE 2. c7fd0400 00010000
+TIME STAMP 3. c7fe0400 00000200
+IRQ TABLE 4. c7fe0600 00001000
+SMP TABLE 5. c7fe1600 00001000
+ACPI 6. c7fe2600 0000b400
+SMBIOS 7. c7feda00 00000800
+COREBOOT 8. c7fee200 00008000
+BS: BS_WRITE_TABLES times (us): entry 0 run 2020 exit 0
+Loading segment from rom address 0xffc972f8
+ code (compression=1)
+ New segment dstaddr 0xeafdc memsize 0x15024 srcaddr 0xffc97330 filesize 0xb027
+ (cleaned up) New segment addr 0xeafdc size 0x15024 offset 0xffc97330 filesize 0xb027
+Loading segment from rom address 0xffc97314
+ Entry Point 0x000fd60a
+Loading Segment: addr: 0x00000000000eafdc memsz: 0x0000000000015024 filesz: 0x000000000000b027
+lb: [0x0000000000200000, 0x000000000035802c)
+Post relocation: addr: 0x00000000000eafdc memsz: 0x0000000000015024 filesz: 0x000000000000b027
+using LZMA
+[ 0x000eafdc, 00100000, 0x00100000) <- ffc97330
+dest 000eafdc, end 00100000, bouncebuffer c7d1ffa8
+Loaded segments
+BS: BS_PAYLOAD_LOAD times (us): entry 0 run 23257 exit 0
+Jumping to boot code at 000fd60a
+CPU0: stack: 00297000 - 00298000, lowest used address 00297758, stack used: 2216 bytes
+entry = 0x000fd60a
+lb_start = 0x00200000
+lb_size = 0x0015802c
+buffer = 0xc7d1ffa8
+----- [ SeaBIOS rel-1.7.4-11-g40d020f-dirty-20140115_182829-debian ] -----
+Found coreboot cbmem console @ c7fd0400
+Found mainboard ASROCK E350M1
+Relocating init from 0x000ebf51 to 0xc7fb79e0 (size 34144)
+Found CBFS header at 0xfffff9a8
+CPU Mhz=1601
+Found 26 PCI devices (max PCI bus is 04)
+Copying PIR from 0xc7fe0600 to 0x000f4490
+Copying MPTABLE from 0xc7fe1600/c7fe1610 to 0x000f4360
+Copying ACPI RSDP from 0xc7fe2600 to 0x000f4340
+Copying SMBIOS entry point from 0xc7feda00 to 0x000f4320
+Using pmtimer, ioport 0x808
+Scan for VGA option rom
+Running option rom at c000:0003
+Turning on vga text mode console
+SeaBIOS (version rel-1.7.4-11-g40d020f-dirty-20140115_182829-debian)
+EHCI init on dev 00:12.2 (regs=0xf024b420)
+EHCI init on dev 00:13.2 (regs=0xf024b520)
+AHCI controller at 11.0, iobase f024b000, irq 0
+Got ps2 nak (status=51)
+Searching bootorder for: /pci@i0cf8/*@11/drive@0/disk@0
+AHCI/0: registering: "AHCI/0: ST9160310AS ATA-8 Hard-Disk (149 GiBytes)"
+All threads complete.
+Scan for option roms
+
+Press F12 for boot menu.
+
+Searching bootorder for: HALT
+drive 0x000f42b0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=312581808
+Space available for UMB: ce800-ee800, f0000-f42b0
+Returned 61440 bytes of ZoneHigh
+e820 map has 7 items:
+ 0: 0000000000000000 - 000000000009fc00 = 1 RAM
+ 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
+ 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
+ 3: 0000000000100000 - 00000000c7fcf000 = 1 RAM
+ 4: 00000000c7fcf000 - 00000000e0000000 = 2 RESERVED
+ 5: 00000000f8000000 - 00000000f9000000 = 2 RESERVED
+ 6: 0000000100000000 - 000000011f000000 = 1 RAM
+enter handle_19:
+ NULL
+Booting from Hard Disk...
+Booting from 0000:7c00
+