lippert/frontrunner-af/4.0-6194-gfdceb48/2014-06-03T07:37:57Z
diff --git a/lippert/frontrunner-af/4.0-6194-gfdceb48/2014-06-03T07:37:57Z/coreboot_console.txt b/lippert/frontrunner-af/4.0-6194-gfdceb48/2014-06-03T07:37:57Z/coreboot_console.txt
new file mode 100644
index 0000000..820c6b1
--- /dev/null
+++ b/lippert/frontrunner-af/4.0-6194-gfdceb48/2014-06-03T07:37:57Z/coreboot_console.txt
@@ -0,0 +1,1095 @@
+coreboot-4.0-6194-gfdceb48 Fri Jun  6 00:17:25 EEST 2014 booting...

+BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0

+BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 5 exit 0

+Enumerating buses...

+Show all devs...Before device enumeration.

+Root Device: enabled 1

+CPU_CLUSTER: 0: enabled 1

+APIC: 00: enabled 1

+DOMAIN: 0000: enabled 1

+PCI: 00:00.0: enabled 1

+PCI: 00:01.0: enabled 1

+PCI: 00:04.0: enabled 1

+PCI: 00:05.0: enabled 0

+PCI: 00:06.0: enabled 0

+PCI: 00:07.0: enabled 0

+PCI: 00:08.0: enabled 0

+PCI: 00:11.0: enabled 1

+PCI: 00:12.0: enabled 1

+PCI: 00:12.2: enabled 1

+PCI: 00:13.0: enabled 1

+PCI: 00:13.2: enabled 1

+PCI: 00:14.0: enabled 1

+I2C: 00:50: enabled 1

+I2C: 00:51: enabled 0

+PCI: 00:14.1: enabled 0

+PCI: 00:14.2: enabled 1

+PCI: 00:14.3: enabled 1

+PNP: 004e.0: enabled 0

+PNP: 004e.3: enabled 0

+PNP: 004e.4: enabled 1

+PNP: 004e.5: enabled 1

+PNP: 004e.7: enabled 1

+PNP: 004e.a: enabled 1

+PCI: 00:14.4: enabled 1

+PCI: 00:14.5: enabled 0

+PCI: 00:14.6: enabled 0

+PCI: 00:15.0: enabled 0

+PCI: 00:15.1: enabled 0

+PCI: 00:15.2: enabled 0

+PCI: 00:15.3: enabled 0

+PCI: 00:16.0: enabled 1

+PCI: 00:16.2: enabled 1

+PCI: 00:18.0: enabled 1

+PCI: 00:18.1: enabled 1

+PCI: 00:18.2: enabled 1

+PCI: 00:18.3: enabled 1

+PCI: 00:18.4: enabled 1

+PCI: 00:18.5: enabled 1

+PCI: 00:18.6: enabled 1

+PCI: 00:18.7: enabled 1

+Compare with tree...

+Root Device: enabled 1

+ CPU_CLUSTER: 0: enabled 1

+  APIC: 00: enabled 1

+ DOMAIN: 0000: enabled 1

+  PCI: 00:00.0: enabled 1

+  PCI: 00:01.0: enabled 1

+  PCI: 00:04.0: enabled 1

+  PCI: 00:05.0: enabled 0

+  PCI: 00:06.0: enabled 0

+  PCI: 00:07.0: enabled 0

+  PCI: 00:08.0: enabled 0

+  PCI: 00:11.0: enabled 1

+  PCI: 00:12.0: enabled 1

+  PCI: 00:12.2: enabled 1

+  PCI: 00:13.0: enabled 1

+  PCI: 00:13.2: enabled 1

+  PCI: 00:14.0: enabled 1

+   I2C: 00:50: enabled 1

+   I2C: 00:51: enabled 0

+  PCI: 00:14.1: enabled 0

+  PCI: 00:14.2: enabled 1

+  PCI: 00:14.3: enabled 1

+   PNP: 004e.0: enabled 0

+   PNP: 004e.3: enabled 0

+   PNP: 004e.4: enabled 1

+   PNP: 004e.5: enabled 1

+   PNP: 004e.7: enabled 1

+   PNP: 004e.a: enabled 1

+  PCI: 00:14.4: enabled 1

+  PCI: 00:14.5: enabled 0

+  PCI: 00:14.6: enabled 0

+  PCI: 00:15.0: enabled 0

+  PCI: 00:15.1: enabled 0

+  PCI: 00:15.2: enabled 0

+  PCI: 00:15.3: enabled 0

+  PCI: 00:16.0: enabled 1

+  PCI: 00:16.2: enabled 1

+  PCI: 00:18.0: enabled 1

+  PCI: 00:18.1: enabled 1

+  PCI: 00:18.2: enabled 1

+  PCI: 00:18.3: enabled 1

+  PCI: 00:18.4: enabled 1

+  PCI: 00:18.5: enabled 1

+  PCI: 00:18.6: enabled 1

+  PCI: 00:18.7: enabled 1

+Mainboard FrontRunner-AF Enable.

+scan_static_bus for Root Device

+setup_bsp_ramtop, TOP MEM: msr.lo = 0x3f000000, msr.hi = 0x00000000

+setup_bsp_ramtop, TOP MEM2: msr.lo = 0x00000000, msr.hi = 0x00000000

+setup_uma_memory: uma size 0x10000000, memory start 0x2f000000

+CPU_CLUSTER: 0 enabled

+DOMAIN: 0000 enabled

+CPU_CLUSTER: 0 scanning...

+  AP siblings=1

+CPU: APIC: 00 enabled

+CPU: APIC: 01 enabled

+DOMAIN: 0000 scanning...

+PCI: pci_scan_bus for bus 00

+PCI: 00:00.0 [1022/1510] ops

+PCI: 00:00.0 [1022/1510] enabled

+PCI: 00:01.0 [1002/9806] enabled

+Capability: type 0x01 @ 0x50

+Capability: type 0x10 @ 0x58

+Capability: type 0x05 @ 0xa0

+Capability: type 0x0d @ 0xb0

+Capability: type 0x08 @ 0xb8

+Capability: type 0x01 @ 0x50

+Capability: type 0x10 @ 0x58

+PCI: 00:04.0 subordinate bus PCI Express

+PCI: 00:04.0 [1022/1512] enabled

+sb800_enable() SB800 - Smbus.c - alink_ab_indx - Start.

+SB800 - Smbus.c - alink_ab_indx - End.

+PCI: 00:11.0 [1002/4393] ops

+PCI: 00:11.0 [1002/4393] enabled

+sb800_enable() PCI: 00:12.0 [1002/4397] ops

+PCI: 00:12.0 [1002/4397] enabled

+sb800_enable() PCI: 00:12.2 [1002/4396] ops

+PCI: 00:12.2 [1002/4396] enabled

+sb800_enable() PCI: 00:13.0 [1002/4397] ops

+PCI: 00:13.0 [1002/4397] enabled

+sb800_enable() PCI: 00:13.2 [1002/4396] ops

+PCI: 00:13.2 [1002/4396] enabled

+sb800_enable() sm_init().

+IOAPIC: Clearing IOAPIC at 0xfec00000

+IOAPIC: 24 interrupts

+IOAPIC: reg 0x00000000 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000001 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000002 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000003 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000004 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000005 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000006 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000007 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000008 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000009 value 0x00000000 0x00010000

+IOAPIC: reg 0x0000000a value 0x00000000 0x00010000

+IOAPIC: reg 0x0000000b value 0x00000000 0x00010000

+IOAPIC: reg 0x0000000c value 0x00000000 0x00010000

+IOAPIC: reg 0x0000000d value 0x00000000 0x00010000

+IOAPIC: reg 0x0000000e value 0x00000000 0x00010000

+IOAPIC: reg 0x0000000f value 0x00000000 0x00010000

+IOAPIC: reg 0x00000010 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000011 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000012 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000013 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000014 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000015 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000016 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000017 value 0x00000000 0x00010000

+IOAPIC: Initializing IOAPIC at 0xfec00000

+IOAPIC: Bootstrap Processor Local APIC = 0x00

+IOAPIC: ID = 0x02

+IOAPIC: Dumping registers

+  reg 0x0000: 0x02000000

+  reg 0x0001: 0x00178021

+  reg 0x0002: 0x02000000

+IOAPIC: 24 interrupts

+IOAPIC: Enabling interrupts on FSB

+IOAPIC: reg 0x00000000 value 0x00000000 0x00000700

+IOAPIC: reg 0x00000001 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000002 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000003 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000004 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000005 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000006 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000007 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000008 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000009 value 0x00000000 0x00010000

+IOAPIC: reg 0x0000000a value 0x00000000 0x00010000

+IOAPIC: reg 0x0000000b value 0x00000000 0x00010000

+IOAPIC: reg 0x0000000c value 0x00000000 0x00010000

+IOAPIC: reg 0x0000000d value 0x00000000 0x00010000

+IOAPIC: reg 0x0000000e value 0x00000000 0x00010000

+IOAPIC: reg 0x0000000f value 0x00000000 0x00010000

+IOAPIC: reg 0x00000010 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000011 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000012 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000013 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000014 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000015 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000016 value 0x00000000 0x00010000

+IOAPIC: reg 0x00000017 value 0x00000000 0x00010000

+PCI: 00:14.0 [1002/4385] enabled

+sb800_enable() sb800_enable() hda enabled

+PCI: 00:14.2 [1002/4383] ops

+PCI: 00:14.2 [1002/4383] enabled

+sb800_enable() PCI: 00:14.3 [1002/439d] bus ops

+PCI: 00:14.3 [1002/439d] enabled

+sb800_enable() PCI: 00:14.4 [1002/4384] bus ops

+PCI: 00:14.4 [1002/4384] enabled

+sb800_enable() PCI: 00:14.5 [1002/4399] ops

+PCI: 00:14.5 [1002/4399] disabled

+sb800_enable() gec disabled

+PCI: 00:14.6 [14e4/1699] disabled

+sb800_enable() Capability: type 0x01 @ 0x50

+Capability: type 0x10 @ 0x58

+Capability: type 0x0d @ 0xb0

+Capability: type 0x08 @ 0xb8

+Capability: type 0x01 @ 0x50

+Capability: type 0x10 @ 0x58

+PCI: 00:15.0 subordinate bus PCI Express

+PCI: 00:15.0 [1002/43a0] disabled

+sb800_enable() Capability: type 0x01 @ 0x50

+Capability: type 0x10 @ 0x58

+Capability: type 0x0d @ 0xb0

+Capability: type 0x08 @ 0xb8

+Capability: type 0x01 @ 0x50

+Capability: type 0x10 @ 0x58

+PCI: 00:15.1 subordinate bus PCI Express

+PCI: 00:15.1 [1002/43a1] disabled

+sb800_enable() Capability: type 0x01 @ 0x50

+Capability: type 0x10 @ 0x58

+Capability: type 0x0d @ 0xb0

+Capability: type 0x08 @ 0xb8

+Capability: type 0x01 @ 0x50

+Capability: type 0x10 @ 0x58

+PCI: 00:15.2 subordinate bus PCI Express

+PCI: 00:15.2 [1002/43a2] disabled

+sb800_enable() Capability: type 0x01 @ 0x50

+Capability: type 0x10 @ 0x58

+Capability: type 0x0d @ 0xb0

+Capability: type 0x08 @ 0xb8

+Capability: type 0x01 @ 0x50

+Capability: type 0x10 @ 0x58

+PCI: 00:15.3 subordinate bus PCI Express

+PCI: 00:15.3 [1002/43a3] disabled

+sb800_enable() PCI: 00:16.0 [1002/4397] ops

+PCI: 00:16.0 [1002/4397] enabled

+sb800_enable() PCI: 00:16.2 [1002/4396] ops

+PCI: 00:16.2 [1002/4396] enabled

+PCI: 00:18.0 [1022/1700] enabled

+PCI: 00:18.1 [1022/1701] enabled

+PCI: 00:18.2 [1022/1702] enabled

+PCI: 00:18.3 [1022/1703] enabled

+PCI: 00:18.4 [1022/1704] enabled

+PCI: 00:18.5 [1022/1718] enabled

+PCI: 00:18.6 [1022/1716] enabled

+PCI: 00:18.7 [1022/1719] enabled

+do_pci_scan_bridge for PCI: 00:04.0

+PCI: pci_scan_bus for bus 01

+PCI: 01:00.0 [8086/1533] enabled

+PCI: pci_scan_bus returning with max=001

+Capability: type 0x01 @ 0x40

+Capability: type 0x05 @ 0x50

+Capability: type 0x11 @ 0x70

+Capability: type 0x10 @ 0xa0

+Capability: type 0x01 @ 0x50

+Capability: type 0x10 @ 0x58

+do_pci_scan_bridge returns max 1

+scan_static_bus for PCI: 00:14.3

+Found SMSC Super I/O (ID=0xff, rev=0xff)

+PNP: 004e.0 disabled

+PNP: 004e.3 disabled

+PNP: 004e.4 enabled

+PNP: 004e.5 enabled

+PNP: 004e.7 enabled

+PNP: 004e.a enabled

+scan_static_bus for PCI: 00:14.3 done

+do_pci_scan_bridge for PCI: 00:14.4

+PCI: pci_scan_bus for bus 02

+PCI: 02:08.0 [1283/8888] enabled

+PCI: pci_scan_bus returning with max=002

+do_pci_scan_bridge returns max 2

+PCI: pci_scan_bus returning with max=002

+scan_static_bus for Root Device done

+done

+BS: BS_DEV_ENUMERATE times (us): entry 0 run 818473 exit 0

+found VGA at PCI: 00:01.0

+Setting up VGA for PCI: 00:01.0

+Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

+Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

+Allocating resources...

+Reading resources...

+Root Device read_resources bus 0 link: 0

+CPU_CLUSTER: 0 read_resources bus 0 link: 0

+APIC: 00 missing read_resources

+APIC: 01 missing read_resources

+CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

+

+Fam14h - domain_read_resources

+DOMAIN: 0000 read_resources bus 0 link: 0

+

+Fam14h - nb_read_resources

+PCI: 00:04.0 read_resources bus 1 link: 0

+PCI: 00:04.0 read_resources bus 1 link: 0 done

+PCI: 00:14.0 read_resources bus 0 link: 0

+I2C: 00:50 missing read_resources

+PCI: 00:14.0 read_resources bus 0 link: 0 done

+SB800 - Lpc.c - lpc_read_resources - Start.

+SB800 - Lpc.c - lpc_read_resources - End.

+PCI: 00:14.3 read_resources bus 0 link: 0

+PNP: 004e.4 missing read_resources

+PNP: 004e.5 missing read_resources

+PNP: 004e.7 missing read_resources

+PNP: 004e.a missing read_resources

+PCI: 00:14.3 read_resources bus 0 link: 0 done

+PCI: 00:14.4 read_resources bus 2 link: 0

+PCI: 00:14.4 read_resources bus 2 link: 0 done

+DOMAIN: 0000 read_resources bus 0 link: 0 done

+Root Device read_resources bus 0 link: 0 done

+Done reading resources.

+Show resources in subtree (Root Device)...After reading.

+ Root Device child on link 0 CPU_CLUSTER: 0

+  CPU_CLUSTER: 0 child on link 0 APIC: 00

+   APIC: 00

+   APIC: 01

+  DOMAIN: 0000 child on link 0 PCI: 00:00.0

+  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

+  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

+   PCI: 00:00.0

+   PCI: 00:00.0 resource base f8000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index c0010058

+   PCI: 00:01.0

+   PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10

+   PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14

+   PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18

+   PCI: 00:04.0 child on link 0 PCI: 01:00.0

+   PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c

+   PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

+   PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

+    PCI: 01:00.0

+    PCI: 01:00.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 10

+    PCI: 01:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18

+    PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c

+   PCI: 00:05.0

+   PCI: 00:06.0

+   PCI: 00:07.0

+   PCI: 00:08.0

+   PCI: 00:11.0

+   PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10

+   PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14

+   PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

+   PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

+   PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20

+   PCI: 00:11.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24

+   PCI: 00:12.0

+   PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

+   PCI: 00:12.2

+   PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10

+   PCI: 00:13.0

+   PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

+   PCI: 00:13.2

+   PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10

+   PCI: 00:14.0 child on link 0 I2C: 00:50

+    I2C: 00:50

+    I2C: 00:51

+   PCI: 00:14.1

+   PCI: 00:14.2

+   PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

+   PCI: 00:14.3 child on link 0 PNP: 004e.0

+   PCI: 00:14.3 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 200 index a0

+   PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000

+   PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100

+   PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3

+    PNP: 004e.0

+    PNP: 004e.3

+    PNP: 004e.4

+    PNP: 004e.4 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60

+    PNP: 004e.4 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70

+    PNP: 004e.5

+    PNP: 004e.5 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60

+    PNP: 004e.5 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70

+    PNP: 004e.7

+    PNP: 004e.7 resource base 60 size 0 align 0 gran 0 limit 0 flags c0000100 index 60

+    PNP: 004e.7 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62

+    PNP: 004e.7 resource base 1 size 0 align 0 gran 0 limit 0 flags c0000400 index 70

+    PNP: 004e.7 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72

+    PNP: 004e.a

+    PNP: 004e.a resource base e00 size 0 align 0 gran 0 limit 0 flags c0000100 index 60

+    PNP: 004e.a resource base b size 0 align 0 gran 0 limit 0 flags c0000800 index f0

+   PCI: 00:14.4 child on link 0 PCI: 02:08.0

+   PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

+   PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24

+   PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

+    PCI: 02:08.0

+   PCI: 00:14.5

+   PCI: 00:14.6

+   PCI: 00:15.0

+   PCI: 00:15.1

+   PCI: 00:15.2

+   PCI: 00:15.3

+   PCI: 00:16.0

+   PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

+   PCI: 00:16.2

+   PCI: 00:16.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10

+   PCI: 00:18.0

+   PCI: 00:18.1

+   PCI: 00:18.2

+   PCI: 00:18.3

+   PCI: 00:18.4

+   PCI: 00:18.5

+   PCI: 00:18.6

+   PCI: 00:18.7

+DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

+PCI: 00:04.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff

+PCI: 01:00.0 18 *  [0x0 - 0x1f] io

+PCI: 00:04.0 compute_resources_io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done

+PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

+PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

+PCI: 00:04.0 1c *  [0x0 - 0xfff] io

+PCI: 00:01.0 14 *  [0x1000 - 0x10ff] io

+PCI: 00:11.0 20 *  [0x1400 - 0x140f] io

+PCI: 00:11.0 10 *  [0x1410 - 0x1417] io

+PCI: 00:11.0 18 *  [0x1418 - 0x141f] io

+PCI: 00:11.0 14 *  [0x1420 - 0x1423] io

+PCI: 00:11.0 1c *  [0x1424 - 0x1427] io

+DOMAIN: 0000 compute_resources_io: base: 1428 size: 1428 align: 12 gran: 0 limit: ffff done

+DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

+PCI: 00:04.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

+PCI: 00:04.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

+PCI: 00:04.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

+PCI: 01:00.0 10 *  [0x0 - 0xfffff] mem

+PCI: 01:00.0 1c *  [0x100000 - 0x103fff] mem

+PCI: 00:04.0 compute_resources_mem: base: 104000 size: 200000 align: 20 gran: 20 limit: ffffffff done

+PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

+PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done

+PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

+PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done

+PCI: 00:01.0 10 *  [0x0 - 0xfffffff] prefmem

+PCI: 00:04.0 20 *  [0x10000000 - 0x101fffff] mem

+PCI: 00:01.0 18 *  [0x10200000 - 0x1023ffff] mem

+PCI: 00:14.2 10 *  [0x10240000 - 0x10243fff] mem

+PCI: 00:12.0 10 *  [0x10244000 - 0x10244fff] mem

+PCI: 00:13.0 10 *  [0x10245000 - 0x10245fff] mem

+PCI: 00:16.0 10 *  [0x10246000 - 0x10246fff] mem

+PCI: 00:11.0 24 *  [0x10247000 - 0x102473ff] mem

+PCI: 00:12.2 10 *  [0x10247400 - 0x102474ff] mem

+PCI: 00:13.2 10 *  [0x10247500 - 0x102475ff] mem

+PCI: 00:16.2 10 *  [0x10247600 - 0x102476ff] mem

+PCI: 00:14.3 a0 *  [0x10247700 - 0x10247700] mem

+DOMAIN: 0000 compute_resources_mem: base: 10247701 size: 10247701 align: 28 gran: 0 limit: ffffffff done

+avoid_fixed_resources: DOMAIN: 0000

+avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

+avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

+constrain_resources: DOMAIN: 0000

+constrain_resources: PCI: 00:00.0

+constrain_resources: PCI: 00:01.0

+constrain_resources: PCI: 00:04.0

+constrain_resources: PCI: 01:00.0

+constrain_resources: PCI: 00:11.0

+constrain_resources: PCI: 00:12.0

+constrain_resources: PCI: 00:12.2

+constrain_resources: PCI: 00:13.0

+constrain_resources: PCI: 00:13.2

+constrain_resources: PCI: 00:14.0

+constrain_resources: I2C: 00:50

+constrain_resources: PCI: 00:14.2

+constrain_resources: PCI: 00:14.3

+constrain_resources: PNP: 004e.4

+skipping PNP: 004e.4@60 fixed resource, size=0!

+skipping PNP: 004e.4@70 fixed resource, size=0!

+constrain_resources: PNP: 004e.5

+skipping PNP: 004e.5@60 fixed resource, size=0!

+skipping PNP: 004e.5@70 fixed resource, size=0!

+constrain_resources: PNP: 004e.7

+skipping PNP: 004e.7@60 fixed resource, size=0!

+skipping PNP: 004e.7@62 fixed resource, size=0!

+skipping PNP: 004e.7@70 fixed resource, size=0!

+skipping PNP: 004e.7@72 fixed resource, size=0!

+constrain_resources: PNP: 004e.a

+skipping PNP: 004e.a@60 fixed resource, size=0!

+skipping PNP: 004e.a@f0 fixed resource, size=0!

+constrain_resources: PCI: 00:14.4

+constrain_resources: PCI: 02:08.0

+constrain_resources: PCI: 00:16.0

+constrain_resources: PCI: 00:16.2

+constrain_resources: PCI: 00:18.0

+constrain_resources: PCI: 00:18.1

+constrain_resources: PCI: 00:18.2

+constrain_resources: PCI: 00:18.3

+constrain_resources: PCI: 00:18.4

+constrain_resources: PCI: 00:18.5

+constrain_resources: PCI: 00:18.6

+constrain_resources: PCI: 00:18.7

+avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff

+	lim->base 00001000 lim->limit 0000ffff

+avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff

+	lim->base 00000000 lim->limit f7ffffff

+Setting resources...

+DOMAIN: 0000 allocate_resources_io: base:1000 size:1428 align:12 gran:0 limit:ffff

+Assigned: PCI: 00:04.0 1c *  [0x1000 - 0x1fff] io

+Assigned: PCI: 00:01.0 14 *  [0x2000 - 0x20ff] io

+Assigned: PCI: 00:11.0 20 *  [0x2400 - 0x240f] io

+Assigned: PCI: 00:11.0 10 *  [0x2410 - 0x2417] io

+Assigned: PCI: 00:11.0 18 *  [0x2418 - 0x241f] io

+Assigned: PCI: 00:11.0 14 *  [0x2420 - 0x2423] io

+Assigned: PCI: 00:11.0 1c *  [0x2424 - 0x2427] io

+DOMAIN: 0000 allocate_resources_io: next_base: 2428 size: 1428 align: 12 gran: 0 done

+PCI: 00:04.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff

+Assigned: PCI: 01:00.0 18 *  [0x1000 - 0x101f] io

+PCI: 00:04.0 allocate_resources_io: next_base: 1020 size: 1000 align: 12 gran: 12 done

+PCI: 00:14.4 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff

+PCI: 00:14.4 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done

+DOMAIN: 0000 allocate_resources_mem: base:e0000000 size:10247701 align:28 gran:0 limit:f7ffffff

+Assigned: PCI: 00:01.0 10 *  [0xe0000000 - 0xefffffff] prefmem

+Assigned: PCI: 00:04.0 20 *  [0xf0000000 - 0xf01fffff] mem

+Assigned: PCI: 00:01.0 18 *  [0xf0200000 - 0xf023ffff] mem

+Assigned: PCI: 00:14.2 10 *  [0xf0240000 - 0xf0243fff] mem

+Assigned: PCI: 00:12.0 10 *  [0xf0244000 - 0xf0244fff] mem

+Assigned: PCI: 00:13.0 10 *  [0xf0245000 - 0xf0245fff] mem

+Assigned: PCI: 00:16.0 10 *  [0xf0246000 - 0xf0246fff] mem

+Assigned: PCI: 00:11.0 24 *  [0xf0247000 - 0xf02473ff] mem

+Assigned: PCI: 00:12.2 10 *  [0xf0247400 - 0xf02474ff] mem

+Assigned: PCI: 00:13.2 10 *  [0xf0247500 - 0xf02475ff] mem

+Assigned: PCI: 00:16.2 10 *  [0xf0247600 - 0xf02476ff] mem

+Assigned: PCI: 00:14.3 a0 *  [0xf0247700 - 0xf0247700] mem

+DOMAIN: 0000 allocate_resources_mem: next_base: f0247701 size: 10247701 align: 28 gran: 0 done

+PCI: 00:04.0 allocate_resources_prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff

+PCI: 00:04.0 allocate_resources_prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done

+PCI: 00:04.0 allocate_resources_mem: base:f0000000 size:200000 align:20 gran:20 limit:f7ffffff

+Assigned: PCI: 01:00.0 10 *  [0xf0000000 - 0xf00fffff] mem

+Assigned: PCI: 01:00.0 1c *  [0xf0100000 - 0xf0103fff] mem

+PCI: 00:04.0 allocate_resources_mem: next_base: f0104000 size: 200000 align: 20 gran: 20 done

+PCI: 00:14.4 allocate_resources_prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff

+PCI: 00:14.4 allocate_resources_prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done

+PCI: 00:14.4 allocate_resources_mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff

+PCI: 00:14.4 allocate_resources_mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done

+Root Device assign_resources, bus 0 link: 0

+

+Fam14h - domain_set_resources

+  amsr - incoming dev = 00274d3c

+adsr: (before) basek = 0, limitk = 3effffff.

+adsr: (after) basek = 0, limitk = fbfff, sizek = fc000.

+adsr - 0xa0000 to 0xbffff resource.

+adsr: mmio_basek=00380000, basek=00000300, limitk=000fbfff

+0: mmio_basek=00380000, basek=00000300, limitk=000fbfff

+  adsr - mmio_basek = 380000.

+dword=2f000000

+nvram_pos=f8, dword>>(8*i)=0

+nvram_pos=f9, dword>>(8*i)=0

+nvram_pos=fa, dword>>(8*i)=0

+nvram_pos=fb, dword>>(8*i)=2f

+CBMEM region 2efd0000-2effffff (cbmem_late_set_table)

+DOMAIN: 0000 assign_resources, bus 0 link: 0

+

+Fam14h - nb_set_resources

+

+Fam14h - create_vga_resource

+

+Fam14h - set_resource

+PCI: 00:00.0 c0010058 <- [0x00f8000000 - 0x00f8ffffff] size 0x01000000 gran 0x00 mem <mmconfig>

+PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem

+PCI: 00:01.0 14 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io

+PCI: 00:01.0 18 <- [0x00f0200000 - 0x00f023ffff] size 0x00040000 gran 0x12 mem

+PCI: 00:04.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io

+PCI: 00:04.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem

+PCI: 00:04.0 20 <- [0x00f0000000 - 0x00f01fffff] size 0x00200000 gran 0x14 bus 01 mem

+PCI: 00:04.0 assign_resources, bus 1 link: 0

+PCI: 01:00.0 10 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14 mem

+PCI: 01:00.0 18 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io

+PCI: 01:00.0 1c <- [0x00f0100000 - 0x00f0103fff] size 0x00004000 gran 0x0e mem

+PCI: 00:04.0 assign_resources, bus 1 link: 0

+PCI: 00:11.0 10 <- [0x0000002410 - 0x0000002417] size 0x00000008 gran 0x03 io

+PCI: 00:11.0 14 <- [0x0000002420 - 0x0000002423] size 0x00000004 gran 0x02 io

+PCI: 00:11.0 18 <- [0x0000002418 - 0x000000241f] size 0x00000008 gran 0x03 io

+PCI: 00:11.0 1c <- [0x0000002424 - 0x0000002427] size 0x00000004 gran 0x02 io

+PCI: 00:11.0 20 <- [0x0000002400 - 0x000000240f] size 0x00000010 gran 0x04 io

+PCI: 00:11.0 24 <- [0x00f0247000 - 0x00f02473ff] size 0x00000400 gran 0x0a mem

+PCI: 00:12.0 10 <- [0x00f0244000 - 0x00f0244fff] size 0x00001000 gran 0x0c mem

+PCI: 00:12.2 10 <- [0x00f0247400 - 0x00f02474ff] size 0x00000100 gran 0x08 mem

+PCI: 00:13.0 10 <- [0x00f0245000 - 0x00f0245fff] size 0x00001000 gran 0x0c mem

+PCI: 00:13.2 10 <- [0x00f0247500 - 0x00f02475ff] size 0x00000100 gran 0x08 mem

+PCI: 00:14.2 10 <- [0x00f0240000 - 0x00f0243fff] size 0x00004000 gran 0x0e mem64

+SB800 - Lpc.c - lpc_set_resources - Start.

+PCI: 00:14.3 a0 <- [0x00f0247702 - 0x00f0247702] size 0x00000001 gran 0x00 mem

+PCI: 00:14.3 assign_resources, bus 0 link: 0

+PNP: 004e.4 missing set_resources

+PNP: 004e.5 missing set_resources

+PNP: 004e.7 missing set_resources

+PNP: 004e.a missing set_resources

+PCI: 00:14.3 assign_resources, bus 0 link: 0

+SB800 - Lpc.c - lpc_set_resources - End.

+PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io

+PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem

+PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 mem

+PCI: 00:14.4 assign_resources, bus 2 link: 0

+PCI: 00:14.4 assign_resources, bus 2 link: 0

+PCI: 00:16.0 10 <- [0x00f0246000 - 0x00f0246fff] size 0x00001000 gran 0x0c mem

+PCI: 00:16.2 10 <- [0x00f0247600 - 0x00f02476ff] size 0x00000100 gran 0x08 mem

+DOMAIN: 0000 assign_resources, bus 0 link: 0

+  adsr - leaving this lovely routine.

+Root Device assign_resources, bus 0 link: 0

+Done setting resources.

+Show resources in subtree (Root Device)...After assigning values.

+ Root Device child on link 0 CPU_CLUSTER: 0

+  CPU_CLUSTER: 0 child on link 0 APIC: 00

+   APIC: 00

+   APIC: 01

+  DOMAIN: 0000 child on link 0 PCI: 00:00.0

+  DOMAIN: 0000 resource base 1000 size 1428 align 12 gran 0 limit ffff flags 40040100 index 10000000

+  DOMAIN: 0000 resource base e0000000 size 10247701 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100

+  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10

+  DOMAIN: 0000 resource base c0000 size 3ef3fc00 align 0 gran 0 limit 0 flags e0004200 index 20

+  DOMAIN: 0000 resource base 2f000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 7

+   PCI: 00:00.0

+   PCI: 00:00.0 resource base f8000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index c0010058

+   PCI: 00:01.0

+   PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28 limit f7ffffff flags 60001200 index 10

+   PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit ffff flags 60000100 index 14

+   PCI: 00:01.0 resource base f0200000 size 40000 align 18 gran 18 limit f7ffffff flags 60000200 index 18

+   PCI: 00:04.0 child on link 0 PCI: 01:00.0

+   PCI: 00:04.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c

+   PCI: 00:04.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24

+   PCI: 00:04.0 resource base f0000000 size 200000 align 20 gran 20 limit f7ffffff flags 60080202 index 20

+    PCI: 01:00.0

+    PCI: 01:00.0 resource base f0000000 size 100000 align 20 gran 20 limit f7ffffff flags 60000200 index 10

+    PCI: 01:00.0 resource base 1000 size 20 align 5 gran 5 limit ffff flags 60000100 index 18

+    PCI: 01:00.0 resource base f0100000 size 4000 align 14 gran 14 limit f7ffffff flags 60000200 index 1c

+   PCI: 00:05.0

+   PCI: 00:06.0

+   PCI: 00:07.0

+   PCI: 00:08.0

+   PCI: 00:11.0

+   PCI: 00:11.0 resource base 2410 size 8 align 3 gran 3 limit ffff flags 60000100 index 10

+   PCI: 00:11.0 resource base 2420 size 4 align 2 gran 2 limit ffff flags 60000100 index 14

+   PCI: 00:11.0 resource base 2418 size 8 align 3 gran 3 limit ffff flags 60000100 index 18

+   PCI: 00:11.0 resource base 2424 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c

+   PCI: 00:11.0 resource base 2400 size 10 align 4 gran 4 limit ffff flags 60000100 index 20

+   PCI: 00:11.0 resource base f0247000 size 400 align 10 gran 10 limit f7ffffff flags 60000200 index 24

+   PCI: 00:12.0

+   PCI: 00:12.0 resource base f0244000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10

+   PCI: 00:12.2

+   PCI: 00:12.2 resource base f0247400 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10

+   PCI: 00:13.0

+   PCI: 00:13.0 resource base f0245000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10

+   PCI: 00:13.2

+   PCI: 00:13.2 resource base f0247500 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10

+   PCI: 00:14.0 child on link 0 I2C: 00:50

+    I2C: 00:50

+    I2C: 00:51

+   PCI: 00:14.1

+   PCI: 00:14.2

+   PCI: 00:14.2 resource base f0240000 size 4000 align 14 gran 14 limit f7ffffff flags 60000201 index 10

+   PCI: 00:14.3 child on link 0 PNP: 004e.0

+   PCI: 00:14.3 resource base f0247702 size 1 align 0 gran 0 limit f7ffffff flags 60000200 index a0

+   PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000

+   PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100

+   PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3

+    PNP: 004e.0

+    PNP: 004e.3

+    PNP: 004e.4

+    PNP: 004e.4 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60

+    PNP: 004e.4 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70

+    PNP: 004e.5

+    PNP: 004e.5 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60

+    PNP: 004e.5 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70

+    PNP: 004e.7

+    PNP: 004e.7 resource base 60 size 0 align 0 gran 0 limit 0 flags c0000100 index 60

+    PNP: 004e.7 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62

+    PNP: 004e.7 resource base 1 size 0 align 0 gran 0 limit 0 flags c0000400 index 70

+    PNP: 004e.7 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72

+    PNP: 004e.a

+    PNP: 004e.a resource base e00 size 0 align 0 gran 0 limit 0 flags c0000100 index 60

+    PNP: 004e.a resource base b size 0 align 0 gran 0 limit 0 flags c0000800 index f0

+   PCI: 00:14.4 child on link 0 PCI: 02:08.0

+   PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c

+   PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24

+   PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20

+    PCI: 02:08.0

+   PCI: 00:14.5

+   PCI: 00:14.6

+   PCI: 00:15.0

+   PCI: 00:15.1

+   PCI: 00:15.2

+   PCI: 00:15.3

+   PCI: 00:16.0

+   PCI: 00:16.0 resource base f0246000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10

+   PCI: 00:16.2

+   PCI: 00:16.2 resource base f0247600 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10

+   PCI: 00:18.0

+   PCI: 00:18.1

+   PCI: 00:18.2

+   PCI: 00:18.3

+   PCI: 00:18.4

+   PCI: 00:18.5

+   PCI: 00:18.6

+   PCI: 00:18.7

+Done allocating resources.

+BS: BS_DEV_RESOURCES times (us): entry 0 run 1945697 exit 0

+Enabling resources...

+

+Fam14h - domain_enable_resources

+agesawrapper_amdinitmid BiosAllocateBuffer BiosHeapBaseAddr: 10000

+BiosAllocateBuffer BiosHeapBaseAddr: 10000

+BiosAllocateBuffer BiosHeapBaseAddr: 10000

+passed.

+  ader - leaving domain_enable_resources.

+PCI: 00:00.0 cmd <- 06

+PCI: 00:01.0 subsystem <- 1022/1510

+PCI: 00:01.0 cmd <- 07

+PCI: 00:04.0 bridge ctrl <- 0003

+PCI: 00:04.0 cmd <- 07

+PCI: 00:11.0 subsystem <- 1022/1510

+PCI: 00:11.0 cmd <- 03

+PCI: 00:12.0 subsystem <- 1022/1510

+PCI: 00:12.0 cmd <- 02

+PCI: 00:12.2 subsystem <- 1022/1510

+PCI: 00:12.2 cmd <- 02

+PCI: 00:13.0 subsystem <- 1022/1510

+PCI: 00:13.0 cmd <- 02

+PCI: 00:13.2 subsystem <- 1022/1510

+PCI: 00:13.2 cmd <- 02

+PCI: 00:14.0 subsystem <- 1022/1510

+PCI: 00:14.0 cmd <- 403

+PCI: 00:14.2 subsystem <- 1022/1510

+PCI: 00:14.2 cmd <- 02

+PCI: 00:14.3 subsystem <- 1022/1510

+PCI: 00:14.3 cmd <- 0f

+PCI: 00:14.4 bridge ctrl <- 0003

+PCI: 00:14.4 subsystem <- 1022/1510

+PCI: 00:14.4 cmd <- 21

+PCI: 00:16.0 subsystem <- 1022/1510

+PCI: 00:16.0 cmd <- 02

+PCI: 00:16.2 subsystem <- 1022/1510

+PCI: 00:16.2 cmd <- 02

+PCI: 00:18.0 subsystem <- 1022/1510

+PCI: 00:18.0 cmd <- 00

+PCI: 00:18.1 subsystem <- 1022/1510

+PCI: 00:18.1 cmd <- 00

+PCI: 00:18.2 subsystem <- 1022/1510

+PCI: 00:18.2 cmd <- 00

+PCI: 00:18.3 subsystem <- 1022/1510

+PCI: 00:18.3 cmd <- 00

+PCI: 00:18.4 subsystem <- 1022/1510

+PCI: 00:18.4 cmd <- 00

+PCI: 00:18.5 subsystem <- 1022/1510

+PCI: 00:18.5 cmd <- 00

+PCI: 00:18.6 subsystem <- 1022/1510

+PCI: 00:18.6 cmd <- 00

+PCI: 00:18.7 subsystem <- 1022/1510

+PCI: 00:18.7 cmd <- 00

+PCI: 01:00.0 cmd <- 03

+PCI: 02:08.0 cmd <- 07

+done.

+BS: BS_DEV_ENABLE times (us): entry 0 run 156613 exit 0

+Initializing devices...

+Root Device init

+FrontRunner-AF ENTER init

+Init FCH GPIOs @ 0xfed80100

+Board revision ID: 2

+Init SIO GPIOs @ 0x0e00

+Sending BIOS alive message

+FrontRunner-AF EXIT init

+Root Device init 15463 usecs

+CPU_CLUSTER: 0 init

+start_eip=0x00001000, code_size=0x00000031

+Initializing CPU #0

+CPU: vendor AMD device 500f20

+CPU: family 14, model 02, stepping 00

+Model 14 Init.

+

+MTRR check

+Fixed MTRRs   : Enabled

+Variable MTRRs: Enabled

+

+Enabling cache

+Setting up local apic... apic_id: 0x00 done.

+model_14_init done.

+CPU #0 initialized

+CPU1: stack_base 00293000, stack_end 00293ff8

+Asserting INIT.

+Waiting for send to finish...

++Deasserting INIT.

+Waiting for send to finish...

++#startup loops: 2.

+Sending STARTUP #1 to 1.

+After apic_write.

+Startup point 1.

+Waiting for send to finish...

++Sending STARTUP #2 to 1.

+After apic_write.

+Startup point 1.

+Waiting for send to finish...

++After Startup.

+Initializing CPU #1

+Waiting for 1 CPUS to stop

+CPU: vendor AMD device 500f20

+CPU: family 14, model 02, stepping 00

+Model 14 Init.

+

+MTRR check

+Fixed MTRRs   : Enabled

+Variable MTRRs: Enabled

+

+Enabling cache

+Setting up local apic... apic_id: 0x01 done.

+model_14_init done.

+CPU #1 initialized

+All AP CPUs stopped (2201 loops)

+CPU1: stack: 00293000 - 00294000, lowest used address 00293dc8, stack used: 568 bytes

+CPU_CLUSTER: 0 init 110932 usecs

+PCI: 00:00.0 init

+Northbridge init

+PCI: 00:00.0 init 3210 usecs

+PCI: 00:01.0 init

+CBFS: ERROR: No file header found at 0x3ffb80 - try next aligned address: 0x3ffbc0.

+CBFS: WARNING: 'pci1002,9806.rom' not found.

+CBFS: Could not find file 'pci1002,9806.rom'.

+CBFS: ERROR: No file header found at 0x3ffb80 - try next aligned address: 0x3ffbc0.

+CBFS: WARNING: 'pci1002,9802.rom' not found.

+CBFS: Could not find file 'pci1002,9802.rom'.

+PCI: 00:01.0 init 32629 usecs

+PCI: 00:11.0 init

+AHCI controller IOMEM base: 0xF0247000, IRQ: 0x0

+Number of Ports: 0x6, Port implemented(bit map): 0x3f

+AHCI/RAID controller initialized

+PCI: 00:11.0 init 13699 usecs

+PCI: 00:14.0 init

+PCI: 00:14.0 init 1648 usecs

+PCI: 00:14.3 init

+SB800 - Late.c - lpc_init - Start.

+RTC Init

+SB800 - Late.c - lpc_init - End.

+PCI: 00:14.3 init 8618 usecs

+PCI: 00:14.4 init

+PCI: 00:14.4 init 1650 usecs

+PCI: 00:18.0 init

+PCI: 00:18.0 init 1649 usecs

+PCI: 00:18.1 init

+PCI: 00:18.1 init 1649 usecs

+PCI: 00:18.2 init

+PCI: 00:18.2 init 1649 usecs

+PCI: 00:18.3 init

+PCI: 00:18.3 init 1649 usecs

+PCI: 00:18.4 init

+PCI: 00:18.4 init 1649 usecs

+PCI: 00:18.5 init

+PCI: 00:18.5 init 1647 usecs

+PCI: 00:18.6 init

+PCI: 00:18.6 init 1649 usecs

+PCI: 00:18.7 init

+PCI: 00:18.7 init 1648 usecs

+PCI: 01:00.0 init

+PCI: 01:00.0 init 1649 usecs

+PCI: 02:08.0 init

+PCI: 02:08.0 init 1648 usecs

+Devices initialized

+Show all devs...After init.

+Root Device: enabled 1

+CPU_CLUSTER: 0: enabled 1

+APIC: 00: enabled 1

+DOMAIN: 0000: enabled 1

+PCI: 00:00.0: enabled 1

+PCI: 00:01.0: enabled 1

+PCI: 00:04.0: enabled 1

+PCI: 00:05.0: enabled 0

+PCI: 00:06.0: enabled 0

+PCI: 00:07.0: enabled 0

+PCI: 00:08.0: enabled 0

+PCI: 00:11.0: enabled 1

+PCI: 00:12.0: enabled 1

+PCI: 00:12.2: enabled 1

+PCI: 00:13.0: enabled 1

+PCI: 00:13.2: enabled 1

+PCI: 00:14.0: enabled 1

+I2C: 00:50: enabled 1

+I2C: 00:51: enabled 0

+PCI: 00:14.1: enabled 0

+PCI: 00:14.2: enabled 1

+PCI: 00:14.3: enabled 1

+PNP: 004e.0: enabled 0

+PNP: 004e.3: enabled 0

+PNP: 004e.4: enabled 1

+PNP: 004e.5: enabled 1

+PNP: 004e.7: enabled 1

+PNP: 004e.a: enabled 1

+PCI: 00:14.4: enabled 1

+PCI: 00:14.5: enabled 0

+PCI: 00:14.6: enabled 0

+PCI: 00:15.0: enabled 0

+PCI: 00:15.1: enabled 0

+PCI: 00:15.2: enabled 0

+PCI: 00:15.3: enabled 0

+PCI: 00:16.0: enabled 1

+PCI: 00:16.2: enabled 1

+PCI: 00:18.0: enabled 1

+PCI: 00:18.1: enabled 1

+PCI: 00:18.2: enabled 1

+PCI: 00:18.3: enabled 1

+PCI: 00:18.4: enabled 1

+PCI: 00:18.5: enabled 1

+PCI: 00:18.6: enabled 1

+PCI: 00:18.7: enabled 1

+APIC: 01: enabled 1

+PCI: 01:00.0: enabled 1

+PCI: 02:08.0: enabled 1

+BS: BS_DEV_INIT times (us): entry 0 run 362115 exit 0

+CBMEM region 2efd0000-2effffff (cbmem_check_toc)

+CBMEM region 2efd0000-2effffff (cbmem_initialize_empty)

+Adding CBMEM entry as no. 1

+Moving GDT to 2efd0200...ok

+Adding CBMEM entry as no. 2

+Finalize devices...

+Devices finalized

+Adding CBMEM entry as no. 3

+BS: BS_POST_DEVICE times (us): entry 16843 run 5987 exit 0

+BS: BS_OS_RESUME_CHECK times (us): entry 0 run 0 exit 0

+BiosAllocateBuffer BiosHeapBaseAddr: 10000

+agesawrapper_amdinitlate: AmdLateParamsPtr = 2003C

+BiosAllocateBuffer BiosHeapBaseAddr: 10000

+BiosAllocateBuffer BiosHeapBaseAddr: 10000

+BiosAllocateBuffer BiosHeapBaseAddr: 10000

+In agesawrapper_amdinitlate, AGESA generated ACPI tables:

+   DmiTable:00000000

+   AcpiPstate: 000200ef

+   AcpiSrat:00000000

+   AcpiSlit:00000000

+   Mce:000204d9

+   Cmc:0002057f

+   Alib:0002061d

+Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.

+Adding CBMEM entry as no. 4

+Writing IRQ routing tables to 0x2efe0600...write_pirq_routing_table done.

+PIRQ table: 48 bytes.

+Wrote the mp table end at: 000f0410 - 000f0514

+Adding CBMEM entry as no. 5

+Wrote the mp table end at: 2efe1610 - 2efe1714

+MP table: 276 bytes.

+Adding CBMEM entry as no. 6

+ACPI: Writing ACPI tables at 2efe2600...

+ACPI:  * DSDT at 2efe26c8

+ACPI:  * DSDT @ 2efe26c8 Length 24a9

+ACPI:  * FACS at 2efe4b78

+ACPI:  * FADT at 2efe4bb8

+ACPI_BLK_BASE: 0x0800

+ACPI: added table 1/32, length now 40

+ACPI:  * HPET at 2efe4cb0

+ACPI: added table 2/32, length now 44

+ACPI:  * MADT at 2efe4ce8

+ACPI: added table 3/32, length now 48

+ACPI: added table 4/32, length now 52

+ACPI:  * SRAT at 2efe4ee0

+  AGESA SRAT table NULL. Skipping.

+ACPI:  * SLIT at 2efe4ee0

+  AGESA SLIT table NULL. Skipping.

+ACPI:  * AGESA ALIB SSDT at 2efe4ee0

+ACPI: added table 5/32, length now 56

+ACPI:  * AGESA SSDT Pstate at 2efe6570

+ACPI: added table 6/32, length now 60

+ACPI:  * coreboot TOM SSDT2 at 2efe6950

+ACPI: added table 7/32, length now 64

+ACPI: done.

+ACPI tables: 17301 bytes.

+Adding CBMEM entry as no. 7

+smbios_write_tables: 2efeda00

+Root Device (LiPPERT FrontRunner-AF)

+CPU_CLUSTER: 0 (AMD Family 14h Root Complex)

+APIC: 00 (AMD CPU Family 14h)

+DOMAIN: 0000 (AMD Family 14h Root Complex)

+PCI: 00:00.0 (AMD Family 14h Northbridge)

+PCI: 00:01.0 (AMD Family 14h Northbridge)

+PCI: 00:04.0 (AMD Family 14h Northbridge)

+PCI: 00:05.0 (AMD Family 14h Northbridge)

+PCI: 00:06.0 (AMD Family 14h Northbridge)

+PCI: 00:07.0 (AMD Family 14h Northbridge)

+PCI: 00:08.0 (AMD Family 14h Northbridge)

+PCI: 00:11.0 (ATI SB800)

+PCI: 00:12.0 (ATI SB800)

+PCI: 00:12.2 (ATI SB800)

+PCI: 00:13.0 (ATI SB800)

+PCI: 00:13.2 (ATI SB800)

+PCI: 00:14.0 (ATI SB800)

+I2C: 00:50 (unknown)

+I2C: 00:51 (unknown)

+PCI: 00:14.1 (ATI SB800)

+PCI: 00:14.2 (ATI SB800)

+PCI: 00:14.3 (ATI SB800)

+PNP: 004e.0 (Various SMSC Super I/Os)

+PNP: 004e.3 (Various SMSC Super I/Os)

+PNP: 004e.4 (Various SMSC Super I/Os)

+PNP: 004e.5 (Various SMSC Super I/Os)

+PNP: 004e.7 (Various SMSC Super I/Os)

+PNP: 004e.a (Various SMSC Super I/Os)

+PCI: 00:14.4 (ATI SB800)

+PCI: 00:14.5 (ATI SB800)

+PCI: 00:14.6 (ATI SB800)

+PCI: 00:15.0 (ATI SB800)

+PCI: 00:15.1 (ATI SB800)

+PCI: 00:15.2 (ATI SB800)

+PCI: 00:15.3 (ATI SB800)

+PCI: 00:16.0 (ATI SB800)

+PCI: 00:16.2 (ATI SB800)

+PCI: 00:18.0 (AMD Family 14h Northbridge)

+PCI: 00:18.1 (AMD Family 14h Northbridge)

+PCI: 00:18.2 (AMD Family 14h Northbridge)

+PCI: 00:18.3 (AMD Family 14h Northbridge)

+PCI: 00:18.4 (AMD Family 14h Northbridge)

+PCI: 00:18.5 (AMD Family 14h Northbridge)

+PCI: 00:18.6 (AMD Family 14h Northbridge)

+PCI: 00:18.7 (AMD Family 14h Northbridge)

+APIC: 01 (unknown)

+PCI: 01:00.0 (unknown)

+PCI: 02:08.0 (unknown)

+SMBIOS tables: 332 bytes.

+Adding CBMEM entry as no. 8

+Writing table forward entry at 0x00000500

+Wrote coreboot table at: 00000500, 0x10 bytes, checksum eedf

+Table forward entry ends at 0x00000528.

+... aligned to 0x00001000

+Writing coreboot table at 0x2efee200

+rom_table_end = 0x2efee200

+... aligned to 0x2eff0000

+ 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

+ 1. 0000000000001000-000000000009ffff: RAM

+ 2. 00000000000c0000-000000002efcffff: RAM

+ 3. 000000002efd0000-000000002effffff: CONFIGURATION TABLES

+ 4. 000000002f000000-000000003effffff: RESERVED

+ 5. 00000000f8000000-00000000f8ffffff: RESERVED

+Wrote coreboot table at: 2efee200, 0x174 bytes, checksum d338

+coreboot table: 396 bytes.

+FREE SPACE  0. 2eff6200 00009e00

+GDT         1. 2efd0200 00000200

+CONSOLE     2. 2efd0400 00010000

+TIME STAMP  3. 2efe0400 00000200

+IRQ TABLE   4. 2efe0600 00001000

+SMP TABLE   5. 2efe1600 00001000

+ACPI        6. 2efe2600 0000b400

+SMBIOS      7. 2efeda00 00000800

+COREBOOT    8. 2efee200 00008000

+BS: BS_WRITE_TABLES times (us): entry 0 run 374147 exit 0

+CBFS: located payload @ ffc81c38, 40707 bytes.

+Loading segment from rom address 0xffc81c38

+  code (compression=1)

+  New segment dstaddr 0xed470 memsize 0x12b90 srcaddr 0xffc81c70 filesize 0x9ecb

+  (cleaned up) New segment addr 0xed470 size 0x12b90 offset 0xffc81c70 filesize 0x9ecb

+Loading segment from rom address 0xffc81c54

+  Entry Point 0x000fd7af

+Bounce Buffer at 2ed25000, 2793560 bytes

+Loading Segment: addr: 0x00000000000ed470 memsz: 0x0000000000012b90 filesz: 0x0000000000009ecb

+lb: [0x0000000000200000, 0x000000000035502c)

+Post relocation: addr: 0x00000000000ed470 memsz: 0x0000000000012b90 filesz: 0x0000000000009ecb

+using LZMA

+[ 0x000ed470, 00100000, 0x00100000) <- ffc81c70

+dest 000ed470, end 00100000, bouncebuffer 2ed25000

+Loaded segments

+BS: BS_PAYLOAD_LOAD times (us): entry 0 run 86314 exit 0

+Jumping to boot code at 000fd7af

+CPU0: stack: 00294000 - 00295000, lowest used address 00294740, stack used: 2240 bytes

+entry    = 0x000fd7af

+lb_start = 0x00200000

+lb_size  = 0x0015502c

+buffer   = 0x2ed25000

+----- [ SeaBIOS rel-1.7.4-0-g96917a8-20140103_035032-obelix ] -----
+Found coreboot cbmem console @ 2efd0400
+Found mainboard LiPPERT FrontRunner-AF
+Relocating init from 0x000ee231 to 0x2efb9440 (size 27379)
+Found CBFS header at 0xfffffba0
+CPU Mhz=1651
+Found 24 PCI devices (max PCI bus is 02)
+Copying PIR from 0x2efe0600 to 0x000f4d00
+Copying MPTABLE from 0x2efe1600/2efe1610 to 0x000f4be0
+Copying ACPI RSDP from 0x2efe2600 to 0x000f4bc0
+Copying SMBIOS entry point from 0x2efeda00 to 0x000f4ba0
+Using pmtimer, ioport 0x808
+Scan for VGA option rom
+EHCI init on dev 00:12.2 (regs=0xf0247420)
+EHCI init on dev 00:13.2 (regs=0xf0247520)
+EHCI init on dev 00:16.2 (regs=0xf0247620)
+Found 1 serial ports
+AHCI controller at 11.0, iobase f0247000, irq 0
+Searching bootorder for: /pci@i0cf8/usb@13,2/storage@2/*@0/*@0,0
+Searching bootorder for: /pci@i0cf8/usb@13,2/usb-*@2
+USB MSC vendor='SanDisk' product='U3 Cruzer Micro' rev='3.21' type=0 removable=1
+USB MSC blksize=512 sectors=2006673
+All threads complete.
+Scan for option roms
+
+Press F12 for boot menu.
+
+Searching bootorder for: HALT
+drive 0x000f4b50: PCHS=0/0/0 translation=lba LCHS=995/32/63 s=2006673
+Space available for UMB: c0000-ee800, f0000-f4b50
+Returned 53248 bytes of ZoneHigh
+e820 map has 6 items:
+  0: 0000000000000000 - 000000000009fc00 = 1 RAM
+  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
+  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
+  3: 0000000000100000 - 000000002efcd000 = 1 RAM
+  4: 000000002efcd000 - 000000003f000000 = 2 RESERVED
+  5: 00000000f8000000 - 00000000f9000000 = 2 RESERVED
+enter handle_19:
+  NULL
+Booting from Hard Disk...
+Booting from 0000:7c00
+