diff --git a/pcengines/alix1c/4.0-6703-g755615a/2014-08-13T20:30:18Z/coreboot_console.txt b/pcengines/alix1c/4.0-6703-g755615a/2014-08-13T20:30:18Z/coreboot_console.txt
new file mode 100644
index 0000000..867a970
--- /dev/null
+++ b/pcengines/alix1c/4.0-6703-g755615a/2014-08-13T20:30:18Z/coreboot_console.txt
@@ -0,0 +1,801 @@
+coreboot-4.0-6703-g755615a-GNUtoo@no-log.org Wed Aug 13 23:30:35 CEST 2014 booting...
+clocks_per_usec: 499
+BS: Entering BS_PRE_DEVICE state.
+BS: Exiting BS_PRE_DEVICE state.
+BS: BS_PRE_DEVICE times (us): entry 0 run 2957 exit 0
+BS: Entering BS_DEV_INIT_CHIPS state.
+BS: Exiting BS_DEV_INIT_CHIPS state.
+BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3303 exit 0
+BS: Entering BS_DEV_ENUMERATE state.
+Enumerating buses...
+Show all devs...Before device enumeration.
+Root Device: enabled 1
+DOMAIN: 0000: enabled 1
+PCI: 00:01.0: enabled 1
+PCI: 00:01.1: enabled 1
+PCI: 00:0f.0: enabled 1
+PNP: 002e.0: enabled 0
+PNP: 002e.1: enabled 1
+PNP: 002e.2: enabled 1
+PNP: 002e.3: enabled 1
+PNP: 002e.5: enabled 1
+PNP: 002e.6: enabled 0
+PNP: 002e.7: enabled 0
+PNP: 002e.8: enabled 1
+PNP: 002e.9: enabled 1
+PNP: 002e.a: enabled 1
+PNP: 002e.b: enabled 1
+PCI: 00:0f.1: enabled 1
+PCI: 00:0f.2: enabled 1
+PCI: 00:0f.3: enabled 1
+PCI: 00:0f.4: enabled 1
+PCI: 00:0f.5: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+Compare with tree...
+Root Device: enabled 1
+ DOMAIN: 0000: enabled 1
+  PCI: 00:01.0: enabled 1
+  PCI: 00:01.1: enabled 1
+  PCI: 00:0f.0: enabled 1
+   PNP: 002e.0: enabled 0
+   PNP: 002e.1: enabled 1
+   PNP: 002e.2: enabled 1
+   PNP: 002e.3: enabled 1
+   PNP: 002e.5: enabled 1
+   PNP: 002e.6: enabled 0
+   PNP: 002e.7: enabled 0
+   PNP: 002e.8: enabled 1
+   PNP: 002e.9: enabled 1
+   PNP: 002e.a: enabled 1
+   PNP: 002e.b: enabled 1
+  PCI: 00:0f.1: enabled 1
+  PCI: 00:0f.2: enabled 1
+  PCI: 00:0f.3: enabled 1
+  PCI: 00:0f.4: enabled 1
+  PCI: 00:0f.5: enabled 1
+ CPU_CLUSTER: 0: enabled 1
+  APIC: 00: enabled 1
+scan_static_bus for Root Device
+>> Entering northbridge.c: enable_dev with path 6
+>> Entering northbridge.c: pci_domain_enable
+Enter northbridge_init_early
+writeglmsr: MSR 0x10000020, val 0x20000000:0x000fff80
+writeglmsr: MSR 0x10000021, val 0x20000000:0x080fffe0
+sizeram: _MSR MC_CF07_DATA: 10076013:00061a40
+sizeram: sizem 0x100MB
+SysmemInit: enable for 256MBytes
+usable RAM: 268304383 bytes
+SysmemInit: MSR 0x10000028, val 0x2000000f:0xfdf00100
+sizeram: _MSR MC_CF07_DATA: 10076013:00061a40
+sizeram: sizem 0x100MB
+SMMGL0Init: 268304384 bytes
+SMMGL0Init: offset is 0x80400000
+SMMGL0Init: MSR 0x10000026, val 0x28fbe080:0x400fffe0
+writeglmsr: MSR 0x10000080, val 0x00000000:0x00000003
+writeglmsr: MSR 0x40000020, val 0x20000000:0x000fff80
+writeglmsr: MSR 0x40000021, val 0x20000000:0x080fffe0
+sizeram: _MSR MC_CF07_DATA: 10076013:00061a40
+sizeram: sizem 0x100MB
+SysmemInit: enable for 256MBytes
+usable RAM: 268304383 bytes
+SysmemInit: MSR 0x4000002a, val 0x2000000f:0xfdf00100
+SMMGL1Init:
+SMMGL1Init: MSR 0x40000023, val 0x20000080:0x400fffe0
+writeglmsr: MSR 0x40000080, val 0x00000000:0x00000001
+writeglmsr: MSR 0x400000e3, val 0x60000000:0x033000f0
+CPU_RCONF_DEFAULT (1808): 0x25FFFC02:0x10FFDF00
+CPU_RCONF_BYPASS (180A): 0x00000000 : 0x00000000
+L2 cache enabled
+Enabling cache
+GLPCI R1: system msr.lo 0x00100130 msr.hi 0x0ffdf000
+GLPCI R2: system msr.lo 0x80400120 msr.hi 0x8041f000
+Exit northbridge_init_early
+Done cpubug fixes 
+Not Doing ChipsetFlashSetup()
+Preparing for VSA...
+Real mode stub @00000600: 867 bytes
+CBFS: loading stage vsa @ 0x60000 (57504 bytes), entry @ 0x60020
+VSA: Buffer @00060000 *[0k]=ba
+VSA: Signature *[0x20-0x23] is b0:10:e6:80
+Calling VSA module...
+... VSA module returned.
+VSM: VSA2 VR signature verified.
+Graphics init...
+VRC_VG value: 0x2808
+DOMAIN: 0000 enabled
+>> Entering northbridge.c: enable_dev with path 7
+CPU_CLUSTER: 0 enabled
+DOMAIN: 0000 scanning...
+PCI: pci_scan_bus for bus 00
+>> Entering northbridge.c: enable_dev with path 2
+PCI: 00:01.0 [1022/2080] ops
+PCI: 00:01.0 [1022/2080] enabled
+>> Entering northbridge.c: enable_dev with path 2
+PCI: 00:01.1 [1022/2081] enabled
+PCI: 00:01.2 [1022/2082] enabled
+PCI: 00:0c.0 [1814/0201] enabled
+PCI: 00:0d.0 [1106/3053] enabled
+PCI: 00:0e.0 [168c/001a] enabled
+cs5536: southbridge_enable: dev is 00118e90
+PCI: 00:0f.0 [1022/2090] bus ops
+PCI: 00:0f.0 [1022/2090] enabled
+cs5536: southbridge_enable: dev is 001190f0
+PCI: Static device PCI: 00:0f.1 not found, disabling it.
+cs5536: southbridge_enable: dev is 001192b8
+PCI: 00:0f.2 [1022/209a] ops
+PCI: 00:0f.2 [1022/209a] enabled
+cs5536: southbridge_enable: dev is 001193e8
+PCI: 00:0f.3 [1022/2093] enabled
+cs5536: southbridge_enable: dev is 00119518
+PCI: 00:0f.4 [1022/2094] enabled
+cs5536: southbridge_enable: dev is 00119648
+PCI: 00:0f.5 [1022/2095] enabled
+PCI: 00:0f.6 [1022/2096] enabled
+PCI: 00:0f.7 [1022/2097] enabled
+scan_static_bus for PCI: 00:0f.0
+PNP: 002e.0 disabled
+PNP: 002e.1 enabled
+PNP: 002e.2 enabled
+PNP: 002e.3 enabled
+PNP: 002e.5 enabled
+PNP: 002e.6 disabled
+PNP: 002e.7 disabled
+PNP: 002e.8 enabled
+PNP: 002e.9 enabled
+PNP: 002e.a enabled
+PNP: 002e.b enabled
+scan_static_bus for PCI: 00:0f.0 done
+PCI: pci_scan_bus returning with max=000
+scan_static_bus for Root Device done
+done
+BS: Exiting BS_DEV_ENUMERATE state.
+BS: BS_DEV_ENUMERATE times (us): entry 0 run 461177 exit 0
+BS: Entering BS_DEV_RESOURCES state.
+found VGA at PCI: 00:01.1
+Setting up VGA for PCI: 00:01.1
+Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
+Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
+Allocating resources...
+Reading resources...
+Root Device read_resources bus 0 link: 0
+DOMAIN: 0000 read_resources bus 0 link: 0
+PCI: 00:0f.0 read_resources bus 0 link: 0
+PCI: 00:0f.0 read_resources bus 0 link: 0 done
+DOMAIN: 0000 read_resources bus 0 link: 0 done
+CPU_CLUSTER: 0 read_resources bus 0 link: 0
+APIC: 00 missing read_resources
+CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
+Root Device read_resources bus 0 link: 0 done
+Done reading resources.
+Show resources in subtree (Root Device)...After reading.
+ Root Device child on link 0 DOMAIN: 0000
+  DOMAIN: 0000 child on link 0 PCI: 00:01.0
+  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
+  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
+   PCI: 00:01.0
+   PCI: 00:01.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 10
+   PCI: 00:01.1
+   PCI: 00:01.1 resource base 0 size 1000000 align 24 gran 24 limit ffffffff flags 200 index 10
+   PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 14
+   PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 18
+   PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c
+   PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 20
+   PCI: 00:01.2
+   PCI: 00:01.2 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10
+   PCI: 00:0c.0
+   PCI: 00:0c.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
+   PCI: 00:0d.0
+   PCI: 00:0d.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
+   PCI: 00:0d.0 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 14
+   PCI: 00:0e.0
+   PCI: 00:0e.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 200 index 10
+   PCI: 00:0f.0 child on link 0 PNP: 002e.0
+   PCI: 00:0f.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
+   PCI: 00:0f.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14
+   PCI: 00:0f.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 18
+   PCI: 00:0f.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 1c
+   PCI: 00:0f.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 20
+   PCI: 00:0f.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 24
+   PCI: 00:0f.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
+   PCI: 00:0f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+    PNP: 002e.0
+    PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+    PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+    PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
+    PNP: 002e.1
+    PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+    PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+    PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
+    PNP: 002e.2
+    PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+    PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+    PNP: 002e.3
+    PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+    PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+    PNP: 002e.5
+    PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
+    PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
+    PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+    PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
+    PNP: 002e.6
+    PNP: 002e.6 resource base 100 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+    PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+    PNP: 002e.7
+    PNP: 002e.7 resource base 220 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
+    PNP: 002e.7 resource base 300 size 2 align 1 gran 1 limit 7ff flags c0000100 index 62
+    PNP: 002e.7 resource base 9 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+    PNP: 002e.8
+    PNP: 002e.9
+    PNP: 002e.a
+    PNP: 002e.b
+    PNP: 002e.b resource base 290 size 8 align 3 gran 3 limit fff flags c0000100 index 60
+    PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+   PCI: 00:0f.1
+   PCI: 00:0f.2
+   PCI: 00:0f.2 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
+   PCI: 00:0f.3
+   PCI: 00:0f.3 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 10
+   PCI: 00:0f.4
+   PCI: 00:0f.4 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+   PCI: 00:0f.5
+   PCI: 00:0f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+   PCI: 00:0f.6
+   PCI: 00:0f.6 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
+   PCI: 00:0f.7
+   PCI: 00:0f.7 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
+  CPU_CLUSTER: 0 child on link 0 APIC: 00
+   APIC: 00
+DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
+PCI: 00:0d.0 10 *  [0x0 - 0xff] io
+PCI: 00:0f.0 14 *  [0x400 - 0x4ff] io
+PCI: 00:0f.0 20 *  [0x800 - 0x87f] io
+PCI: 00:0f.3 10 *  [0x880 - 0x8ff] io
+PCI: 00:0f.0 18 *  [0xc00 - 0xc3f] io
+PCI: 00:0f.0 24 *  [0xc40 - 0xc7f] io
+PCI: 00:0f.0 1c *  [0xc80 - 0xc9f] io
+PCI: 00:0f.2 20 *  [0xca0 - 0xcaf] io
+PCI: 00:0f.0 10 *  [0xcb0 - 0xcb7] io
+PCI: 00:01.0 10 *  [0xcb8 - 0xcbb] io
+DOMAIN: 0000 compute_resources_io: base: cbc size: cbc align: 8 gran: 0 limit: ffff done
+DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
+PCI: 00:01.1 10 *  [0x0 - 0xffffff] mem
+PCI: 00:0e.0 10 *  [0x1000000 - 0x100ffff] mem
+PCI: 00:01.1 14 *  [0x1010000 - 0x1013fff] mem
+PCI: 00:01.1 18 *  [0x1014000 - 0x1017fff] mem
+PCI: 00:01.1 1c *  [0x1018000 - 0x101bfff] mem
+PCI: 00:01.1 20 *  [0x101c000 - 0x101ffff] mem
+PCI: 00:01.2 10 *  [0x1020000 - 0x1023fff] mem
+PCI: 00:0c.0 10 *  [0x1024000 - 0x1025fff] mem
+PCI: 00:0f.6 10 *  [0x1026000 - 0x1027fff] mem
+PCI: 00:0f.4 10 *  [0x1028000 - 0x1028fff] mem
+PCI: 00:0f.5 10 *  [0x1029000 - 0x1029fff] mem
+PCI: 00:0f.7 10 *  [0x102a000 - 0x102afff] mem
+PCI: 00:0d.0 14 *  [0x102b000 - 0x102b0ff] mem
+DOMAIN: 0000 compute_resources_mem: base: 102b100 size: 102b100 align: 24 gran: 0 limit: ffffffff done
+avoid_fixed_resources: DOMAIN: 0000
+avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
+avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
+constrain_resources: DOMAIN: 0000
+constrain_resources: PCI: 00:01.0
+constrain_resources: PCI: 00:01.1
+constrain_resources: PCI: 00:01.2
+constrain_resources: PCI: 00:0c.0
+constrain_resources: PCI: 00:0d.0
+constrain_resources: PCI: 00:0e.0
+constrain_resources: PCI: 00:0f.0
+constrain_resources: PNP: 002e.1
+constrain_resources: PNP: 002e.2
+constrain_resources: PNP: 002e.3
+constrain_resources: PNP: 002e.5
+constrain_resources: PNP: 002e.8
+constrain_resources: PNP: 002e.9
+constrain_resources: PNP: 002e.a
+constrain_resources: PNP: 002e.b
+constrain_resources: PCI: 00:0f.2
+constrain_resources: PCI: 00:0f.3
+constrain_resources: PCI: 00:0f.4
+constrain_resources: PCI: 00:0f.5
+constrain_resources: PCI: 00:0f.6
+constrain_resources: PCI: 00:0f.7
+avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff
+	lim->base 00001000 lim->limit 0000ffff
+avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff
+	lim->base 00000000 lim->limit febfffff
+Setting resources...
+DOMAIN: 0000 allocate_resources_io: base:1000 size:cbc align:8 gran:0 limit:ffff
+Assigned: PCI: 00:0d.0 10 *  [0x1000 - 0x10ff] io
+Assigned: PCI: 00:0f.0 14 *  [0x1400 - 0x14ff] io
+Assigned: PCI: 00:0f.0 20 *  [0x1800 - 0x187f] io
+Assigned: PCI: 00:0f.3 10 *  [0x1880 - 0x18ff] io
+Assigned: PCI: 00:0f.0 18 *  [0x1c00 - 0x1c3f] io
+Assigned: PCI: 00:0f.0 24 *  [0x1c40 - 0x1c7f] io
+Assigned: PCI: 00:0f.0 1c *  [0x1c80 - 0x1c9f] io
+Assigned: PCI: 00:0f.2 20 *  [0x1ca0 - 0x1caf] io
+Assigned: PCI: 00:0f.0 10 *  [0x1cb0 - 0x1cb7] io
+Assigned: PCI: 00:01.0 10 *  [0x1cb8 - 0x1cbb] io
+DOMAIN: 0000 allocate_resources_io: next_base: 1cbc size: cbc align: 8 gran: 0 done
+DOMAIN: 0000 allocate_resources_mem: base:fd000000 size:102b100 align:24 gran:0 limit:febfffff
+Assigned: PCI: 00:01.1 10 *  [0xfd000000 - 0xfdffffff] mem
+Assigned: PCI: 00:0e.0 10 *  [0xfe000000 - 0xfe00ffff] mem
+Assigned: PCI: 00:01.1 14 *  [0xfe010000 - 0xfe013fff] mem
+Assigned: PCI: 00:01.1 18 *  [0xfe014000 - 0xfe017fff] mem
+Assigned: PCI: 00:01.1 1c *  [0xfe018000 - 0xfe01bfff] mem
+Assigned: PCI: 00:01.1 20 *  [0xfe01c000 - 0xfe01ffff] mem
+Assigned: PCI: 00:01.2 10 *  [0xfe020000 - 0xfe023fff] mem
+Assigned: PCI: 00:0c.0 10 *  [0xfe024000 - 0xfe025fff] mem
+Assigned: PCI: 00:0f.6 10 *  [0xfe026000 - 0xfe027fff] mem
+Assigned: PCI: 00:0f.4 10 *  [0xfe028000 - 0xfe028fff] mem
+Assigned: PCI: 00:0f.5 10 *  [0xfe029000 - 0xfe029fff] mem
+Assigned: PCI: 00:0f.7 10 *  [0xfe02a000 - 0xfe02afff] mem
+Assigned: PCI: 00:0d.0 14 *  [0xfe02b000 - 0xfe02b0ff] mem
+DOMAIN: 0000 allocate_resources_mem: next_base: fe02b100 size: 102b100 align: 24 gran: 0 done
+Root Device assign_resources, bus 0 link: 0
+>> Entering northbridge.c: pci_domain_set_resources
+CBMEM region f7b0000-f7dffff (cbmem_late_set_table)
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+PCI: 00:01.1 10 <- [0x00fd000000 - 0x00fdffffff] size 0x01000000 gran 0x18 mem
+PCI: 00:01.1 14 <- [0x00fe010000 - 0x00fe013fff] size 0x00004000 gran 0x0e mem
+PCI: 00:01.1 18 <- [0x00fe014000 - 0x00fe017fff] size 0x00004000 gran 0x0e mem
+PCI: 00:01.1 1c <- [0x00fe018000 - 0x00fe01bfff] size 0x00004000 gran 0x0e mem
+PCI: 00:01.1 20 <- [0x00fe01c000 - 0x00fe01ffff] size 0x00004000 gran 0x0e mem
+PCI: 00:01.2 10 <- [0x00fe020000 - 0x00fe023fff] size 0x00004000 gran 0x0e mem
+PCI: 00:0c.0 10 <- [0x00fe024000 - 0x00fe025fff] size 0x00002000 gran 0x0d mem
+PCI: 00:0d.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
+PCI: 00:0d.0 14 <- [0x00fe02b000 - 0x00fe02b0ff] size 0x00000100 gran 0x08 mem
+PCI: 00:0e.0 10 <- [0x00fe000000 - 0x00fe00ffff] size 0x00010000 gran 0x10 mem
+PCI: 00:0f.0 10 <- [0x0000001cb0 - 0x0000001cb7] size 0x00000008 gran 0x03 io
+PCI: 00:0f.0 14 <- [0x0000001400 - 0x00000014ff] size 0x00000100 gran 0x08 io
+PCI: 00:0f.0 18 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
+PCI: 00:0f.0 1c <- [0x0000001c80 - 0x0000001c9f] size 0x00000020 gran 0x05 io
+PCI: 00:0f.0 20 <- [0x0000001800 - 0x000000187f] size 0x00000080 gran 0x07 io
+PCI: 00:0f.0 24 <- [0x0000001c40 - 0x0000001c7f] size 0x00000040 gran 0x06 io
+PCI: 00:0f.0 assign_resources, bus 0 link: 0
+PNP: 002e.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io
+PNP: 002e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
+ERROR: PNP: 002e.1 74 drq size: 0x0000000001 not assigned
+PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
+PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
+PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
+PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
+PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
+PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
+PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
+PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
+PNP: 002e.b 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io
+PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq
+PCI: 00:0f.0 assign_resources, bus 0 link: 0
+PCI: 00:0f.2 20 <- [0x0000001ca0 - 0x0000001caf] size 0x00000010 gran 0x04 io
+PCI: 00:0f.3 10 <- [0x0000001880 - 0x00000018ff] size 0x00000080 gran 0x07 io
+PCI: 00:0f.4 10 <- [0x00fe028000 - 0x00fe028fff] size 0x00001000 gran 0x0c mem
+PCI: 00:0f.5 10 <- [0x00fe029000 - 0x00fe029fff] size 0x00001000 gran 0x0c mem
+PCI: 00:0f.6 10 <- [0x00fe026000 - 0x00fe027fff] size 0x00002000 gran 0x0d mem
+PCI: 00:0f.7 10 <- [0x00fe02a000 - 0x00fe02afff] size 0x00001000 gran 0x0c mem
+DOMAIN: 0000 assign_resources, bus 0 link: 0
+Root Device assign_resources, bus 0 link: 0
+Done setting resources.
+Show resources in subtree (Root Device)...After assigning values.
+ Root Device child on link 0 DOMAIN: 0000
+  DOMAIN: 0000 child on link 0 PCI: 00:01.0
+  DOMAIN: 0000 resource base 1000 size cbc align 8 gran 0 limit ffff flags 40040100 index 10000000
+  DOMAIN: 0000 resource base fd000000 size 102b100 align 24 gran 0 limit febfffff flags 40040200 index 10000100
+  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index a
+  DOMAIN: 0000 resource base c0000 size f720000 align 0 gran 0 limit 0 flags e0004200 index b
+   PCI: 00:01.0
+   PCI: 00:01.0 resource base 1cb8 size 4 align 2 gran 2 limit ffff flags 40000100 index 10
+   PCI: 00:01.1
+   PCI: 00:01.1 resource base fd000000 size 1000000 align 24 gran 24 limit febfffff flags 60000200 index 10
+   PCI: 00:01.1 resource base fe010000 size 4000 align 14 gran 14 limit febfffff flags 60000200 index 14
+   PCI: 00:01.1 resource base fe014000 size 4000 align 14 gran 14 limit febfffff flags 60000200 index 18
+   PCI: 00:01.1 resource base fe018000 size 4000 align 14 gran 14 limit febfffff flags 60000200 index 1c
+   PCI: 00:01.1 resource base fe01c000 size 4000 align 14 gran 14 limit febfffff flags 60000200 index 20
+   PCI: 00:01.2
+   PCI: 00:01.2 resource base fe020000 size 4000 align 14 gran 14 limit febfffff flags 60000200 index 10
+   PCI: 00:0c.0
+   PCI: 00:0c.0 resource base fe024000 size 2000 align 13 gran 13 limit febfffff flags 60000200 index 10
+   PCI: 00:0d.0
+   PCI: 00:0d.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 10
+   PCI: 00:0d.0 resource base fe02b000 size 100 align 8 gran 8 limit febfffff flags 60000200 index 14
+   PCI: 00:0e.0
+   PCI: 00:0e.0 resource base fe000000 size 10000 align 16 gran 16 limit febfffff flags 60000200 index 10
+   PCI: 00:0f.0 child on link 0 PNP: 002e.0
+   PCI: 00:0f.0 resource base 1cb0 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
+   PCI: 00:0f.0 resource base 1400 size 100 align 8 gran 8 limit ffff flags 60000100 index 14
+   PCI: 00:0f.0 resource base 1c00 size 40 align 6 gran 6 limit ffff flags 60000100 index 18
+   PCI: 00:0f.0 resource base 1c80 size 20 align 5 gran 5 limit ffff flags 60000100 index 1c
+   PCI: 00:0f.0 resource base 1800 size 80 align 7 gran 7 limit ffff flags 60000100 index 20
+   PCI: 00:0f.0 resource base 1c40 size 40 align 6 gran 6 limit ffff flags 60000100 index 24
+   PCI: 00:0f.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
+   PCI: 00:0f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
+    PNP: 002e.0
+    PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+    PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+    PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
+    PNP: 002e.1
+    PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+    PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+    PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
+    PNP: 002e.2
+    PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+    PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+    PNP: 002e.3
+    PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
+    PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+    PNP: 002e.5
+    PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
+    PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62
+    PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+    PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72
+    PNP: 002e.6
+    PNP: 002e.6 resource base 100 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
+    PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
+    PNP: 002e.7
+    PNP: 002e.7 resource base 220 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
+    PNP: 002e.7 resource base 300 size 2 align 1 gran 1 limit 7ff flags c0000100 index 62
+    PNP: 002e.7 resource base 9 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
+    PNP: 002e.8
+    PNP: 002e.9
+    PNP: 002e.a
+    PNP: 002e.b
+    PNP: 002e.b resource base 290 size 8 align 3 gran 3 limit fff flags e0000100 index 60
+    PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
+   PCI: 00:0f.1
+   PCI: 00:0f.2
+   PCI: 00:0f.2 resource base 1ca0 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
+   PCI: 00:0f.3
+   PCI: 00:0f.3 resource base 1880 size 80 align 7 gran 7 limit ffff flags 60000100 index 10
+   PCI: 00:0f.4
+   PCI: 00:0f.4 resource base fe028000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 10
+   PCI: 00:0f.5
+   PCI: 00:0f.5 resource base fe029000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 10
+   PCI: 00:0f.6
+   PCI: 00:0f.6 resource base fe026000 size 2000 align 13 gran 13 limit febfffff flags 60000200 index 10
+   PCI: 00:0f.7
+   PCI: 00:0f.7 resource base fe02a000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 10
+  CPU_CLUSTER: 0 child on link 0 APIC: 00
+   APIC: 00
+Done allocating resources.
+BS: Exiting BS_DEV_RESOURCES state.
+BS: BS_DEV_RESOURCES times (us): entry 0 run 1613990 exit 0
+BS: Entering BS_DEV_ENABLE state.
+Enabling resources...
+PCI: 00:01.0 cmd <- 05
+PCI: 00:01.1 subsystem <- 0000/0000
+PCI: 00:01.1 cmd <- 03
+PCI: 00:01.2 cmd <- 02
+PCI: 00:0c.0 cmd <- 02
+PCI: 00:0d.0 cmd <- 83
+PCI: 00:0e.0 cmd <- 02
+PCI: 00:0f.0 cmd <- 09
+PCI: 00:0f.2 cmd <- 01
+PCI: 00:0f.3 subsystem <- 0000/0000
+PCI: 00:0f.3 cmd <- 01
+PCI: 00:0f.4 subsystem <- 0000/0000
+PCI: 00:0f.4 cmd <- 02
+PCI: 00:0f.5 subsystem <- 0000/0000
+PCI: 00:0f.5 cmd <- 02
+PCI: 00:0f.6 cmd <- 02
+PCI: 00:0f.7 cmd <- 02
+W83627HF HWM SMBus enabled
+done.
+BS: Exiting BS_DEV_ENABLE state.
+BS: BS_DEV_ENABLE times (us): entry 0 run 48847 exit 0
+BS: Entering BS_DEV_INIT state.
+Initializing devices...
+Root Device init
+ALIX1.C ENTER init
+ALIX1.C EXIT init
+Root Device init 4982 usecs
+CPU_CLUSTER: 0 init
+>> Entering northbridge.c: cpu_bus_init
+Initializing CPU #0
+CPU: vendor AMD device 5a2
+CPU: family 05, model 0a, stepping 02
+geode_lx_init
+Enabling cache
+A20 (0x92): 2
+A20 (0x92): 2
+CPU geode_lx_init DONE
+CPU #0 initialized
+CPU_CLUSTER: 0 init 22331 usecs
+PCI: 00:01.0 init
+>> Entering northbridge.c: northbridge_init
+PCI: 00:01.0 init 5569 usecs
+PCI: 00:01.1 init
+PCI: 00:01.1 init 1660 usecs
+PCI: 00:01.2 init
+PCI: 00:01.2 init 1659 usecs
+PCI: 00:0c.0 init
+PCI: 00:0c.0 init 1659 usecs
+PCI: 00:0d.0 init
+PCI: 00:0d.0 init 1660 usecs
+PCI: 00:0e.0 init
+PCI: 00:0e.0 init 1660 usecs
+PCI: 00:0f.0 init
+cs5536: southbridge_init
+RTC Init
+GPIO_ADDR: 00001400
+uarts_init: disable COM1
+uarts_init: disable COM2
+cs5536: southbridge_init: enable_ide_nand_flash is 0
+PCI: 00:0f.0 init 16690 usecs
+PCI: 00:0f.2 init
+cs5536_ide: ide_init
+PCI: 00:0f.2 init 3632 usecs
+PCI: 00:0f.3 init
+PCI: 00:0f.3 init 1660 usecs
+PCI: 00:0f.4 init
+PCI: 00:0f.4 init 1660 usecs
+PCI: 00:0f.5 init
+PCI: 00:0f.5 init 1660 usecs
+PCI: 00:0f.6 init
+PCI: 00:0f.6 init 1660 usecs
+PCI: 00:0f.7 init
+PCI: 00:0f.7 init 1660 usecs
+PNP: 002e.1 init
+PNP: 002e.1 init 1573 usecs
+PNP: 002e.2 init
+PNP: 002e.2 init 1573 usecs
+PNP: 002e.3 init
+PNP: 002e.3 init 1574 usecs
+PNP: 002e.5 init
+Keyboard init...
+No PS/2 keyboard detected.
+PNP: 002e.5 init 863108 usecs
+PNP: 002e.8 init
+PNP: 002e.8 init 1573 usecs
+PNP: 002e.9 init
+PNP: 002e.9 init 1573 usecs
+PNP: 002e.a init
+PNP: 002e.a init 1972 usecs
+PNP: 002e.b init
+base = 0x0295, reg = 0x40, value = 0x81
+base = 0x0295, reg = 0x48, value = 0x2a
+base = 0x0295, reg = 0x4a, value = 0x21
+base = 0x0295, reg = 0x4e, value = 0x80
+base = 0x0295, reg = 0x43, value = 0xff
+base = 0x0295, reg = 0x44, value = 0x3f
+base = 0x0295, reg = 0x4c, value = 0x18
+base = 0x0295, reg = 0x4d, value = 0x95
+PNP: 002e.b init 30083 usecs
+Devices initialized
+Show all devs...After init.
+Root Device: enabled 1
+DOMAIN: 0000: enabled 1
+PCI: 00:01.0: enabled 1
+PCI: 00:01.1: enabled 1
+PCI: 00:0f.0: enabled 1
+PNP: 002e.0: enabled 0
+PNP: 002e.1: enabled 1
+PNP: 002e.2: enabled 1
+PNP: 002e.3: enabled 1
+PNP: 002e.5: enabled 1
+PNP: 002e.6: enabled 0
+PNP: 002e.7: enabled 0
+PNP: 002e.8: enabled 1
+PNP: 002e.9: enabled 1
+PNP: 002e.a: enabled 1
+PNP: 002e.b: enabled 1
+PCI: 00:0f.1: enabled 0
+PCI: 00:0f.2: enabled 1
+PCI: 00:0f.3: enabled 1
+PCI: 00:0f.4: enabled 1
+PCI: 00:0f.5: enabled 1
+CPU_CLUSTER: 0: enabled 1
+APIC: 00: enabled 1
+PCI: 00:01.2: enabled 1
+PCI: 00:0c.0: enabled 1
+PCI: 00:0d.0: enabled 1
+PCI: 00:0e.0: enabled 1
+PCI: 00:0f.6: enabled 1
+PCI: 00:0f.7: enabled 1
+CPU: 00: enabled 1
+BS: Exiting BS_DEV_INIT state.
+BS: BS_DEV_INIT times (us): entry 0 run 1105792 exit 0
+BS: Entering BS_POST_DEVICE state.
+CBMEM region f7b0000-f7dffff (cbmem_check_toc)
+CBMEM region f7b0000-f7dffff (cbmem_initialize_empty)
+Adding CBMEM entry as no. 1
+Moving GDT to 0f7b0200...ok
+Adding CBMEM entry as no. 2
+Finalize devices...
+Devices finalized
+Adding CBMEM entry as no. 3
+BS: Exiting BS_POST_DEVICE state.
+BS: BS_POST_DEVICE times (us): entry 16640 run 9062 exit 0
+BS: Entering BS_OS_RESUME_CHECK state.
+BS: Exiting BS_OS_RESUME_CHECK state.
+BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3388 exit 0
+BS: Entering BS_WRITE_TABLES state.
+Copying Interrupt Routing Table to 0x000f0000... done.
+PIRQ Entry 0 Dev/Fn: 1 Slot: 0
+INT: A link: 1 bitmap: 800  IRQ: 11
+INT: B link: 0 bitmap: 0  not routed
+INT: C link: 0 bitmap: 0  not routed
+INT: D link: 0 bitmap: 0  not routed
+Assigning IRQ 11 to 0:1.1
+Assigning IRQ 11 to 0:1.2
+PIRQ Entry 1 Dev/Fn: C Slot: 4
+INT: A link: 3 bitmap: 800  IRQ: 11
+INT: B link: 4 bitmap: 200  IRQ: 9
+INT: C link: 1 bitmap: 800  IRQ: 11
+INT: D link: 2 bitmap: 400  IRQ: 10
+Assigning IRQ 11 to 0:c.0
+PIRQ Entry 2 Dev/Fn: D Slot: 0
+INT: A link: 2 bitmap: 400  IRQ: 10
+INT: B link: 0 bitmap: 0  not routed
+INT: C link: 0 bitmap: 0  not routed
+INT: D link: 0 bitmap: 0  not routed
+Assigning IRQ 10 to 0:d.0
+PIRQ Entry 3 Dev/Fn: E Slot: 1
+INT: A link: 1 bitmap: 800  IRQ: 11
+INT: B link: 2 bitmap: 400  IRQ: 10
+INT: C link: 3 bitmap: 800  IRQ: 11
+INT: D link: 4 bitmap: 200  IRQ: 9
+Assigning IRQ 11 to 0:e.0
+PIRQ Entry 4 Dev/Fn: F Slot: 0
+INT: A link: 1 bitmap: 800  IRQ: 11
+INT: B link: 2 bitmap: 400  IRQ: 10
+INT: C link: 3 bitmap: 800  IRQ: 11
+INT: D link: 4 bitmap: 200  IRQ: 9
+Assigning IRQ 10 to 0:f.3
+Assigning IRQ 9 to 0:f.4
+Assigning IRQ 9 to 0:f.5
+PIRQA: 11
+PIRQB: 10
+PIRQC: 11
+PIRQD: 9
+Adding CBMEM entry as no. 4
+Copying Interrupt Routing Table to 0x0f7c0600... done.
+PIRQ Entry 0 Dev/Fn: 1 Slot: 0
+INT: A link: 1 bitmap: 800  IRQ: 11
+INT: B link: 0 bitmap: 0  not routed
+INT: C link: 0 bitmap: 0  not routed
+INT: D link: 0 bitmap: 0  not routed
+Assigning IRQ 11 to 0:1.1
+Assigning IRQ 11 to 0:1.2
+PIRQ Entry 1 Dev/Fn: C Slot: 4
+INT: A link: 3 bitmap: 800  IRQ: 11
+INT: B link: 4 bitmap: 200  IRQ: 9
+INT: C link: 1 bitmap: 800  IRQ: 11
+INT: D link: 2 bitmap: 400  IRQ: 10
+Assigning IRQ 11 to 0:c.0
+PIRQ Entry 2 Dev/Fn: D Slot: 0
+INT: A link: 2 bitmap: 400  IRQ: 10
+INT: B link: 0 bitmap: 0  not routed
+INT: C link: 0 bitmap: 0  not routed
+INT: D link: 0 bitmap: 0  not routed
+Assigning IRQ 10 to 0:d.0
+PIRQ Entry 3 Dev/Fn: E Slot: 1
+INT: A link: 1 bitmap: 800  IRQ: 11
+INT: B link: 2 bitmap: 400  IRQ: 10
+INT: C link: 3 bitmap: 800  IRQ: 11
+INT: D link: 4 bitmap: 200  IRQ: 9
+Assigning IRQ 11 to 0:e.0
+PIRQ Entry 4 Dev/Fn: F Slot: 0
+INT: A link: 1 bitmap: 800  IRQ: 11
+INT: B link: 2 bitmap: 400  IRQ: 10
+INT: C link: 3 bitmap: 800  IRQ: 11
+INT: D link: 4 bitmap: 200  IRQ: 9
+Assigning IRQ 10 to 0:f.3
+Assigning IRQ 9 to 0:f.4
+Assigning IRQ 9 to 0:f.5
+PIRQA: 11
+PIRQB: 10
+PIRQC: 11
+PIRQD: 9
+PIRQ table: 112 bytes.
+Adding CBMEM entry as no. 5
+smbios_write_tables: 0f7c1600
+Root Device (PC Engines ALIX.1C)
+DOMAIN: 0000 (AMD LX Northbridge)
+PCI: 00:01.0 (AMD LX Northbridge)
+PCI: 00:01.1 (AMD LX Northbridge)
+PCI: 00:0f.0 (AMD Geode CS5536 Southbridge)
+PNP: 002e.0 (Winbond W83627HF Super I/O)
+PNP: 002e.1 (Winbond W83627HF Super I/O)
+PNP: 002e.2 (Winbond W83627HF Super I/O)
+PNP: 002e.3 (Winbond W83627HF Super I/O)
+PNP: 002e.5 (Winbond W83627HF Super I/O)
+PNP: 002e.6 (Winbond W83627HF Super I/O)
+PNP: 002e.7 (Winbond W83627HF Super I/O)
+PNP: 002e.8 (Winbond W83627HF Super I/O)
+PNP: 002e.9 (Winbond W83627HF Super I/O)
+PNP: 002e.a (Winbond W83627HF Super I/O)
+PNP: 002e.b (Winbond W83627HF Super I/O)
+PCI: 00:0f.1 (AMD Geode CS5536 Southbridge)
+PCI: 00:0f.2 (AMD Geode CS5536 Southbridge)
+PCI: 00:0f.3 (AMD Geode CS5536 Southbridge)
+PCI: 00:0f.4 (AMD Geode CS5536 Southbridge)
+PCI: 00:0f.5 (AMD Geode CS5536 Southbridge)
+CPU_CLUSTER: 0 (AMD LX Northbridge)
+APIC: 00 (unknown)
+PCI: 00:01.2 (unknown)
+PCI: 00:0c.0 (unknown)
+PCI: 00:0d.0 (unknown)
+PCI: 00:0e.0 (unknown)
+PCI: 00:0f.6 (unknown)
+PCI: 00:0f.7 (unknown)
+CPU: 00 (unknown)
+SMBIOS tables: 364 bytes.
+Adding CBMEM entry as no. 6
+Writing table forward entry at 0x00000500
+Wrote coreboot table at: 00000500, 0x10 bytes, checksum d262
+Table forward entry ends at 0x00000528.
+... aligned to 0x00001000
+Writing coreboot table at 0x0f7c1e00
+rom_table_end = 0x0f7c1e00
+... aligned to 0x0f7d0000
+ 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
+ 1. 0000000000001000-000000000009ffff: RAM
+ 2. 00000000000c0000-000000000f7affff: RAM
+ 3. 000000000f7b0000-000000000f7dffff: CONFIGURATION TABLES
+Wrote coreboot table at: 0f7c1e00, 0x5dc bytes, checksum 1128
+coreboot table: 1524 bytes.
+FREE SPACE  0. 0f7c9e00 00016200
+GDT         1. 0f7b0200 00000200
+CONSOLE     2. 0f7b0400 00010000
+TIME STAMP  3. 0f7c0400 00000200
+IRQ TABLE   4. 0f7c0600 00001000
+SMBIOS      5. 0f7c1600 00000800
+COREBOOT    6. 0f7c1e00 00008000
+BS: Exiting BS_WRITE_TABLES state.
+BS: BS_WRITE_TABLES times (us): entry 0 run 398127 exit 0
+BS: Entering BS_PAYLOAD_LOAD state.
+CBFS: located payload @ fffa1678, 52956 bytes.
+Loading segment from rom address 0xfffa1678
+  code (compression=1)
+  New segment dstaddr 0xe7170 memsize 0x18e90 srcaddr 0xfffa16b0 filesize 0xcea4
+  (cleaned up) New segment addr 0xe7170 size 0x18e90 offset 0xfffa16b0 filesize 0xcea4
+Loading segment from rom address 0xfffa1694
+  Entry Point 0x000fd53e
+Bounce Buffer at 0f746000, 434176 bytes
+Loading Segment: addr: 0x00000000000e7170 memsz: 0x0000000000018e90 filesz: 0x000000000000cea4
+lb: [0x0000000000100000, 0x0000000000135000)
+Post relocation: addr: 0x00000000000e7170 memsz: 0x0000000000018e90 filesz: 0x000000000000cea4
+using LZMA
+[ 0x000e7170, 00100000, 0x00100000) <- fffa16b0
+dest 000e7170, end 00100000, bouncebuffer f746000
+Loaded segments
+BS: Exiting BS_PAYLOAD_LOAD state.
+BS: BS_PAYLOAD_LOAD times (us): entry 0 run 177618 exit 0
+BS: Entering BS_PAYLOAD_BOOT state.
+Jumping to boot code at 000fd53e
+CPU0: stack: 00130000 - 00131000, lowest used address 00130a7c, stack used: 1412 bytes
+entry    = 0x000fd53e
+lb_start = 0x00100000
+lb_size  = 0x00035000
+buffer   = 0x0f746000
+----- [ SeaBIOS rel-1.7.4-0-g96917a8-20140814_084406-X60 ] -----
+Found coreboot cbmem console @ f7b0400
+Found mainboard PC Engines ALIX.1C
+Relocating init from 0x000e81e9 to 0x0f796060 (size 40659)
+Found CBFS header at 0xfffffaf8
+CPU Mhz=498
+Found 11 PCI devices (max PCI bus is 00)
+Copying SMBIOS entry point from 0x0f7c1600 to 0x000f20a0
+Scan for VGA option rom
+EHCI init on dev 00:0f.5 (regs=0xfe029010)
+Found 1 lpt ports
+Found 2 serial ports
+ATA controller 1 at 1f0/3f4/0 (irq 14 dev 7a)
+ATA controller 2 at 170/374/0 (irq 15 dev 7a)
+ata0-0: LEXAR ATA FLASH CARD ATA-0 Hard-Disk (7631 MiBytes)
+Searching bootorder for: /pci@i0cf8/*@f,2/drive@0/disk@0
+Got ps2 nak (status=51)
+All threads complete.
+Scan for option roms
+Searching bootorder for: HALT
+drive 0x000f2050: PCHS=15506/16/63 translation=lba LCHS=972/255/63 s=15630048
+Space available for UMB: c0000-ef000, f0000-f2050
+Returned 65536 bytes of ZoneHigh
+e820 map has 5 items:
+  0: 0000000000000000 - 000000000009fc00 = 1 RAM
+  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
+  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
+  3: 0000000000100000 - 000000000f7b0000 = 1 RAM
+  4: 000000000f7b0000 - 000000000f7e0000 = 2 RESERVED
+enter handle_19:
+  NULL
+Booting from 0000:7c00
+